From patchwork Mon Jan 8 13:02:34 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Hans de Goede X-Patchwork-Id: 13513461 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C073741230 for ; Mon, 8 Jan 2024 13:02:51 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=redhat.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=redhat.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="cMxFOZCf" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1704718970; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=8CTzeLq5UY/1OvWIJuxseZGoQrZ+HB1rfwOl+DYaY4U=; b=cMxFOZCfIzpgde+AUs+j2abP4tSTTDc6A5ff0l996PthE3wm35rXxFwcBBc3HRSktSOwwe YngikhJy772K7VhNjeJGjALkff6vQCgic4NESiPC+Cq6Zb+8Wc03m4DNHNCoN5Y//QmRc2 /aHDN3flDgv/ZdaG8p+pggRkitzcG4s= Received: from mimecast-mx02.redhat.com (mx-ext.redhat.com [66.187.233.73]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-284-n7nOq_g9OM2RfuHrkU3yzg-1; Mon, 08 Jan 2024 08:02:46 -0500 X-MC-Unique: n7nOq_g9OM2RfuHrkU3yzg-1 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.rdu2.redhat.com [10.11.54.5]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id D017C3806704; Mon, 8 Jan 2024 13:02:45 +0000 (UTC) Received: from x1.localdomain.com (unknown [10.39.194.88]) by smtp.corp.redhat.com (Postfix) with ESMTP id 4386D502C; Mon, 8 Jan 2024 13:02:43 +0000 (UTC) From: Hans de Goede To: Johannes Stezenbach , Takashi Iwai , =?utf-8?q?Ilpo_J=C3=A4rvinen?= , Andy Shevchenko , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H . Peter Anvin" , Michael Turquette , Stephen Boyd Cc: Hans de Goede , platform-driver-x86@vger.kernel.org, x86@kernel.org, linux-clk@vger.kernel.org Subject: [PATCH v3 1/5] clk: x86: Move clk-pmc-atom register defines to include/linux/platform_data/x86/pmc_atom.h Date: Mon, 8 Jan 2024 14:02:34 +0100 Message-ID: <20240108130238.540794-2-hdegoede@redhat.com> In-Reply-To: <20240108130238.540794-1-hdegoede@redhat.com> References: <20240108130238.540794-1-hdegoede@redhat.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.5 Move the register defines for the Atom (Bay Trail, Cherry Trail) PMC clocks to include/linux/platform_data/x86/pmc_atom.h. This is a preparation patch to extend the S0i3 readiness checks in drivers/platform/x86/pmc_atom.c with checking that the PMC clocks are off on suspend entry. Note these are added to include/linux/platform_data/x86/pmc_atom.h rather then to include/linux/platform_data/x86/clk-pmc-atom.h because the former already has all the other Atom PMC register defines. Reviewed-by: Ilpo Järvinen Signed-off-by: Hans de Goede Acked-by: Stephen Boyd --- Changes in v2: - This is a new patch in v2 of this series --- drivers/clk/x86/clk-pmc-atom.c | 13 +------------ include/linux/platform_data/x86/pmc_atom.h | 13 +++++++++++++ 2 files changed, 14 insertions(+), 12 deletions(-) diff --git a/drivers/clk/x86/clk-pmc-atom.c b/drivers/clk/x86/clk-pmc-atom.c index 2974dd0ec6f4..5ec9255e33fa 100644 --- a/drivers/clk/x86/clk-pmc-atom.c +++ b/drivers/clk/x86/clk-pmc-atom.c @@ -11,23 +11,12 @@ #include #include #include +#include #include #include #define PLT_CLK_NAME_BASE "pmc_plt_clk" -#define PMC_CLK_CTL_OFFSET 0x60 -#define PMC_CLK_CTL_SIZE 4 -#define PMC_CLK_NUM 6 -#define PMC_CLK_CTL_GATED_ON_D3 0x0 -#define PMC_CLK_CTL_FORCE_ON 0x1 -#define PMC_CLK_CTL_FORCE_OFF 0x2 -#define PMC_CLK_CTL_RESERVED 0x3 -#define PMC_MASK_CLK_CTL GENMASK(1, 0) -#define PMC_MASK_CLK_FREQ BIT(2) -#define PMC_CLK_FREQ_XTAL (0 << 2) /* 25 MHz */ -#define PMC_CLK_FREQ_PLL (1 << 2) /* 19.2 MHz */ - struct clk_plt_fixed { struct clk_hw *clk; struct clk_lookup *lookup; diff --git a/include/linux/platform_data/x86/pmc_atom.h b/include/linux/platform_data/x86/pmc_atom.h index b8a701c77fd0..557622ef0390 100644 --- a/include/linux/platform_data/x86/pmc_atom.h +++ b/include/linux/platform_data/x86/pmc_atom.h @@ -43,6 +43,19 @@ BIT_ORED_DEDICATED_IRQ_GPSC | \ BIT_SHARED_IRQ_GPSS) +/* External clk generator settings */ +#define PMC_CLK_CTL_OFFSET 0x60 +#define PMC_CLK_CTL_SIZE 4 +#define PMC_CLK_NUM 6 +#define PMC_CLK_CTL_GATED_ON_D3 0x0 +#define PMC_CLK_CTL_FORCE_ON 0x1 +#define PMC_CLK_CTL_FORCE_OFF 0x2 +#define PMC_CLK_CTL_RESERVED 0x3 +#define PMC_MASK_CLK_CTL GENMASK(1, 0) +#define PMC_MASK_CLK_FREQ BIT(2) +#define PMC_CLK_FREQ_XTAL (0 << 2) /* 25 MHz */ +#define PMC_CLK_FREQ_PLL (1 << 2) /* 19.2 MHz */ + /* The timers accumulate time spent in sleep state */ #define PMC_S0IR_TMR 0x80 #define PMC_S0I1_TMR 0x84 From patchwork Mon Jan 8 13:02:35 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hans de Goede X-Patchwork-Id: 13513467 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.129.124]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8D33541208 for ; Mon, 8 Jan 2024 13:03:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=redhat.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=redhat.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="g65SwyyA" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1704718989; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=9XcEZtVlWJbYKm9+7v5nWl09Pma1pqjIHTzB6rryUDo=; b=g65SwyyAutJ3LHgBT2OOmsdHD5NG5b1ibqUFi+Aka9tYB8ABrGvhjlUaA+A0mQ4gVlD+BL hmE0dpw/RxZQJFWOtZFNVQqVyfzyoicLO7SLHj03vxa7CEEeg04rKARMyIg4t7sX/5PT+L o5UQ0rJ/iYDQqnTYg6cIkhKZ1SrqY/8= Received: from mimecast-mx02.redhat.com (mx-ext.redhat.com [66.187.233.73]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-509-5uJmH4lkOfGH4zLP4AdeuQ-1; Mon, 08 Jan 2024 08:03:04 -0500 X-MC-Unique: 5uJmH4lkOfGH4zLP4AdeuQ-1 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.rdu2.redhat.com [10.11.54.5]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id 4BFF329AC01C; Mon, 8 Jan 2024 13:02:48 +0000 (UTC) Received: from x1.localdomain.com (unknown [10.39.194.88]) by smtp.corp.redhat.com (Postfix) with ESMTP id 0D44F5190; Mon, 8 Jan 2024 13:02:45 +0000 (UTC) From: Hans de Goede To: Johannes Stezenbach , Takashi Iwai , =?utf-8?q?Ilpo_J=C3=A4rvinen?= , Andy Shevchenko , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H . Peter Anvin" , Michael Turquette , Stephen Boyd Cc: Hans de Goede , platform-driver-x86@vger.kernel.org, x86@kernel.org, linux-clk@vger.kernel.org Subject: [PATCH v3 2/5] platform/x86: pmc_atom: Annotate d3_sts register bit defines Date: Mon, 8 Jan 2024 14:02:35 +0100 Message-ID: <20240108130238.540794-3-hdegoede@redhat.com> In-Reply-To: <20240108130238.540794-1-hdegoede@redhat.com> References: <20240108130238.540794-1-hdegoede@redhat.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.5 The include/linux/platform_data/x86/pmc_atom.h d3_sts register bit defines are named after how these bits are used on Bay Trail devices. On Cherry Trail (CHT) devices some of these bits have a different meaning according to the datasheet. At a comment to the defines for bits which have a different meaning on Cherry Trail devices. Signed-off-by: Hans de Goede --- include/linux/platform_data/x86/pmc_atom.h | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/include/linux/platform_data/x86/pmc_atom.h b/include/linux/platform_data/x86/pmc_atom.h index 557622ef0390..161e4bc1c9ee 100644 --- a/include/linux/platform_data/x86/pmc_atom.h +++ b/include/linux/platform_data/x86/pmc_atom.h @@ -117,14 +117,14 @@ #define BIT_SCC_SDIO BIT(9) #define BIT_SCC_SDCARD BIT(10) #define BIT_SCC_MIPI BIT(11) -#define BIT_HDA BIT(12) +#define BIT_HDA BIT(12) /* CHT datasheet: reserved */ #define BIT_LPE BIT(13) #define BIT_OTG BIT(14) -#define BIT_USH BIT(15) -#define BIT_GBE BIT(16) -#define BIT_SATA BIT(17) -#define BIT_USB_EHCI BIT(18) -#define BIT_SEC BIT(19) +#define BIT_USH BIT(15) /* CHT datasheet: reserved */ +#define BIT_GBE BIT(16) /* CHT datasheet: reserved */ +#define BIT_SATA BIT(17) /* CHT datasheet: reserved */ +#define BIT_USB_EHCI BIT(18) /* CHT datasheet: XHCI! */ +#define BIT_SEC BIT(19) /* BYT datasheet: reserved */ #define BIT_PCIE_PORT0 BIT(20) #define BIT_PCIE_PORT1 BIT(21) #define BIT_PCIE_PORT2 BIT(22) From patchwork Mon Jan 8 13:02:36 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Hans de Goede X-Patchwork-Id: 13513462 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.129.124]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 79E304120F for ; Mon, 8 Jan 2024 13:02:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=redhat.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=redhat.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="V41vo326" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1704718975; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=49wGINqIxP29fbkk6isFlsJplSVg1J5xNebNmQgDko0=; b=V41vo3266Hqm/JrrDXhw4/y9dz0If9AGcQNlxiXTPEkrRnEu0H9+X2RFcaFY5CQ2ViI7l7 CO96fb/FfTjgxB8QUxwsGhQxGe9/lxK6oHbx3egmMlnmRS4dpcNuxE1jk+NXxUzRCbyQFu bSOm7bET8D6sLTnU19ZCnS58xiR/qJs= Received: from mimecast-mx02.redhat.com (mimecast-mx02.redhat.com [66.187.233.88]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-595-TGSFTNtGOHOJPocn8miKrQ-1; Mon, 08 Jan 2024 08:02:51 -0500 X-MC-Unique: TGSFTNtGOHOJPocn8miKrQ-1 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.rdu2.redhat.com [10.11.54.5]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id 8F7FF85A58A; Mon, 8 Jan 2024 13:02:50 +0000 (UTC) Received: from x1.localdomain.com (unknown [10.39.194.88]) by smtp.corp.redhat.com (Postfix) with ESMTP id 9234A5190; Mon, 8 Jan 2024 13:02:48 +0000 (UTC) From: Hans de Goede To: Johannes Stezenbach , Takashi Iwai , =?utf-8?q?Ilpo_J=C3=A4rvinen?= , Andy Shevchenko , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H . Peter Anvin" , Michael Turquette , Stephen Boyd Cc: Hans de Goede , platform-driver-x86@vger.kernel.org, x86@kernel.org, linux-clk@vger.kernel.org Subject: [PATCH v3 3/5] platform/x86: pmc_atom: Check state of PMC managed devices on s2idle Date: Mon, 8 Jan 2024 14:02:36 +0100 Message-ID: <20240108130238.540794-4-hdegoede@redhat.com> In-Reply-To: <20240108130238.540794-1-hdegoede@redhat.com> References: <20240108130238.540794-1-hdegoede@redhat.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.5 From: Johannes Stezenbach For the Bay Trail or Cherry Trail SoC to enter the S0i3 power-level at s2idle suspend requires most of the hw-blocks / devices in the SoC to be in D3 when entering s2idle suspend. If some devices are not in D3 then the SoC will stay in a higher power state, consuming much more power from the battery then in S0i3. Use the new acpi_s2idle_dev_ops and acpi_register_lps0_dev() functionality to register a new s2idle check function which checks that all hardware blocks in the South complex (controlled by the PMC) are in a state that allows the SoC to enter S0i3 and prints an error message for any device in D0. Some blocks are not used on lower-featured versions of the SoC and these blocks will always report being in D0 on SoCs were they are not used. A false-positive mask is used to identify these blocks and for blocks in this mask the error is turned into a debug message to avoid false-positive error messages. Note the pmc_atom code is enabled by CONFIG_X86_INTEL_LPSS which already depends on ACPI. Signed-off-by: Johannes Stezenbach Signed-off-by: Takashi Iwai [hdegoede: Use acpi_s2idle_dev_ops, ignore fused off blocks, PMIC I2C] Signed-off-by: Hans de Goede Reviewed-by: Ilpo Järvinen --- Changes in v3: - Reword commit message - Drop confusing /* Low Part */ and /* High Part */ comments Changes in v2: - Drop duplicated "pmc_atom: " prefix from pr_err() / pr_dbg() messages --- drivers/platform/x86/pmc_atom.c | 64 +++++++++++++++++++++++++++++++++ 1 file changed, 64 insertions(+) diff --git a/drivers/platform/x86/pmc_atom.c b/drivers/platform/x86/pmc_atom.c index 93a6414c6611..ec60b734b9cb 100644 --- a/drivers/platform/x86/pmc_atom.c +++ b/drivers/platform/x86/pmc_atom.c @@ -6,6 +6,7 @@ #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt +#include #include #include #include @@ -17,6 +18,7 @@ #include #include #include +#include struct pmc_bit_map { const char *name; @@ -448,6 +450,64 @@ static int pmc_setup_clks(struct pci_dev *pdev, void __iomem *pmc_regmap, return 0; } +#ifdef CONFIG_SUSPEND +static void pmc_dev_state_check(u32 sts, const struct pmc_bit_map *sts_map, + u32 fd, const struct pmc_bit_map *fd_map, + u32 sts_possible_false_pos) +{ + int index; + + for (index = 0; sts_map[index].name; index++) { + if (!(fd_map[index].bit_mask & fd) && + !(sts_map[index].bit_mask & sts)) { + if (sts_map[index].bit_mask & sts_possible_false_pos) + pm_pr_dbg("%s is in D0 prior to s2idle\n", + sts_map[index].name); + else + pr_err("%s is in D0 prior to s2idle\n", + sts_map[index].name); + } + } +} + +static void pmc_s2idle_check(void) +{ + struct pmc_dev *pmc = &pmc_device; + const struct pmc_reg_map *m = pmc->map; + u32 func_dis, func_dis_2; + u32 d3_sts_0, d3_sts_1; + u32 false_pos_sts_0, false_pos_sts_1; + + func_dis = pmc_reg_read(pmc, PMC_FUNC_DIS); + func_dis_2 = pmc_reg_read(pmc, PMC_FUNC_DIS_2); + d3_sts_0 = pmc_reg_read(pmc, PMC_D3_STS_0); + d3_sts_1 = pmc_reg_read(pmc, PMC_D3_STS_1); + + /* + * Some blocks are not used on lower-featured versions of the SoC and + * always report D0, add these to false_pos mask to log at debug level. + */ + if (m->d3_sts_1 == byt_d3_sts_1_map) { + /* Bay Trail */ + false_pos_sts_0 = BIT_GBE | BIT_SATA | BIT_PCIE_PORT0 | + BIT_PCIE_PORT1 | BIT_PCIE_PORT2 | BIT_PCIE_PORT3 | + BIT_LPSS2_F5_I2C5; + false_pos_sts_1 = BIT_SMB | BIT_USH_SS_PHY | BIT_DFX; + } else { + /* Cherry Trail */ + false_pos_sts_0 = BIT_GBE | BIT_SATA | BIT_LPSS2_F7_I2C7; + false_pos_sts_1 = BIT_SMB | BIT_STS_ISH; + } + + pmc_dev_state_check(d3_sts_0, m->d3_sts_0, func_dis, m->func_dis, false_pos_sts_0); + pmc_dev_state_check(d3_sts_1, m->d3_sts_1, func_dis_2, m->func_dis_2, false_pos_sts_1); +} + +static struct acpi_s2idle_dev_ops pmc_s2idle_ops = { + .check = pmc_s2idle_check, +}; +#endif + static int pmc_setup_dev(struct pci_dev *pdev, const struct pci_device_id *ent) { struct pmc_dev *pmc = &pmc_device; @@ -485,6 +545,10 @@ static int pmc_setup_dev(struct pci_dev *pdev, const struct pci_device_id *ent) dev_warn(&pdev->dev, "platform clocks register failed: %d\n", ret); +#ifdef CONFIG_SUSPEND + acpi_register_lps0_dev(&pmc_s2idle_ops); +#endif + pmc->init = true; return ret; } From patchwork Mon Jan 8 13:02:37 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Hans de Goede X-Patchwork-Id: 13513463 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C9ADA41212 for ; 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Mon, 08 Jan 2024 08:02:54 -0500 X-MC-Unique: 5Yz6YF4GN_-EJ8fQDcQU_w-1 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.rdu2.redhat.com [10.11.54.5]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id B4E35837185; Mon, 8 Jan 2024 13:02:52 +0000 (UTC) Received: from x1.localdomain.com (unknown [10.39.194.88]) by smtp.corp.redhat.com (Postfix) with ESMTP id C0B6F5190; Mon, 8 Jan 2024 13:02:50 +0000 (UTC) From: Hans de Goede To: Johannes Stezenbach , Takashi Iwai , =?utf-8?q?Ilpo_J=C3=A4rvinen?= , Andy Shevchenko , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H . Peter Anvin" , Michael Turquette , Stephen Boyd Cc: Hans de Goede , platform-driver-x86@vger.kernel.org, x86@kernel.org, linux-clk@vger.kernel.org Subject: [PATCH v3 4/5] platform/x86: pmc_atom: Check state of PMC clocks on s2idle Date: Mon, 8 Jan 2024 14:02:37 +0100 Message-ID: <20240108130238.540794-5-hdegoede@redhat.com> In-Reply-To: <20240108130238.540794-1-hdegoede@redhat.com> References: <20240108130238.540794-1-hdegoede@redhat.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.5 Extend the s2idle check with checking that none of the PMC clocks is in the forced-on state. If one of the clocks is in forced on state then S0i3 cannot be reached. Reviewed-by: Ilpo Järvinen Signed-off-by: Hans de Goede --- Changes in v3: - Improve comment for clocks check Changes in v2: - Drop the PMC_CLK_* defines these are defined in include/linux/platform_data/x86/pmc_atom.h now - Drop duplicated "pmc_atom: " prefix from pr_err() message --- drivers/platform/x86/pmc_atom.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/drivers/platform/x86/pmc_atom.c b/drivers/platform/x86/pmc_atom.c index ec60b734b9cb..9f2009a354f9 100644 --- a/drivers/platform/x86/pmc_atom.c +++ b/drivers/platform/x86/pmc_atom.c @@ -477,6 +477,7 @@ static void pmc_s2idle_check(void) u32 func_dis, func_dis_2; u32 d3_sts_0, d3_sts_1; u32 false_pos_sts_0, false_pos_sts_1; + int i; func_dis = pmc_reg_read(pmc, PMC_FUNC_DIS); func_dis_2 = pmc_reg_read(pmc, PMC_FUNC_DIS_2); @@ -501,6 +502,16 @@ static void pmc_s2idle_check(void) pmc_dev_state_check(d3_sts_0, m->d3_sts_0, func_dis, m->func_dis, false_pos_sts_0); pmc_dev_state_check(d3_sts_1, m->d3_sts_1, func_dis_2, m->func_dis_2, false_pos_sts_1); + + /* Forced-on PMC clocks prevent S0i3 */ + for (i = 0; i < PMC_CLK_NUM; i++) { + u32 ctl = pmc_reg_read(pmc, PMC_CLK_CTL_OFFSET + 4 * i); + + if ((ctl & PMC_MASK_CLK_CTL) != PMC_CLK_CTL_FORCE_ON) + continue; + + pr_err("clock %d is ON prior to freeze (ctl 0x%08x)\n", i, ctl); + } } static struct acpi_s2idle_dev_ops pmc_s2idle_ops = { From patchwork Mon Jan 8 13:02:38 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Hans de Goede X-Patchwork-Id: 13513464 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C9A9A40C1B for ; Mon, 8 Jan 2024 13:02:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=redhat.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=redhat.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="hH5fBXGs" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1704718978; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=DEMFXoEZ8kgJc9ZjGeIxg9BWWPQWTnQ99QIAYLUuMQc=; b=hH5fBXGsnB58XwkDNClwdu32c3BL7kmEhdBBRfFhWTbbyjDgej5dAWKmmECh8f5wj7EViZ cKG2zDRkCu/0nILnanRfOdx9Wwkb4NqinMj4kOcMcCbm2hc4fd9JQUXAckQ+N3zR2ugh07 I3/PZkN7jAuSyVs/JxqQFiIhn1xDEVU= Received: from mimecast-mx02.redhat.com (mimecast-mx02.redhat.com [66.187.233.88]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-474-K85INYL8P4SlEad6Ozldjw-1; Mon, 08 Jan 2024 08:02:55 -0500 X-MC-Unique: K85INYL8P4SlEad6Ozldjw-1 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.rdu2.redhat.com [10.11.54.5]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id D5ED6101AA52; Mon, 8 Jan 2024 13:02:54 +0000 (UTC) Received: from x1.localdomain.com (unknown [10.39.194.88]) by smtp.corp.redhat.com (Postfix) with ESMTP id E74855190; Mon, 8 Jan 2024 13:02:52 +0000 (UTC) From: Hans de Goede To: Johannes Stezenbach , Takashi Iwai , =?utf-8?q?Ilpo_J=C3=A4rvinen?= , Andy Shevchenko , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H . Peter Anvin" , Michael Turquette , Stephen Boyd Cc: Hans de Goede , platform-driver-x86@vger.kernel.org, x86@kernel.org, linux-clk@vger.kernel.org Subject: [PATCH v3 5/5] x86/platform/atom: Check state of Punit managed devices on s2idle Date: Mon, 8 Jan 2024 14:02:38 +0100 Message-ID: <20240108130238.540794-6-hdegoede@redhat.com> In-Reply-To: <20240108130238.540794-1-hdegoede@redhat.com> References: <20240108130238.540794-1-hdegoede@redhat.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.5 From: Johannes Stezenbach For the Bay Trail or Cherry Trail SoC to enter the S0i3 power-level at s2idle suspend requires most of the hw-blocks / devices in the SoC to be in D3 when entering s2idle suspend. If some devices are not in D3 then the SoC will stay in a higher power state, consuming much more power from the battery then in S0i3. Use the new acpi_s2idle_dev_ops and acpi_register_lps0_dev() functionality to register a new s2idle check function which checks that all hardware blocks in theNorth complex (controlled by Punit) are in a state that allows the SoC to enter S0i3 and prints an error message for any device in D0. Signed-off-by: Johannes Stezenbach Signed-off-by: Takashi Iwai Acked-by: Borislav Petkov (AMD) [hdegoede: Use acpi_s2idle_dev_ops] Signed-off-by: Hans de Goede Reviewed-by: Ilpo Järvinen --- Changes in v3: - Reword commit message - Add punit_s2idle_check_[un]register() helper functions --- arch/x86/platform/atom/punit_atom_debug.c | 54 ++++++++++++++++++++++- 1 file changed, 53 insertions(+), 1 deletion(-) diff --git a/arch/x86/platform/atom/punit_atom_debug.c b/arch/x86/platform/atom/punit_atom_debug.c index f8ed5f66cd20..6b9c6deca8ba 100644 --- a/arch/x86/platform/atom/punit_atom_debug.c +++ b/arch/x86/platform/atom/punit_atom_debug.c @@ -7,6 +7,9 @@ * Copyright (c) 2015, Intel Corporation. */ +#define pr_fmt(fmt) "punit_atom: " fmt + +#include #include #include #include @@ -117,6 +120,51 @@ static void punit_dbgfs_unregister(void) debugfs_remove_recursive(punit_dbg_file); } +#if defined(CONFIG_ACPI) && defined(CONFIG_SUSPEND) +static const struct punit_device *punit_dev; + +static void punit_s2idle_check(void) +{ + const struct punit_device *punit_devp; + u32 punit_pwr_status, dstate; + int status; + + for (punit_devp = punit_dev; punit_devp->name; punit_devp++) { + /* Skip MIO, it is on till the very last moment */ + if (punit_devp->reg == MIO_SS_PM) + continue; + + status = iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, + punit_devp->reg, &punit_pwr_status); + if (status) { + pr_err("%s read failed\n", punit_devp->name); + } else { + dstate = (punit_pwr_status >> punit_devp->sss_pos) & 3; + if (!dstate) + pr_err("%s is in D0 prior to s2idle\n", punit_devp->name); + } + } +} + +static struct acpi_s2idle_dev_ops punit_s2idle_ops = { + .check = punit_s2idle_check, +}; + +static void punit_s2idle_check_register(struct punit_device *punit_device) +{ + punit_dev = punit_device; + acpi_register_lps0_dev(&punit_s2idle_ops); +} + +static void punit_s2idle_check_unregister(void) +{ + acpi_unregister_lps0_dev(&punit_s2idle_ops); +} +#else +static void punit_s2idle_check_register(struct punit_device *punit_device) {} +static void punit_s2idle_check_unregister(void) {} +#endif + #define X86_MATCH(model, data) \ X86_MATCH_VENDOR_FAM_MODEL_FEATURE(INTEL, 6, INTEL_FAM6_##model, \ X86_FEATURE_MWAIT, data) @@ -131,19 +179,23 @@ MODULE_DEVICE_TABLE(x86cpu, intel_punit_cpu_ids); static int __init punit_atom_debug_init(void) { + struct punit_device *punit_device; const struct x86_cpu_id *id; id = x86_match_cpu(intel_punit_cpu_ids); if (!id) return -ENODEV; - punit_dbgfs_register((struct punit_device *)id->driver_data); + punit_device = (struct punit_device *)id->driver_data; + punit_dbgfs_register(punit_device); + punit_s2idle_check_register(punit_device); return 0; } static void __exit punit_atom_debug_exit(void) { + punit_s2idle_check_unregister(); punit_dbgfs_unregister(); }