From patchwork Wed Jan 10 11:00:08 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Govindapillai, Vinod" X-Patchwork-Id: 13515963 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A119EC4707B for ; Wed, 10 Jan 2024 11:01:36 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 23A1010E59E; Wed, 10 Jan 2024 11:01:36 +0000 (UTC) Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.8]) by gabe.freedesktop.org (Postfix) with ESMTPS id 1CBDF10E597 for ; Wed, 10 Jan 2024 11:01:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1704884494; x=1736420494; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=9BxZH5gMAM7wxH5XbpKGUqfYBfKMvhQzdq6EHj5igNc=; b=f1dcFhprgeW5D7HocYAs6yfk3MI/5IkiFr/181vSjZ8zd3BOqlsmWJCL NRA1kI0F35HtG3luPEq+DjrRvtCT44nt+nUM4pxQaYGPvY0p4NzQuC6LG GHKNJ4pJzAhyoWZfawZic5iD6PLKvWFetuwRLjcpjy/3HoBCHbSVCUOq2 5AYWUWphSP1VXW+aNsJXfQMu/0IjkIXsAyEU9EkMK8MRWdzrBCOFkcDk8 H2Do7A0Nti1DyFOAFejS7FX+t7BITuG9Vz12jPFmhq0p8w2ONPkXcTgAR Ck5aI2Bfkt5ucvkzmj4yDg9G/S0V6PCPUI+QZ1N9N7lrXV8pA3Pi/2RN3 Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10947"; a="11965058" X-IronPort-AV: E=Sophos;i="6.04,184,1695711600"; d="scan'208";a="11965058" Received: from orviesa002.jf.intel.com ([10.64.159.142]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Jan 2024 03:01:25 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.04,184,1695711600"; d="scan'208";a="23908716" Received: from plebeaut-mobl.ger.corp.intel.com (HELO vgovind2-mobl3.intel.com) ([10.252.36.218]) by orviesa002-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Jan 2024 03:01:23 -0800 From: Vinod Govindapillai To: intel-gfx@lists.freedesktop.org Subject: [PATCH v1 1/2] drm/i915/display: use PAGE_SIZE macro for FBC cfb alloc Date: Wed, 10 Jan 2024 13:00:08 +0200 Message-Id: <20240110110009.28799-2-vinod.govindapillai@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240110110009.28799-1-vinod.govindapillai@intel.com> References: <20240110110009.28799-1-vinod.govindapillai@intel.com> MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: ville.syrjala@intel.com Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" FBC compressed frame buffer size need to be PAGE_SIZE aligned and the corresponding the drm_gem functions check the object size alignment using PAGE_SIZE macro. Use the PAGE_SIZE macro in the cfb alloc as well instead of the magic number. Signed-off-by: Vinod Govindapillai --- drivers/gpu/drm/i915/display/intel_fbc.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c index f17a1afb4929..9b9c8715d664 100644 --- a/drivers/gpu/drm/i915/display/intel_fbc.c +++ b/drivers/gpu/drm/i915/display/intel_fbc.c @@ -764,13 +764,15 @@ static int find_compression_limit(struct intel_fbc *fbc, /* Try to over-allocate to reduce reallocations and fragmentation. */ ret = i915_gem_stolen_insert_node_in_range(i915, &fbc->compressed_fb, - size <<= 1, 4096, 0, end); + size <<= 1, PAGE_SIZE, 0, + end); if (ret == 0) return limit; for (; limit <= intel_fbc_max_limit(i915); limit <<= 1) { ret = i915_gem_stolen_insert_node_in_range(i915, &fbc->compressed_fb, - size >>= 1, 4096, 0, end); + size >>= 1, PAGE_SIZE, 0, + end); if (ret == 0) return limit; } From patchwork Wed Jan 10 11:00:09 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Govindapillai, Vinod" X-Patchwork-Id: 13515964 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DD296C3DA6E for ; Wed, 10 Jan 2024 11:01:44 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 3F16310E762; Wed, 10 Jan 2024 11:01:44 +0000 (UTC) Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.8]) by gabe.freedesktop.org (Postfix) with ESMTPS id 468DD10E5CA for ; Wed, 10 Jan 2024 11:01:43 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1704884503; x=1736420503; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=UcfAIN6JotHUtWidjTnep3DlfX4a915G78Tgwqf7EPw=; b=fBCI//TWd+6HJW++rbgtbAoQ6ki0qzIf2kPAIzWnyYrD0Dr0iyqRVagu V6ejIZNvI3NHcDENLwE7VqhTMIvnvJjEA4e77luF4Zqi2MASUKVp0lsC0 xX3XiHe7meNsLdIobhCWtG9vMl1R27XbUSSa95Jwo37beDthneToA7ac8 Ml4B7GyYa43AerAip6WWMtzsEcy2GBU/4m1vMx0THBc5eE/methM/EnW4 eDfLbpIb3z6O+gKgSYVZ1Lx1EzuomGmGFYo3N1pZEWbQTr6ChvWawAc1j huQhIAxrnXxDr6z6YYRxZqT1z1b+K8yJHnW1ljFC/FN2KdCRt3KLpJewX A==; X-IronPort-AV: E=McAfee;i="6600,9927,10947"; a="11965076" X-IronPort-AV: E=Sophos;i="6.04,184,1695711600"; d="scan'208";a="11965076" Received: from orviesa002.jf.intel.com ([10.64.159.142]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Jan 2024 03:01:28 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.04,184,1695711600"; d="scan'208";a="23908720" Received: from plebeaut-mobl.ger.corp.intel.com (HELO vgovind2-mobl3.intel.com) ([10.252.36.218]) by orviesa002-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Jan 2024 03:01:26 -0800 From: Vinod Govindapillai To: intel-gfx@lists.freedesktop.org Subject: [PATCH v1 2/2] drm/xe: Modify the cfb size to be page size aligned for FBC Date: Wed, 10 Jan 2024 13:00:09 +0200 Message-Id: <20240110110009.28799-3-vinod.govindapillai@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240110110009.28799-1-vinod.govindapillai@intel.com> References: <20240110110009.28799-1-vinod.govindapillai@intel.com> MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: ville.syrjala@intel.com Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" drm_gem_private_object_init expect the object size be page size aligned. The xe_bo create functions do not update the size for any alignment requirements. So align cfb size to be page size aligned in xe stolen memory handling. Signed-off-by: Vinod Govindapillai --- drivers/gpu/drm/xe/compat-i915-headers/i915_gem_stolen.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/xe/compat-i915-headers/i915_gem_stolen.h b/drivers/gpu/drm/xe/compat-i915-headers/i915_gem_stolen.h index 888e7a87a925..bd233007c1b7 100644 --- a/drivers/gpu/drm/xe/compat-i915-headers/i915_gem_stolen.h +++ b/drivers/gpu/drm/xe/compat-i915-headers/i915_gem_stolen.h @@ -19,6 +19,9 @@ static inline int i915_gem_stolen_insert_node_in_range(struct xe_device *xe, int err; u32 flags = XE_BO_CREATE_PINNED_BIT | XE_BO_CREATE_STOLEN_BIT; + if (align) + size = ALIGN(size, align); + bo = xe_bo_create_locked_range(xe, xe_device_get_root_tile(xe), NULL, size, start, end, ttm_bo_type_kernel, flags);