From patchwork Fri Jan 12 21:38:00 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Henrique Barboza X-Patchwork-Id: 13518719 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0F7CCC4707C for ; Fri, 12 Jan 2024 21:39:41 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rOPET-0003og-SR; Fri, 12 Jan 2024 16:38:30 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rOPEQ-0003o5-IS for qemu-devel@nongnu.org; Fri, 12 Jan 2024 16:38:26 -0500 Received: from mail-pl1-x633.google.com ([2607:f8b0:4864:20::633]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1rOPEN-0001YC-Pf for qemu-devel@nongnu.org; Fri, 12 Jan 2024 16:38:25 -0500 Received: by mail-pl1-x633.google.com with SMTP id d9443c01a7336-1d3aa0321b5so57583585ad.2 for ; Fri, 12 Jan 2024 13:38:23 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1705095501; x=1705700301; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=lT0phRZ9oTpRjBU5KO4G/ql0H7YMEWcTrCKQ7fmArKs=; b=fVNan446iL8AMq35720eZM2IvqJIdvx7eN1kF4qA+PnmCdaZPQtzgspdPl8iLEXniv C2Qy7kLhTFGsGhvGxkk2B80r6wVWabXQBjoOIUP4n5UxyeKTE2tbIhpm7AKArNQQy/WY 0ejEMYZulVYwYLzwTF2MFGF3MnGN3z378V5cIe7bv2e5u9aqRk46dMqtA74dJLv6H+TD rTRicbMpbvh45eHgxtWmvjI9B41uax8CK2164oTkUC/JkYBG3uZ0dtHzyUShGNPqXJ+p oTdCWAm8cTnDXa6BslajDppkTN04hR14bZV6XSX5ChEnVWF6YWFadBdQuy9KfQPFC8Z8 mGGQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1705095501; x=1705700301; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=lT0phRZ9oTpRjBU5KO4G/ql0H7YMEWcTrCKQ7fmArKs=; b=vFBEkoQUbZBMvYaIbpQIbZQ66vJPkQ7nS/W+MTcosBhKzBFcnuJkJC6bUG7RugePtZ lqhyKsVlBPt30uyw/qn9yJdvhosau7rYiDD+W0wGxMM3HMqnzJvMNk216gZidsdBbfXY NQMKzabXrkaFIYE+LYeHqejeAkG7L4RfvrUCudteYk1Zzdp5O27LHYYRwVVY45FyZ3da xXBerNnscgnZkBiMKKWnIKoV9S9hHBz0H6B+ER8TRbZOnr1pDJNI7xsn6EJvRbImZsNl II4Iq8xq2faZPlOa/cyWzXnJ6dQ6x5Nz+DQM36l90tfSu7G7gd/3+4+zRFcPizhLrC5K E5qA== X-Gm-Message-State: AOJu0YxynJNUv24523AWgMN5ZuvpnMnjWpWw/lBOjtJx1OJ1vv1U7dpb LvRcoSBDj1HTWWCQsHtwasnchsJohHQAIW1pdl2+9Obv/dyGMA== X-Google-Smtp-Source: AGHT+IGEqZMVcba7VB6yaSfH+dMKkbb6UugWzE7iA7zy5t9YkDTNOLbFPzUjOzBvehchKjPjF9IGDg== X-Received: by 2002:a17:902:d4c6:b0:1d5:8cc1:70bf with SMTP id o6-20020a170902d4c600b001d58cc170bfmr2139839plg.51.1705095501562; Fri, 12 Jan 2024 13:38:21 -0800 (PST) Received: from grind.. ([152.234.123.64]) by smtp.gmail.com with ESMTPSA id lf8-20020a170902fb4800b001d5b2967d00sm364727plb.290.2024.01.12.13.38.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 12 Jan 2024 13:38:21 -0800 (PST) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liwei1518@gmail.com, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com, richard.henderson@linaro.org, max.chou@sifive.com, Daniel Henrique Barboza Subject: [PATCH 01/13] target/riscv: add 'vlenb' field in cpu->cfg Date: Fri, 12 Jan 2024 18:38:00 -0300 Message-ID: <20240112213812.173521-2-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240112213812.173521-1-dbarboza@ventanamicro.com> References: <20240112213812.173521-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::633; envelope-from=dbarboza@ventanamicro.com; helo=mail-pl1-x633.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Our usage of 'vlenb' is overwhelming superior than the use of 'vlen'. We're using 'vlenb' most of the time, having to do 'vlen >> 3' or 'vlen / 8' in every instance. In hindsight we would be better if the 'vlenb' property was introduced instead of 'vlen'. That's not what happened, and now we can't easily get rid of it due to user scripts all around. What we can do, however, is to change our internal representation to use 'vlenb'. Add a 'vlenb' field in cpu->cfg. It'll be set via the existing 'vlen' property, i.e. setting 'vlen' will also set 'vlenb'. We'll replace all 'vlen >> 3' code to use 'vlenb' directly. Start with the single instance we have in target/riscv/cpu.c. Signed-off-by: Daniel Henrique Barboza --- target/riscv/cpu.c | 4 +++- target/riscv/cpu_cfg.h | 1 + 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 8d3ec74a1c..f4261d2ffc 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -847,7 +847,7 @@ static void riscv_cpu_dump_state(CPUState *cs, FILE *f, int flags) csr_ops[csrno].name, val); } } - uint16_t vlenb = cpu->cfg.vlen >> 3; + uint16_t vlenb = cpu->cfg.vlenb; for (i = 0; i < 32; i++) { qemu_fprintf(f, " %-8s ", riscv_rvv_regnames[i]); @@ -1314,6 +1314,7 @@ static void riscv_cpu_init(Object *obj) /* Default values for non-bool cpu properties */ cpu->cfg.pmu_mask = MAKE_64BIT_MASK(3, 16); cpu->cfg.vlen = 128; + cpu->cfg.vlenb = 128 >> 3; cpu->cfg.elen = 64; cpu->env.vext_ver = VEXT_VERSION_1_00_0; } @@ -1810,6 +1811,7 @@ static void prop_vlen_set(Object *obj, Visitor *v, const char *name, cpu_option_add_user_setting(name, value); cpu->cfg.vlen = value; + cpu->cfg.vlenb = value >> 3; } static void prop_vlen_get(Object *obj, Visitor *v, const char *name, diff --git a/target/riscv/cpu_cfg.h b/target/riscv/cpu_cfg.h index fea14c275f..50479dd72f 100644 --- a/target/riscv/cpu_cfg.h +++ b/target/riscv/cpu_cfg.h @@ -140,6 +140,7 @@ struct RISCVCPUConfig { uint32_t pmu_mask; uint16_t vlen; + uint16_t vlenb; uint16_t elen; uint16_t cbom_blocksize; uint16_t cbop_blocksize; From patchwork Fri Jan 12 21:38:01 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Henrique Barboza X-Patchwork-Id: 13518718 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 76C44C47422 for ; Fri, 12 Jan 2024 21:39:09 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rOPEV-0003pA-JZ; Fri, 12 Jan 2024 16:38:31 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rOPES-0003of-A9 for qemu-devel@nongnu.org; Fri, 12 Jan 2024 16:38:28 -0500 Received: from mail-pl1-x62e.google.com ([2607:f8b0:4864:20::62e]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1rOPEQ-0001Zp-Pt for qemu-devel@nongnu.org; Fri, 12 Jan 2024 16:38:28 -0500 Received: by mail-pl1-x62e.google.com with SMTP id d9443c01a7336-1d3e8a51e6bso56040555ad.3 for ; Fri, 12 Jan 2024 13:38:26 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1705095505; x=1705700305; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=UUTQ4hAGbR/U7aTocUntatBO3/zQ0lq0rhjwH747sgA=; b=ohEhrgH0Bw/CJUw32M7COVDAV+uqLx6W6iqhOdAVUn2DGqtl9a7u8peAtrs+z2ZgXQ KzlJU/jvVu0C/22U21wXrNyS94M8LnG/edLb7JCuJpPXRtBMazg2YuRTJ+eRbiJHJFzu HOJnhOzBLwfChbYZiiia9SqEeC7iztDC7pWWooV4ytsBlhwC7ocwc/5iGEtexM7kTxTh j1O0281WwYbQgf+hkHL8OFvXwAGBGlpCzZSdM+BMYGUK/MLzwY8mlEG/fdp6yGshh3DP gkJfnnKPG+4+AY+G7Q8EuiUtMNvJZtLABYpTxySSUmqcDKIm+hpKfyMsJemI2qyxO2s7 adnQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1705095505; x=1705700305; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=UUTQ4hAGbR/U7aTocUntatBO3/zQ0lq0rhjwH747sgA=; b=dYsIvzVP3T57FpmpBNLykBGwUUC7eJmyGPQ7Y0GZan2A/866EnYEcqFwYzwaWnWcq/ 4H356KVFZxrh1E3u7xxknoZKM7XF82RLj26lt0Mivb7mWyiQtkaTN5dqQ7l2CYcRYiHN hWLpBRMoXAO2cAD9IVErhCnUVNMfxdvJiBHiTki0b58zJnCm9+8mSlnRRSlz1sWQL0UH lh9VlPzx0LIZ6+cdcnM/HCm07AKkKIrVk5J0ln2VgK4N3QEbSjZdKLGGRgiGRDgaksOF 3Dfnz632EgjIAHULt7ZfmkERZvoNwmHZQLC/YSZzSrWNcoZy5DuXKEQQgwlvwpQ99yal VTZA== X-Gm-Message-State: AOJu0Yy0AhkURoHiTBoQPqg9Stwpi2bv1IYBkgY8V2mkWv7ZmNGNKlop oGIPto0rKAEO3cjuO4cVPX3CVkPKJTd4n/sFjeyaeuOt7EO7sw== X-Google-Smtp-Source: AGHT+IGVMvaPWsjzUP5rbqhIMiLR5Jn2zPjmcDw5h4AnON92FO9+vZNankMld87ZH5hiJiSGIfnkyQ== X-Received: by 2002:a17:902:c701:b0:1d4:6dea:9adc with SMTP id p1-20020a170902c70100b001d46dea9adcmr1452634plp.9.1705095504828; Fri, 12 Jan 2024 13:38:24 -0800 (PST) Received: from grind.. ([152.234.123.64]) by smtp.gmail.com with ESMTPSA id lf8-20020a170902fb4800b001d5b2967d00sm364727plb.290.2024.01.12.13.38.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 12 Jan 2024 13:38:24 -0800 (PST) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liwei1518@gmail.com, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com, richard.henderson@linaro.org, max.chou@sifive.com, Daniel Henrique Barboza Subject: [PATCH 02/13] target/riscv/csr.c: use 'vlenb' instead of 'vlen' Date: Fri, 12 Jan 2024 18:38:01 -0300 Message-ID: <20240112213812.173521-3-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240112213812.173521-1-dbarboza@ventanamicro.com> References: <20240112213812.173521-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::62e; envelope-from=dbarboza@ventanamicro.com; helo=mail-pl1-x62e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org As a bonus, we're being more idiomatic using cpu->cfg.vlenb when reading CSR_VLENB. Signed-off-by: Daniel Henrique Barboza --- target/riscv/csr.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target/riscv/csr.c b/target/riscv/csr.c index 674ea075a4..5c8d22452b 100644 --- a/target/riscv/csr.c +++ b/target/riscv/csr.c @@ -683,7 +683,7 @@ static RISCVException read_vl(CPURISCVState *env, int csrno, static int read_vlenb(CPURISCVState *env, int csrno, target_ulong *val) { - *val = riscv_cpu_cfg(env)->vlen >> 3; + *val = riscv_cpu_cfg(env)->vlenb; return RISCV_EXCP_NONE; } @@ -738,7 +738,7 @@ static RISCVException write_vstart(CPURISCVState *env, int csrno, * The vstart CSR is defined to have only enough writable bits * to hold the largest element index, i.e. lg2(VLEN) bits. */ - env->vstart = val & ~(~0ULL << ctzl(riscv_cpu_cfg(env)->vlen)); + env->vstart = val & ~(~0ULL << ctzl(riscv_cpu_cfg(env)->vlenb << 3)); return RISCV_EXCP_NONE; } From patchwork Fri Jan 12 21:38:02 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Henrique Barboza X-Patchwork-Id: 13518727 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 13FC4C4707C for ; Fri, 12 Jan 2024 21:40:46 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rOPEX-0003t6-WC; Fri, 12 Jan 2024 16:38:34 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rOPEV-0003r7-JF for qemu-devel@nongnu.org; Fri, 12 Jan 2024 16:38:31 -0500 Received: from mail-pf1-x436.google.com ([2607:f8b0:4864:20::436]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1rOPET-0001bP-S0 for qemu-devel@nongnu.org; Fri, 12 Jan 2024 16:38:31 -0500 Received: by mail-pf1-x436.google.com with SMTP id d2e1a72fcca58-6daa822be30so3316699b3a.0 for ; Fri, 12 Jan 2024 13:38:29 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1705095508; x=1705700308; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=U9YxTyhvBJBHZnpiGwupT/MZk+RpUH5/F7uqSrQEr/Q=; b=D9FYKsAS/ZFy4hXL3dfewcpogNXNm6ACSFmEjKDGbUoaHL39fP8yhR0GH3kCPVb4Za P99K1SqnVbCAFvBgW0IeOrfj0L658zjh9slo6dMuOp+mgjqsj8RW8nAfpI9MR3VhwR+A U3stFb5zHwERCZP2SYeoC0s8IHGhShoQOC0sLBnLQ1E0nkmCABruOvmsB4DqRrlzTvP+ dKOteK4fKxvV+m0HsPhYh4x5DbJSZL1CGsHPgFPg/fQ0G7pDUg9BORTzBpYfm7fAbgU6 D6OU8PysvuM+aWfFEQRZG9NB3n1F0cHWOPyUlFIGB8zK9jzo2nJq5kQeTHJlxDC4aXtY Uv8g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1705095508; x=1705700308; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=U9YxTyhvBJBHZnpiGwupT/MZk+RpUH5/F7uqSrQEr/Q=; b=kLHQdakh6V3CD7DwRJiPwgg/t2FTQQeojgUFfTsKpFEYwXO8gJ+FKTYGMoGEcPsQhb UYhNB6AZB3vRrxAJ8lRQ+ARpgCA8Li+rjT+BhfN0c4qgmUttb663N4nWAtgnVguIWgKt 6TILzVklpqgVPxqWeQ1nr4IhHHJF6R5EosRxBzq41hVmG1Nv9zdOZgxtLmnAAqG2xTVK eAsvlZomr0N9ibGG82xAsD+/yn78zXHe/2aVnEP40DosSyyfbQX8AmpfAoVvzw+OIVS4 0j9FTpeJcZDiQIO3o8UdjQNuwQ+5dH7lrY4CvXSa8855TjDOBTn7Pd0Zy8mmwf13WsJP PfwA== X-Gm-Message-State: AOJu0Ywjmv2Jye2REjYhyQoEmBkrHpniOChCSZyWfblHEWElKzg+4eRJ C/5CRGIYkA+tP1jCNNfK7rwLjyhksJlxjcIaKnzclPlRmcUHdQ== X-Google-Smtp-Source: AGHT+IExE0N3ou/wp0WsVjsM3fEJwxupNlFH9odq8LCGv6mZHgAHn8sMvBH8PILm7i8Ey5UdPuXRQg== X-Received: by 2002:a17:902:d14a:b0:1d4:3b5b:7aab with SMTP id t10-20020a170902d14a00b001d43b5b7aabmr1128064plt.132.1705095508111; Fri, 12 Jan 2024 13:38:28 -0800 (PST) Received: from grind.. ([152.234.123.64]) by smtp.gmail.com with ESMTPSA id lf8-20020a170902fb4800b001d5b2967d00sm364727plb.290.2024.01.12.13.38.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 12 Jan 2024 13:38:27 -0800 (PST) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liwei1518@gmail.com, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com, richard.henderson@linaro.org, max.chou@sifive.com, Daniel Henrique Barboza Subject: [PATCH 03/13] target/riscv/gdbstub.c: use 'vlenb' instead of shifting 'vlen' Date: Fri, 12 Jan 2024 18:38:02 -0300 Message-ID: <20240112213812.173521-4-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240112213812.173521-1-dbarboza@ventanamicro.com> References: <20240112213812.173521-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::436; envelope-from=dbarboza@ventanamicro.com; helo=mail-pf1-x436.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Signed-off-by: Daniel Henrique Barboza --- target/riscv/gdbstub.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/target/riscv/gdbstub.c b/target/riscv/gdbstub.c index 58b3ace0fe..5ab0abda19 100644 --- a/target/riscv/gdbstub.c +++ b/target/riscv/gdbstub.c @@ -130,7 +130,7 @@ static int riscv_gdb_set_fpu(CPURISCVState *env, uint8_t *mem_buf, int n) static int riscv_gdb_get_vector(CPURISCVState *env, GByteArray *buf, int n) { - uint16_t vlenb = riscv_cpu_cfg(env)->vlen >> 3; + uint16_t vlenb = riscv_cpu_cfg(env)->vlenb; if (n < 32) { int i; int cnt = 0; @@ -146,7 +146,7 @@ static int riscv_gdb_get_vector(CPURISCVState *env, GByteArray *buf, int n) static int riscv_gdb_set_vector(CPURISCVState *env, uint8_t *mem_buf, int n) { - uint16_t vlenb = riscv_cpu_cfg(env)->vlen >> 3; + uint16_t vlenb = riscv_cpu_cfg(env)->vlenb; if (n < 32) { int i; for (i = 0; i < vlenb; i += 8) { @@ -266,7 +266,7 @@ static int ricsv_gen_dynamic_vector_xml(CPUState *cs, int base_reg) RISCVCPU *cpu = RISCV_CPU(cs); GString *s = g_string_new(NULL); g_autoptr(GString) ts = g_string_new(""); - int reg_width = cpu->cfg.vlen; + int reg_width = cpu->cfg.vlenb << 3; int num_regs = 0; int i; From patchwork Fri Jan 12 21:38:03 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Henrique Barboza X-Patchwork-Id: 13518716 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4FC72C4706C for ; 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([152.234.123.64]) by smtp.gmail.com with ESMTPSA id lf8-20020a170902fb4800b001d5b2967d00sm364727plb.290.2024.01.12.13.38.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 12 Jan 2024 13:38:30 -0800 (PST) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liwei1518@gmail.com, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com, richard.henderson@linaro.org, max.chou@sifive.com, Daniel Henrique Barboza Subject: [PATCH 04/13] target/riscv/insn_trans/trans_rvbf16.c.inc: use cpu->cfg.vlenb Date: Fri, 12 Jan 2024 18:38:03 -0300 Message-ID: <20240112213812.173521-5-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240112213812.173521-1-dbarboza@ventanamicro.com> References: <20240112213812.173521-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::632; envelope-from=dbarboza@ventanamicro.com; helo=mail-pl1-x632.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Use ctx->cfg_ptr->vlenb instead of ctx->cfg_ptr->vlen / 8. Signed-off-by: Daniel Henrique Barboza --- target/riscv/insn_trans/trans_rvbf16.c.inc | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/target/riscv/insn_trans/trans_rvbf16.c.inc b/target/riscv/insn_trans/trans_rvbf16.c.inc index 4e39c00884..8ee99df3f3 100644 --- a/target/riscv/insn_trans/trans_rvbf16.c.inc +++ b/target/riscv/insn_trans/trans_rvbf16.c.inc @@ -83,8 +83,8 @@ static bool trans_vfncvtbf16_f_f_w(DisasContext *ctx, arg_vfncvtbf16_f_f_w *a) data = FIELD_DP32(data, VDATA, VMA, ctx->vma); tcg_gen_gvec_3_ptr(vreg_ofs(ctx, a->rd), vreg_ofs(ctx, 0), vreg_ofs(ctx, a->rs2), tcg_env, - ctx->cfg_ptr->vlen / 8, - ctx->cfg_ptr->vlen / 8, data, + ctx->cfg_ptr->vlenb, + ctx->cfg_ptr->vlenb, data, gen_helper_vfncvtbf16_f_f_w); mark_vs_dirty(ctx); gen_set_label(over); @@ -112,8 +112,8 @@ static bool trans_vfwcvtbf16_f_f_v(DisasContext *ctx, arg_vfwcvtbf16_f_f_v *a) data = FIELD_DP32(data, VDATA, VMA, ctx->vma); tcg_gen_gvec_3_ptr(vreg_ofs(ctx, a->rd), vreg_ofs(ctx, 0), vreg_ofs(ctx, a->rs2), tcg_env, - ctx->cfg_ptr->vlen / 8, - ctx->cfg_ptr->vlen / 8, data, + ctx->cfg_ptr->vlenb, + ctx->cfg_ptr->vlenb, data, gen_helper_vfwcvtbf16_f_f_v); mark_vs_dirty(ctx); gen_set_label(over); @@ -143,8 +143,8 @@ static bool trans_vfwmaccbf16_vv(DisasContext *ctx, arg_vfwmaccbf16_vv *a) tcg_gen_gvec_4_ptr(vreg_ofs(ctx, a->rd), vreg_ofs(ctx, 0), vreg_ofs(ctx, a->rs1), vreg_ofs(ctx, a->rs2), tcg_env, - ctx->cfg_ptr->vlen / 8, - ctx->cfg_ptr->vlen / 8, data, + ctx->cfg_ptr->vlenb, + ctx->cfg_ptr->vlenb, data, gen_helper_vfwmaccbf16_vv); mark_vs_dirty(ctx); gen_set_label(over); From patchwork Fri Jan 12 21:38:04 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Henrique Barboza X-Patchwork-Id: 13518717 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 11A09C4707C for ; Fri, 12 Jan 2024 21:39:08 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rOPEj-0003z4-Uy; Fri, 12 Jan 2024 16:38:45 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rOPEg-0003xG-9B for qemu-devel@nongnu.org; Fri, 12 Jan 2024 16:38:43 -0500 Received: from mail-pl1-x62b.google.com ([2607:f8b0:4864:20::62b]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1rOPEa-0001er-PA for qemu-devel@nongnu.org; Fri, 12 Jan 2024 16:38:39 -0500 Received: by mail-pl1-x62b.google.com with SMTP id d9443c01a7336-1d54b765414so43520075ad.0 for ; Fri, 12 Jan 2024 13:38:36 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1705095515; x=1705700315; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=oG+n+hpiuw9eVHt2qVKYZPz8/VozWa7gXIVGPPyLFog=; b=OAz2qzBv63jpf4yJ2yPlX4ypVlGXedhYfJfS/onjFdClT0KHjJ9MO1t/A/k5wDbtum xyEqjjLhB2eH4ZwJJA96UXLfxA745H3v3Lh2bnvnIc1iBGG9Xgo3h5uBTGaWRkarahMc /c2+K761RQQBPNUAqkC4KsHSmT4TnzYa+bPuw3EUOb9gsCubOl7AoTgfSpz31S7z5eeJ R56r7PzX+GeK+Sjt2ZkAIKUJctvzwiDsE2Z57Vx4RZ6J6pH0AfieqwZ09G/BXxwNdDC9 PJMHv4rpvaYKMUrOGipPXSgt0V76rlhcZjOawWRhO05nryXZ+wL5iBNroLVyD0Dyf1OB 04zw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1705095515; x=1705700315; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=oG+n+hpiuw9eVHt2qVKYZPz8/VozWa7gXIVGPPyLFog=; b=sYVSdmms+iaxYUZjTDKTuMXUkZi7kCrYvLT20RmebBgAdcx//xV0lGlwqv6YzcbqF9 qvlZnTeed03VqK5JpLsOK038y5Mbb1LL1p2Mjj58aR0mHTFjMVwERpCu8eINNCwYeM0T h32oVrV1VbjMmU1l4yLSujOb0UXY+rbJiL5N4UCidBblqx3jzTD8HtNdusYdUpu5KuEo MOYXXjeAxxLma/Yx8MWNjuXr0M0pT4hMwC90ZfIR9MJviHqvfDxu4TP3gy64+mL/nkM0 cHM8hNXZ3iuVtce9HrfUBBVsJ8YnMVI43XDair+VTWlzjUP9+YcDsT2vEkAEHqJoFxg2 Gj/Q== X-Gm-Message-State: AOJu0YyTdvcVBx3tRWITI8FrVlKeU9V1X6EOTGhtOxFUpXsbgQHddSVb O/8gbGbmVLeeE0N89zw/VRoiREKmI6mE8BDht52vOioFDRl1iQ== X-Google-Smtp-Source: AGHT+IGPnUDLlRzbVbEl2uGKBjEiOVnwLgZ2DkCaWy5mC0a7qD2bTm/7JGprCC7fYXcsIef40PqcoQ== X-Received: by 2002:a17:902:64c9:b0:1d5:1476:d494 with SMTP id y9-20020a17090264c900b001d51476d494mr1517586pli.10.1705095514749; Fri, 12 Jan 2024 13:38:34 -0800 (PST) Received: from grind.. ([152.234.123.64]) by smtp.gmail.com with ESMTPSA id lf8-20020a170902fb4800b001d5b2967d00sm364727plb.290.2024.01.12.13.38.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 12 Jan 2024 13:38:34 -0800 (PST) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liwei1518@gmail.com, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com, richard.henderson@linaro.org, max.chou@sifive.com, Daniel Henrique Barboza Subject: [PATCH 05/13] target/riscv/insn_trans/trans_rvv.c.inc: use 'vlenb' Date: Fri, 12 Jan 2024 18:38:04 -0300 Message-ID: <20240112213812.173521-6-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240112213812.173521-1-dbarboza@ventanamicro.com> References: <20240112213812.173521-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::62b; envelope-from=dbarboza@ventanamicro.com; helo=mail-pl1-x62b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Use s->cfg_ptr->vlenb instead of "s->cfg_ptr->vlen / 8" and "s->cfg_ptr->vlen >> 3". Signed-off-by: Daniel Henrique Barboza --- target/riscv/insn_trans/trans_rvv.c.inc | 140 ++++++++++++------------ 1 file changed, 70 insertions(+), 70 deletions(-) diff --git a/target/riscv/insn_trans/trans_rvv.c.inc b/target/riscv/insn_trans/trans_rvv.c.inc index 3871f0ea73..d743675262 100644 --- a/target/riscv/insn_trans/trans_rvv.c.inc +++ b/target/riscv/insn_trans/trans_rvv.c.inc @@ -217,7 +217,7 @@ static bool trans_vsetivli(DisasContext *s, arg_vsetivli *a) /* vector register offset from env */ static uint32_t vreg_ofs(DisasContext *s, int reg) { - return offsetof(CPURISCVState, vreg) + reg * s->cfg_ptr->vlen / 8; + return offsetof(CPURISCVState, vreg) + reg * s->cfg_ptr->vlenb; } /* check functions */ @@ -627,11 +627,11 @@ static bool ldst_us_trans(uint32_t vd, uint32_t rs1, uint32_t data, * As simd_desc supports at most 2048 bytes, and in this implementation, * the max vector group length is 4096 bytes. So split it into two parts. * - * The first part is vlen in bytes, encoded in maxsz of simd_desc. + * The first part is vlen in bytes (vlenb), encoded in maxsz of simd_desc. * The second part is lmul, encoded in data of simd_desc. */ - desc = tcg_constant_i32(simd_desc(s->cfg_ptr->vlen / 8, - s->cfg_ptr->vlen / 8, data)); + desc = tcg_constant_i32(simd_desc(s->cfg_ptr->vlenb, + s->cfg_ptr->vlenb, data)); tcg_gen_addi_ptr(dest, tcg_env, vreg_ofs(s, vd)); tcg_gen_addi_ptr(mask, tcg_env, vreg_ofs(s, 0)); @@ -791,8 +791,8 @@ static bool ldst_stride_trans(uint32_t vd, uint32_t rs1, uint32_t rs2, mask = tcg_temp_new_ptr(); base = get_gpr(s, rs1, EXT_NONE); stride = get_gpr(s, rs2, EXT_NONE); - desc = tcg_constant_i32(simd_desc(s->cfg_ptr->vlen / 8, - s->cfg_ptr->vlen / 8, data)); + desc = tcg_constant_i32(simd_desc(s->cfg_ptr->vlenb, + s->cfg_ptr->vlenb, data)); tcg_gen_addi_ptr(dest, tcg_env, vreg_ofs(s, vd)); tcg_gen_addi_ptr(mask, tcg_env, vreg_ofs(s, 0)); @@ -897,8 +897,8 @@ static bool ldst_index_trans(uint32_t vd, uint32_t rs1, uint32_t vs2, mask = tcg_temp_new_ptr(); index = tcg_temp_new_ptr(); base = get_gpr(s, rs1, EXT_NONE); - desc = tcg_constant_i32(simd_desc(s->cfg_ptr->vlen / 8, - s->cfg_ptr->vlen / 8, data)); + desc = tcg_constant_i32(simd_desc(s->cfg_ptr->vlenb, + s->cfg_ptr->vlenb, data)); tcg_gen_addi_ptr(dest, tcg_env, vreg_ofs(s, vd)); tcg_gen_addi_ptr(index, tcg_env, vreg_ofs(s, vs2)); @@ -1036,8 +1036,8 @@ static bool ldff_trans(uint32_t vd, uint32_t rs1, uint32_t data, dest = tcg_temp_new_ptr(); mask = tcg_temp_new_ptr(); base = get_gpr(s, rs1, EXT_NONE); - desc = tcg_constant_i32(simd_desc(s->cfg_ptr->vlen / 8, - s->cfg_ptr->vlen / 8, data)); + desc = tcg_constant_i32(simd_desc(s->cfg_ptr->vlenb, + s->cfg_ptr->vlenb, data)); tcg_gen_addi_ptr(dest, tcg_env, vreg_ofs(s, vd)); tcg_gen_addi_ptr(mask, tcg_env, vreg_ofs(s, 0)); @@ -1086,7 +1086,7 @@ static bool ldst_whole_trans(uint32_t vd, uint32_t rs1, uint32_t nf, uint32_t width, gen_helper_ldst_whole *fn, DisasContext *s, bool is_store) { - uint32_t evl = (s->cfg_ptr->vlen / 8) * nf / width; + uint32_t evl = s->cfg_ptr->vlenb * nf / width; TCGLabel *over = gen_new_label(); tcg_gen_brcondi_tl(TCG_COND_GEU, cpu_vstart, evl, over); @@ -1096,8 +1096,8 @@ static bool ldst_whole_trans(uint32_t vd, uint32_t rs1, uint32_t nf, uint32_t data = FIELD_DP32(0, VDATA, NF, nf); dest = tcg_temp_new_ptr(); - desc = tcg_constant_i32(simd_desc(s->cfg_ptr->vlen / 8, - s->cfg_ptr->vlen / 8, data)); + desc = tcg_constant_i32(simd_desc(s->cfg_ptr->vlenb, + s->cfg_ptr->vlenb, data)); base = get_gpr(s, rs1, EXT_NONE); tcg_gen_addi_ptr(dest, tcg_env, vreg_ofs(s, vd)); @@ -1199,8 +1199,8 @@ do_opivv_gvec(DisasContext *s, arg_rmrr *a, GVecGen3Fn *gvec_fn, data = FIELD_DP32(data, VDATA, VMA, s->vma); tcg_gen_gvec_4_ptr(vreg_ofs(s, a->rd), vreg_ofs(s, 0), vreg_ofs(s, a->rs1), vreg_ofs(s, a->rs2), - tcg_env, s->cfg_ptr->vlen / 8, - s->cfg_ptr->vlen / 8, data, fn); + tcg_env, s->cfg_ptr->vlenb, + s->cfg_ptr->vlenb, data, fn); } mark_vs_dirty(s); gen_set_label(over); @@ -1248,8 +1248,8 @@ static bool opivx_trans(uint32_t vd, uint32_t rs1, uint32_t vs2, uint32_t vm, data = FIELD_DP32(data, VDATA, VTA, s->vta); data = FIELD_DP32(data, VDATA, VTA_ALL_1S, s->cfg_vta_all_1s); data = FIELD_DP32(data, VDATA, VMA, s->vma); - desc = tcg_constant_i32(simd_desc(s->cfg_ptr->vlen / 8, - s->cfg_ptr->vlen / 8, data)); + desc = tcg_constant_i32(simd_desc(s->cfg_ptr->vlenb, + s->cfg_ptr->vlenb, data)); tcg_gen_addi_ptr(dest, tcg_env, vreg_ofs(s, vd)); tcg_gen_addi_ptr(src2, tcg_env, vreg_ofs(s, vs2)); @@ -1410,8 +1410,8 @@ static bool opivi_trans(uint32_t vd, uint32_t imm, uint32_t vs2, uint32_t vm, data = FIELD_DP32(data, VDATA, VTA, s->vta); data = FIELD_DP32(data, VDATA, VTA_ALL_1S, s->cfg_vta_all_1s); data = FIELD_DP32(data, VDATA, VMA, s->vma); - desc = tcg_constant_i32(simd_desc(s->cfg_ptr->vlen / 8, - s->cfg_ptr->vlen / 8, data)); + desc = tcg_constant_i32(simd_desc(s->cfg_ptr->vlenb, + s->cfg_ptr->vlenb, data)); tcg_gen_addi_ptr(dest, tcg_env, vreg_ofs(s, vd)); tcg_gen_addi_ptr(src2, tcg_env, vreg_ofs(s, vs2)); @@ -1492,8 +1492,8 @@ static bool do_opivv_widen(DisasContext *s, arg_rmrr *a, tcg_gen_gvec_4_ptr(vreg_ofs(s, a->rd), vreg_ofs(s, 0), vreg_ofs(s, a->rs1), vreg_ofs(s, a->rs2), - tcg_env, s->cfg_ptr->vlen / 8, - s->cfg_ptr->vlen / 8, + tcg_env, s->cfg_ptr->vlenb, + s->cfg_ptr->vlenb, data, fn); mark_vs_dirty(s); gen_set_label(over); @@ -1568,8 +1568,8 @@ static bool do_opiwv_widen(DisasContext *s, arg_rmrr *a, tcg_gen_gvec_4_ptr(vreg_ofs(s, a->rd), vreg_ofs(s, 0), vreg_ofs(s, a->rs1), vreg_ofs(s, a->rs2), - tcg_env, s->cfg_ptr->vlen / 8, - s->cfg_ptr->vlen / 8, data, fn); + tcg_env, s->cfg_ptr->vlenb, + s->cfg_ptr->vlenb, data, fn); mark_vs_dirty(s); gen_set_label(over); return true; @@ -1639,8 +1639,8 @@ static bool opivv_trans(uint32_t vd, uint32_t vs1, uint32_t vs2, uint32_t vm, data = FIELD_DP32(data, VDATA, VTA_ALL_1S, s->cfg_vta_all_1s); data = FIELD_DP32(data, VDATA, VMA, s->vma); tcg_gen_gvec_4_ptr(vreg_ofs(s, vd), vreg_ofs(s, 0), vreg_ofs(s, vs1), - vreg_ofs(s, vs2), tcg_env, s->cfg_ptr->vlen / 8, - s->cfg_ptr->vlen / 8, data, fn); + vreg_ofs(s, vs2), tcg_env, s->cfg_ptr->vlenb, + s->cfg_ptr->vlenb, data, fn); mark_vs_dirty(s); gen_set_label(over); return true; @@ -1831,8 +1831,8 @@ static bool trans_##NAME(DisasContext *s, arg_rmrr *a) \ tcg_gen_gvec_4_ptr(vreg_ofs(s, a->rd), vreg_ofs(s, 0), \ vreg_ofs(s, a->rs1), \ vreg_ofs(s, a->rs2), tcg_env, \ - s->cfg_ptr->vlen / 8, \ - s->cfg_ptr->vlen / 8, data, \ + s->cfg_ptr->vlenb, \ + s->cfg_ptr->vlenb, data, \ fns[s->sew]); \ mark_vs_dirty(s); \ gen_set_label(over); \ @@ -2036,8 +2036,8 @@ static bool trans_vmv_v_v(DisasContext *s, arg_vmv_v_v *a) tcg_gen_brcond_tl(TCG_COND_GEU, cpu_vstart, cpu_vl, over); tcg_gen_gvec_2_ptr(vreg_ofs(s, a->rd), vreg_ofs(s, a->rs1), - tcg_env, s->cfg_ptr->vlen / 8, - s->cfg_ptr->vlen / 8, data, + tcg_env, s->cfg_ptr->vlenb, + s->cfg_ptr->vlenb, data, fns[s->sew]); gen_set_label(over); } @@ -2082,8 +2082,8 @@ static bool trans_vmv_v_x(DisasContext *s, arg_vmv_v_x *a) }; tcg_gen_ext_tl_i64(s1_i64, s1); - desc = tcg_constant_i32(simd_desc(s->cfg_ptr->vlen / 8, - s->cfg_ptr->vlen / 8, data)); + desc = tcg_constant_i32(simd_desc(s->cfg_ptr->vlenb, + s->cfg_ptr->vlenb, data)); tcg_gen_addi_ptr(dest, tcg_env, vreg_ofs(s, a->rd)); fns[s->sew](dest, s1_i64, tcg_env, desc); } @@ -2121,8 +2121,8 @@ static bool trans_vmv_v_i(DisasContext *s, arg_vmv_v_i *a) s1 = tcg_constant_i64(simm); dest = tcg_temp_new_ptr(); - desc = tcg_constant_i32(simd_desc(s->cfg_ptr->vlen / 8, - s->cfg_ptr->vlen / 8, data)); + desc = tcg_constant_i32(simd_desc(s->cfg_ptr->vlenb, + s->cfg_ptr->vlenb, data)); tcg_gen_addi_ptr(dest, tcg_env, vreg_ofs(s, a->rd)); fns[s->sew](dest, s1, tcg_env, desc); @@ -2275,8 +2275,8 @@ static bool trans_##NAME(DisasContext *s, arg_rmrr *a) \ tcg_gen_gvec_4_ptr(vreg_ofs(s, a->rd), vreg_ofs(s, 0), \ vreg_ofs(s, a->rs1), \ vreg_ofs(s, a->rs2), tcg_env, \ - s->cfg_ptr->vlen / 8, \ - s->cfg_ptr->vlen / 8, data, \ + s->cfg_ptr->vlenb, \ + s->cfg_ptr->vlenb, data, \ fns[s->sew - 1]); \ mark_vs_dirty(s); \ gen_set_label(over); \ @@ -2303,8 +2303,8 @@ static bool opfvf_trans(uint32_t vd, uint32_t rs1, uint32_t vs2, dest = tcg_temp_new_ptr(); mask = tcg_temp_new_ptr(); src2 = tcg_temp_new_ptr(); - desc = tcg_constant_i32(simd_desc(s->cfg_ptr->vlen / 8, - s->cfg_ptr->vlen / 8, data)); + desc = tcg_constant_i32(simd_desc(s->cfg_ptr->vlenb, + s->cfg_ptr->vlenb, data)); tcg_gen_addi_ptr(dest, tcg_env, vreg_ofs(s, vd)); tcg_gen_addi_ptr(src2, tcg_env, vreg_ofs(s, vs2)); @@ -2391,8 +2391,8 @@ static bool trans_##NAME(DisasContext *s, arg_rmrr *a) \ tcg_gen_gvec_4_ptr(vreg_ofs(s, a->rd), vreg_ofs(s, 0), \ vreg_ofs(s, a->rs1), \ vreg_ofs(s, a->rs2), tcg_env, \ - s->cfg_ptr->vlen / 8, \ - s->cfg_ptr->vlen / 8, data, \ + s->cfg_ptr->vlenb, \ + s->cfg_ptr->vlenb, data, \ fns[s->sew - 1]); \ mark_vs_dirty(s); \ gen_set_label(over); \ @@ -2465,8 +2465,8 @@ static bool trans_##NAME(DisasContext *s, arg_rmrr *a) \ tcg_gen_gvec_4_ptr(vreg_ofs(s, a->rd), vreg_ofs(s, 0), \ vreg_ofs(s, a->rs1), \ vreg_ofs(s, a->rs2), tcg_env, \ - s->cfg_ptr->vlen / 8, \ - s->cfg_ptr->vlen / 8, data, \ + s->cfg_ptr->vlenb, \ + s->cfg_ptr->vlenb, data, \ fns[s->sew - 1]); \ mark_vs_dirty(s); \ gen_set_label(over); \ @@ -2581,8 +2581,8 @@ static bool do_opfv(DisasContext *s, arg_rmr *a, data = FIELD_DP32(data, VDATA, VMA, s->vma); tcg_gen_gvec_3_ptr(vreg_ofs(s, a->rd), vreg_ofs(s, 0), vreg_ofs(s, a->rs2), tcg_env, - s->cfg_ptr->vlen / 8, - s->cfg_ptr->vlen / 8, data, fn); + s->cfg_ptr->vlenb, + s->cfg_ptr->vlenb, data, fn); mark_vs_dirty(s); gen_set_label(over); return true; @@ -2691,8 +2691,8 @@ static bool trans_vfmv_v_f(DisasContext *s, arg_vfmv_v_f *a) do_nanbox(s, t1, cpu_fpr[a->rs1]); dest = tcg_temp_new_ptr(); - desc = tcg_constant_i32(simd_desc(s->cfg_ptr->vlen / 8, - s->cfg_ptr->vlen / 8, data)); + desc = tcg_constant_i32(simd_desc(s->cfg_ptr->vlenb, + s->cfg_ptr->vlenb, data)); tcg_gen_addi_ptr(dest, tcg_env, vreg_ofs(s, a->rd)); fns[s->sew - 1](dest, t1, tcg_env, desc); @@ -2770,8 +2770,8 @@ static bool trans_##NAME(DisasContext *s, arg_rmr *a) \ data = FIELD_DP32(data, VDATA, VMA, s->vma); \ tcg_gen_gvec_3_ptr(vreg_ofs(s, a->rd), vreg_ofs(s, 0), \ vreg_ofs(s, a->rs2), tcg_env, \ - s->cfg_ptr->vlen / 8, \ - s->cfg_ptr->vlen / 8, data, \ + s->cfg_ptr->vlenb, \ + s->cfg_ptr->vlenb, data, \ fns[s->sew - 1]); \ mark_vs_dirty(s); \ gen_set_label(over); \ @@ -2821,8 +2821,8 @@ static bool trans_##NAME(DisasContext *s, arg_rmr *a) \ data = FIELD_DP32(data, VDATA, VMA, s->vma); \ tcg_gen_gvec_3_ptr(vreg_ofs(s, a->rd), vreg_ofs(s, 0), \ vreg_ofs(s, a->rs2), tcg_env, \ - s->cfg_ptr->vlen / 8, \ - s->cfg_ptr->vlen / 8, data, \ + s->cfg_ptr->vlenb, \ + s->cfg_ptr->vlenb, data, \ fns[s->sew]); \ mark_vs_dirty(s); \ gen_set_label(over); \ @@ -2888,8 +2888,8 @@ static bool trans_##NAME(DisasContext *s, arg_rmr *a) \ data = FIELD_DP32(data, VDATA, VMA, s->vma); \ tcg_gen_gvec_3_ptr(vreg_ofs(s, a->rd), vreg_ofs(s, 0), \ vreg_ofs(s, a->rs2), tcg_env, \ - s->cfg_ptr->vlen / 8, \ - s->cfg_ptr->vlen / 8, data, \ + s->cfg_ptr->vlenb, \ + s->cfg_ptr->vlenb, data, \ fns[s->sew - 1]); \ mark_vs_dirty(s); \ gen_set_label(over); \ @@ -2937,8 +2937,8 @@ static bool trans_##NAME(DisasContext *s, arg_rmr *a) \ data = FIELD_DP32(data, VDATA, VMA, s->vma); \ tcg_gen_gvec_3_ptr(vreg_ofs(s, a->rd), vreg_ofs(s, 0), \ vreg_ofs(s, a->rs2), tcg_env, \ - s->cfg_ptr->vlen / 8, \ - s->cfg_ptr->vlen / 8, data, \ + s->cfg_ptr->vlenb, \ + s->cfg_ptr->vlenb, data, \ fns[s->sew]); \ mark_vs_dirty(s); \ gen_set_label(over); \ @@ -3027,8 +3027,8 @@ static bool trans_##NAME(DisasContext *s, arg_r *a) \ tcg_gen_gvec_4_ptr(vreg_ofs(s, a->rd), vreg_ofs(s, 0), \ vreg_ofs(s, a->rs1), \ vreg_ofs(s, a->rs2), tcg_env, \ - s->cfg_ptr->vlen / 8, \ - s->cfg_ptr->vlen / 8, data, fn); \ + s->cfg_ptr->vlenb, \ + s->cfg_ptr->vlenb, data, fn); \ mark_vs_dirty(s); \ gen_set_label(over); \ return true; \ @@ -3061,8 +3061,8 @@ static bool trans_vcpop_m(DisasContext *s, arg_rmr *a) mask = tcg_temp_new_ptr(); src2 = tcg_temp_new_ptr(); dst = dest_gpr(s, a->rd); - desc = tcg_constant_i32(simd_desc(s->cfg_ptr->vlen / 8, - s->cfg_ptr->vlen / 8, data)); + desc = tcg_constant_i32(simd_desc(s->cfg_ptr->vlenb, + s->cfg_ptr->vlenb, data)); tcg_gen_addi_ptr(src2, tcg_env, vreg_ofs(s, a->rs2)); tcg_gen_addi_ptr(mask, tcg_env, vreg_ofs(s, 0)); @@ -3090,8 +3090,8 @@ static bool trans_vfirst_m(DisasContext *s, arg_rmr *a) mask = tcg_temp_new_ptr(); src2 = tcg_temp_new_ptr(); dst = dest_gpr(s, a->rd); - desc = tcg_constant_i32(simd_desc(s->cfg_ptr->vlen / 8, - s->cfg_ptr->vlen / 8, data)); + desc = tcg_constant_i32(simd_desc(s->cfg_ptr->vlenb, + s->cfg_ptr->vlenb, data)); tcg_gen_addi_ptr(src2, tcg_env, vreg_ofs(s, a->rs2)); tcg_gen_addi_ptr(mask, tcg_env, vreg_ofs(s, 0)); @@ -3128,8 +3128,8 @@ static bool trans_##NAME(DisasContext *s, arg_rmr *a) \ data = FIELD_DP32(data, VDATA, VMA, s->vma); \ tcg_gen_gvec_3_ptr(vreg_ofs(s, a->rd), \ vreg_ofs(s, 0), vreg_ofs(s, a->rs2), \ - tcg_env, s->cfg_ptr->vlen / 8, \ - s->cfg_ptr->vlen / 8, \ + tcg_env, s->cfg_ptr->vlenb, \ + s->cfg_ptr->vlenb, \ data, fn); \ mark_vs_dirty(s); \ gen_set_label(over); \ @@ -3171,8 +3171,8 @@ static bool trans_viota_m(DisasContext *s, arg_viota_m *a) }; tcg_gen_gvec_3_ptr(vreg_ofs(s, a->rd), vreg_ofs(s, 0), vreg_ofs(s, a->rs2), tcg_env, - s->cfg_ptr->vlen / 8, - s->cfg_ptr->vlen / 8, data, fns[s->sew]); + s->cfg_ptr->vlenb, + s->cfg_ptr->vlenb, data, fns[s->sew]); mark_vs_dirty(s); gen_set_label(over); return true; @@ -3200,8 +3200,8 @@ static bool trans_vid_v(DisasContext *s, arg_vid_v *a) gen_helper_vid_v_w, gen_helper_vid_v_d, }; tcg_gen_gvec_2_ptr(vreg_ofs(s, a->rd), vreg_ofs(s, 0), - tcg_env, s->cfg_ptr->vlen / 8, - s->cfg_ptr->vlen / 8, + tcg_env, s->cfg_ptr->vlenb, + s->cfg_ptr->vlenb, data, fns[s->sew]); mark_vs_dirty(s); gen_set_label(over); @@ -3620,8 +3620,8 @@ static bool trans_vcompress_vm(DisasContext *s, arg_r *a) data = FIELD_DP32(data, VDATA, VTA, s->vta); tcg_gen_gvec_4_ptr(vreg_ofs(s, a->rd), vreg_ofs(s, 0), vreg_ofs(s, a->rs1), vreg_ofs(s, a->rs2), - tcg_env, s->cfg_ptr->vlen / 8, - s->cfg_ptr->vlen / 8, data, + tcg_env, s->cfg_ptr->vlenb, + s->cfg_ptr->vlenb, data, fns[s->sew]); mark_vs_dirty(s); gen_set_label(over); @@ -3641,7 +3641,7 @@ static bool trans_##NAME(DisasContext *s, arg_##NAME * a) \ vext_check_isa_ill(s) && \ QEMU_IS_ALIGNED(a->rd, LEN) && \ QEMU_IS_ALIGNED(a->rs2, LEN)) { \ - uint32_t maxsz = (s->cfg_ptr->vlen >> 3) * LEN; \ + uint32_t maxsz = s->cfg_ptr->vlenb * LEN; \ if (s->vstart_eq_zero) { \ tcg_gen_gvec_mov(s->sew, vreg_ofs(s, a->rd), \ vreg_ofs(s, a->rs2), maxsz, maxsz); \ @@ -3723,8 +3723,8 @@ static bool int_ext_op(DisasContext *s, arg_rmr *a, uint8_t seq) tcg_gen_gvec_3_ptr(vreg_ofs(s, a->rd), vreg_ofs(s, 0), vreg_ofs(s, a->rs2), tcg_env, - s->cfg_ptr->vlen / 8, - s->cfg_ptr->vlen / 8, data, fn); + s->cfg_ptr->vlenb, + s->cfg_ptr->vlenb, data, fn); mark_vs_dirty(s); gen_set_label(over); From patchwork Fri Jan 12 21:38:05 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Henrique Barboza X-Patchwork-Id: 13518715 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 34984C4707C for ; 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([152.234.123.64]) by smtp.gmail.com with ESMTPSA id lf8-20020a170902fb4800b001d5b2967d00sm364727plb.290.2024.01.12.13.38.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 12 Jan 2024 13:38:37 -0800 (PST) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liwei1518@gmail.com, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com, richard.henderson@linaro.org, max.chou@sifive.com, Daniel Henrique Barboza Subject: [PATCH 06/13] target/riscv/insn_trans/trans_rvvk.c.inc: use 'vlenb' Date: Fri, 12 Jan 2024 18:38:05 -0300 Message-ID: <20240112213812.173521-7-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240112213812.173521-1-dbarboza@ventanamicro.com> References: <20240112213812.173521-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::433; envelope-from=dbarboza@ventanamicro.com; helo=mail-pf1-x433.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Use s->cfg_ptr->vlenb instead of s->cfg_ptr->vlen / 8. Signed-off-by: Daniel Henrique Barboza --- target/riscv/insn_trans/trans_rvvk.c.inc | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/target/riscv/insn_trans/trans_rvvk.c.inc b/target/riscv/insn_trans/trans_rvvk.c.inc index 3801c16829..a5cdd1b67f 100644 --- a/target/riscv/insn_trans/trans_rvvk.c.inc +++ b/target/riscv/insn_trans/trans_rvvk.c.inc @@ -174,7 +174,7 @@ GEN_OPIVX_GVEC_TRANS_CHECK(vandn_vx, andcs, zvkb_vx_check) data = FIELD_DP32(data, VDATA, VMA, s->vma); \ tcg_gen_gvec_3_ptr(vreg_ofs(s, a->rd), vreg_ofs(s, 0), \ vreg_ofs(s, a->rs2), tcg_env, \ - s->cfg_ptr->vlen / 8, s->cfg_ptr->vlen / 8, \ + s->cfg_ptr->vlenb, s->cfg_ptr->vlenb, \ data, fns[s->sew]); \ mark_vs_dirty(s); \ gen_set_label(over); \ @@ -267,7 +267,7 @@ GEN_OPIVI_WIDEN_TRANS(vwsll_vi, IMM_ZX, vwsll_vx, vwsll_vx_check) rd_v = tcg_temp_new_ptr(); \ rs2_v = tcg_temp_new_ptr(); \ desc = tcg_constant_i32( \ - simd_desc(s->cfg_ptr->vlen / 8, s->cfg_ptr->vlen / 8, data)); \ + simd_desc(s->cfg_ptr->vlenb, s->cfg_ptr->vlenb, data)); \ tcg_gen_addi_ptr(rd_v, tcg_env, vreg_ofs(s, a->rd)); \ tcg_gen_addi_ptr(rs2_v, tcg_env, vreg_ofs(s, a->rs2)); \ gen_helper_##NAME(rd_v, rs2_v, tcg_env, desc); \ @@ -345,7 +345,7 @@ GEN_V_UNMASKED_TRANS(vaesem_vs, vaes_check_vs, ZVKNED_EGS) rs2_v = tcg_temp_new_ptr(); \ uimm_v = tcg_constant_i32(a->rs1); \ desc = tcg_constant_i32( \ - simd_desc(s->cfg_ptr->vlen / 8, s->cfg_ptr->vlen / 8, data)); \ + simd_desc(s->cfg_ptr->vlenb, s->cfg_ptr->vlenb, data)); \ tcg_gen_addi_ptr(rd_v, tcg_env, vreg_ofs(s, a->rd)); \ tcg_gen_addi_ptr(rs2_v, tcg_env, vreg_ofs(s, a->rs2)); \ gen_helper_##NAME(rd_v, rs2_v, uimm_v, tcg_env, desc); \ @@ -413,7 +413,7 @@ GEN_VI_UNMASKED_TRANS(vaeskf2_vi, vaeskf2_check, ZVKNED_EGS) \ tcg_gen_gvec_3_ptr(vreg_ofs(s, a->rd), vreg_ofs(s, a->rs1), \ vreg_ofs(s, a->rs2), tcg_env, \ - s->cfg_ptr->vlen / 8, s->cfg_ptr->vlen / 8, \ + s->cfg_ptr->vlenb, s->cfg_ptr->vlenb, \ data, gen_helper_##NAME); \ \ mark_vs_dirty(s); \ @@ -466,8 +466,8 @@ static bool trans_vsha2cl_vv(DisasContext *s, arg_rmrr *a) data = FIELD_DP32(data, VDATA, VMA, s->vma); tcg_gen_gvec_3_ptr(vreg_ofs(s, a->rd), vreg_ofs(s, a->rs1), - vreg_ofs(s, a->rs2), tcg_env, s->cfg_ptr->vlen / 8, - s->cfg_ptr->vlen / 8, data, + vreg_ofs(s, a->rs2), tcg_env, s->cfg_ptr->vlenb, + s->cfg_ptr->vlenb, data, s->sew == MO_32 ? gen_helper_vsha2cl32_vv : gen_helper_vsha2cl64_vv); @@ -500,8 +500,8 @@ static bool trans_vsha2ch_vv(DisasContext *s, arg_rmrr *a) data = FIELD_DP32(data, VDATA, VMA, s->vma); tcg_gen_gvec_3_ptr(vreg_ofs(s, a->rd), vreg_ofs(s, a->rs1), - vreg_ofs(s, a->rs2), tcg_env, s->cfg_ptr->vlen / 8, - s->cfg_ptr->vlen / 8, data, + vreg_ofs(s, a->rs2), tcg_env, s->cfg_ptr->vlenb, + s->cfg_ptr->vlenb, data, s->sew == MO_32 ? gen_helper_vsha2ch32_vv : gen_helper_vsha2ch64_vv); From patchwork Fri Jan 12 21:38:06 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Henrique Barboza X-Patchwork-Id: 13518724 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4CF43C4706C for ; Fri, 12 Jan 2024 21:40:05 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rOPEv-0004B7-Sj; Fri, 12 Jan 2024 16:38:57 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rOPEo-00043h-2s for qemu-devel@nongnu.org; Fri, 12 Jan 2024 16:38:51 -0500 Received: from mail-pl1-x630.google.com ([2607:f8b0:4864:20::630]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1rOPEh-0001iJ-SR for qemu-devel@nongnu.org; Fri, 12 Jan 2024 16:38:47 -0500 Received: by mail-pl1-x630.google.com with SMTP id d9443c01a7336-1d3e416f303so30112465ad.0 for ; Fri, 12 Jan 2024 13:38:43 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1705095521; x=1705700321; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=c/bYy377eBAB8ujfxwt+DVHep63OPHeK0P6n1e/iX68=; b=pHcmqClITNCRKmxB9e86K+FKcpmthc5mt5NmnkOfIovfAt7L4m/i+OumyJUqB6wspk mPIYx3uFyxIWUXB7hCmvxuCX6R90SiMEaQU5xKqqx203wcftcFGZUy9dF0QbZoNn0urt WDl8vHMw1eTLaJDiGCfqYOh18KBFJJ70HpUikAYgzEEr09yG3wFG9rCZA1D7GYwrKbkQ W2nLVLrO78Ae80BuAjraQzFSS4uiKF87R/G7KECK6lDzOiSGKtuyymxmt5W5ZousuP3K Yje8e8qv2VKqQL1OLpEZWq86toCRWfvW0zCb2MS78TWe3xNV5cLw6T77l81AyeVX7UUT n8YQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1705095521; x=1705700321; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=c/bYy377eBAB8ujfxwt+DVHep63OPHeK0P6n1e/iX68=; b=P1sPNlkpsX03I74rqlVHNi2p5zady3rx3SA6o/ME0VdOttwLnKb49InzhKdJRtFFbj 7r5JLlN5eFhDZVEbeKHpiAof/0pR0FCzWLt1nTzPXNvbwi4bAJwsuwJLuqrhD2NcuHYR bKAzDgdQo9rQ245NYMQaOyVIfQO6Pw9w6jiIGRDQlDqfzKFjOKpOiX5i3oImHzfisaRm 5pmrGaFNCpttIQhlVuzPD9/W/hQmoH8fbCWGuzJYLHogaWImd66BzNk+Uqw1yH8Hj151 FmxPODIFR9JNtxtL++rcDsvHPE6xZWK+m/t4HOcV0/uOQintYgd6HL6fHh9fkcXEXOlE waGA== X-Gm-Message-State: AOJu0YxHr5jnAMAFKfhv+WftyAj+nbhYMlkFfQt+MW8JORjEbp3RwpgY o0JL4oTc8jYpzLA1Sgk4YJIMQ2t6JznNQTiTyNyFxcmvEtFJfw== X-Google-Smtp-Source: AGHT+IGRIaWFsUOsn/HhLxJHz5b610vEKWrpDOwH93pAxtzG8oNHw1ngwh1LSQxRKAjF4eAKNSt3Xg== X-Received: by 2002:a17:903:26c7:b0:1d4:ab9e:4d51 with SMTP id jg7-20020a17090326c700b001d4ab9e4d51mr1344670plb.7.1705095521412; Fri, 12 Jan 2024 13:38:41 -0800 (PST) Received: from grind.. ([152.234.123.64]) by smtp.gmail.com with ESMTPSA id lf8-20020a170902fb4800b001d5b2967d00sm364727plb.290.2024.01.12.13.38.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 12 Jan 2024 13:38:41 -0800 (PST) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liwei1518@gmail.com, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com, richard.henderson@linaro.org, max.chou@sifive.com, Daniel Henrique Barboza Subject: [PATCH 07/13] target/riscv/vector_helper.c: use 'vlenb' Date: Fri, 12 Jan 2024 18:38:06 -0300 Message-ID: <20240112213812.173521-8-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240112213812.173521-1-dbarboza@ventanamicro.com> References: <20240112213812.173521-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::630; envelope-from=dbarboza@ventanamicro.com; helo=mail-pl1-x630.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Use 'cpu->cfg.vlenb' instead of 'cpu->cfg.vlen >> 3'. Signed-off-by: Daniel Henrique Barboza --- target/riscv/vector_helper.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c index c1c3a4d1ea..cb944229b0 100644 --- a/target/riscv/vector_helper.c +++ b/target/riscv/vector_helper.c @@ -558,7 +558,7 @@ vext_ldst_whole(void *vd, target_ulong base, CPURISCVState *env, uint32_t desc, { uint32_t i, k, off, pos; uint32_t nf = vext_nf(desc); - uint32_t vlenb = riscv_cpu_cfg(env)->vlen >> 3; + uint32_t vlenb = riscv_cpu_cfg(env)->vlenb; uint32_t max_elems = vlenb >> log2_esz; k = env->vstart / max_elems; @@ -929,7 +929,7 @@ void HELPER(NAME)(void *vd, void *v0, void *vs1, void *vs2, \ { \ uint32_t vl = env->vl; \ uint32_t vm = vext_vm(desc); \ - uint32_t total_elems = riscv_cpu_cfg(env)->vlen; \ + uint32_t total_elems = riscv_cpu_cfg(env)->vlenb << 3; \ uint32_t vta_all_1s = vext_vta_all_1s(desc); \ uint32_t i; \ \ @@ -967,7 +967,7 @@ void HELPER(NAME)(void *vd, void *v0, target_ulong s1, \ { \ uint32_t vl = env->vl; \ uint32_t vm = vext_vm(desc); \ - uint32_t total_elems = riscv_cpu_cfg(env)->vlen; \ + uint32_t total_elems = riscv_cpu_cfg(env)->vlenb << 3; \ uint32_t vta_all_1s = vext_vta_all_1s(desc); \ uint32_t i; \ \ @@ -1171,7 +1171,7 @@ void HELPER(NAME)(void *vd, void *v0, void *vs1, void *vs2, \ { \ uint32_t vm = vext_vm(desc); \ uint32_t vl = env->vl; \ - uint32_t total_elems = riscv_cpu_cfg(env)->vlen; \ + uint32_t total_elems = riscv_cpu_cfg(env)->vlenb << 3; \ uint32_t vta_all_1s = vext_vta_all_1s(desc); \ uint32_t vma = vext_vma(desc); \ uint32_t i; \ @@ -1236,7 +1236,7 @@ void HELPER(NAME)(void *vd, void *v0, target_ulong s1, void *vs2, \ { \ uint32_t vm = vext_vm(desc); \ uint32_t vl = env->vl; \ - uint32_t total_elems = riscv_cpu_cfg(env)->vlen; \ + uint32_t total_elems = riscv_cpu_cfg(env)->vlenb << 3; \ uint32_t vta_all_1s = vext_vta_all_1s(desc); \ uint32_t vma = vext_vma(desc); \ uint32_t i; \ @@ -3971,7 +3971,7 @@ void HELPER(NAME)(void *vd, void *v0, void *vs1, void *vs2, \ { \ uint32_t vm = vext_vm(desc); \ uint32_t vl = env->vl; \ - uint32_t total_elems = riscv_cpu_cfg(env)->vlen; \ + uint32_t total_elems = riscv_cpu_cfg(env)->vlenb << 3; \ uint32_t vta_all_1s = vext_vta_all_1s(desc); \ uint32_t vma = vext_vma(desc); \ uint32_t i; \ @@ -4011,7 +4011,7 @@ void HELPER(NAME)(void *vd, void *v0, uint64_t s1, void *vs2, \ { \ uint32_t vm = vext_vm(desc); \ uint32_t vl = env->vl; \ - uint32_t total_elems = riscv_cpu_cfg(env)->vlen; \ + uint32_t total_elems = riscv_cpu_cfg(env)->vlenb << 3; \ uint32_t vta_all_1s = vext_vta_all_1s(desc); \ uint32_t vma = vext_vma(desc); \ uint32_t i; \ @@ -4528,7 +4528,7 @@ void HELPER(NAME)(void *vd, void *v0, void *vs1, \ uint32_t desc) \ { \ uint32_t vl = env->vl; \ - uint32_t total_elems = riscv_cpu_cfg(env)->vlen; \ + uint32_t total_elems = riscv_cpu_cfg(env)->vlenb << 3;\ uint32_t vta_all_1s = vext_vta_all_1s(desc); \ uint32_t i; \ int a, b; \ @@ -4615,7 +4615,7 @@ static void vmsetm(void *vd, void *v0, void *vs2, CPURISCVState *env, { uint32_t vm = vext_vm(desc); uint32_t vl = env->vl; - uint32_t total_elems = riscv_cpu_cfg(env)->vlen; + uint32_t total_elems = riscv_cpu_cfg(env)->vlenb << 3; uint32_t vta_all_1s = vext_vta_all_1s(desc); uint32_t vma = vext_vma(desc); int i; From patchwork Fri Jan 12 21:38:07 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Henrique Barboza X-Patchwork-Id: 13518723 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0E7D9C47422 for ; Fri, 12 Jan 2024 21:40:00 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rOPEx-0004IS-Af; Fri, 12 Jan 2024 16:38:59 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rOPEp-00044p-Se for qemu-devel@nongnu.org; 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([152.234.123.64]) by smtp.gmail.com with ESMTPSA id lf8-20020a170902fb4800b001d5b2967d00sm364727plb.290.2024.01.12.13.38.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 12 Jan 2024 13:38:44 -0800 (PST) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liwei1518@gmail.com, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com, richard.henderson@linaro.org, max.chou@sifive.com, Daniel Henrique Barboza Subject: [PATCH 08/13] target/riscv/vector_helper.c: use vlenb in HELPER(vsetvl) Date: Fri, 12 Jan 2024 18:38:07 -0300 Message-ID: <20240112213812.173521-9-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240112213812.173521-1-dbarboza@ventanamicro.com> References: <20240112213812.173521-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::62c; envelope-from=dbarboza@ventanamicro.com; helo=mail-pl1-x62c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Use the new 'vlenb' CPU config to validate fractional LMUL. The original comparison is done with 'vlen' and 'sew', both in bits. Use sew/8, or sew in bytes, to do a direct comparison with vlenb. Signed-off-by: Daniel Henrique Barboza --- target/riscv/vector_helper.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c index cb944229b0..0c1a485d1e 100644 --- a/target/riscv/vector_helper.c +++ b/target/riscv/vector_helper.c @@ -45,9 +45,12 @@ target_ulong HELPER(vsetvl)(CPURISCVState *env, target_ulong s1, xlen - 1 - R_VTYPE_RESERVED_SHIFT); if (lmul & 4) { - /* Fractional LMUL - check LMUL * VLEN >= SEW */ - if (lmul == 4 || - cpu->cfg.vlen >> (8 - lmul) < sew) { + /* + * Fractional LMUL - check LMUL * VLEN >= SEW, or + * vlen >> (8 - lmul) < sew. We have 'vlenb', so + * compare it with sew in bytes. + */ + if (lmul == 4 || cpu->cfg.vlenb >> (8 - lmul) < (sew << 3)) { vill = true; } } From patchwork Fri Jan 12 21:38:08 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Henrique Barboza X-Patchwork-Id: 13518722 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3F029C47422 for ; Fri, 12 Jan 2024 21:39:52 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rOPEy-0004Le-Cs; Fri, 12 Jan 2024 16:39:00 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rOPEu-0004AL-8T for qemu-devel@nongnu.org; Fri, 12 Jan 2024 16:38:56 -0500 Received: from mail-pl1-x633.google.com ([2607:f8b0:4864:20::633]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1rOPEp-0001mf-Jj for qemu-devel@nongnu.org; Fri, 12 Jan 2024 16:38:55 -0500 Received: by mail-pl1-x633.google.com with SMTP id d9443c01a7336-1d44200b976so41983195ad.2 for ; Fri, 12 Jan 2024 13:38:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1705095528; x=1705700328; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=4bw7Zp+zQmSgEkEK6TQdHIV+yc1YaPy2qRjc8df2Gg4=; b=c2hLvDBbASuTLE/WRN7Xvhd2I+ITNUfCfN/flBVdt6cTexSfIRGS52pTY1Y3ZnXtAN /rEmxh+yMh7LED4KjlGiNnmjil3iUoSMkU6fbuN5+tnR/jUKY6m1JqqiCG849UQ3wVzv YWOVsMkDff3K4TlhgebILMbwe5juYDGljNz/lWjGBB+D0HzcyzKsh1Gse0NxiTWzRGOQ RB5D5sUoSPhsfnDcnQO/UELroX/5RzcHDa4vkweoYPkp7AIv5BQWmLdUmRhb1OdjYmk1 dzhUcvVCf/se6bohMd6MAr75w+jBaGIzsKm7tfOueMBqVdhKIQbii5Yqp7veK6CkOYdd QPlQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1705095528; x=1705700328; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=4bw7Zp+zQmSgEkEK6TQdHIV+yc1YaPy2qRjc8df2Gg4=; b=xULPAIZT9QT36cVgU9ODH09CCmq1nl6arIpiBDPU0m29UJHMrO6h3GqAPfgijKfAz3 pkhogdTGaxbPswVfQ2jydgEHU96OyhxpylITZieiYx0UT4O6DboGk1P83fMN2II31/7r NW3V8/guPvGJwQvQmAXvkSbK/wfZX/2+Uu2ZV0VP4nthEQkYQHq/HuHnPuZWfyWL1MNk Qa65YJtQMiesjDdvvwOZt3Ce9aYUQpWEp5GBpp3N1TsGMchVrGsD18M1TTPXkLZ+Yji3 DNENrybc3t9wOkeudabqdeuBUPJidPIrf5XChOl1cBYhpk8ObF/12sczZyKeYRBcHsRN 4Rjw== X-Gm-Message-State: AOJu0YxinbQrVZxK9CZLDDA+N3gKLY4jqFv4SN5KGOjyWaZCtWxphNbn UgFxIqA6gd7MgeuYQGPhxGd2TxKSjLZ2NM3bi1vwANKPLzDpqg== X-Google-Smtp-Source: AGHT+IG3XoDKvK8qQz2jeDh6RSfi2i+ck36xcDk6Y7xc4pMkz4cbKaBsBwIe9/2zMKNFSXCkStOzGg== X-Received: by 2002:a17:903:2692:b0:1d5:769f:389c with SMTP id jf18-20020a170903269200b001d5769f389cmr1334774plb.56.1705095528028; Fri, 12 Jan 2024 13:38:48 -0800 (PST) Received: from grind.. ([152.234.123.64]) by smtp.gmail.com with ESMTPSA id lf8-20020a170902fb4800b001d5b2967d00sm364727plb.290.2024.01.12.13.38.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 12 Jan 2024 13:38:47 -0800 (PST) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liwei1518@gmail.com, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com, richard.henderson@linaro.org, max.chou@sifive.com, Daniel Henrique Barboza Subject: [PATCH 09/13] target/riscv/cpu.h: use 'vlenb' in vext_get_vlmax() Date: Fri, 12 Jan 2024 18:38:08 -0300 Message-ID: <20240112213812.173521-10-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240112213812.173521-1-dbarboza@ventanamicro.com> References: <20240112213812.173521-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::633; envelope-from=dbarboza@ventanamicro.com; helo=mail-pl1-x633.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Signed-off-by: Daniel Henrique Barboza --- target/riscv/cpu.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index 11df226a00..628ef67d5f 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -692,7 +692,8 @@ static inline uint32_t vext_get_vlmax(RISCVCPU *cpu, target_ulong vtype) { uint8_t sew = FIELD_EX64(vtype, VTYPE, VSEW); int8_t lmul = sextract32(FIELD_EX64(vtype, VTYPE, VLMUL), 0, 3); - return cpu->cfg.vlen >> (sew + 3 - lmul); + /* vlen = vlenb << 3 */ + return (cpu->cfg.vlenb << 3) >> (sew + 3 - lmul); } void cpu_get_tb_cpu_state(CPURISCVState *env, vaddr *pc, From patchwork Fri Jan 12 21:38:09 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Henrique Barboza X-Patchwork-Id: 13518725 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 899D1C4707C for ; Fri, 12 Jan 2024 21:40:16 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rOPEz-0004OZ-80; Fri, 12 Jan 2024 16:39:01 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rOPEu-0004B6-Pd for qemu-devel@nongnu.org; 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([152.234.123.64]) by smtp.gmail.com with ESMTPSA id lf8-20020a170902fb4800b001d5b2967d00sm364727plb.290.2024.01.12.13.38.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 12 Jan 2024 13:38:50 -0800 (PST) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liwei1518@gmail.com, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com, richard.henderson@linaro.org, max.chou@sifive.com, Daniel Henrique Barboza Subject: [PATCH 10/13] target/riscv/insn_trans/trans_rvv.c.inc: use 'vlenb' in MAXSZ() Date: Fri, 12 Jan 2024 18:38:09 -0300 Message-ID: <20240112213812.173521-11-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240112213812.173521-1-dbarboza@ventanamicro.com> References: <20240112213812.173521-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::633; envelope-from=dbarboza@ventanamicro.com; helo=mail-pl1-x633.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org MAXSZ() returns the value in bytes. Now that we have access to vlenb we don't need to compensate with a '-3' in the scale to use 'vlen'. MAXSZ() now works as follows: LMUL lmul=scale MAXSZ (vlenb >> -scale) 1 0 vlenb 2 1 vlenb << 1 4 2 vlenb << 2 8 3 vlenb << 3 1/8 -3 vlenb >> 3 1/4 -2 vlenb >> 2 1/2 -1 vlenb >> 1 Signed-off-by: Daniel Henrique Barboza --- target/riscv/insn_trans/trans_rvv.c.inc | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/target/riscv/insn_trans/trans_rvv.c.inc b/target/riscv/insn_trans/trans_rvv.c.inc index d743675262..804cfd6c7f 100644 --- a/target/riscv/insn_trans/trans_rvv.c.inc +++ b/target/riscv/insn_trans/trans_rvv.c.inc @@ -1160,12 +1160,11 @@ GEN_LDST_WHOLE_TRANS(vs8r_v, 8, 1, true) /* * MAXSZ returns the maximum vector size can be operated in bytes, * which is used in GVEC IR when vl_eq_vlmax flag is set to true - * to accerlate vector operation. + * to accelerate vector operation. */ static inline uint32_t MAXSZ(DisasContext *s) { - int scale = s->lmul - 3; - return s->cfg_ptr->vlen >> -scale; + return s->cfg_ptr->vlenb >> -s->lmul; } static bool opivv_check(DisasContext *s, arg_rmrr *a) From patchwork Fri Jan 12 21:38:10 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Henrique Barboza X-Patchwork-Id: 13518726 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 65A92C4707C for ; Fri, 12 Jan 2024 21:40:40 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rOPEz-0004Of-9k; Fri, 12 Jan 2024 16:39:01 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rOPEw-0004Dn-Cb for qemu-devel@nongnu.org; Fri, 12 Jan 2024 16:38:58 -0500 Received: from mail-pl1-x633.google.com ([2607:f8b0:4864:20::633]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1rOPEu-0001ud-M9 for qemu-devel@nongnu.org; Fri, 12 Jan 2024 16:38:58 -0500 Received: by mail-pl1-x633.google.com with SMTP id d9443c01a7336-1d3e6c86868so58274465ad.1 for ; Fri, 12 Jan 2024 13:38:56 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1705095534; x=1705700334; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=wA2wpvlTemx9xa4Wy4Iybz0qngA+6AVoY+2orIrGk6Q=; b=jtFt+lk59pSWBd+D5u3lltUYaC3Vz1K/ehy2Z4reyoZ46VwjH/wSl2srdppfgd6VPh 3H0BzfuduJyPLSKE1T1xidwyAto+QvsqKAcwelaJtYsIY9lX1nUre5PDtPmM+8j0YjDx GcWFiWlsLfb2388iiIzIdjAezkUSsF+epaIYl8B4JCOD09tM4hNUoce35RHxDMQrAYIL 7RYt3p5m+dmPUHad/uSroxXOTgavrL8w2n10j3dXlU+lq8ocjPYSmfksf+a88Bve229o ZH5MUdYluevBZQEnlKnZunhHYwf1UzId6ReZ28PA0Q4zq8thkniz3CMqg3/LXDG9L53p Nadg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1705095534; x=1705700334; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=wA2wpvlTemx9xa4Wy4Iybz0qngA+6AVoY+2orIrGk6Q=; b=vR+tMivylGsl3VRuvF/JSPC5r4mAui1hiH9N4Q4Z9tcuDLd48EB+vrP0PZeC6b7/er 0yC907qzQE7gWpmqNyjcc0YcXgJnaB9rzKpPpLFzQ3NAZYuZGWIHxts2yslrn2NFTMhP yKg1AqUj8nfQrnuGli1SzobWQm5gjFE8CTjq5ao6uLEasXQNTNxMcjVyqMhjU7naPyr+ 3AzmjVcYEch3bm3e/EIx8HlaxZQlaJx0cwSuvi3pvxtgREdbDouU/WXF75vONHBG1z13 R2O+kgivSatFQO+GRfHuZW0avU+lH5aOT0qQoMhaieez0o02jLTFNkub1MgqFjPCterp e1+g== X-Gm-Message-State: AOJu0YwYMrRiNfe7fvYP26SKk+PSxo8+kPXl87h92Azb9ev9UFZ/DNL+ Rk2f41i9LM8Y7kBGOllQoLcoo2lm9aJezShZluuI/ikQGf8Nrw== X-Google-Smtp-Source: AGHT+IHKvvUVn3EqVNUQssaSYpaaTCg3hM7akSpu5hmpCH4Ko0GpKwuuHhfXzzUjd3fazx86j6wnJA== X-Received: by 2002:a17:902:9f8e:b0:1d4:1199:1cbb with SMTP id g14-20020a1709029f8e00b001d411991cbbmr1778206plq.98.1705095534466; Fri, 12 Jan 2024 13:38:54 -0800 (PST) Received: from grind.. ([152.234.123.64]) by smtp.gmail.com with ESMTPSA id lf8-20020a170902fb4800b001d5b2967d00sm364727plb.290.2024.01.12.13.38.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 12 Jan 2024 13:38:54 -0800 (PST) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liwei1518@gmail.com, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com, richard.henderson@linaro.org, max.chou@sifive.com, Daniel Henrique Barboza Subject: [PATCH 11/13] trans_rvv.c.inc: remove vlmax arg from vec_element_loadx() Date: Fri, 12 Jan 2024 18:38:10 -0300 Message-ID: <20240112213812.173521-12-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240112213812.173521-1-dbarboza@ventanamicro.com> References: <20240112213812.173521-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::633; envelope-from=dbarboza@ventanamicro.com; helo=mail-pl1-x633.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Signed-off-by: Daniel Henrique Barboza --- target/riscv/insn_trans/trans_rvv.c.inc | 26 +++++++++++++++++-------- 1 file changed, 18 insertions(+), 8 deletions(-) diff --git a/target/riscv/insn_trans/trans_rvv.c.inc b/target/riscv/insn_trans/trans_rvv.c.inc index 804cfd6c7f..3782d0fa2f 100644 --- a/target/riscv/insn_trans/trans_rvv.c.inc +++ b/target/riscv/insn_trans/trans_rvv.c.inc @@ -3265,21 +3265,28 @@ static void endian_adjust(TCGv_i32 ofs, int sew) #endif } -/* Load idx >= VLMAX ? 0 : vreg[idx] */ +/* + * Load idx >= VLMAX ? 0 : vreg[idx] + * + * This function assumes ctx->vl_eq_vlmax = true. + */ static void vec_element_loadx(DisasContext *s, TCGv_i64 dest, - int vreg, TCGv idx, int vlmax) + int vreg, TCGv idx) { TCGv_i32 ofs = tcg_temp_new_i32(); + TCGv_i32 vlmax = tcg_temp_new_i32(); TCGv_ptr base = tcg_temp_new_ptr(); TCGv_i64 t_idx = tcg_temp_new_i64(); - TCGv_i64 t_vlmax, t_zero; + TCGv_i64 t_zero, t_vlmax = tcg_temp_new_i64(); /* * Mask the index to the length so that we do * not produce an out-of-range load. */ + tcg_gen_trunc_tl_i32(vlmax, cpu_vl); + tcg_gen_sub_i32(vlmax, vlmax, tcg_constant_i32(1)); tcg_gen_trunc_tl_i32(ofs, idx); - tcg_gen_andi_i32(ofs, ofs, vlmax - 1); + tcg_gen_and_i32(ofs, ofs, vlmax); /* Convert the index to an offset. */ endian_adjust(ofs, s->sew); @@ -3294,10 +3301,15 @@ static void vec_element_loadx(DisasContext *s, TCGv_i64 dest, vreg_ofs(s, vreg), s->sew, false); /* Flush out-of-range indexing to zero. */ - t_vlmax = tcg_constant_i64(vlmax); t_zero = tcg_constant_i64(0); tcg_gen_extu_tl_i64(t_idx, idx); +#ifdef TARGET_RISCV64 + tcg_gen_mov_i64(t_vlmax, cpu_vl); +#else + tcg_gen_extu_tl_i64(t_vlmax, cpu_vl); +#endif + tcg_gen_movcond_i64(TCG_COND_LTU, dest, t_idx, t_vlmax, dest, t_zero); } @@ -3534,14 +3546,12 @@ static bool trans_vrgather_vx(DisasContext *s, arg_rmrr *a) } if (a->vm && s->vl_eq_vlmax && !(s->vta && s->lmul < 0)) { - int scale = s->lmul - (s->sew + 3); - int vlmax = s->cfg_ptr->vlen >> -scale; TCGv_i64 dest = tcg_temp_new_i64(); if (a->rs1 == 0) { vec_element_loadi(s, dest, a->rs2, 0, false); } else { - vec_element_loadx(s, dest, a->rs2, cpu_gpr[a->rs1], vlmax); + vec_element_loadx(s, dest, a->rs2, cpu_gpr[a->rs1]); } tcg_gen_gvec_dup_i64(s->sew, vreg_ofs(s, a->rd), From patchwork Fri Jan 12 21:38:11 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Henrique Barboza X-Patchwork-Id: 13518720 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5C13FC4706C for ; Fri, 12 Jan 2024 21:39:45 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rOPF1-0004TO-7H; Fri, 12 Jan 2024 16:39:03 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rOPEz-0004P8-DU for qemu-devel@nongnu.org; Fri, 12 Jan 2024 16:39:01 -0500 Received: from mail-pl1-x634.google.com ([2607:f8b0:4864:20::634]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1rOPEx-0001z0-O1 for qemu-devel@nongnu.org; Fri, 12 Jan 2024 16:39:01 -0500 Received: by mail-pl1-x634.google.com with SMTP id d9443c01a7336-1d4ca2fd2fbso40909565ad.2 for ; Fri, 12 Jan 2024 13:38:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1705095537; x=1705700337; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=mYEDx5DjFeo8N7odKjdkQR8QLaY46yyZIFXqnXBj1FQ=; b=W/yCtjAp+myYYwM0SzVpDoJXllUYv1YuWFJQ32dyzUfthaIX+xyxYC8S1FjeBwNL5L wklrezwAF77FCTEKqLbtmw72H9qir+9If+QzdUx9Y5NMX7fCNKtFPdshJ3K6ddBr4rkL uQOhsZUWx0WhcFZz5hNTuKMA+3Em54wFTykVknojNRMQheRMvZUkpTSUer49JlR8gO1P kMhRwLlfb+wSAMEPgMm4iLTLMo08lsd6TOkESAi7MiW0rN7MmbCOI/1Iu2xya902I4mb Ac4vQpaQ9gDY1vktQABB7DxpQ2Q0b0Qqb8OU8pR7QdNYecjf4Vlf5uPAWN2wmGBRLIpG YrpQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1705095537; x=1705700337; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=mYEDx5DjFeo8N7odKjdkQR8QLaY46yyZIFXqnXBj1FQ=; b=kWzYYLuCGBbvtshCT9DC6BiUwwX3HJv1fuYszqrLlbQ4ZXTeviZlomVUX1dhRGRnJG 3IUxyi6o55smI1BwqLhjUdojBC44FkE3l4pq/fKJh5J/6a9UWacjNikvRRDMSzHtP372 9ASt6YIkTGfvPwELTe3SF13OrKKa+vb2QrXXywgz2KyiEaAotjL+rW92w2DWdnl7hhpy TPTw0GismqprFuksvfnokIHp3jfxmmhW6iQl/djrVFNjbUjlO3z2odi5/DdvyOBaDZLB t3q+xdnKlMUSEN5hhEUKkaG4+Qp/IkMwOSpL+20VAK7iyjzXXWdqqdsZ58DzRlcjGdQ9 dG1g== X-Gm-Message-State: AOJu0YxthKn5EsijUylXCpYvsUbpr1BvOYBcRAcrvLR07o2BwyFtxo4z lrG8vJiYQSGNAnDx7BrtLilEXO7oPON2jLD5Ch2e0b2FLBxo0A== X-Google-Smtp-Source: AGHT+IEn5J3a2gi50iml0y76dFtIAWhM+8V7ZIvp0J+usC0RFNWZAq/MD2dKGsdEWjy8zfbpg5g9GA== X-Received: by 2002:a17:902:f551:b0:1d4:bba1:bc61 with SMTP id h17-20020a170902f55100b001d4bba1bc61mr1679692plf.119.1705095537672; Fri, 12 Jan 2024 13:38:57 -0800 (PST) Received: from grind.. ([152.234.123.64]) by smtp.gmail.com with ESMTPSA id lf8-20020a170902fb4800b001d5b2967d00sm364727plb.290.2024.01.12.13.38.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 12 Jan 2024 13:38:57 -0800 (PST) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liwei1518@gmail.com, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com, richard.henderson@linaro.org, max.chou@sifive.com, Daniel Henrique Barboza Subject: [PATCH 12/13] trans_rvv.c.inc: use cpu_vl in trans_vrgather_vi() Date: Fri, 12 Jan 2024 18:38:11 -0300 Message-ID: <20240112213812.173521-13-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240112213812.173521-1-dbarboza@ventanamicro.com> References: <20240112213812.173521-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::634; envelope-from=dbarboza@ventanamicro.com; helo=mail-pl1-x634.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org There's no need to calculate 'vlmax'. We're garanteeing that 'vl_eq_vlmax' is true, and we can retrieve 'vl' via 'cpu_vl'. Signed-off-by: Daniel Henrique Barboza --- target/riscv/insn_trans/trans_rvv.c.inc | 29 ++++++++++++++++--------- 1 file changed, 19 insertions(+), 10 deletions(-) diff --git a/target/riscv/insn_trans/trans_rvv.c.inc b/target/riscv/insn_trans/trans_rvv.c.inc index 3782d0fa2f..43d20ae354 100644 --- a/target/riscv/insn_trans/trans_rvv.c.inc +++ b/target/riscv/insn_trans/trans_rvv.c.inc @@ -3575,16 +3575,25 @@ static bool trans_vrgather_vi(DisasContext *s, arg_rmrr *a) } if (a->vm && s->vl_eq_vlmax && !(s->vta && s->lmul < 0)) { - int scale = s->lmul - (s->sew + 3); - int vlmax = s->cfg_ptr->vlen >> -scale; - if (a->rs1 >= vlmax) { - tcg_gen_gvec_dup_imm(MO_64, vreg_ofs(s, a->rd), - MAXSZ(s), MAXSZ(s), 0); - } else { - tcg_gen_gvec_dup_mem(s->sew, vreg_ofs(s, a->rd), - endian_ofs(s, a->rs2, a->rs1), - MAXSZ(s), MAXSZ(s)); - } + TCGLabel *dup_imm = gen_new_label(); + TCGLabel *done = gen_new_label(); + TCGv_i32 vlmax = tcg_temp_new_i32(); + + /* a->rs1 >= vlmax, cpu_vl = vlmax */ + tcg_gen_trunc_tl_i32(vlmax, cpu_vl); + tcg_gen_brcond_i32(TCG_COND_GEU, tcg_constant_i32(a->rs1), vlmax, + dup_imm); + tcg_gen_gvec_dup_mem(s->sew, vreg_ofs(s, a->rd), + endian_ofs(s, a->rs2, a->rs1), + MAXSZ(s), MAXSZ(s)); + tcg_gen_br(done); + + gen_set_label(dup_imm); + tcg_gen_gvec_dup_imm(MO_64, vreg_ofs(s, a->rd), + MAXSZ(s), MAXSZ(s), 0); + + gen_set_label(done); + mark_vs_dirty(s); } else { static gen_helper_opivx * const fns[4] = { From patchwork Fri Jan 12 21:38:12 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Henrique Barboza X-Patchwork-Id: 13518721 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 34C6EC4706C for ; Fri, 12 Jan 2024 21:39:51 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rOPF5-0004cH-N0; Fri, 12 Jan 2024 16:39:07 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rOPF4-0004a0-0f for qemu-devel@nongnu.org; Fri, 12 Jan 2024 16:39:06 -0500 Received: from mail-pl1-x629.google.com ([2607:f8b0:4864:20::629]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1rOPF0-00022Q-VM for qemu-devel@nongnu.org; Fri, 12 Jan 2024 16:39:05 -0500 Received: by mail-pl1-x629.google.com with SMTP id d9443c01a7336-1d480c6342dso54146835ad.2 for ; Fri, 12 Jan 2024 13:39:02 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1705095541; x=1705700341; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=uTZ9DvaXYMznw+pv5Glto07Sg3ttKbbiQQL6C8QSH3A=; b=nnSZsJyMZWX3apiAVDKcPtmk5mmk8VATynyaX4yGs5+bsOaL8OiEIgtE4ZmQXj0BRu lnkHqqWWPoMFBK+/XKfoiaYlPnyq2olfEiHhff5FVOWsdVbSkyITnOMsl+cEAy5qoQco 7HM+U/zSlLI3t88EPAjNOwbfH0XAuaV6An9WDAuAX01HIbdzbkwkmp/fIli4CcAgStQ2 /oRg96XQlK3PHbbn4cFcF62ohOTIRgMq2xwn9X4srxnanQR/sR2kv15Ilwz+YS9lt83j MZnrWZsQKadJVKvQQDf3QXFi+iEsJI6eDGtzgisx88Ykdk2Q1kzGo7ohewwiAyLS8o48 ewrA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1705095541; x=1705700341; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=uTZ9DvaXYMznw+pv5Glto07Sg3ttKbbiQQL6C8QSH3A=; b=wJG/5kMmY0uqFXqx7Qye3J+8ciMypBdhoVxQoqHQKwRzx1lZH+Xvk9CllJD+HTJypk K9VXCNxeXgvY4GpHX1gxPAUaOQkqmElkfsEZaST6ZooxIBDyCZTdpeuRPzJwp2Sr7Rrj XFgrK7RojBh/YOmTdoHeSEugbCIeNvNnbaz1lV3Ks0eYUjfG9wIc/nS4oewPbJF+GMKK XDFNBUxZKnu5ihIg0V/QqCqoOZqiky6TlG1COORQMIMMFx+mEZrMKIStTQuHOJHEQ2oR carmQEB4/G6X2XrJcUsLxdwPPVMWtN4JRFnwkgWKg5jr5m9JzeYhv+VvoYdE+9tA0xca av7g== X-Gm-Message-State: AOJu0YzdA8j73vQ5HuEyDg/ei2GIJutCFKlblxGOEQreJz3dSulHoBCE 9kz7j9JmFnCVhwAAFLhyhyMBs0qk9f6rOqcGHmtSd2cgVJKCpw== X-Google-Smtp-Source: AGHT+IEH8Qr+VPrbaLy2M5waqOuPdRzn8NyfmbsqALgi8gBMLPPGODUjfUinIC6kp608oNg1Dl7WjA== X-Received: by 2002:a17:902:d485:b0:1d4:dddc:d38d with SMTP id c5-20020a170902d48500b001d4dddcd38dmr2055268plg.57.1705095540836; Fri, 12 Jan 2024 13:39:00 -0800 (PST) Received: from grind.. ([152.234.123.64]) by smtp.gmail.com with ESMTPSA id lf8-20020a170902fb4800b001d5b2967d00sm364727plb.290.2024.01.12.13.38.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 12 Jan 2024 13:39:00 -0800 (PST) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liwei1518@gmail.com, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com, richard.henderson@linaro.org, max.chou@sifive.com, Daniel Henrique Barboza Subject: [PATCH 13/13] target/riscv/cpu.c: remove cpu->cfg.vlen Date: Fri, 12 Jan 2024 18:38:12 -0300 Message-ID: <20240112213812.173521-14-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240112213812.173521-1-dbarboza@ventanamicro.com> References: <20240112213812.173521-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::629; envelope-from=dbarboza@ventanamicro.com; helo=mail-pl1-x629.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org There is no need to keep both 'vlen' and 'vlenb'. All existing code that requires 'vlen' is retrieving it via 'vlenb << 3'. Signed-off-by: Daniel Henrique Barboza --- target/riscv/cpu.c | 8 +++----- target/riscv/cpu_cfg.h | 1 - target/riscv/tcg/tcg-cpu.c | 4 +++- 3 files changed, 6 insertions(+), 7 deletions(-) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index f4261d2ffc..7b3f69d3fb 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -1313,7 +1313,6 @@ static void riscv_cpu_init(Object *obj) /* Default values for non-bool cpu properties */ cpu->cfg.pmu_mask = MAKE_64BIT_MASK(3, 16); - cpu->cfg.vlen = 128; cpu->cfg.vlenb = 128 >> 3; cpu->cfg.elen = 64; cpu->env.vext_ver = VEXT_VERSION_1_00_0; @@ -1802,22 +1801,21 @@ static void prop_vlen_set(Object *obj, Visitor *v, const char *name, return; } - if (value != cpu->cfg.vlen && riscv_cpu_is_vendor(obj)) { + if (value != cpu->cfg.vlenb && riscv_cpu_is_vendor(obj)) { cpu_set_prop_err(cpu, name, errp); error_append_hint(errp, "Current '%s' val: %u\n", - name, cpu->cfg.vlen); + name, cpu->cfg.vlenb << 3); return; } cpu_option_add_user_setting(name, value); - cpu->cfg.vlen = value; cpu->cfg.vlenb = value >> 3; } static void prop_vlen_get(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { - uint16_t value = RISCV_CPU(obj)->cfg.vlen; + uint16_t value = RISCV_CPU(obj)->cfg.vlenb << 3; visit_type_uint16(v, name, &value, errp); } diff --git a/target/riscv/cpu_cfg.h b/target/riscv/cpu_cfg.h index 50479dd72f..e241922f89 100644 --- a/target/riscv/cpu_cfg.h +++ b/target/riscv/cpu_cfg.h @@ -139,7 +139,6 @@ struct RISCVCPUConfig { bool ext_XVentanaCondOps; uint32_t pmu_mask; - uint16_t vlen; uint16_t vlenb; uint16_t elen; uint16_t cbom_blocksize; diff --git a/target/riscv/tcg/tcg-cpu.c b/target/riscv/tcg/tcg-cpu.c index daff0b8f60..667421b0b7 100644 --- a/target/riscv/tcg/tcg-cpu.c +++ b/target/riscv/tcg/tcg-cpu.c @@ -298,7 +298,9 @@ static void riscv_cpu_validate_misa_mxl(RISCVCPU *cpu, Error **errp) static void riscv_cpu_validate_v(CPURISCVState *env, RISCVCPUConfig *cfg, Error **errp) { - if (cfg->vlen > RV_VLEN_MAX || cfg->vlen < 128) { + uint32_t vlen = cfg->vlenb << 3; + + if (vlen > RV_VLEN_MAX || vlen < 128) { error_setg(errp, "Vector extension implementation only supports VLEN " "in the range [128, %d]", RV_VLEN_MAX);