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X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The existing implementation for validating the "num-lanes" property based on the compatible(s) doesn't enforce it. Fix it by updating the checks to handle both single-compatible and multi-compatible cases. Fixes: b3ba0f6e82cb ("dt-bindings: PCI: ti,j721e-pci-*: Add checks for num-lanes") Fixes: adc14d44d7cb ("dt-bindings: PCI: ti,j721e-pci-*: Add j784s4-pci-* compatible strings") Signed-off-by: Siddharth Vadapalli --- .../bindings/pci/ti,j721e-pci-ep.yaml | 26 ++++++++++++++----- .../bindings/pci/ti,j721e-pci-host.yaml | 26 ++++++++++++++----- 2 files changed, 38 insertions(+), 14 deletions(-) diff --git a/Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml b/Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml index 97f2579ea908..278e0892f8ac 100644 --- a/Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml +++ b/Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml @@ -68,8 +68,9 @@ allOf: - if: properties: compatible: - enum: - - ti,am64-pcie-ep + items: + - const: ti,am64-pcie-ep + - const: ti,j721e-pcie-ep then: properties: num-lanes: @@ -78,9 +79,9 @@ allOf: - if: properties: compatible: - enum: - - ti,j7200-pcie-ep - - ti,j721e-pcie-ep + items: + - const: ti,j7200-pcie-ep + - const: ti,j721e-pcie-ep then: properties: num-lanes: @@ -90,8 +91,19 @@ allOf: - if: properties: compatible: - enum: - - ti,j784s4-pcie-ep + items: + - const: ti,j721e-pcie-ep + then: + properties: + num-lanes: + minimum: 1 + maximum: 4 + + - if: + properties: + compatible: + items: + - const: ti,j784s4-pcie-ep then: properties: num-lanes: diff --git a/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml b/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml index b7a534cef24d..36bcc8cb7896 100644 --- a/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml +++ b/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml @@ -97,8 +97,9 @@ allOf: - if: properties: compatible: - enum: - - ti,am64-pcie-host + items: + - const: ti,am64-pcie-host + - const: ti,j721e-pcie-host then: properties: num-lanes: @@ -107,9 +108,9 @@ allOf: - if: properties: compatible: - enum: - - ti,j7200-pcie-host - - ti,j721e-pcie-host + items: + - const: ti,j7200-pcie-host + - const: ti,j721e-pcie-host then: properties: num-lanes: @@ -119,8 +120,19 @@ allOf: - if: properties: compatible: - enum: - - ti,j784s4-pcie-host + items: + - const: ti,j721e-pcie-host + then: + properties: + num-lanes: + minimum: 1 + maximum: 4 + + - if: + properties: + compatible: + items: + - const: ti,j784s4-pcie-host then: properties: num-lanes: From patchwork Wed Jan 17 10:25:25 2024 Content-Type: text/plain; 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Wed, 17 Jan 2024 04:25:36 -0600 From: Siddharth Vadapalli To: , , , , , CC: , , , , , , , Subject: [PATCH 2/3] dt-bindings: PCI: ti,j721e-pci-*: Add checks for max-link-speed Date: Wed, 17 Jan 2024 15:55:25 +0530 Message-ID: <20240117102526.557006-3-s-vadapalli@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240117102526.557006-1-s-vadapalli@ti.com> References: <20240117102526.557006-1-s-vadapalli@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240117_022547_906019_87C1C014 X-CRM114-Status: UNSURE ( 8.74 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Extend the existing compatible based checks for validating and enforcing the "max-link-speed" property. Signed-off-by: Siddharth Vadapalli --- .../devicetree/bindings/pci/ti,j721e-pci-ep.yaml | 8 ++++++++ .../devicetree/bindings/pci/ti,j721e-pci-host.yaml | 8 ++++++++ 2 files changed, 16 insertions(+) diff --git a/Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml b/Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml index 278e0892f8ac..4839a9574e20 100644 --- a/Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml +++ b/Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml @@ -73,6 +73,8 @@ allOf: - const: ti,j721e-pcie-ep then: properties: + max-link-speed: + const: 2 num-lanes: const: 1 @@ -84,6 +86,8 @@ allOf: - const: ti,j721e-pcie-ep then: properties: + max-link-speed: + const: 3 num-lanes: minimum: 1 maximum: 2 @@ -95,6 +99,8 @@ allOf: - const: ti,j721e-pcie-ep then: properties: + max-link-speed: + const: 3 num-lanes: minimum: 1 maximum: 4 @@ -106,6 +112,8 @@ allOf: - const: ti,j784s4-pcie-ep then: properties: + max-link-speed: + const: 3 num-lanes: minimum: 1 maximum: 4 diff --git a/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml b/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml index 36bcc8cb7896..005546dc8bd4 100644 --- a/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml +++ b/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml @@ -102,6 +102,8 @@ allOf: - const: ti,j721e-pcie-host then: properties: + max-link-speed: + const: 2 num-lanes: const: 1 @@ -113,6 +115,8 @@ allOf: - const: ti,j721e-pcie-host then: properties: + max-link-speed: + const: 3 num-lanes: minimum: 1 maximum: 2 @@ -124,6 +128,8 @@ allOf: - const: ti,j721e-pcie-host then: properties: + max-link-speed: + const: 3 num-lanes: minimum: 1 maximum: 4 @@ -135,6 +141,8 @@ allOf: - const: ti,j784s4-pcie-host then: properties: + max-link-speed: + const: 3 num-lanes: minimum: 1 maximum: 4 From patchwork Wed Jan 17 10:25:26 2024 Content-Type: text/plain; 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Wed, 17 Jan 2024 04:25:40 -0600 From: Siddharth Vadapalli To: , , , , , CC: , , , , , , , Subject: [PATCH 3/3] dt-bindings: PCI: ti,j721e-pci-host: Add support for J722S SoC Date: Wed, 17 Jan 2024 15:55:26 +0530 Message-ID: <20240117102526.557006-4-s-vadapalli@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240117102526.557006-1-s-vadapalli@ti.com> References: <20240117102526.557006-1-s-vadapalli@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240117_022557_037444_2F2AE07F X-CRM114-Status: GOOD ( 11.29 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org TI's J722S SoC has one instance of a Gen3 Single Lane PCIe controller. The controller on J722S SoC is similar to the one present on TI's AM64 SoC, with the difference being that the controller on AM64 SoC supports up to Gen2 link speed while the one on J722S SoC supports Gen3 link speed. Update the bindings with a new compatible for J722S SoC and enforce checks for "num-lanes" and "max-link-speed". Technical Reference Manual of J722S SoC: https://www.ti.com/lit/zip/sprujb3 Signed-off-by: Siddharth Vadapalli --- .../devicetree/bindings/pci/ti,j721e-pci-host.yaml | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml b/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml index 005546dc8bd4..b7648f7e73c9 100644 --- a/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml +++ b/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml @@ -14,6 +14,7 @@ properties: compatible: oneOf: - const: ti,j721e-pcie-host + - const: ti,j722s-pcie-host - const: ti,j784s4-pcie-host - description: PCIe controller in AM64 items: @@ -134,6 +135,18 @@ allOf: minimum: 1 maximum: 4 + - if: + properties: + compatible: + items: + - const: ti,j722s-pcie-host + then: + properties: + max-link-speed: + const: 3 + num-lanes: + const: 1 + - if: properties: compatible: