From patchwork Mon Jan 22 05:35:52 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?QXLEsW7DpyDDnE5BTCB2aWEgQjQgUmVsYXk=?= X-Patchwork-Id: 13524758 X-Patchwork-Delegate: kuba@kernel.org Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 934DB4C89; Mon, 22 Jan 2024 05:35:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705901758; cv=none; b=O7iKWdD9mc5PFB74DsSjkffaZ9ZwI8t/8qFkJQiQwxd6GQvslIGjxfTZhpn+s/WCasogXLDMNhmmoH7NBH6JmQhbIWhG474iFSFtk8bjGByaupXHqoCdorhE3HVD8SjQ4WhfGsLxOU/EUqc4Pfg9ruxLlZJusfH98IdbnFL1GSA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705901758; c=relaxed/simple; bh=BJnOeS65sq0ctJq5UOVZ2WxdttW9vz25dwKp4xbPBfc=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=IqiISEDFc+nb+/WUx84sDQYfPa9PGjwjNZHhgREnzol9r4R3HvvG8vY4RiMN3fl+PmMwnwHEzqES+kehAxhvUkUID3T4r9RWbwHB4FZ2UWhK05gEeIu/FOYqmoZwch1TtTtxgfYBZES6ff7iltWRDqQmKkdwNgaoMKtJCxlw80c= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=O58BuPXm; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="O58BuPXm" Received: by smtp.kernel.org (Postfix) with ESMTPS id 37309C433F1; Mon, 22 Jan 2024 05:35:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1705901758; bh=BJnOeS65sq0ctJq5UOVZ2WxdttW9vz25dwKp4xbPBfc=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=O58BuPXmDB3kntKMblO13Z8kSWaTk2SeOjB/cNBiY4q4ET0d+WajAYCGaxy1C24/X 5eYJzqKIPfpT7ejDHYEhAoHW1Fk7tUULodwryVm7hDVg4qA2T8+uWsUXM2ZBluV+/R EVB4NoOsntfxjilrt9+HZpwjCUiq1uMVuayHfN4ItQJAhPtS0okpG7qDV2GVUE4mI2 IPYopn/kn3If9zQ2DfwloS9Zq16tESXx/ILtYjEM/0I9MHaHANp5Oler/HurMjbIaV ef8dR+4gwhSmr74N1Qt7NKi9p97y1n5HnkUYgfKldryh38V4ZjZMA1mBR//rB0jnXj 1TGefU2/xruXA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1EC98C47DD3; Mon, 22 Jan 2024 05:35:58 +0000 (UTC) From: =?utf-8?b?QXLEsW7DpyDDnE5BTA==?= via B4 Relay Date: Mon, 22 Jan 2024 08:35:52 +0300 Subject: [PATCH net-next v3 1/7] net: dsa: mt7530: always trap frames to active CPU port on MT7530 Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240122-for-netnext-mt7530-improvements-1-v3-1-042401f2b279@arinc9.com> References: <20240122-for-netnext-mt7530-improvements-1-v3-0-042401f2b279@arinc9.com> In-Reply-To: <20240122-for-netnext-mt7530-improvements-1-v3-0-042401f2b279@arinc9.com> To: Daniel Golle , Landen Chao , DENG Qingfang , Sean Wang , Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno , Russell King Cc: mithat.guner@xeront.com, erkin.bozoglu@xeront.com, Bartel Eerdekens , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, =?utf-8?b?QXLEsW7DpyDDnE5BTA==?= X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=ed25519-sha256; t=1705901755; l=4314; i=arinc.unal@arinc9.com; s=arinc9-patatt; h=from:subject:message-id; bh=OahuM/i2rvjHeE74Gk7po9F6EBBznn5IwSvSniGSaV0=; b=Tdp4jqS5p+QOFq8gzefgBM65crsiy194Phw6aAQVLvMNPC2qLMjNXHRYGMeSIs66WwnOrc0YK KoKmm10jNroBRbt3dDStrqDwLZQ3izsAPTX+dvPz1aKJnhYJNVNrne+ X-Developer-Key: i=arinc.unal@arinc9.com; a=ed25519; pk=VmvgMWwm73yVIrlyJYvGtnXkQJy9CvbaeEqPQO9Z4kA= X-Endpoint-Received: by B4 Relay for arinc.unal@arinc9.com/arinc9-patatt with auth_id=115 X-Original-From: =?utf-8?b?QXLEsW7DpyDDnE5BTA==?= Reply-To: X-Patchwork-Delegate: kuba@kernel.org From: Arınç ÜNAL On the MT7530 switch, the CPU_PORT field indicates which CPU port to trap frames to, regardless of the affinity of the inbound user port. When multiple CPU ports are in use, if the DSA conduit interface is down, trapped frames won't be passed to the conduit interface. To make trapping frames work including this case, implement ds->ops->conduit_state_change() on this subdriver and set the CPU_PORT field to the numerically smallest CPU port whose conduit interface is up. Introduce the active_cpu_ports field to store the information of the active CPU ports. Correct the macros, CPU_PORT is bits 4 through 6 of the register. Add a comment to explain frame trapping for this switch. Currently, the driver doesn't support the use of multiple CPU ports so this is not necessarily a bug fix. Suggested-by: Vladimir Oltean Suggested-by: Russell King (Oracle) Signed-off-by: Arınç ÜNAL Reviewed-by: Vladimir Oltean --- drivers/net/dsa/mt7530.c | 35 +++++++++++++++++++++++++++++++---- drivers/net/dsa/mt7530.h | 6 ++++-- 2 files changed, 35 insertions(+), 6 deletions(-) diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c index 391c4dbdff42..761c4804449a 100644 --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c @@ -1035,10 +1035,6 @@ mt753x_cpu_port_enable(struct dsa_switch *ds, int port) mt7530_set(priv, MT7530_MFC, BC_FFP(BIT(port)) | UNM_FFP(BIT(port)) | UNU_FFP(BIT(port))); - /* Set CPU port number */ - if (priv->id == ID_MT7530 || priv->id == ID_MT7621) - mt7530_rmw(priv, MT7530_MFC, CPU_MASK, CPU_EN | CPU_PORT(port)); - /* Add the CPU port to the CPU port bitmap for MT7531 and the switch on * the MT7988 SoC. Trapped frames will be forwarded to the CPU port that * is affine to the inbound user port. @@ -3075,6 +3071,36 @@ static int mt753x_set_mac_eee(struct dsa_switch *ds, int port, return 0; } +static void +mt753x_conduit_state_change(struct dsa_switch *ds, + const struct net_device *conduit, + bool operational) +{ + struct dsa_port *cpu_dp = conduit->dsa_ptr; + struct mt7530_priv *priv = ds->priv; + int val = 0; + u8 mask; + + /* Set the CPU port to trap frames to for MT7530. Trapped frames will be + * forwarded to the numerically smallest CPU port whose conduit + * interface is up. + */ + if (priv->id != ID_MT7530 && priv->id != ID_MT7621) + return; + + mask = BIT(cpu_dp->index); + + if (operational) + priv->active_cpu_ports |= mask; + else + priv->active_cpu_ports &= ~mask; + + if (priv->active_cpu_ports) + val = CPU_EN | CPU_PORT(__ffs(priv->active_cpu_ports)); + + mt7530_rmw(priv, MT7530_MFC, CPU_EN | CPU_PORT_MASK, val); +} + static int mt7988_pad_setup(struct dsa_switch *ds, phy_interface_t interface) { return 0; @@ -3130,6 +3156,7 @@ const struct dsa_switch_ops mt7530_switch_ops = { .phylink_mac_link_up = mt753x_phylink_mac_link_up, .get_mac_eee = mt753x_get_mac_eee, .set_mac_eee = mt753x_set_mac_eee, + .conduit_state_change = mt753x_conduit_state_change, }; EXPORT_SYMBOL_GPL(mt7530_switch_ops); diff --git a/drivers/net/dsa/mt7530.h b/drivers/net/dsa/mt7530.h index 17e42d30fff4..ebfb3a7acfcd 100644 --- a/drivers/net/dsa/mt7530.h +++ b/drivers/net/dsa/mt7530.h @@ -41,8 +41,8 @@ enum mt753x_id { #define UNU_FFP(x) (((x) & 0xff) << 8) #define UNU_FFP_MASK UNU_FFP(~0) #define CPU_EN BIT(7) -#define CPU_PORT(x) ((x) << 4) -#define CPU_MASK (0xf << 4) +#define CPU_PORT_MASK GENMASK(6, 4) +#define CPU_PORT(x) FIELD_PREP(CPU_PORT_MASK, x) #define MIRROR_EN BIT(3) #define MIRROR_PORT(x) ((x) & 0x7) #define MIRROR_MASK 0x7 @@ -760,6 +760,7 @@ struct mt753x_info { * @irq_domain: IRQ domain of the switch irq_chip * @irq_enable: IRQ enable bits, synced to SYS_INT_EN * @create_sgmii: Pointer to function creating SGMII PCS instance(s) + * @active_cpu_ports: Holding the active CPU ports */ struct mt7530_priv { struct device *dev; @@ -786,6 +787,7 @@ struct mt7530_priv { struct irq_domain *irq_domain; u32 irq_enable; int (*create_sgmii)(struct mt7530_priv *priv, bool dual_sgmii); + u8 active_cpu_ports; }; struct mt7530_hw_vlan_entry { From patchwork Mon Jan 22 05:35:53 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?QXLEsW7DpyDDnE5BTCB2aWEgQjQgUmVsYXk=?= X-Patchwork-Id: 13524761 X-Patchwork-Delegate: kuba@kernel.org Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A1C534C8E; Mon, 22 Jan 2024 05:35:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705901758; cv=none; b=eRtycW3ors8MZEXGTBQGLYZgDOLRpk2YtQgQHgFaC54X+KzXCv3/N2+ydMmnOWY1h77OI4tmAQ34R6M8dSFpOIlAAqDcIBHEbKDpIapanKx4xomf+7HvCeAyPLKSzYDND0FX5n0cmuxsgKUifd34ZCFOJ0R3Pw/wdMPbDLqj3Uw= ARC-Message-Signature: i=1; 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b=NqIBtLIMSvVPdNPkNIfYmr4xaZc7FvAgeivMtkZVhsR68UIFhVPttfEfxqFi+kAxW OuL9KMZLLQeRZ+y3aHGtXBbyxGUV0EfgRX7WWPWhmRbMQ5lmOwyeeWCJDhxveHNby+ ZryP9leWecF8NTYYicNE4yoB4JFyUrQLgrXNwclICwSV0xAb8NDjm8eZdgPped/U7K M/Apg/u9ZC/iVCIZH+7pPAFRuoOypnC+yNZlbR7QOTJstxtKVwLLZ28m2Ld6hmNW56 wns09g8o9FwBvGlM799vW8HL33/uLneMbgQ4GT/GMl3qAB0vASWMA5wp8hQKrqiFN6 XQhL2ESDzAxUA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2BB8EC47DDB; Mon, 22 Jan 2024 05:35:58 +0000 (UTC) From: =?utf-8?b?QXLEsW7DpyDDnE5BTA==?= via B4 Relay Date: Mon, 22 Jan 2024 08:35:53 +0300 Subject: [PATCH net-next v3 2/7] net: dsa: mt7530: use p5_interface_select as data type for p5_intf_sel Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240122-for-netnext-mt7530-improvements-1-v3-2-042401f2b279@arinc9.com> References: <20240122-for-netnext-mt7530-improvements-1-v3-0-042401f2b279@arinc9.com> In-Reply-To: <20240122-for-netnext-mt7530-improvements-1-v3-0-042401f2b279@arinc9.com> To: Daniel Golle , Landen Chao , DENG Qingfang , Sean Wang , Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno , Russell King Cc: mithat.guner@xeront.com, erkin.bozoglu@xeront.com, Bartel Eerdekens , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, =?utf-8?b?QXLEsW7DpyDDnE5BTA==?= X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=ed25519-sha256; t=1705901755; l=1228; i=arinc.unal@arinc9.com; s=arinc9-patatt; h=from:subject:message-id; bh=eeyEB3sOOiz0wO/aOHC7vZ4jcupi1RnCW1Y9LU4gTrY=; b=hIKr4GuusrNypD6MbPMVuvEcxmkhEzS94rRRvDe6qBWSz+KkNMZbiGjjLB0fqADMlTsK/7i5T Le1XednZ9IIB52YpaxQcd9QPbMQQdAeDRXZ1NAxxSET9qU68nA4uWM4 X-Developer-Key: i=arinc.unal@arinc9.com; a=ed25519; pk=VmvgMWwm73yVIrlyJYvGtnXkQJy9CvbaeEqPQO9Z4kA= X-Endpoint-Received: by B4 Relay for arinc.unal@arinc9.com/arinc9-patatt with auth_id=115 X-Original-From: =?utf-8?b?QXLEsW7DpyDDnE5BTA==?= Reply-To: X-Patchwork-Delegate: kuba@kernel.org From: Arınç ÜNAL Use the p5_interface_select enumeration as the data type for the p5_intf_sel field. This ensures p5_intf_sel can only take the values defined in the p5_interface_select enumeration. Remove the explicit assignment of 0 to P5_DISABLED as the first enum item is automatically assigned 0. Signed-off-by: Arınç ÜNAL Acked-by: Daniel Golle Reviewed-by: Vladimir Oltean --- drivers/net/dsa/mt7530.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/net/dsa/mt7530.h b/drivers/net/dsa/mt7530.h index ebfb3a7acfcd..9cbf18efa416 100644 --- a/drivers/net/dsa/mt7530.h +++ b/drivers/net/dsa/mt7530.h @@ -683,7 +683,7 @@ struct mt7530_port { /* Port 5 interface select definitions */ enum p5_interface_select { - P5_DISABLED = 0, + P5_DISABLED, P5_INTF_SEL_PHY_P0, P5_INTF_SEL_PHY_P4, P5_INTF_SEL_GMAC5, @@ -776,7 +776,7 @@ struct mt7530_priv { bool mcm; phy_interface_t p6_interface; phy_interface_t p5_interface; - unsigned int p5_intf_sel; + enum p5_interface_select p5_intf_sel; u8 mirror_rx; u8 mirror_tx; struct mt7530_port ports[MT7530_NUM_PORTS]; From patchwork Mon Jan 22 05:35:54 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?QXLEsW7DpyDDnE5BTCB2aWEgQjQgUmVsYXk=?= X-Patchwork-Id: 13524760 X-Patchwork-Delegate: kuba@kernel.org Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A1C2D4C8B; Mon, 22 Jan 2024 05:35:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705901758; cv=none; b=XczuMILEWNQ4rbnsJcywAcY/V9yOI01FNx0+1K64fQb7o3qkSO0EllIbTwzcmHTeKt/sd6Y4W6D2FCTGqWrRKiIRGRQP7XB59VrDApbOmCBiWXZ+1gSflsti956UolgFzCuN/KDeImyPnwQwXwTB3RdxOanV3c39LeluRbXzyvE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705901758; c=relaxed/simple; bh=djvmZ+NvYLvVLmEXzBWr2c2/PA2/FCp0HOglMI/c3/o=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=VF5u3/13V2r7awnk4f8ayHxmr4JPBt6qKv7RhUTjxmlAP+MnHEeC++XCnfrUYM0Qi8frRLhFrukOUMdIDBqX4K3U1Ov3/y/9wRn+gI/dluJRAhTVfeStCQCUk+wIbAW4VPJnxcwS7gnnf4s44HS/IZk3qJXq5WO+I4SEsJXaFA8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=ijN0AhaF; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="ijN0AhaF" Received: by smtp.kernel.org (Postfix) with ESMTPS id 51610C43394; Mon, 22 Jan 2024 05:35:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1705901758; bh=djvmZ+NvYLvVLmEXzBWr2c2/PA2/FCp0HOglMI/c3/o=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=ijN0AhaFeZUlrBKVZdmrWd7rq+mZ0gHU5/UNcL9VIknGXi0t4fcYpnZ569eRM/kfm a32Zwk7CzQwXUJ/Lwglt7Zd33s6rf42JTDo8VDEGwTgPfTdKJBvlfhbOCEyJDho/Kr nE7Rv6hnLf+EoVJHG/QnDayTx0tx3t33AMWClWpwDjq+VlLIHa9480id0iF2gnMtcY saSYxncmG9yFpwXUxFvYljrwk9tcJcetIdLFrR5y+pTjyumHUWHoUcVXhI3VYaJqK8 O+yd5IVuGmMxjDLiKIw0bjDjU5DO82CnVFRcN+2KHUL+RWN7z5TUcthcDAMtsCW5zI PKr4+WH8ilpSw== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 386D4C47DDE; Mon, 22 Jan 2024 05:35:58 +0000 (UTC) From: =?utf-8?b?QXLEsW7DpyDDnE5BTA==?= via B4 Relay Date: Mon, 22 Jan 2024 08:35:54 +0300 Subject: [PATCH net-next v3 3/7] net: dsa: mt7530: store port 5 SGMII capability of MT7531 Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240122-for-netnext-mt7530-improvements-1-v3-3-042401f2b279@arinc9.com> References: <20240122-for-netnext-mt7530-improvements-1-v3-0-042401f2b279@arinc9.com> In-Reply-To: <20240122-for-netnext-mt7530-improvements-1-v3-0-042401f2b279@arinc9.com> To: Daniel Golle , Landen Chao , DENG Qingfang , Sean Wang , Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno , Russell King Cc: mithat.guner@xeront.com, erkin.bozoglu@xeront.com, Bartel Eerdekens , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, =?utf-8?b?QXLEsW7DpyDDnE5BTA==?= X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=ed25519-sha256; t=1705901755; l=7562; i=arinc.unal@arinc9.com; s=arinc9-patatt; h=from:subject:message-id; bh=C/3gFb6akRjR0J+yBiqrHudZESsd6yu5lnvCWWASaUM=; b=yj9U1DMeFF2xiyJ31vVGJgXq1W0YvTZBX2yHLhc3PNnDOyKmARYxtHmaXc6FQrdz3Gx4xU2mw Pb7dveAS0VBAnIwudhYGT+Q+z9o5SEnSpWQr8QnwMn7XxidRwgCP3AH X-Developer-Key: i=arinc.unal@arinc9.com; a=ed25519; pk=VmvgMWwm73yVIrlyJYvGtnXkQJy9CvbaeEqPQO9Z4kA= X-Endpoint-Received: by B4 Relay for arinc.unal@arinc9.com/arinc9-patatt with auth_id=115 X-Original-From: =?utf-8?b?QXLEsW7DpyDDnE5BTA==?= Reply-To: X-Patchwork-Delegate: kuba@kernel.org From: Arınç ÜNAL Introduce the p5_sgmii field to store the information for whether port 5 has got SGMII or not. Instead of reading the MT7531_TOP_SIG_SR register multiple times, the register will be read once and the value will be stored on the p5_sgmii field. This saves unnecessary reads of the register. Move the comment about MT7531AE and MT7531BE to mt7531_setup(), where the switch is identified. Get rid of mt7531_dual_sgmii_supported() now that priv->p5_sgmii stores the information. Address the code where mt7531_dual_sgmii_supported() is used. Get rid of mt7531_is_rgmii_port() which just prints the opposite of priv->p5_sgmii. Instead of calling mt7531_pll_setup() then returning, do not call it if port 5 is SGMII. Remove P5_INTF_SEL_GMAC5_SGMII. The p5_interface_select enum is supposed to represent the mode that port 5 is being used in, not the hardware information of port 5. Set p5_intf_sel to P5_INTF_SEL_GMAC5 instead, if port 5 is not dsa_is_unused_port(). Signed-off-by: Arınç ÜNAL Acked-by: Daniel Golle Reviewed-by: Vladimir Oltean --- drivers/net/dsa/mt7530-mdio.c | 7 ++----- drivers/net/dsa/mt7530.c | 48 +++++++++++++++---------------------------- drivers/net/dsa/mt7530.h | 6 ++++-- 3 files changed, 22 insertions(+), 39 deletions(-) diff --git a/drivers/net/dsa/mt7530-mdio.c b/drivers/net/dsa/mt7530-mdio.c index 088533663b83..fa3ee85a99c1 100644 --- a/drivers/net/dsa/mt7530-mdio.c +++ b/drivers/net/dsa/mt7530-mdio.c @@ -81,17 +81,14 @@ static const struct regmap_bus mt7530_regmap_bus = { }; static int -mt7531_create_sgmii(struct mt7530_priv *priv, bool dual_sgmii) +mt7531_create_sgmii(struct mt7530_priv *priv) { struct regmap_config *mt7531_pcs_config[2] = {}; struct phylink_pcs *pcs; struct regmap *regmap; int i, ret = 0; - /* MT7531AE has two SGMII units for port 5 and port 6 - * MT7531BE has only one SGMII unit for port 6 - */ - for (i = dual_sgmii ? 0 : 1; i < 2; i++) { + for (i = priv->p5_sgmii ? 0 : 1; i < 2; i++) { mt7531_pcs_config[i] = devm_kzalloc(priv->dev, sizeof(struct regmap_config), GFP_KERNEL); diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c index 761c4804449a..c77092506c3f 100644 --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c @@ -487,15 +487,6 @@ mt7530_pad_clk_setup(struct dsa_switch *ds, phy_interface_t interface) return 0; } -static bool mt7531_dual_sgmii_supported(struct mt7530_priv *priv) -{ - u32 val; - - val = mt7530_read(priv, MT7531_TOP_SIG_SR); - - return (val & PAD_DUAL_SGMII_EN) != 0; -} - static int mt7531_pad_setup(struct dsa_switch *ds, phy_interface_t interface) { @@ -510,9 +501,6 @@ mt7531_pll_setup(struct mt7530_priv *priv) u32 xtal; u32 val; - if (mt7531_dual_sgmii_supported(priv)) - return; - val = mt7530_read(priv, MT7531_CREV); top_sig = mt7530_read(priv, MT7531_TOP_SIG_SR); hwstrap = mt7530_read(priv, MT7531_HWTRAP); @@ -920,8 +908,6 @@ static const char *p5_intf_modes(unsigned int p5_interface) return "PHY P4"; case P5_INTF_SEL_GMAC5: return "GMAC5"; - case P5_INTF_SEL_GMAC5_SGMII: - return "GMAC5_SGMII"; default: return "unknown"; } @@ -2470,6 +2456,12 @@ mt7531_setup(struct dsa_switch *ds) return -ENODEV; } + /* MT7531AE has got two SGMII units. One for port 5, one for port 6. + * MT7531BE has got only one SGMII unit which is for port 6. + */ + val = mt7530_read(priv, MT7531_TOP_SIG_SR); + priv->p5_sgmii = !!(val & PAD_DUAL_SGMII_EN); + /* all MACs must be forced link-down before sw reset */ for (i = 0; i < MT7530_NUM_PORTS; i++) mt7530_write(priv, MT7530_PMCR_P(i), MT7531_FORCE_LNK); @@ -2479,21 +2471,18 @@ mt7531_setup(struct dsa_switch *ds) SYS_CTRL_PHY_RST | SYS_CTRL_SW_RST | SYS_CTRL_REG_RST); - mt7531_pll_setup(priv); - - if (mt7531_dual_sgmii_supported(priv)) { - priv->p5_intf_sel = P5_INTF_SEL_GMAC5_SGMII; - + if (!priv->p5_sgmii) { + mt7531_pll_setup(priv); + } else { /* Let ds->user_mii_bus be able to access external phy. */ mt7530_rmw(priv, MT7531_GPIO_MODE1, MT7531_GPIO11_RG_RXD2_MASK, MT7531_EXT_P_MDC_11); mt7530_rmw(priv, MT7531_GPIO_MODE1, MT7531_GPIO12_RG_RXD3_MASK, MT7531_EXT_P_MDIO_12); - } else { - priv->p5_intf_sel = P5_INTF_SEL_GMAC5; } - dev_dbg(ds->dev, "P5 support %s interface\n", - p5_intf_modes(priv->p5_intf_sel)); + + if (!dsa_is_unused_port(ds, 5)) + priv->p5_intf_sel = P5_INTF_SEL_GMAC5; mt7530_rmw(priv, MT7531_GPIO_MODE0, MT7531_GPIO0_MASK, MT7531_GPIO0_INTERRUPT); @@ -2553,11 +2542,6 @@ static void mt7530_mac_port_get_caps(struct dsa_switch *ds, int port, } } -static bool mt7531_is_rgmii_port(struct mt7530_priv *priv, u32 port) -{ - return (port == 5) && (priv->p5_intf_sel != P5_INTF_SEL_GMAC5_SGMII); -} - static void mt7531_mac_port_get_caps(struct dsa_switch *ds, int port, struct phylink_config *config) { @@ -2570,7 +2554,7 @@ static void mt7531_mac_port_get_caps(struct dsa_switch *ds, int port, break; case 5: /* 2nd cpu port supports either rgmii or sgmii/8023z */ - if (mt7531_is_rgmii_port(priv, port)) { + if (!priv->p5_sgmii) { phy_interface_set_rgmii(config->supported_interfaces); break; } @@ -2637,7 +2621,7 @@ static int mt7531_rgmii_setup(struct mt7530_priv *priv, u32 port, { u32 val; - if (!mt7531_is_rgmii_port(priv, port)) { + if (priv->p5_sgmii) { dev_err(priv->dev, "RGMII mode is not available for port %d\n", port); return -EINVAL; @@ -2881,7 +2865,7 @@ mt7531_cpu_port_config(struct dsa_switch *ds, int port) switch (port) { case 5: - if (mt7531_is_rgmii_port(priv, port)) + if (!priv->p5_sgmii) interface = PHY_INTERFACE_MODE_RGMII; else interface = PHY_INTERFACE_MODE_2500BASEX; @@ -3033,7 +3017,7 @@ mt753x_setup(struct dsa_switch *ds) mt7530_free_irq_common(priv); if (priv->create_sgmii) { - ret = priv->create_sgmii(priv, mt7531_dual_sgmii_supported(priv)); + ret = priv->create_sgmii(priv); if (ret && priv->irq) mt7530_free_irq(priv); } diff --git a/drivers/net/dsa/mt7530.h b/drivers/net/dsa/mt7530.h index 9cbf18efa416..80060cc740d2 100644 --- a/drivers/net/dsa/mt7530.h +++ b/drivers/net/dsa/mt7530.h @@ -687,7 +687,6 @@ enum p5_interface_select { P5_INTF_SEL_PHY_P0, P5_INTF_SEL_PHY_P4, P5_INTF_SEL_GMAC5, - P5_INTF_SEL_GMAC5_SGMII, }; struct mt7530_priv; @@ -756,6 +755,8 @@ struct mt753x_info { * registers * @p6_interface Holding the current port 6 interface * @p5_intf_sel: Holding the current port 5 interface select + * @p5_sgmii: Flag for distinguishing if port 5 of the MT7531 switch + * has got SGMII * @irq: IRQ number of the switch * @irq_domain: IRQ domain of the switch irq_chip * @irq_enable: IRQ enable bits, synced to SYS_INT_EN @@ -777,6 +778,7 @@ struct mt7530_priv { phy_interface_t p6_interface; phy_interface_t p5_interface; enum p5_interface_select p5_intf_sel; + bool p5_sgmii; u8 mirror_rx; u8 mirror_tx; struct mt7530_port ports[MT7530_NUM_PORTS]; @@ -786,7 +788,7 @@ struct mt7530_priv { int irq; struct irq_domain *irq_domain; u32 irq_enable; - int (*create_sgmii)(struct mt7530_priv *priv, bool dual_sgmii); + int (*create_sgmii)(struct mt7530_priv *priv); u8 active_cpu_ports; }; From patchwork Mon Jan 22 05:35:55 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?QXLEsW7DpyDDnE5BTCB2aWEgQjQgUmVsYXk=?= X-Patchwork-Id: 13524762 X-Patchwork-Delegate: kuba@kernel.org Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B3A464C90; Mon, 22 Jan 2024 05:35:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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Mon, 22 Jan 2024 05:35:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1705901758; bh=Bgfx+EXSTylXwbNtkkMqzd6UQvp2lUWMn2C6vtoawQg=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=XKE25fjzDV/7nvKO1u8VP9DMhM4FhykMky9I7YxP8Ezrkm9QY7pv+FO95Z043mrav eEJCD5NR0gWNVOBdMvdGMF/64rVCHR8VdszdOzqujUgwA1AYRLikEVEe2Xuuz6QU4w wU6E00CpxkfFXKjP1MVUCbYuSoDUR0VA9UMEV7M0XIXLiFyULO51ccUN+lAb4Ho5/y G7VkyEmEvUeeXrwq7IZYU0FWwAn28snmS8EBGNtqvOSpRucBB09FX0fbnKNk6qnBoQ HbHAjTaPSFUFOZqfVFkiAUY+Umpkpxfhn/QgTa14ASLcn2FnykpOblx5rxujemZSy/ +G+zKzzDpSJ7Q== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 457C5C47DDF; Mon, 22 Jan 2024 05:35:58 +0000 (UTC) From: =?utf-8?b?QXLEsW7DpyDDnE5BTA==?= via B4 Relay Date: Mon, 22 Jan 2024 08:35:55 +0300 Subject: [PATCH net-next v3 4/7] net: dsa: mt7530: improve comments regarding switch ports Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240122-for-netnext-mt7530-improvements-1-v3-4-042401f2b279@arinc9.com> References: <20240122-for-netnext-mt7530-improvements-1-v3-0-042401f2b279@arinc9.com> In-Reply-To: <20240122-for-netnext-mt7530-improvements-1-v3-0-042401f2b279@arinc9.com> To: Daniel Golle , Landen Chao , DENG Qingfang , Sean Wang , Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno , Russell King Cc: mithat.guner@xeront.com, erkin.bozoglu@xeront.com, Bartel Eerdekens , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, =?utf-8?b?QXLEsW7DpyDDnE5BTA==?= X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=ed25519-sha256; t=1705901755; l=4567; i=arinc.unal@arinc9.com; s=arinc9-patatt; h=from:subject:message-id; bh=rLcHCbYDzkt28v28nq9XIDczR9kM3jpJ8YmzJ0uoUlo=; b=P9VOv8+icSWtarQqBoOfyPHXdJUQtTer/Hw1RKxWe3HptZ6UWnYL15uVjd13g8sHELrl5aVez DZ0Bb8gDDuYBbL8SBFGTOYBY/b98Q7SFPz4h42o7MxTgYsK7IPd7/fB X-Developer-Key: i=arinc.unal@arinc9.com; a=ed25519; pk=VmvgMWwm73yVIrlyJYvGtnXkQJy9CvbaeEqPQO9Z4kA= X-Endpoint-Received: by B4 Relay for arinc.unal@arinc9.com/arinc9-patatt with auth_id=115 X-Original-From: =?utf-8?b?QXLEsW7DpyDDnE5BTA==?= Reply-To: X-Patchwork-Delegate: kuba@kernel.org From: Arınç ÜNAL There's no logic to numerically order the CPU ports. Just state the port number instead. Remove the irrelevant PHY muxing information from mt7530_mac_port_get_caps(). Explain the supported MII modes instead. Remove the out of place PHY muxing information from mt753x_phylink_mac_config(). The function is for MT7530, MT7531, and the switch on the MT7988 SoC but there's no PHY muxing on MT7531 or the switch on the MT7988 SoC. These comments were gradually introduced with the commits below. commit ca366d6c889b ("net: dsa: mt7530: Convert to PHYLINK API") commit 38f790a80560 ("net: dsa: mt7530: Add support for port 5") commit 88bdef8be9f6 ("net: dsa: mt7530: Extend device data ready for adding a new hardware") commit c288575f7810 ("net: dsa: mt7530: Add the support of MT7531 switch") Signed-off-by: Arınç ÜNAL Acked-by: Daniel Golle Reviewed-by: Andrew Lunn Reviewed-by: Vladimir Oltean --- drivers/net/dsa/mt7530.c | 30 ++++++++++++++++++++---------- 1 file changed, 20 insertions(+), 10 deletions(-) diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c index c77092506c3f..93d8498ce274 100644 --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c @@ -2520,12 +2520,14 @@ static void mt7530_mac_port_get_caps(struct dsa_switch *ds, int port, struct phylink_config *config) { switch (port) { - case 0 ... 4: /* Internal phy */ + /* Ports which are connected to switch PHYs. There is no MII pinout. */ + case 0 ... 4: __set_bit(PHY_INTERFACE_MODE_GMII, config->supported_interfaces); break; - case 5: /* 2nd cpu port with phy of port 0 or 4 / external phy */ + /* Port 5 supports rgmii with delays, mii, and gmii. */ + case 5: phy_interface_set_rgmii(config->supported_interfaces); __set_bit(PHY_INTERFACE_MODE_MII, config->supported_interfaces); @@ -2533,7 +2535,8 @@ static void mt7530_mac_port_get_caps(struct dsa_switch *ds, int port, config->supported_interfaces); break; - case 6: /* 1st cpu port */ + /* Port 6 supports rgmii and trgmii. */ + case 6: __set_bit(PHY_INTERFACE_MODE_RGMII, config->supported_interfaces); __set_bit(PHY_INTERFACE_MODE_TRGMII, @@ -2548,19 +2551,24 @@ static void mt7531_mac_port_get_caps(struct dsa_switch *ds, int port, struct mt7530_priv *priv = ds->priv; switch (port) { - case 0 ... 4: /* Internal phy */ + /* Ports which are connected to switch PHYs. There is no MII pinout. */ + case 0 ... 4: __set_bit(PHY_INTERFACE_MODE_GMII, config->supported_interfaces); break; - case 5: /* 2nd cpu port supports either rgmii or sgmii/8023z */ + /* Port 5 supports rgmii with delays on MT7531BE, sgmii/802.3z on + * MT7531AE. + */ + case 5: if (!priv->p5_sgmii) { phy_interface_set_rgmii(config->supported_interfaces); break; } fallthrough; - case 6: /* 1st cpu port supports sgmii/8023z only */ + /* Port 6 supports sgmii/802.3z. */ + case 6: __set_bit(PHY_INTERFACE_MODE_SGMII, config->supported_interfaces); __set_bit(PHY_INTERFACE_MODE_1000BASEX, @@ -2579,11 +2587,13 @@ static void mt7988_mac_port_get_caps(struct dsa_switch *ds, int port, phy_interface_zero(config->supported_interfaces); switch (port) { - case 0 ... 4: /* Internal phy */ + /* Ports which are connected to switch PHYs. There is no MII pinout. */ + case 0 ... 4: __set_bit(PHY_INTERFACE_MODE_INTERNAL, config->supported_interfaces); break; + /* Port 6 is connected to SoC's XGMII MAC. There is no MII pinout. */ case 6: __set_bit(PHY_INTERFACE_MODE_INTERNAL, config->supported_interfaces); @@ -2747,12 +2757,12 @@ mt753x_phylink_mac_config(struct dsa_switch *ds, int port, unsigned int mode, u32 mcr_cur, mcr_new; switch (port) { - case 0 ... 4: /* Internal phy */ + case 0 ... 4: if (state->interface != PHY_INTERFACE_MODE_GMII && state->interface != PHY_INTERFACE_MODE_INTERNAL) goto unsupported; break; - case 5: /* 2nd cpu port with phy of port 0 or 4 / external phy */ + case 5: if (priv->p5_interface == state->interface) break; @@ -2762,7 +2772,7 @@ mt753x_phylink_mac_config(struct dsa_switch *ds, int port, unsigned int mode, if (priv->p5_intf_sel != P5_DISABLED) priv->p5_interface = state->interface; break; - case 6: /* 1st cpu port */ + case 6: if (priv->p6_interface == state->interface) break; From patchwork Mon Jan 22 05:35:56 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?QXLEsW7DpyDDnE5BTCB2aWEgQjQgUmVsYXk=?= X-Patchwork-Id: 13524765 X-Patchwork-Delegate: kuba@kernel.org Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DDCCB5258; Mon, 22 Jan 2024 05:35:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705901759; cv=none; b=IbR/a0MO3vTifnifgMaemilUFCaiSYMqLhOWdcfEq/76MVJaKrZ1xWXufY1EUoVmafUTxWYsQb8IMbWNUGs7bQgy1+TUElpIRHzMKuuXatFrzEqq619lhUZKeRznaNLvFRNSlIAX37oxQiAAfugaLzQF7UmvvdSiN35emxVdgeI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705901759; c=relaxed/simple; bh=LgnPIr16xe/Eyg7GrkmIKz7Cyl9FY+m7UgNnLdHAPPQ=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=gi1Xy2vtipGKjPRmij94304+Wwj+PNczBa6mO9gNyplv9Kp1ZJcAh5kz61liMpPOqRgiRwXoZSQsymcAtVNF/AZZvFg9GYXOH7Y2zOMx1as8lkAWo5ctJ2+KETtuCNeJY7vB+GQ+viGG1bJzHT1EgmRuwjFdR0F4mDj0nbkFJSs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=FEAnx3fE; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="FEAnx3fE" Received: by smtp.kernel.org (Postfix) with ESMTPS id 65C7BC433B2; Mon, 22 Jan 2024 05:35:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1705901758; bh=LgnPIr16xe/Eyg7GrkmIKz7Cyl9FY+m7UgNnLdHAPPQ=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=FEAnx3fEK6JD5LUmtQLA6bVxU8x6VoMR8v9J+swdMCx+B11rc99MSWaQvohGRxdUa BLZ2z2EPUHdDmrNrf9+a1fsskslLAh6kzk5faPRMxn0s6QU0ERTfkcuPjScduGgfpM 19PrM4Q6U2oBSjMBVk0voDG0d2GE75VDuMCLcSvW1AmusTb9T7DEIGOcqNSIbhQ0+I kx9+xIyQCBDlXB+KBKBrsrSZFeQ74xj8zT6XQ77q2WAspSXbz+nqgslqf4Ei3BULwL PSN99SY51Odb/VpYy4KOAwR4/3/O8p+DvzIjU7oFRCAqPwysMZLdRgoCZYXQum11AP gYjl8Fr7DMGUQ== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 50E0AC4725D; Mon, 22 Jan 2024 05:35:58 +0000 (UTC) From: =?utf-8?b?QXLEsW7DpyDDnE5BTA==?= via B4 Relay Date: Mon, 22 Jan 2024 08:35:56 +0300 Subject: [PATCH net-next v3 5/7] net: dsa: mt7530: improve code path for setting up port 5 Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240122-for-netnext-mt7530-improvements-1-v3-5-042401f2b279@arinc9.com> References: <20240122-for-netnext-mt7530-improvements-1-v3-0-042401f2b279@arinc9.com> In-Reply-To: <20240122-for-netnext-mt7530-improvements-1-v3-0-042401f2b279@arinc9.com> To: Daniel Golle , Landen Chao , DENG Qingfang , Sean Wang , Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno , Russell King Cc: mithat.guner@xeront.com, erkin.bozoglu@xeront.com, Bartel Eerdekens , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, =?utf-8?b?QXLEsW7DpyDDnE5BTA==?= X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=ed25519-sha256; t=1705901755; l=2869; i=arinc.unal@arinc9.com; s=arinc9-patatt; h=from:subject:message-id; bh=K1vv0sb4U5bv6JWVSjtKmiZWdaaNGL0l9QDdgT1NRyY=; b=LN+tVioZv9sRZbXOurLsKXkw/mMpADeJb+mk83LyUQA1NsQWX3cG08nWZa3OMaW0hn3sS0cUK s9L7uFbWGlKDuv579ZNoAV5Muc2hPittpeiHPhM3ecLRTG+uutMokVT X-Developer-Key: i=arinc.unal@arinc9.com; a=ed25519; pk=VmvgMWwm73yVIrlyJYvGtnXkQJy9CvbaeEqPQO9Z4kA= X-Endpoint-Received: by B4 Relay for arinc.unal@arinc9.com/arinc9-patatt with auth_id=115 X-Original-From: =?utf-8?b?QXLEsW7DpyDDnE5BTA==?= Reply-To: X-Patchwork-Delegate: kuba@kernel.org From: Arınç ÜNAL There're two code paths for setting up port 5: mt7530_setup() -> mt7530_setup_port5() mt753x_phylink_mac_config() -> mt753x_mac_config() -> mt7530_mac_config() -> mt7530_setup_port5() Currently mt7530_setup_port5() from mt7530_setup() always runs. If port 5 is used as a CPU, DSA, or user port, mt7530_setup_port5() from mt753x_phylink_mac_config() won't run. That is because priv->p5_interface set on mt7530_setup_port5() will match state->interface on mt753x_phylink_mac_config() which will stop running mt7530_setup_port5() again. Therefore, mt7530_setup_port5() will never run from mt753x_phylink_mac_config(). Address this by not running mt7530_setup_port5() from mt7530_setup() if port 5 is used as a CPU, DSA, or user port. This driver isn't in the dsa_switches_apply_workarounds[] array so phylink will always be present. To keep the cases where port 5 isn't controlled by phylink working as before, preserve the mt7530_setup_port5() call from mt7530_setup(). Do not set priv->p5_intf_sel to P5_DISABLED. It is already set to that when "priv" is allocated. Move setting the interface to a more specific location. It's supposed to be overwritten if PHY muxing is detected. Improve the comment which explains the process. Signed-off-by: Arınç ÜNAL Reviewed-by: Vladimir Oltean --- drivers/net/dsa/mt7530.c | 17 ++++++++--------- 1 file changed, 8 insertions(+), 9 deletions(-) diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c index 93d8498ce274..33c15f10de34 100644 --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c @@ -2308,16 +2308,15 @@ mt7530_setup(struct dsa_switch *ds) return ret; /* Setup port 5 */ - priv->p5_intf_sel = P5_DISABLED; - interface = PHY_INTERFACE_MODE_NA; - if (!dsa_is_unused_port(ds, 5)) { priv->p5_intf_sel = P5_INTF_SEL_GMAC5; - ret = of_get_phy_mode(dsa_to_port(ds, 5)->dn, &interface); - if (ret && ret != -ENODEV) - return ret; } else { - /* Scan the ethernet nodes. look for GMAC1, lookup used phy */ + /* Scan the ethernet nodes. Look for GMAC1, lookup the used PHY. + * Set priv->p5_intf_sel to the appropriate value if PHY muxing + * is detected. + */ + interface = PHY_INTERFACE_MODE_NA; + for_each_child_of_node(dn, mac_np) { if (!of_device_is_compatible(mac_np, "mediatek,eth-mac")) @@ -2348,6 +2347,8 @@ mt7530_setup(struct dsa_switch *ds) of_node_put(phy_node); break; } + + mt7530_setup_port5(ds, interface); } #ifdef CONFIG_GPIOLIB @@ -2358,8 +2359,6 @@ mt7530_setup(struct dsa_switch *ds) } #endif /* CONFIG_GPIOLIB */ - mt7530_setup_port5(ds, interface); - /* Flush the FDB table */ ret = mt7530_fdb_cmd(priv, MT7530_FDB_FLUSH, NULL); if (ret < 0) From patchwork Mon Jan 22 05:35:57 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?QXLEsW7DpyDDnE5BTCB2aWEgQjQgUmVsYXk=?= X-Patchwork-Id: 13524763 X-Patchwork-Delegate: kuba@kernel.org Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DE1F8525D; Mon, 22 Jan 2024 05:35:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705901759; cv=none; b=f0IjVHGMu3JjPlpLZn+yZ9B2jwG49pad9AW80wmoEm+CqTTw0XcjmSGyXtcw+qYrWpHXehnPQhI6etkWRynXlLRkBvVC21+AHhnL5WnYbPrkT224X7B+FtouZbcpfr8osoNA9u5+vR1g1oolsq+DNQNCZvqpoGdoyFo+npJ3L0g= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705901759; c=relaxed/simple; bh=atNAIQUZ9YchgrXFgHv6eKt+am7CBizMAbohfqxIWvw=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Vvkr17xGqZB86AxXHvVOCe9OKZQcMy375OWPJeg7WkTxrLp2nGtTVKUFVvU+uzGADrSPYgXOQ9cSV2D+wmFC8ixh9GPGTATTgU5JWptDix9G9KTMUqhA8PEaZ5DGuhC6Rn9Y8F1RadgWd3ujYY93gm0RT3bWEDn2jfuD+9PLwKI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=Gd/8p3Bs; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="Gd/8p3Bs" Received: by smtp.kernel.org (Postfix) with ESMTPS id 6DBEDC43601; Mon, 22 Jan 2024 05:35:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1705901758; bh=atNAIQUZ9YchgrXFgHv6eKt+am7CBizMAbohfqxIWvw=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=Gd/8p3Bs5oRANr3GBaOqROJ4MBiNKAO5bD1N3KQXoR2kEsqTMCA0Xhr6YFU6HosbI C4o/XMGdc0dV0yYRXWI81O/ys55rk561DWuy8gGbMW+VDocHXo5eJlriBExRbzsaOM bnf0iG88lGu5OMAsdJ32YKLWlzHnGohUyLT5ZU8RxOKIWtMLe/pDsSMsgTTQ6uA1TC PXD3F/6v0KAn90FILcSmXTKq5AHgzhUUmP9u0Fx5SzIyXFyfRvD67/Ki+HFmHjw7yv 5yhGbZm7hyOdjZmN51eCUDe/ZzbME8DkIF254NWIpioJhQcP7ixVeH+wAXNgILGJYS Y/zDr7GQRlDBw== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5CCE3C47DD3; Mon, 22 Jan 2024 05:35:58 +0000 (UTC) From: =?utf-8?b?QXLEsW7DpyDDnE5BTA==?= via B4 Relay Date: Mon, 22 Jan 2024 08:35:57 +0300 Subject: [PATCH net-next v3 6/7] net: dsa: mt7530: do not set priv->p5_interface on mt7530_setup_port5() Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240122-for-netnext-mt7530-improvements-1-v3-6-042401f2b279@arinc9.com> References: <20240122-for-netnext-mt7530-improvements-1-v3-0-042401f2b279@arinc9.com> In-Reply-To: <20240122-for-netnext-mt7530-improvements-1-v3-0-042401f2b279@arinc9.com> To: Daniel Golle , Landen Chao , DENG Qingfang , Sean Wang , Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno , Russell King Cc: mithat.guner@xeront.com, erkin.bozoglu@xeront.com, Bartel Eerdekens , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, =?utf-8?b?QXLEsW7DpyDDnE5BTA==?= X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=ed25519-sha256; t=1705901755; l=1273; i=arinc.unal@arinc9.com; s=arinc9-patatt; h=from:subject:message-id; bh=pshHxjZuMebpMx/Gh2fbwscWV4LBFxm7gD/pRSkDjUU=; b=3QO+m8i9+Ps4LZGshnpqcBCo9aNWs7CYTLbXp9XfvHkLogRSHjRTuKQahhjiOlLAM+EezZlll M7WXEkoq3q3AJBtDqaVD4ZqTNnAsgH2y6/N04iZ6+sNliD5XWQrHn3Z X-Developer-Key: i=arinc.unal@arinc9.com; a=ed25519; pk=VmvgMWwm73yVIrlyJYvGtnXkQJy9CvbaeEqPQO9Z4kA= X-Endpoint-Received: by B4 Relay for arinc.unal@arinc9.com/arinc9-patatt with auth_id=115 X-Original-From: =?utf-8?b?QXLEsW7DpyDDnE5BTA==?= Reply-To: X-Patchwork-Delegate: kuba@kernel.org From: Arınç ÜNAL Running mt7530_setup_port5() from mt7530_setup() used to handle all cases of configuring port 5, including phylink. Setting priv->p5_interface under mt7530_setup_port5() makes sure that mt7530_setup_port5() from mt753x_phylink_mac_config() won't run. The commit ("net: dsa: mt7530: improve code path for setting up port 5") makes so that mt7530_setup_port5() from mt7530_setup() runs only on non-phylink cases. Get rid of unnecessarily setting priv->p5_interface under mt7530_setup_port5() as port 5 phylink configuration will be done by running mt7530_setup_port5() from mt753x_phylink_mac_config() now. Signed-off-by: Arınç ÜNAL Reviewed-by: Vladimir Oltean Reviewed-by: Vladimir Oltean --- drivers/net/dsa/mt7530.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c index 33c15f10de34..5394d8c6a40e 100644 --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c @@ -978,8 +978,6 @@ static void mt7530_setup_port5(struct dsa_switch *ds, phy_interface_t interface) dev_dbg(ds->dev, "Setup P5, HWTRAP=0x%x, intf_sel=%s, phy-mode=%s\n", val, p5_intf_modes(priv->p5_intf_sel), phy_modes(interface)); - priv->p5_interface = interface; - unlock_exit: mutex_unlock(&priv->reg_mutex); } From patchwork Mon Jan 22 05:35:58 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?QXLEsW7DpyDDnE5BTCB2aWEgQjQgUmVsYXk=?= X-Patchwork-Id: 13524764 X-Patchwork-Delegate: kuba@kernel.org Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0F9305681; Mon, 22 Jan 2024 05:35:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705901759; cv=none; b=KMdIp+EIqR9myquDk1OV/M0iHEyfES+6tVC3HzmAgzvELloFKbIyqfw+YpDlCEobsSKC0rbyz5t403gY5wH4HBC5Nyn2u86XaCbmwF0yk64M/TC/yWMrAm8NBJWdx8eV6bno34amnZWhQg57CDZK46HFCUXSJ9jfsreuXWkXWfE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705901759; c=relaxed/simple; bh=02D8c8Gk39bt/B0GonHwJ2qvn4sYlrkgLzM0SjuJwjk=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Ui85SN3TYWvciDGFN8qXHQiv2bUzgNoRtclF2OeivgOqZh2Uc+kyVoo7gaFrdicNv1/AyfqlqxjA/E5O4UDMHSyo0enBsw3qCO1fZL8Lle+gNnZ26ChdOQfRYyWni0OApuadjQYJOVmVoNV9cJfW5ZLMgMcKrVObTMNqjkkRpa8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=PnL4vkGc; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="PnL4vkGc" Received: by smtp.kernel.org (Postfix) with ESMTPS id 7A8BAC43142; Mon, 22 Jan 2024 05:35:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1705901758; bh=02D8c8Gk39bt/B0GonHwJ2qvn4sYlrkgLzM0SjuJwjk=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=PnL4vkGcfSFlPBy6bjD/rwlbY/fS6UtzUxCRdZtpKRTLIx72EnMsY6WJD/IODjmEU 9TwLLvG6QIORKrch8mJ6WOeCJLozFmhoAXImEWCXN710+vsmLAqaYcW29BkyKAYmJQ 63TuawI2iEQIUzFiAbe6TZpCDZDk6XZ3x0LLmZ2XkRh7tfeI/vzjF0vTH0lKgKiYMY PwiM7BbMjWxB7/4QKTtegqBJo47L0EKEKMElxOuc7yWcp7DfAihdL+gB+GCcZMLuCs KaNhxFcMQ7wgte3eTwJtjVUbrOtYiywr583yuivI6yMqsXA36YGVdnzla5BOgaP6dC v/Bp+DENr7zJA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 69553C47DDB; Mon, 22 Jan 2024 05:35:58 +0000 (UTC) From: =?utf-8?b?QXLEsW7DpyDDnE5BTA==?= via B4 Relay Date: Mon, 22 Jan 2024 08:35:58 +0300 Subject: [PATCH net-next v3 7/7] net: dsa: mt7530: do not run mt7530_setup_port5() if port 5 is disabled Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240122-for-netnext-mt7530-improvements-1-v3-7-042401f2b279@arinc9.com> References: <20240122-for-netnext-mt7530-improvements-1-v3-0-042401f2b279@arinc9.com> In-Reply-To: <20240122-for-netnext-mt7530-improvements-1-v3-0-042401f2b279@arinc9.com> To: Daniel Golle , Landen Chao , DENG Qingfang , Sean Wang , Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno , Russell King Cc: mithat.guner@xeront.com, erkin.bozoglu@xeront.com, Bartel Eerdekens , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, =?utf-8?b?QXLEsW7DpyDDnE5BTA==?= X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=ed25519-sha256; t=1705901755; l=1954; i=arinc.unal@arinc9.com; s=arinc9-patatt; h=from:subject:message-id; bh=CX1ZTLft5JNnPSpvgA9ppPM0W5zZnVzbF5jhuxeYZts=; b=m7xRK80HiKn4Yf5gYVKbcOAJuPiW2ZQjrweTiy/ng47qxoKCiENascUa+CONss3MADnR3scXe bi2arpEKxnkDpyM3moD6BJkZxd+h2xHCHl22YVS7vuxFGjITKlV6wVM X-Developer-Key: i=arinc.unal@arinc9.com; a=ed25519; pk=VmvgMWwm73yVIrlyJYvGtnXkQJy9CvbaeEqPQO9Z4kA= X-Endpoint-Received: by B4 Relay for arinc.unal@arinc9.com/arinc9-patatt with auth_id=115 X-Original-From: =?utf-8?b?QXLEsW7DpyDDnE5BTA==?= Reply-To: X-Patchwork-Delegate: kuba@kernel.org From: Arınç ÜNAL There's no need to run all the code on mt7530_setup_port5() if port 5 is disabled. The only case for calling mt7530_setup_port5() from mt7530_setup() is when PHY muxing is enabled. That is because port 5 is not defined as a port on the devicetree, therefore, it cannot be controlled by phylink. Because of this, run mt7530_setup_port5() if priv->p5_intf_sel is P5_INTF_SEL_PHY_P0 or P5_INTF_SEL_PHY_P4. Remove the P5_DISABLED case from mt7530_setup_port5(). Stop initialising the interface variable as the remaining cases will always call mt7530_setup_port5() with it initialised. Signed-off-by: Arınç ÜNAL Reviewed-by: Vladimir Oltean --- drivers/net/dsa/mt7530.c | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c index 5394d8c6a40e..cd7673ecea51 100644 --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c @@ -942,9 +942,6 @@ static void mt7530_setup_port5(struct dsa_switch *ds, phy_interface_t interface) /* MT7530_P5_MODE_GMAC: P5 -> External phy or 2nd GMAC */ val &= ~MHWTRAP_P5_DIS; break; - case P5_DISABLED: - interface = PHY_INTERFACE_MODE_NA; - break; default: dev_err(ds->dev, "Unsupported p5_intf_sel %d\n", priv->p5_intf_sel); @@ -2313,8 +2310,6 @@ mt7530_setup(struct dsa_switch *ds) * Set priv->p5_intf_sel to the appropriate value if PHY muxing * is detected. */ - interface = PHY_INTERFACE_MODE_NA; - for_each_child_of_node(dn, mac_np) { if (!of_device_is_compatible(mac_np, "mediatek,eth-mac")) @@ -2346,7 +2341,9 @@ mt7530_setup(struct dsa_switch *ds) break; } - mt7530_setup_port5(ds, interface); + if (priv->p5_intf_sel == P5_INTF_SEL_PHY_P0 || + priv->p5_intf_sel == P5_INTF_SEL_PHY_P4) + mt7530_setup_port5(ds, interface); } #ifdef CONFIG_GPIOLIB