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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Stefan Eichenberger , netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v5 net-next 01/13] net: phy: Add BaseT1 auto-negotiation constants Date: Mon, 22 Jan 2024 22:28:34 +0100 Message-Id: <20240122212848.3645785-2-dima.fedrau@gmail.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240122212848.3645785-1-dima.fedrau@gmail.com> References: <20240122212848.3645785-1-dima.fedrau@gmail.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org Added constants for advertising 100BT1 and 1000BT1 in register BASE-T1 auto-negotiation advertisement register [31:16] (Register 7.515) Reviewed-by: Andrew Lunn Signed-off-by: Dimitri Fedrau --- include/uapi/linux/mdio.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/uapi/linux/mdio.h b/include/uapi/linux/mdio.h index d03863da180e..020ccc810d23 100644 --- a/include/uapi/linux/mdio.h +++ b/include/uapi/linux/mdio.h @@ -348,6 +348,8 @@ /* BASE-T1 auto-negotiation advertisement register [31:16] */ #define MDIO_AN_T1_ADV_M_B10L 0x4000 /* device is compatible with 10BASE-T1L */ +#define MDIO_AN_T1_ADV_M_1000BT1 0x0080 /* advertise 1000BASE-T1 */ +#define MDIO_AN_T1_ADV_M_100BT1 0x0020 /* advertise 100BASE-T1 */ #define MDIO_AN_T1_ADV_M_MST 0x0010 /* advertise master preference */ /* BASE-T1 auto-negotiation advertisement register [47:32] */ From patchwork Mon Jan 22 21:28:35 2024 Content-Type: text/plain; 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Mon, 22 Jan 2024 13:29:35 -0800 (PST) Received: from debian.fritz.box ([93.184.186.109]) by smtp.gmail.com with ESMTPSA id j25-20020a1709066dd900b00a26af4d96c6sm13823336ejt.4.2024.01.22.13.29.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Jan 2024 13:29:35 -0800 (PST) From: Dimitri Fedrau To: Cc: Dimitri Fedrau , Andrew Lunn , Heiner Kallweit , Russell King , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Stefan Eichenberger , netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v5 net-next 02/13] net: phy: Support 100/1000BT1 linkmode advertisements Date: Mon, 22 Jan 2024 22:28:35 +0100 Message-Id: <20240122212848.3645785-3-dima.fedrau@gmail.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240122212848.3645785-1-dima.fedrau@gmail.com> References: <20240122212848.3645785-1-dima.fedrau@gmail.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org Extend helper functions mii_t1_adv_m_mod_linkmode_t and linkmode_adv_to_mii_t1_adv_m_t to support 100BT1 and 1000BT1 linkmode advertisements. Reviewed-by: Andrew Lunn Signed-off-by: Dimitri Fedrau --- include/linux/mdio.h | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/include/linux/mdio.h b/include/linux/mdio.h index 79ceee3c8673..ecd21acc7eed 100644 --- a/include/linux/mdio.h +++ b/include/linux/mdio.h @@ -373,6 +373,10 @@ static inline void mii_t1_adv_m_mod_linkmode_t(unsigned long *advertising, u32 l { linkmode_mod_bit(ETHTOOL_LINK_MODE_10baseT1L_Full_BIT, advertising, lpa & MDIO_AN_T1_ADV_M_B10L); + linkmode_mod_bit(ETHTOOL_LINK_MODE_100baseT1_Full_BIT, + advertising, lpa & MDIO_AN_T1_ADV_M_100BT1); + linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT1_Full_BIT, + advertising, lpa & MDIO_AN_T1_ADV_M_1000BT1); } /** @@ -409,6 +413,10 @@ static inline u32 linkmode_adv_to_mii_t1_adv_m_t(unsigned long *advertising) if (linkmode_test_bit(ETHTOOL_LINK_MODE_10baseT1L_Full_BIT, advertising)) result |= MDIO_AN_T1_ADV_M_B10L; + if (linkmode_test_bit(ETHTOOL_LINK_MODE_100baseT1_Full_BIT, advertising)) + result |= MDIO_AN_T1_ADV_M_100BT1; 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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Stefan Eichenberger , netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v5 net-next 03/13] net: phy: c45: detect 100/1000BASE-T1 linkmode advertisements Date: Mon, 22 Jan 2024 22:28:36 +0100 Message-Id: <20240122212848.3645785-4-dima.fedrau@gmail.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240122212848.3645785-1-dima.fedrau@gmail.com> References: <20240122212848.3645785-1-dima.fedrau@gmail.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org Set 100BT1 and 1000BT1 linkmode advertisement bits to adv_l_mask to enable detection. Reviewed-by: Andrew Lunn Signed-off-by: Dimitri Fedrau --- drivers/net/phy/phy-c45.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/net/phy/phy-c45.c b/drivers/net/phy/phy-c45.c index 747d14bf152c..de8f5dc8be12 100644 --- a/drivers/net/phy/phy-c45.c +++ b/drivers/net/phy/phy-c45.c @@ -208,7 +208,8 @@ static int genphy_c45_baset1_an_config_aneg(struct phy_device *phydev) adv_l_mask = MDIO_AN_T1_ADV_L_FORCE_MS | MDIO_AN_T1_ADV_L_PAUSE_CAP | MDIO_AN_T1_ADV_L_PAUSE_ASYM; - adv_m_mask = MDIO_AN_T1_ADV_M_MST | MDIO_AN_T1_ADV_M_B10L; + adv_m_mask = MDIO_AN_T1_ADV_M_1000BT1 | MDIO_AN_T1_ADV_M_100BT1 | + MDIO_AN_T1_ADV_M_MST | MDIO_AN_T1_ADV_M_B10L; switch (phydev->master_slave_set) { case MASTER_SLAVE_CFG_MASTER_FORCE: From patchwork Mon Jan 22 21:28:37 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dimitri Fedrau X-Patchwork-Id: 13526278 X-Patchwork-Delegate: kuba@kernel.org Received: from mail-ej1-f46.google.com (mail-ej1-f46.google.com [209.85.218.46]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8D9DF495C1; Mon, 22 Jan 2024 21:29:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.218.46 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705958985; cv=none; b=QowckRyjXkLK8Cc2ktZicT7JX1prVQIny8MjavjiBnTBMqsfdx4hKHl11TS7xlVu1hcSwt+YTpYF3FyWt2Xbk38Lb6Umi40O5UunnVSaH6bZdkiBrpMr46A1DC6h+bKmWYPJ0x9BszBkllBPrWyS63p/eMpBBluxhiK+AElCd54= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705958985; c=relaxed/simple; bh=P9kbg96h8nA+vzLjsIPg4kILNbxrfwclXgGSuVa0iV8=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=RcB03xiR4ukyiteOPOUv3HO7GsL0QO6NlR/1c+8aBZMDqiyTalYf3WIdPmxS2QfSGvrITbhYYLK2wWyTMkgJeAWk56Ydt0O+EFmcXOURuQc5MLeVFBBrlztr3P/IM/eSqsUlQl+Ia8o7NnBokIBLGsv1sM6bIxZHsgOyubpufUE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=ZZF7CzXC; arc=none smtp.client-ip=209.85.218.46 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="ZZF7CzXC" Received: by mail-ej1-f46.google.com with SMTP id a640c23a62f3a-a293f2280c7so384526266b.1; Mon, 22 Jan 2024 13:29:43 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1705958981; x=1706563781; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=zhWArK/7gr86CDN8jWRWkGtNc20privf2Tsm1Zz0aTk=; b=ZZF7CzXCpOsRuH9joj/zRy5uoHcxQi6iQob7AgG/RJqMzPNx7ixHT+a8d0hI54bjAO TG7mJ+5jq3k45+cacqikFMK6JkcDHlpg/oOnm2BJ19n5dU9imLQUIssvWa1qeN0HKdJR Hpr7U7LvnnpVZet+Qda2ZBHNEbIjgLNJgCVMOO80Vgd067bO3FYOYUrx58018RTJMyck YJE1ozY4xyQUHvivUc9xYGxPxCqeH8cnNCC3rbLXapwN4kQ+p/4ORZ/mMt8znyXhGPBj LH3bXfXuQVo77MGalF4a0PDPJRBbcH/tkIJaCWnOX2ZkhSbAjSA8kHuwW1uEdsPyB+DF LyHQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1705958981; x=1706563781; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=zhWArK/7gr86CDN8jWRWkGtNc20privf2Tsm1Zz0aTk=; b=hlrI7k47bYRDG0Cm4m2p324U/dBj4qHrTJdIuQ7Uq6kXQSn6uKjN8ZtF2briftg7PE PYeG9a9HX2s2MIbQ+Bq4E4b+R3e04hPq5NuWRjFmnr4M5rxGHKgrqpZEWoowD0vvYckl MW2O2OyBX3B4m6kaNLXu5/O7gq9Vy56PVizefQU0TZIt7NBCupJ+KrLpnqpjV1M6vfMg 7gy33OVl7zyin7Yy+ZAZoigayILGnB+aaYh3T8xJNnqJMrmuaFptYz1+SCWQoovMST/O H/6e8xi/561IGPjEWZYKJxShZFW080v+yEs0zCeyZNeiw+TvNxRaIqILul4kDK3vfcyP l/zQ== X-Gm-Message-State: AOJu0Yw9wEEZU01l/BmEXmXvi5gBaybasUq3jeGrW75QUzG3yfL5zTmt 0lkL5IKxhBOeHNF6mRjQs23zAroFpc59dPW3pPAFfPpozekocflJ X-Google-Smtp-Source: AGHT+IE5LJOIE9k3df9dlH8iu5nDtZ9w9DUSHlza5TVbEs++MjeSoe3Pzyu3dm/kg3ZQTK7Az8K3WA== X-Received: by 2002:a17:907:d8f:b0:a2d:2121:2a93 with SMTP id go15-20020a1709070d8f00b00a2d21212a93mr1778897ejc.70.1705958981705; Mon, 22 Jan 2024 13:29:41 -0800 (PST) Received: from debian.fritz.box ([93.184.186.109]) by smtp.gmail.com with ESMTPSA id j25-20020a1709066dd900b00a26af4d96c6sm13823336ejt.4.2024.01.22.13.29.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Jan 2024 13:29:41 -0800 (PST) From: Dimitri Fedrau To: Cc: Dimitri Fedrau , Andrew Lunn , Heiner Kallweit , Russell King , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Stefan Eichenberger , netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v5 net-next 04/13] net: phy: marvell-88q2xxx: fix typos Date: Mon, 22 Jan 2024 22:28:37 +0100 Message-Id: <20240122212848.3645785-5-dima.fedrau@gmail.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240122212848.3645785-1-dima.fedrau@gmail.com> References: <20240122212848.3645785-1-dima.fedrau@gmail.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org Rename mv88q2xxxx_get_sqi to mv88q2xxx_get_sqi and mv88q2xxxx_get_sqi_max to mv88q2xxx_get_sqi_max. Fix linebreaks and use everywhere hexadecimal numbers written with lowercase letters instead of mixing it up. Reviewed-by: Andrew Lunn Signed-off-by: Dimitri Fedrau --- drivers/net/phy/marvell-88q2xxx.c | 28 +++++++++++++++++----------- 1 file changed, 17 insertions(+), 11 deletions(-) diff --git a/drivers/net/phy/marvell-88q2xxx.c b/drivers/net/phy/marvell-88q2xxx.c index 1c3ff77de56b..dcebb4643aff 100644 --- a/drivers/net/phy/marvell-88q2xxx.c +++ b/drivers/net/phy/marvell-88q2xxx.c @@ -14,7 +14,7 @@ #define MDIO_MMD_AN_MV_STAT_MS_CONF_FAULT 0x8000 #define MDIO_MMD_PCS_MV_100BT1_STAT1 33032 -#define MDIO_MMD_PCS_MV_100BT1_STAT1_IDLE_ERROR 0x00FF +#define MDIO_MMD_PCS_MV_100BT1_STAT1_IDLE_ERROR 0x00ff #define MDIO_MMD_PCS_MV_100BT1_STAT1_JABBER 0x0100 #define MDIO_MMD_PCS_MV_100BT1_STAT1_LINK 0x0200 #define MDIO_MMD_PCS_MV_100BT1_STAT1_LOCAL_RX 0x1000 @@ -27,6 +27,8 @@ #define MDIO_MMD_PCS_MV_100BT1_STAT2_LINK 0x0004 #define MDIO_MMD_PCS_MV_100BT1_STAT2_ANGE 0x0008 +#define MDIO_MMD_PCS_MV_RX_STAT 33328 + static int mv88q2xxx_soft_reset(struct phy_device *phydev) { int ret; @@ -63,7 +65,8 @@ static int mv88q2xxx_read_link_gbit(struct phy_device *phydev) * the link was already down. */ if (!phy_polling_mode(phydev) || !phydev->link) { - ret = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_PCS_1000BT1_STAT); + ret = phy_read_mmd(phydev, MDIO_MMD_PCS, + MDIO_PCS_1000BT1_STAT); if (ret < 0) return ret; else if (ret & MDIO_PCS_1000BT1_STAT_LINK) @@ -71,7 +74,8 @@ static int mv88q2xxx_read_link_gbit(struct phy_device *phydev) } if (!link) { - ret = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_PCS_1000BT1_STAT); + ret = phy_read_mmd(phydev, MDIO_MMD_PCS, + MDIO_PCS_1000BT1_STAT); if (ret < 0) return ret; else if (ret & MDIO_PCS_1000BT1_STAT_LINK) @@ -95,7 +99,8 @@ static int mv88q2xxx_read_link_100m(struct phy_device *phydev) * we always read the realtime status. */ if (!phy_polling_mode(phydev) || !phydev->link) { - ret = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_MMD_PCS_MV_100BT1_STAT1); + ret = phy_read_mmd(phydev, MDIO_MMD_PCS, + MDIO_MMD_PCS_MV_100BT1_STAT1); if (ret < 0) return ret; else if (ret & MDIO_MMD_PCS_MV_100BT1_STAT1_LINK) @@ -200,7 +205,7 @@ static int mv88q2xxx_config_init(struct phy_device *phydev) return mv88q2xxx_config_aneg(phydev); } -static int mv88q2xxxx_get_sqi(struct phy_device *phydev) +static int mv88q2xxx_get_sqi(struct phy_device *phydev) { int ret; @@ -208,7 +213,8 @@ static int mv88q2xxxx_get_sqi(struct phy_device *phydev) /* Read the SQI from the vendor specific receiver status * register */ - ret = phy_read_mmd(phydev, MDIO_MMD_PCS, 0x8230); + ret = phy_read_mmd(phydev, MDIO_MMD_PCS, + MDIO_MMD_PCS_MV_RX_STAT); if (ret < 0) return ret; @@ -218,7 +224,7 @@ static int mv88q2xxxx_get_sqi(struct phy_device *phydev) * but can be found in the Software Initialization Guide. Only * revisions >= A0 are supported. */ - ret = phy_modify_mmd(phydev, MDIO_MMD_PCS, 0xFC5D, 0x00FF, 0x00AC); + ret = phy_modify_mmd(phydev, MDIO_MMD_PCS, 0xfc5d, 0xff, 0xac); if (ret < 0) return ret; @@ -227,10 +233,10 @@ static int mv88q2xxxx_get_sqi(struct phy_device *phydev) return ret; } - return ret & 0x0F; + return ret & 0x0f; } -static int mv88q2xxxx_get_sqi_max(struct phy_device *phydev) +static int mv88q2xxx_get_sqi_max(struct phy_device *phydev) { return 15; } @@ -246,8 +252,8 @@ static struct phy_driver mv88q2xxx_driver[] = { .read_status = mv88q2xxx_read_status, .soft_reset = mv88q2xxx_soft_reset, .set_loopback = genphy_c45_loopback, - .get_sqi = mv88q2xxxx_get_sqi, - .get_sqi_max = mv88q2xxxx_get_sqi_max, + .get_sqi = mv88q2xxx_get_sqi, + .get_sqi_max = mv88q2xxx_get_sqi_max, }, }; From patchwork Mon Jan 22 21:28:38 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dimitri Fedrau X-Patchwork-Id: 13526279 X-Patchwork-Delegate: kuba@kernel.org Received: from mail-ej1-f50.google.com (mail-ej1-f50.google.com [209.85.218.50]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D4948495ED; Mon, 22 Jan 2024 21:29:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.218.50 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705958988; cv=none; b=g3hiL8mF0K3Znlmz1mCLrLqozCRktFDcp+KQXjvbdLedkDwglSW5o/JrqkbAYeaa/onxAb2nPhVhB6IVEjxWLBShQ5w95GIoBxbBohbsVOl2+QhP4aYBK75IPaWAiC1fqV01g4Oau0F2HltGi2S+aRRR3gwJJih5ao3aZuBuMrw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705958988; c=relaxed/simple; bh=aIIq6V13Zoi/3+Sd7GSRPsc1LR3jzgZJfkSKjmq+cb4=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=rFFA0Kk+4bhkLqsOobO8rQHQYqYTzWrcsm1T2pavKDCCL/2zT5a46Sc/gbZbn0KrFrE1NLrpw66PT6wHuKV7414X83oAwj0ti5c3TxwXceRMLkI1+huKgmYJOQL1foiH4ULQZoFFQtNiYyQKfT0tJ+rxUq9yeHwXuOg+5u/zLQw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=nmcdL2Zp; arc=none smtp.client-ip=209.85.218.50 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="nmcdL2Zp" Received: by mail-ej1-f50.google.com with SMTP id a640c23a62f3a-a26fa294e56so370171066b.0; Mon, 22 Jan 2024 13:29:46 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1705958985; x=1706563785; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=OG1sbXe1XnUJC0Mad6zflX1t4pG/i7YnBhJGoPsjSig=; b=nmcdL2Zp0UPHcthYwkj3Nv3rwtjzE46cJusKdG9hjDUF0eWZRx2ZWYi1S8VQjLMB7C zQXkEsjAIcdzDDyq0KhH15O2p59vw2zaPTi7EXJ0PKlem+86xpOLBpuLq6PXhYbfuZWF Q2sCdjRe+FTDgkSsbOHtLDwowHewZeHEju30m4hNkFXLu7IRTQmNinv/LxQCqUebG2eF TLCv227vl+u5SPIFNUhK/lDbT00UQFEtdowR+acaEJXUyuovoW+1pv1Qo55204umP8Hm mhRjVeDsLFkza8hHZqMA/EVltmdxryZfHaPTPjmypCgGGB6GHAiGK24aMdBX2C8z5bBP UnVg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1705958985; x=1706563785; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=OG1sbXe1XnUJC0Mad6zflX1t4pG/i7YnBhJGoPsjSig=; b=cj4pCA7SUMaQM2ZTHMTXiBqcegHN45wWCyn/uZeeyoYUGllmpFUVef1b489buXnDLq sl7wcmaJv7f6JC9mvuv5xKupWZNRpLAccdDRqjyuRM0QDeOfjtRamuNcOkLX6qXtgVY5 cuH/JQ8om2kSHgTiSffiUxFdoVXFG1RYmtqDkieUMMhJaRSm7xjASW6MiAD5QGC7UoCy 8eb8yX7SjjpFpoZk0k6ZDKiIaAIcn7Ol68+TPiPzHIbGDmGJ0B3HBjMfqGbmwWKdXrms UTbujMaslKmzhgegr3ryVT3yVN/Y3UAdxZPMFLt8+kBpCkO5RdX57P6+T+6zSnqrKJ2f UyeQ== X-Gm-Message-State: AOJu0YyoTI8ldaAzcIAK3ECvrhfqbNokERGjb+gN3f1PjrCTkq7NOOtz LtqDKt4aJIjfVexr1DrTMFB7loi4f05KRVmNeMJueJh459NT6yhP X-Google-Smtp-Source: AGHT+IERPT9JcDGgwRwnRp4l6GeDzPnP1ryNGGaF6YIZcEadZf4E8s1D+XBN7Ppa4pDJ163Zd47zQA== X-Received: by 2002:a17:906:f8d8:b0:a30:9852:f6ab with SMTP id lh24-20020a170906f8d800b00a309852f6abmr402223ejb.56.1705958984837; Mon, 22 Jan 2024 13:29:44 -0800 (PST) Received: from debian.fritz.box ([93.184.186.109]) by smtp.gmail.com with ESMTPSA id j25-20020a1709066dd900b00a26af4d96c6sm13823336ejt.4.2024.01.22.13.29.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Jan 2024 13:29:44 -0800 (PST) From: Dimitri Fedrau To: Cc: Dimitri Fedrau , Andrew Lunn , Heiner Kallweit , Russell King , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Stefan Eichenberger , netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v5 net-next 05/13] net: phy: marvell-88q2xxx: add driver for the Marvell 88Q2220 PHY Date: Mon, 22 Jan 2024 22:28:38 +0100 Message-Id: <20240122212848.3645785-6-dima.fedrau@gmail.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240122212848.3645785-1-dima.fedrau@gmail.com> References: <20240122212848.3645785-1-dima.fedrau@gmail.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org Add a driver for the Marvell 88Q2220. This driver allows to detect the link, switch between 100BASE-T1 and 1000BASE-T1 and switch between master and slave mode. Autonegotiation is supported. Signed-off-by: Dimitri Fedrau Reviewed-by: Andrew Lunn --- drivers/net/phy/marvell-88q2xxx.c | 206 +++++++++++++++++++++++++++++- include/linux/marvell_phy.h | 1 + 2 files changed, 201 insertions(+), 6 deletions(-) diff --git a/drivers/net/phy/marvell-88q2xxx.c b/drivers/net/phy/marvell-88q2xxx.c index dcebb4643aff..637ef4821e35 100644 --- a/drivers/net/phy/marvell-88q2xxx.c +++ b/drivers/net/phy/marvell-88q2xxx.c @@ -6,6 +6,8 @@ #include #include +#define PHY_ID_88Q2220_REVB0 (MARVELL_PHY_ID_88Q2220 | 0x1) + #define MDIO_MMD_AN_MV_STAT 32769 #define MDIO_MMD_AN_MV_STAT_ANEG 0x0100 #define MDIO_MMD_AN_MV_STAT_LOCAL_RX 0x1000 @@ -13,6 +15,11 @@ #define MDIO_MMD_AN_MV_STAT_LOCAL_MASTER 0x4000 #define MDIO_MMD_AN_MV_STAT_MS_CONF_FAULT 0x8000 +#define MDIO_MMD_AN_MV_STAT2 32794 +#define MDIO_MMD_AN_MV_STAT2_AN_RESOLVED 0x0800 +#define MDIO_MMD_AN_MV_STAT2_100BT1 0x2000 +#define MDIO_MMD_AN_MV_STAT2_1000BT1 0x4000 + #define MDIO_MMD_PCS_MV_100BT1_STAT1 33032 #define MDIO_MMD_PCS_MV_100BT1_STAT1_IDLE_ERROR 0x00ff #define MDIO_MMD_PCS_MV_100BT1_STAT1_JABBER 0x0100 @@ -29,6 +36,42 @@ #define MDIO_MMD_PCS_MV_RX_STAT 33328 +struct mmd_val { + int devad; + u32 regnum; + u16 val; +}; + +static const struct mmd_val mv88q222x_revb0_init_seq0[] = { + { MDIO_MMD_PCS, 0x8033, 0x6801 }, + { MDIO_MMD_AN, MDIO_AN_T1_CTRL, 0x0 }, + { MDIO_MMD_PMAPMD, MDIO_CTRL1, + MDIO_CTRL1_LPOWER | MDIO_PMA_CTRL1_SPEED1000 }, + { MDIO_MMD_PCS, 0xfe1b, 0x48 }, + { MDIO_MMD_PCS, 0xffe4, 0x6b6 }, + { MDIO_MMD_PMAPMD, MDIO_CTRL1, 0x0 }, + { MDIO_MMD_PCS, MDIO_CTRL1, 0x0 }, +}; + +static const struct mmd_val mv88q222x_revb0_init_seq1[] = { + { MDIO_MMD_PCS, 0xfe79, 0x0 }, + { MDIO_MMD_PCS, 0xfe07, 0x125a }, + { MDIO_MMD_PCS, 0xfe09, 0x1288 }, + { MDIO_MMD_PCS, 0xfe08, 0x2588 }, + { MDIO_MMD_PCS, 0xfe11, 0x1105 }, + { MDIO_MMD_PCS, 0xfe72, 0x042c }, + { MDIO_MMD_PCS, 0xfbba, 0xcb2 }, + { MDIO_MMD_PCS, 0xfbbb, 0xc4a }, + { MDIO_MMD_AN, 0x8032, 0x2020 }, + { MDIO_MMD_AN, 0x8031, 0xa28 }, + { MDIO_MMD_AN, 0x8031, 0xc28 }, + { MDIO_MMD_PCS, 0xffdb, 0xfc10 }, + { MDIO_MMD_PCS, 0xfe1b, 0x58 }, + { MDIO_MMD_PCS, 0xfe79, 0x4 }, + { MDIO_MMD_PCS, 0xfe5f, 0xe8 }, + { MDIO_MMD_PCS, 0xfe05, 0x755c }, +}; + static int mv88q2xxx_soft_reset(struct phy_device *phydev) { int ret; @@ -125,24 +168,90 @@ static int mv88q2xxx_read_link_100m(struct phy_device *phydev) static int mv88q2xxx_read_link(struct phy_device *phydev) { - int ret; - /* The 88Q2XXX PHYs do not have the PMA/PMD status register available, * therefore we need to read the link status from the vendor specific * registers depending on the speed. */ + if (phydev->speed == SPEED_1000) - ret = mv88q2xxx_read_link_gbit(phydev); + return mv88q2xxx_read_link_gbit(phydev); + else if (phydev->speed == SPEED_100) + return mv88q2xxx_read_link_100m(phydev); + + phydev->link = false; + return 0; +} + +static int mv88q2xxx_read_master_slave_state(struct phy_device *phydev) +{ + int ret; + + phydev->master_slave_state = MASTER_SLAVE_STATE_UNKNOWN; + ret = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_MMD_AN_MV_STAT); + if (ret < 0) + return ret; + + if (ret & MDIO_MMD_AN_MV_STAT_LOCAL_MASTER) + phydev->master_slave_state = MASTER_SLAVE_STATE_MASTER; else - ret = mv88q2xxx_read_link_100m(phydev); + phydev->master_slave_state = MASTER_SLAVE_STATE_SLAVE; - return ret; + return 0; +} + +static int mv88q2xxx_read_aneg_speed(struct phy_device *phydev) +{ + int ret; + + phydev->speed = SPEED_UNKNOWN; + ret = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_MMD_AN_MV_STAT2); + if (ret < 0) + return ret; + + if (!(ret & MDIO_MMD_AN_MV_STAT2_AN_RESOLVED)) + return 0; + + if (ret & MDIO_MMD_AN_MV_STAT2_100BT1) + phydev->speed = SPEED_100; + else if (ret & MDIO_MMD_AN_MV_STAT2_1000BT1) + phydev->speed = SPEED_1000; + + return 0; } static int mv88q2xxx_read_status(struct phy_device *phydev) { int ret; + if (phydev->autoneg == AUTONEG_ENABLE) { + /* We have to get the negotiated speed first, otherwise we are + * not able to read the link. + */ + ret = mv88q2xxx_read_aneg_speed(phydev); + if (ret < 0) + return ret; + + ret = mv88q2xxx_read_link(phydev); + if (ret < 0) + return ret; + + ret = genphy_c45_read_lpa(phydev); + if (ret < 0) + return ret; + + ret = genphy_c45_baset1_read_status(phydev); + if (ret < 0) + return ret; + + ret = mv88q2xxx_read_master_slave_state(phydev); + if (ret < 0) + return ret; + + phy_resolve_aneg_linkmode(phydev); + + return 0; + } + ret = mv88q2xxx_read_link(phydev); if (ret < 0) return ret; @@ -171,7 +280,9 @@ static int mv88q2xxx_get_features(struct phy_device *phydev) * sequence provided by Marvell. Disable it for now until a proper * workaround is found or a new PHY revision is released. */ - linkmode_clear_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, phydev->supported); + if (phydev->drv->phy_id == MARVELL_PHY_ID_88Q2110) + linkmode_clear_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, + phydev->supported); return 0; } @@ -241,6 +352,75 @@ static int mv88q2xxx_get_sqi_max(struct phy_device *phydev) return 15; } +static int mv88q222x_soft_reset(struct phy_device *phydev) +{ + int ret; + + /* Enable RESET of DCL */ + if (phydev->autoneg == AUTONEG_ENABLE || phydev->speed == SPEED_1000) { + ret = phy_write_mmd(phydev, MDIO_MMD_PCS, 0xfe1b, 0x48); + if (ret < 0) + return ret; + } + + ret = phy_write_mmd(phydev, MDIO_MMD_PCS, MDIO_PCS_1000BT1_CTRL, + MDIO_PCS_1000BT1_CTRL_RESET); + if (ret < 0) + return ret; + + ret = phy_write_mmd(phydev, MDIO_MMD_PCS, 0xffe4, 0xc); + if (ret < 0) + return ret; + + /* Disable RESET of DCL */ + if (phydev->autoneg == AUTONEG_ENABLE || phydev->speed == SPEED_1000) + return phy_write_mmd(phydev, MDIO_MMD_PCS, 0xfe1b, 0x58); + + return 0; +} + +static int mv88q222x_config_aneg(struct phy_device *phydev) +{ + int ret; + + ret = genphy_c45_config_aneg(phydev); + if (ret) + return ret; + + return mv88q222x_soft_reset(phydev); +} + +static int mv88q222x_revb0_config_init(struct phy_device *phydev) +{ + int ret, i; + + for (i = 0; i < ARRAY_SIZE(mv88q222x_revb0_init_seq0); i++) { + ret = phy_write_mmd(phydev, mv88q222x_revb0_init_seq0[i].devad, + mv88q222x_revb0_init_seq0[i].regnum, + mv88q222x_revb0_init_seq0[i].val); + if (ret < 0) + return ret; + } + + usleep_range(5000, 10000); + + for (i = 0; i < ARRAY_SIZE(mv88q222x_revb0_init_seq1); i++) { + ret = phy_write_mmd(phydev, mv88q222x_revb0_init_seq1[i].devad, + mv88q222x_revb0_init_seq1[i].regnum, + mv88q222x_revb0_init_seq1[i].val); + if (ret < 0) + return ret; + } + + /* The 88Q2XXX PHYs do have the extended ability register available, but + * register MDIO_PMA_EXTABLE where they should signalize it does not + * work according to specification. Therefore, we force it here. + */ + phydev->pma_extable = MDIO_PMA_EXTABLE_BT1; + + return 0; +} + static struct phy_driver mv88q2xxx_driver[] = { { .phy_id = MARVELL_PHY_ID_88Q2110, @@ -255,12 +435,26 @@ static struct phy_driver mv88q2xxx_driver[] = { .get_sqi = mv88q2xxx_get_sqi, .get_sqi_max = mv88q2xxx_get_sqi_max, }, + { + PHY_ID_MATCH_EXACT(PHY_ID_88Q2220_REVB0), + .name = "mv88q2220", + .get_features = mv88q2xxx_get_features, + .config_aneg = mv88q222x_config_aneg, + .aneg_done = genphy_c45_aneg_done, + .config_init = mv88q222x_revb0_config_init, + .read_status = mv88q2xxx_read_status, + .soft_reset = mv88q222x_soft_reset, + .set_loopback = genphy_c45_loopback, + .get_sqi = mv88q2xxx_get_sqi, + .get_sqi_max = mv88q2xxx_get_sqi_max, + }, }; module_phy_driver(mv88q2xxx_driver); static struct mdio_device_id __maybe_unused mv88q2xxx_tbl[] = { { MARVELL_PHY_ID_88Q2110, MARVELL_PHY_ID_MASK }, + { PHY_ID_MATCH_EXACT(PHY_ID_88Q2220_REVB0), }, { /*sentinel*/ } }; MODULE_DEVICE_TABLE(mdio, mv88q2xxx_tbl); diff --git a/include/linux/marvell_phy.h b/include/linux/marvell_phy.h index 9b54c4f0677f..693eba9869e4 100644 --- a/include/linux/marvell_phy.h +++ b/include/linux/marvell_phy.h @@ -26,6 +26,7 @@ #define MARVELL_PHY_ID_88E2110 0x002b09b0 #define MARVELL_PHY_ID_88X2222 0x01410f10 #define MARVELL_PHY_ID_88Q2110 0x002b0980 +#define MARVELL_PHY_ID_88Q2220 0x002b0b20 /* Marvel 88E1111 in Finisar SFP module with modified PHY ID */ #define MARVELL_PHY_ID_88E1111_FINISAR 0x01ff0cc0 From patchwork Mon Jan 22 21:28:39 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dimitri Fedrau X-Patchwork-Id: 13526280 X-Patchwork-Delegate: kuba@kernel.org Received: from mail-ej1-f52.google.com (mail-ej1-f52.google.com [209.85.218.52]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C1A3C4A9AA; Mon, 22 Jan 2024 21:29:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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Mon, 22 Jan 2024 13:29:47 -0800 (PST) Received: from debian.fritz.box ([93.184.186.109]) by smtp.gmail.com with ESMTPSA id j25-20020a1709066dd900b00a26af4d96c6sm13823336ejt.4.2024.01.22.13.29.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Jan 2024 13:29:47 -0800 (PST) From: Dimitri Fedrau To: Cc: Dimitri Fedrau , Andrew Lunn , Heiner Kallweit , Russell King , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Stefan Eichenberger , netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v5 net-next 06/13] net: phy: marvell-88q2xxx: add interrupt support for link detection Date: Mon, 22 Jan 2024 22:28:39 +0100 Message-Id: <20240122212848.3645785-7-dima.fedrau@gmail.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240122212848.3645785-1-dima.fedrau@gmail.com> References: <20240122212848.3645785-1-dima.fedrau@gmail.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org Added .config_intr and .handle_interrupt callbacks. Whenever the link goes up or down an interrupt will be triggered. Interrupts are configured separately for 100/1000BASET1. Signed-off-by: Dimitri Fedrau Reviewed-by: Andrew Lunn --- drivers/net/phy/marvell-88q2xxx.c | 123 +++++++++++++++++++++++++++++- 1 file changed, 119 insertions(+), 4 deletions(-) diff --git a/drivers/net/phy/marvell-88q2xxx.c b/drivers/net/phy/marvell-88q2xxx.c index 637ef4821e35..635827b4a692 100644 --- a/drivers/net/phy/marvell-88q2xxx.c +++ b/drivers/net/phy/marvell-88q2xxx.c @@ -20,6 +20,19 @@ #define MDIO_MMD_AN_MV_STAT2_100BT1 0x2000 #define MDIO_MMD_AN_MV_STAT2_1000BT1 0x4000 +#define MDIO_MMD_PCS_MV_INT_EN 32784 +#define MDIO_MMD_PCS_MV_INT_EN_LINK_UP 0x0040 +#define MDIO_MMD_PCS_MV_INT_EN_LINK_DOWN 0x0080 +#define MDIO_MMD_PCS_MV_INT_EN_100BT1 0x1000 + +#define MDIO_MMD_PCS_MV_GPIO_INT_STAT 32785 +#define MDIO_MMD_PCS_MV_GPIO_INT_STAT_LINK_UP 0x0040 +#define MDIO_MMD_PCS_MV_GPIO_INT_STAT_LINK_DOWN 0x0080 +#define MDIO_MMD_PCS_MV_GPIO_INT_STAT_100BT1_GEN 0x1000 + +#define MDIO_MMD_PCS_MV_GPIO_INT_CTRL 32787 +#define MDIO_MMD_PCS_MV_GPIO_INT_CTRL_TRI_DIS 0x0800 + #define MDIO_MMD_PCS_MV_100BT1_STAT1 33032 #define MDIO_MMD_PCS_MV_100BT1_STAT1_IDLE_ERROR 0x00ff #define MDIO_MMD_PCS_MV_100BT1_STAT1_JABBER 0x0100 @@ -34,6 +47,12 @@ #define MDIO_MMD_PCS_MV_100BT1_STAT2_LINK 0x0004 #define MDIO_MMD_PCS_MV_100BT1_STAT2_ANGE 0x0008 +#define MDIO_MMD_PCS_MV_100BT1_INT_EN 33042 +#define MDIO_MMD_PCS_MV_100BT1_INT_EN_LINKEVENT 0x0400 + +#define MDIO_MMD_PCS_MV_COPPER_INT_STAT 33043 +#define MDIO_MMD_PCS_MV_COPPER_INT_STAT_LINKEVENT 0x0400 + #define MDIO_MMD_PCS_MV_RX_STAT 33328 struct mmd_val { @@ -95,13 +114,15 @@ static int mv88q2xxx_read_link_gbit(struct phy_device *phydev) /* Read vendor specific Auto-Negotiation status register to get local * and remote receiver status according to software initialization - * guide. + * guide. However, when not in polling mode the local and remote + * receiver status are not evaluated due to the Marvell 88Q2xxx APIs. */ ret = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_MMD_AN_MV_STAT); if (ret < 0) { return ret; - } else if ((ret & MDIO_MMD_AN_MV_STAT_LOCAL_RX) && - (ret & MDIO_MMD_AN_MV_STAT_REMOTE_RX)) { + } else if (((ret & MDIO_MMD_AN_MV_STAT_LOCAL_RX) && + (ret & MDIO_MMD_AN_MV_STAT_REMOTE_RX)) || + !phy_polling_mode(phydev)) { /* The link state is latched low so that momentary link * drops can be detected. Do not double-read the status * in polling mode to detect such short link drops except @@ -141,7 +162,18 @@ static int mv88q2xxx_read_link_100m(struct phy_device *phydev) * the link was already down. In case we are not polling, * we always read the realtime status. */ - if (!phy_polling_mode(phydev) || !phydev->link) { + if (!phy_polling_mode(phydev)) { + phydev->link = false; + ret = phy_read_mmd(phydev, MDIO_MMD_PCS, + MDIO_MMD_PCS_MV_100BT1_STAT2); + if (ret < 0) + return ret; + + if (ret & MDIO_MMD_PCS_MV_100BT1_STAT2_LINK) + phydev->link = true; + + return 0; + } else if (!phydev->link) { ret = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_MMD_PCS_MV_100BT1_STAT1); if (ret < 0) @@ -352,6 +384,79 @@ static int mv88q2xxx_get_sqi_max(struct phy_device *phydev) return 15; } +static int mv88q2xxx_config_intr(struct phy_device *phydev) +{ + int ret; + + if (phydev->interrupts == PHY_INTERRUPT_ENABLED) { + /* Enable interrupts for 1000BASE-T1 link up and down events + * and enable general interrupts for 100BASE-T1. + */ + ret = phy_write_mmd(phydev, MDIO_MMD_PCS, + MDIO_MMD_PCS_MV_INT_EN, + MDIO_MMD_PCS_MV_INT_EN_LINK_UP | + MDIO_MMD_PCS_MV_INT_EN_LINK_DOWN | + MDIO_MMD_PCS_MV_INT_EN_100BT1); + if (ret < 0) + return ret; + + /* Enable interrupts for 100BASE-T1 link events */ + return phy_write_mmd(phydev, MDIO_MMD_PCS, + MDIO_MMD_PCS_MV_100BT1_INT_EN, + MDIO_MMD_PCS_MV_100BT1_INT_EN_LINKEVENT); + } else { + ret = phy_write_mmd(phydev, MDIO_MMD_PCS, + MDIO_MMD_PCS_MV_INT_EN, 0); + if (ret < 0) + return ret; + + return phy_write_mmd(phydev, MDIO_MMD_PCS, + MDIO_MMD_PCS_MV_100BT1_INT_EN, 0); + } +} + +static irqreturn_t mv88q2xxx_handle_interrupt(struct phy_device *phydev) +{ + bool trigger_machine = false; + int irq; + + /* Before we can acknowledge the 100BT1 general interrupt, that is in + * the 1000BT1 interrupt status register, we have to acknowledge any + * interrupts that are related to it. Therefore we read first the 100BT1 + * interrupt status register, followed by reading the 1000BT1 interrupt + * status register. + */ + + irq = phy_read_mmd(phydev, MDIO_MMD_PCS, + MDIO_MMD_PCS_MV_COPPER_INT_STAT); + if (irq < 0) { + phy_error(phydev); + return IRQ_NONE; + } + + /* Check link status for 100BT1 */ + if (irq & MDIO_MMD_PCS_MV_COPPER_INT_STAT_LINKEVENT) + trigger_machine = true; + + irq = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_MMD_PCS_MV_GPIO_INT_STAT); + if (irq < 0) { + phy_error(phydev); + return IRQ_NONE; + } + + /* Check link status for 1000BT1 */ + if ((irq & MDIO_MMD_PCS_MV_GPIO_INT_STAT_LINK_UP) || + (irq & MDIO_MMD_PCS_MV_GPIO_INT_STAT_LINK_DOWN)) + trigger_machine = true; + + if (!trigger_machine) + return IRQ_NONE; + + phy_trigger_machine(phydev); + + return IRQ_HANDLED; +} + static int mv88q222x_soft_reset(struct phy_device *phydev) { int ret; @@ -418,6 +523,14 @@ static int mv88q222x_revb0_config_init(struct phy_device *phydev) */ phydev->pma_extable = MDIO_PMA_EXTABLE_BT1; + /* Configure interrupt with default settings, output is driven low for + * active interrupt and high for inactive. + */ + if (phy_interrupt_is_valid(phydev)) + return phy_set_bits_mmd(phydev, MDIO_MMD_PCS, + MDIO_MMD_PCS_MV_GPIO_INT_CTRL, + MDIO_MMD_PCS_MV_GPIO_INT_CTRL_TRI_DIS); + return 0; } @@ -444,6 +557,8 @@ static struct phy_driver mv88q2xxx_driver[] = { .config_init = mv88q222x_revb0_config_init, .read_status = mv88q2xxx_read_status, .soft_reset = mv88q222x_soft_reset, + .config_intr = mv88q2xxx_config_intr, + .handle_interrupt = mv88q2xxx_handle_interrupt, .set_loopback = genphy_c45_loopback, .get_sqi = mv88q2xxx_get_sqi, .get_sqi_max = mv88q2xxx_get_sqi_max, From patchwork Mon Jan 22 21:28:40 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dimitri Fedrau X-Patchwork-Id: 13526281 X-Patchwork-Delegate: kuba@kernel.org Received: from mail-ed1-f45.google.com (mail-ed1-f45.google.com [209.85.208.45]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C32DA4B5B6; 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Mon, 22 Jan 2024 13:29:50 -0800 (PST) Received: from debian.fritz.box ([93.184.186.109]) by smtp.gmail.com with ESMTPSA id j25-20020a1709066dd900b00a26af4d96c6sm13823336ejt.4.2024.01.22.13.29.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Jan 2024 13:29:50 -0800 (PST) From: Dimitri Fedrau To: Cc: Dimitri Fedrau , Andrew Lunn , Heiner Kallweit , Russell King , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Stefan Eichenberger , netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v5 net-next 07/13] net: phy: marvell-88q2xxx: add suspend / resume ops Date: Mon, 22 Jan 2024 22:28:40 +0100 Message-Id: <20240122212848.3645785-8-dima.fedrau@gmail.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240122212848.3645785-1-dima.fedrau@gmail.com> References: <20240122212848.3645785-1-dima.fedrau@gmail.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org Add suspend/resume ops for Marvell 88Q2xxx devices. Signed-off-by: Dimitri Fedrau Reviewed-by: Andrew Lunn --- drivers/net/phy/marvell-88q2xxx.c | 34 +++++++++++++++++++++++++++++++ 1 file changed, 34 insertions(+) diff --git a/drivers/net/phy/marvell-88q2xxx.c b/drivers/net/phy/marvell-88q2xxx.c index 635827b4a692..4cb8fe524795 100644 --- a/drivers/net/phy/marvell-88q2xxx.c +++ b/drivers/net/phy/marvell-88q2xxx.c @@ -457,6 +457,38 @@ static irqreturn_t mv88q2xxx_handle_interrupt(struct phy_device *phydev) return IRQ_HANDLED; } +static int mv88q2xxx_suspend(struct phy_device *phydev) +{ + int ret; + + /* Disable PHY interrupts */ + if (phy_interrupt_is_valid(phydev)) { + phydev->interrupts = PHY_INTERRUPT_DISABLED; + ret = mv88q2xxx_config_intr(phydev); + if (ret) + return ret; + } + + return phy_set_bits_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_CTRL1, + MDIO_CTRL1_LPOWER); +} + +static int mv88q2xxx_resume(struct phy_device *phydev) +{ + int ret; + + /* Enable PHY interrupts */ + if (phy_interrupt_is_valid(phydev)) { + phydev->interrupts = PHY_INTERRUPT_ENABLED; + ret = mv88q2xxx_config_intr(phydev); + if (ret) + return ret; + } + + return phy_clear_bits_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_CTRL1, + MDIO_CTRL1_LPOWER); +} + static int mv88q222x_soft_reset(struct phy_device *phydev) { int ret; @@ -562,6 +594,8 @@ static struct phy_driver mv88q2xxx_driver[] = { .set_loopback = genphy_c45_loopback, .get_sqi = mv88q2xxx_get_sqi, .get_sqi_max = mv88q2xxx_get_sqi_max, + .suspend = mv88q2xxx_suspend, + .resume = mv88q2xxx_resume, }, }; From patchwork Mon Jan 22 21:28:41 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dimitri Fedrau X-Patchwork-Id: 13526282 X-Patchwork-Delegate: kuba@kernel.org Received: from mail-ed1-f50.google.com (mail-ed1-f50.google.com [209.85.208.50]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CA24D4BA90; Mon, 22 Jan 2024 21:29:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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Mon, 22 Jan 2024 13:29:53 -0800 (PST) Received: from debian.fritz.box ([93.184.186.109]) by smtp.gmail.com with ESMTPSA id j25-20020a1709066dd900b00a26af4d96c6sm13823336ejt.4.2024.01.22.13.29.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Jan 2024 13:29:53 -0800 (PST) From: Dimitri Fedrau To: Cc: Dimitri Fedrau , Andrew Lunn , Heiner Kallweit , Russell King , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Jean Delvare , Guenter Roeck , Stefan Eichenberger , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-hwmon@vger.kernel.org Subject: [PATCH v5 net-next 08/13] net: phy: marvell-88q2xxx: add support for temperature sensor Date: Mon, 22 Jan 2024 22:28:41 +0100 Message-Id: <20240122212848.3645785-9-dima.fedrau@gmail.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240122212848.3645785-1-dima.fedrau@gmail.com> References: <20240122212848.3645785-1-dima.fedrau@gmail.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org Marvell 88q2xxx devices have an inbuilt temperature sensor. Add hwmon support for this sensor. Signed-off-by: Dimitri Fedrau --- drivers/net/phy/marvell-88q2xxx.c | 152 ++++++++++++++++++++++++++++++ 1 file changed, 152 insertions(+) diff --git a/drivers/net/phy/marvell-88q2xxx.c b/drivers/net/phy/marvell-88q2xxx.c index 4cb8fe524795..6900bad275d0 100644 --- a/drivers/net/phy/marvell-88q2xxx.c +++ b/drivers/net/phy/marvell-88q2xxx.c @@ -5,6 +5,7 @@ #include #include #include +#include #define PHY_ID_88Q2220_REVB0 (MARVELL_PHY_ID_88Q2220 | 0x1) @@ -33,6 +34,19 @@ #define MDIO_MMD_PCS_MV_GPIO_INT_CTRL 32787 #define MDIO_MMD_PCS_MV_GPIO_INT_CTRL_TRI_DIS 0x0800 +#define MDIO_MMD_PCS_MV_TEMP_SENSOR1 32833 +#define MDIO_MMD_PCS_MV_TEMP_SENSOR1_RAW_INT 0x0001 +#define MDIO_MMD_PCS_MV_TEMP_SENSOR1_INT 0x0040 +#define MDIO_MMD_PCS_MV_TEMP_SENSOR1_INT_EN 0x0080 + +#define MDIO_MMD_PCS_MV_TEMP_SENSOR2 32834 +#define MDIO_MMD_PCS_MV_TEMP_SENSOR2_DIS_MASK 0xc000 + +#define MDIO_MMD_PCS_MV_TEMP_SENSOR3 32835 +#define MDIO_MMD_PCS_MV_TEMP_SENSOR3_INT_THRESH_MASK 0xff00 +#define MDIO_MMD_PCS_MV_TEMP_SENSOR3_INT_THRESH_SHIFT 8 +#define MDIO_MMD_PCS_MV_TEMP_SENSOR3_MASK 0x00ff + #define MDIO_MMD_PCS_MV_100BT1_STAT1 33032 #define MDIO_MMD_PCS_MV_100BT1_STAT1_IDLE_ERROR 0x00ff #define MDIO_MMD_PCS_MV_100BT1_STAT1_JABBER 0x0100 @@ -488,6 +502,143 @@ static int mv88q2xxx_resume(struct phy_device *phydev) return phy_clear_bits_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_CTRL1, MDIO_CTRL1_LPOWER); } +#ifdef CONFIG_HWMON +static const struct hwmon_channel_info * const mv88q2xxx_hwmon_info[] = { + HWMON_CHANNEL_INFO(temp, HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_ALARM), + NULL +}; + +static umode_t mv88q2xxx_hwmon_is_visible(const void *data, + enum hwmon_sensor_types type, + u32 attr, int channel) +{ + switch (attr) { + case hwmon_temp_input: + return 0444; + case hwmon_temp_max: + return 0644; + case hwmon_temp_alarm: + return 0444; + default: + return 0; + } +} + +static int mv88q2xxx_hwmon_read(struct device *dev, + enum hwmon_sensor_types type, + u32 attr, int channel, long *val) +{ + struct phy_device *phydev = dev_get_drvdata(dev); + int ret; + + switch (attr) { + case hwmon_temp_input: + ret = phy_read_mmd(phydev, MDIO_MMD_PCS, + MDIO_MMD_PCS_MV_TEMP_SENSOR3); + if (ret < 0) + return ret; + + *val = ((ret & MDIO_MMD_PCS_MV_TEMP_SENSOR3_MASK) - 75) * 1000; + return 0; + case hwmon_temp_max: + ret = phy_read_mmd(phydev, MDIO_MMD_PCS, + MDIO_MMD_PCS_MV_TEMP_SENSOR3); + if (ret < 0) + return ret; + + *val = (((ret & MDIO_MMD_PCS_MV_TEMP_SENSOR3_INT_THRESH_MASK) >> + MDIO_MMD_PCS_MV_TEMP_SENSOR3_INT_THRESH_SHIFT) - 75) * + 1000; + return 0; + case hwmon_temp_alarm: + ret = phy_read_mmd(phydev, MDIO_MMD_PCS, + MDIO_MMD_PCS_MV_TEMP_SENSOR1); + if (ret < 0) + return ret; + + *val = !!(ret & MDIO_MMD_PCS_MV_TEMP_SENSOR1_RAW_INT); + return 0; + default: + return -EOPNOTSUPP; + } +} + +static int mv88q2xxx_hwmon_write(struct device *dev, + enum hwmon_sensor_types type, u32 attr, + int channel, long val) +{ + struct phy_device *phydev = dev_get_drvdata(dev); + + switch (attr) { + case hwmon_temp_max: + if (val < -75000 || val > 180000) + return -EINVAL; + + val = ((val / 1000) + 75) << + MDIO_MMD_PCS_MV_TEMP_SENSOR3_INT_THRESH_SHIFT; + return phy_modify_mmd(phydev, MDIO_MMD_PCS, + MDIO_MMD_PCS_MV_TEMP_SENSOR3, + MDIO_MMD_PCS_MV_TEMP_SENSOR3_INT_THRESH_MASK, + val); + default: + return -EOPNOTSUPP; + } +} + +static const struct hwmon_ops mv88q2xxx_hwmon_hwmon_ops = { + .is_visible = mv88q2xxx_hwmon_is_visible, + .read = mv88q2xxx_hwmon_read, + .write = mv88q2xxx_hwmon_write, +}; + +static const struct hwmon_chip_info mv88q2xxx_hwmon_chip_info = { + .ops = &mv88q2xxx_hwmon_hwmon_ops, + .info = mv88q2xxx_hwmon_info, +}; + +static int mv88q2xxx_hwmon_probe(struct phy_device *phydev) +{ + struct device *dev = &phydev->mdio.dev; + struct device *hwmon; + char *hwmon_name; + int ret; + + /* Enable temperature sensor interrupt */ + ret = phy_set_bits_mmd(phydev, MDIO_MMD_PCS, + MDIO_MMD_PCS_MV_TEMP_SENSOR1, + MDIO_MMD_PCS_MV_TEMP_SENSOR1_INT_EN); + if (ret < 0) + return ret; + + /* Enable temperature sense */ + ret = phy_modify_mmd(phydev, MDIO_MMD_PCS, MDIO_MMD_PCS_MV_TEMP_SENSOR2, + MDIO_MMD_PCS_MV_TEMP_SENSOR2_DIS_MASK, 0); + if (ret < 0) + return ret; + + hwmon_name = devm_hwmon_sanitize_name(dev, dev_name(dev)); + if (IS_ERR(hwmon_name)) + return PTR_ERR(hwmon_name); + + hwmon = devm_hwmon_device_register_with_info(dev, + hwmon_name, + phydev, + &mv88q2xxx_hwmon_chip_info, + NULL); + + return PTR_ERR_OR_ZERO(hwmon); +} + +#else +static int mv88q2xxx_hwmon_probe(struct phy_device *phydev) +{ + return 0; +} +#endif +static int mv88q2xxx_probe(struct phy_device *phydev) +{ + return mv88q2xxx_hwmon_probe(phydev); +} static int mv88q222x_soft_reset(struct phy_device *phydev) { @@ -583,6 +734,7 @@ static struct phy_driver mv88q2xxx_driver[] = { { PHY_ID_MATCH_EXACT(PHY_ID_88Q2220_REVB0), .name = "mv88q2220", + .probe = mv88q2xxx_probe, .get_features = mv88q2xxx_get_features, .config_aneg = mv88q222x_config_aneg, .aneg_done = genphy_c45_aneg_done, From patchwork Mon Jan 22 21:28:42 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dimitri Fedrau X-Patchwork-Id: 13526283 X-Patchwork-Delegate: kuba@kernel.org Received: from mail-lf1-f44.google.com (mail-lf1-f44.google.com [209.85.167.44]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 21C5F4C3AC; Mon, 22 Jan 2024 21:29:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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Mon, 22 Jan 2024 13:29:57 -0800 (PST) Received: from debian.fritz.box ([93.184.186.109]) by smtp.gmail.com with ESMTPSA id j25-20020a1709066dd900b00a26af4d96c6sm13823336ejt.4.2024.01.22.13.29.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Jan 2024 13:29:56 -0800 (PST) From: Dimitri Fedrau To: Cc: Dimitri Fedrau , Andrew Lunn , Heiner Kallweit , Russell King , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Stefan Eichenberger , netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v5 net-next 09/13] net: phy: marvell-88q2xxx: add cable test support Date: Mon, 22 Jan 2024 22:28:42 +0100 Message-Id: <20240122212848.3645785-10-dima.fedrau@gmail.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240122212848.3645785-1-dima.fedrau@gmail.com> References: <20240122212848.3645785-1-dima.fedrau@gmail.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org Add cable test support for Marvell 88Q222x devices. Reported distance granularity is 1m. 1m cable, open: Cable test started for device eth0. Cable test completed for device eth0. Pair A code Open Circuit Pair A, fault length: 1.00m 1m cable, shorted: Cable test started for device eth0. Cable test completed for device eth0. Pair A code Short within Pair Pair A, fault length: 1.00m 6m cable, open: Cable test started for device eth0. Cable test completed for device eth0. Pair A code Open Circuit Pair A, fault length: 6.00m 6m cable, shorted: Cable test started for device eth0. Cable test completed for device eth0. Pair A code Short within Pair Pair A, fault length: 6.00m Signed-off-by: Dimitri Fedrau --- drivers/net/phy/marvell-88q2xxx.c | 99 +++++++++++++++++++++++++++++++ 1 file changed, 99 insertions(+) diff --git a/drivers/net/phy/marvell-88q2xxx.c b/drivers/net/phy/marvell-88q2xxx.c index 6900bad275d0..f59822cf9526 100644 --- a/drivers/net/phy/marvell-88q2xxx.c +++ b/drivers/net/phy/marvell-88q2xxx.c @@ -69,6 +69,27 @@ #define MDIO_MMD_PCS_MV_RX_STAT 33328 +#define MDIO_MMD_PCS_MV_TDR_RESET 65226 +#define MDIO_MMD_PCS_MV_TDR_RESET_TDR_RST 0x1000 + +#define MDIO_MMD_PCS_MV_TDR_OFF_SHORT_CABLE 65241 + +#define MDIO_MMD_PCS_MV_TDR_OFF_LONG_CABLE 65242 + +#define MDIO_MMD_PCS_MV_TDR_STATUS 65245 +#define MDIO_MMD_PCS_MV_TDR_STATUS_OFF 0x0001 +#define MDIO_MMD_PCS_MV_TDR_STATUS_ON 0x0002 +#define MDIO_MMD_PCS_MV_TDR_STATUS_DIST_MASK 0xff00 +#define MDIO_MMD_PCS_MV_TDR_STATUS_DIST_SHIFT 8 +#define MDIO_MMD_PCS_MV_TDR_STATUS_VCT_STAT_MASK 0x00f0 +#define MDIO_MMD_PCS_MV_TDR_STATUS_VCT_STAT_SHORT 0x0030 +#define MDIO_MMD_PCS_MV_TDR_STATUS_VCT_STAT_OPEN 0x00e0 +#define MDIO_MMD_PCS_MV_TDR_STATUS_VCT_STAT_OK 0x0070 +#define MDIO_MMD_PCS_MV_TDR_STATUS_VCT_STAT_IN_PROGR 0x0080 +#define MDIO_MMD_PCS_MV_TDR_STATUS_VCT_STAT_NOISE 0x0050 + +#define MDIO_MMD_PCS_MV_TDR_OFF_CUTOFF 65246 + struct mmd_val { int devad; u32 regnum; @@ -717,6 +738,81 @@ static int mv88q222x_revb0_config_init(struct phy_device *phydev) return 0; } +static int mv88q222x_cable_test_start(struct phy_device *phydev) +{ + int ret; + + ret = phy_write_mmd(phydev, MDIO_MMD_PCS, + MDIO_MMD_PCS_MV_TDR_OFF_CUTOFF, 0x0058); + if (ret < 0) + return ret; + + ret = phy_write_mmd(phydev, MDIO_MMD_PCS, + MDIO_MMD_PCS_MV_TDR_OFF_LONG_CABLE, 0x00eb); + if (ret < 0) + return ret; + + ret = phy_write_mmd(phydev, MDIO_MMD_PCS, + MDIO_MMD_PCS_MV_TDR_OFF_SHORT_CABLE, 0x010e); + if (ret < 0) + return ret; + + ret = phy_write_mmd(phydev, MDIO_MMD_PCS, MDIO_MMD_PCS_MV_TDR_RESET, + 0x0d90); + if (ret < 0) + return ret; + + return phy_write_mmd(phydev, MDIO_MMD_PCS, MDIO_MMD_PCS_MV_TDR_STATUS, + MDIO_MMD_PCS_MV_TDR_STATUS_ON); +} + +static int mv88q222x_cable_test_get_status(struct phy_device *phydev, + bool *finished) +{ + int ret; + u32 dist; + + ret = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_MMD_PCS_MV_TDR_STATUS); + if (ret < 0) + return ret; + + *finished = true; + /* fault length in meters */ + dist = ((ret & MDIO_MMD_PCS_MV_TDR_STATUS_DIST_MASK) >> + MDIO_MMD_PCS_MV_TDR_STATUS_DIST_SHIFT) * 100; + switch (ret & MDIO_MMD_PCS_MV_TDR_STATUS_VCT_STAT_MASK) { + case MDIO_MMD_PCS_MV_TDR_STATUS_VCT_STAT_OPEN: + ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_A, + ETHTOOL_A_CABLE_RESULT_CODE_OPEN); + ethnl_cable_test_fault_length(phydev, ETHTOOL_A_CABLE_PAIR_A, + dist); + break; + case MDIO_MMD_PCS_MV_TDR_STATUS_VCT_STAT_SHORT: + ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_A, + ETHTOOL_A_CABLE_RESULT_CODE_SAME_SHORT); + ethnl_cable_test_fault_length(phydev, ETHTOOL_A_CABLE_PAIR_A, + dist); + break; + case MDIO_MMD_PCS_MV_TDR_STATUS_VCT_STAT_OK: + ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_A, + ETHTOOL_A_CABLE_RESULT_CODE_OK); + break; + case MDIO_MMD_PCS_MV_TDR_STATUS_VCT_STAT_IN_PROGR: + *finished = false; + break; + default: + ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_A, + ETHTOOL_A_CABLE_RESULT_CODE_UNSPEC); + } + + if (*finished) + return phy_write_mmd(phydev, MDIO_MMD_PCS, + MDIO_MMD_PCS_MV_TDR_RESET, + MDIO_MMD_PCS_MV_TDR_RESET_TDR_RST | 0xd90); + + return 0; +} + static struct phy_driver mv88q2xxx_driver[] = { { .phy_id = MARVELL_PHY_ID_88Q2110, @@ -734,6 +830,7 @@ static struct phy_driver mv88q2xxx_driver[] = { { PHY_ID_MATCH_EXACT(PHY_ID_88Q2220_REVB0), .name = "mv88q2220", + .flags = PHY_POLL_CABLE_TEST, .probe = mv88q2xxx_probe, .get_features = mv88q2xxx_get_features, .config_aneg = mv88q222x_config_aneg, @@ -744,6 +841,8 @@ static struct phy_driver mv88q2xxx_driver[] = { .config_intr = mv88q2xxx_config_intr, .handle_interrupt = mv88q2xxx_handle_interrupt, .set_loopback = genphy_c45_loopback, + .cable_test_start = mv88q222x_cable_test_start, + .cable_test_get_status = mv88q222x_cable_test_get_status, .get_sqi = mv88q2xxx_get_sqi, .get_sqi_max = mv88q2xxx_get_sqi_max, .suspend = mv88q2xxx_suspend, From patchwork Mon Jan 22 21:28:43 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dimitri Fedrau X-Patchwork-Id: 13526284 X-Patchwork-Delegate: kuba@kernel.org Received: from mail-lf1-f42.google.com (mail-lf1-f42.google.com [209.85.167.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3129F4C62D; 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Mon, 22 Jan 2024 13:30:00 -0800 (PST) Received: from debian.fritz.box ([93.184.186.109]) by smtp.gmail.com with ESMTPSA id j25-20020a1709066dd900b00a26af4d96c6sm13823336ejt.4.2024.01.22.13.29.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Jan 2024 13:29:59 -0800 (PST) From: Dimitri Fedrau To: Cc: Dimitri Fedrau , Andrew Lunn , Heiner Kallweit , Russell King , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Stefan Eichenberger , netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v5 net-next 10/13] net: phy: marvell-88q2xxx: make mv88q2xxx_config_aneg generic Date: Mon, 22 Jan 2024 22:28:43 +0100 Message-Id: <20240122212848.3645785-11-dima.fedrau@gmail.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240122212848.3645785-1-dima.fedrau@gmail.com> References: <20240122212848.3645785-1-dima.fedrau@gmail.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org Marvell 88Q2xxx devices follow the same scheme, after configuration they need a soft reset. Soft resets differ between devices, so we use the .soft_reset callback instead of creating .config_aneg callbacks for each device. Signed-off-by: Dimitri Fedrau Reviewed-by: Andrew Lunn --- drivers/net/phy/marvell-88q2xxx.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/phy/marvell-88q2xxx.c b/drivers/net/phy/marvell-88q2xxx.c index f59822cf9526..8bd68b3c3ea1 100644 --- a/drivers/net/phy/marvell-88q2xxx.c +++ b/drivers/net/phy/marvell-88q2xxx.c @@ -362,7 +362,7 @@ static int mv88q2xxx_config_aneg(struct phy_device *phydev) if (ret) return ret; - return mv88q2xxx_soft_reset(phydev); + return phydev->drv->soft_reset(phydev); } static int mv88q2xxx_config_init(struct phy_device *phydev) From patchwork Mon Jan 22 21:28:44 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dimitri Fedrau X-Patchwork-Id: 13526285 X-Patchwork-Delegate: kuba@kernel.org Received: from mail-ej1-f45.google.com (mail-ej1-f45.google.com [209.85.218.45]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BFFF24CB4C; Mon, 22 Jan 2024 21:30:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.218.45 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705959006; cv=none; b=HO3idUmmxpvUCdSQEGkrhyapnvG+befkdgWAVk6ZH1cfBd4jaw2JcrWml6/pnkSVZENzHUQWWfoXK5Um4TA0YFKKva0xOvGF6K9tvGgszbOizzUewcHpETZyOMAvj26e7/M/nvyyGNuCBBiOLARbWYj+PB5QuoGazSZcK7HSJQk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705959006; c=relaxed/simple; bh=rYEk5PXX3bm174ZejWqLRN/iYkeUI/hJjTiG7hIUGEs=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=s7MQJuKq2KIoB91KilSbxnzw452v+qFWgg+H8HEokZ65VH/QzLyYpZ5PJvAYRjN83l8O5NSn71aPVOhmBSVUjFAL4xdUKirHU8jS/GI5nLx1OgkSlXkK98gmQmmo6BqrI+miTYVQ4W4iUjFeBOPPttWwYqwfGvo/3uO6OxlBKps= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=HYf7qlfG; arc=none smtp.client-ip=209.85.218.45 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="HYf7qlfG" Received: by mail-ej1-f45.google.com with SMTP id a640c23a62f3a-a271a28aeb4so392435266b.2; Mon, 22 Jan 2024 13:30:04 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1705959003; x=1706563803; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=tYmMCIQOGGjhf869AevyULb0R6NuG+Zi7GyczzrAbQk=; b=HYf7qlfGjdJ0Y1FlGmd1xblv/ymZ6SbmR4lRdqd8Vuuy/0Uwlwk0S9NwOl0cPTee9B O3Tqe6H32iefdnY2pG4mcRQEZSW4HV/xxneQoZZK9OH61JBWHt/gUJMnW3hDx4GkghVo 2KxBVqp/CMiRNR0DNC/uM3EzCYBFC2vymvMV/GqkqfI9/tlHuCbT9cTY2J84rH5FFUqe U13QBNBXI4chyQTrgUUlb8gy4Gzx1SL81sHKta89uoke5uiIT0uAJxVfIWeL9H8ySPx8 g0N/bxM60wG+x3jBtR6Miwopeu7WHCw3KgHYh2SYOS05IqBM7evY5c8MVa7B8FXG532n obeQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1705959003; x=1706563803; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=tYmMCIQOGGjhf869AevyULb0R6NuG+Zi7GyczzrAbQk=; b=tyhy2Jy5cnvxOSlcZ0m6Ed5s5Q/TGgrnqNSXyEyAgcWUdi6gGAsSfaW8+3SkBHbBnj bsShoGPz8YQYEQmK0WkBxS4bOd0R/4LvaZMIFvhjI1rWMYmnGmbc7LDxp1Hd6vj4zrV/ IGWNWsu7aRXLhZEi9YOQ8V9Q88E9XAsbJ8QKBNbHFpEqHObrw2T+bDp95TP+Q3b31wTH oTBoGovFvct4eY9QJ6X0Mp8AUsnMgpnizTMnK8b8KrBcBN262qaHd5VWs06Il6yXJ2fL TIFDlacKAemloCx6KmwHvfpD3NQNeURUZBX4PyTShmnfV3BQppwiTAL5UE1l6qlBdm/5 WiFQ== X-Gm-Message-State: AOJu0YwW1aWmPrW5wKsfRxRlPjseb3TvYL9Tr/dOGAEE+voj3fbOri/R WRmDMgWIWZs8qhw1bKv/NaXpK7YoarIWFvZMtdspgeDyCtkbG4pH X-Google-Smtp-Source: AGHT+IEh8gY7ulZMKN26Nwjj+prGzUAWT6kGkArUfnqY72/QfGKsDBYIapIyofawlDvD0UmtN8E1/A== X-Received: by 2002:a17:906:da8e:b0:a2e:7b28:1f03 with SMTP id xh14-20020a170906da8e00b00a2e7b281f03mr2857729ejb.90.1705959003013; Mon, 22 Jan 2024 13:30:03 -0800 (PST) Received: from debian.fritz.box ([93.184.186.109]) by smtp.gmail.com with ESMTPSA id j25-20020a1709066dd900b00a26af4d96c6sm13823336ejt.4.2024.01.22.13.30.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Jan 2024 13:30:02 -0800 (PST) From: Dimitri Fedrau To: Cc: Dimitri Fedrau , Andrew Lunn , Heiner Kallweit , Russell King , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Stefan Eichenberger , netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v5 net-next 11/13] net: phy: marvell-88q2xxx: switch to mv88q2xxx_config_aneg Date: Mon, 22 Jan 2024 22:28:44 +0100 Message-Id: <20240122212848.3645785-12-dima.fedrau@gmail.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240122212848.3645785-1-dima.fedrau@gmail.com> References: <20240122212848.3645785-1-dima.fedrau@gmail.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org Switch to mv88q2xxx_config_aneg for Marvell 88Q2220 devices and remove the mv88q222x_config_aneg function which is basically a copy of the mv88q2xxx_config_aneg function. Signed-off-by: Dimitri Fedrau Reviewed-by: Andrew Lunn --- drivers/net/phy/marvell-88q2xxx.c | 13 +------------ 1 file changed, 1 insertion(+), 12 deletions(-) diff --git a/drivers/net/phy/marvell-88q2xxx.c b/drivers/net/phy/marvell-88q2xxx.c index 8bd68b3c3ea1..e40ea351fcde 100644 --- a/drivers/net/phy/marvell-88q2xxx.c +++ b/drivers/net/phy/marvell-88q2xxx.c @@ -688,17 +688,6 @@ static int mv88q222x_soft_reset(struct phy_device *phydev) return 0; } -static int mv88q222x_config_aneg(struct phy_device *phydev) -{ - int ret; - - ret = genphy_c45_config_aneg(phydev); - if (ret) - return ret; - - return mv88q222x_soft_reset(phydev); -} - static int mv88q222x_revb0_config_init(struct phy_device *phydev) { int ret, i; @@ -833,7 +822,7 @@ static struct phy_driver mv88q2xxx_driver[] = { .flags = PHY_POLL_CABLE_TEST, .probe = mv88q2xxx_probe, .get_features = mv88q2xxx_get_features, - .config_aneg = mv88q222x_config_aneg, + .config_aneg = mv88q2xxx_config_aneg, .aneg_done = genphy_c45_aneg_done, .config_init = mv88q222x_revb0_config_init, .read_status = mv88q2xxx_read_status, From patchwork Mon Jan 22 21:28:45 2024 Content-Type: text/plain; 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Mon, 22 Jan 2024 13:30:05 -0800 (PST) Received: from debian.fritz.box ([93.184.186.109]) by smtp.gmail.com with ESMTPSA id j25-20020a1709066dd900b00a26af4d96c6sm13823336ejt.4.2024.01.22.13.30.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Jan 2024 13:30:05 -0800 (PST) From: Dimitri Fedrau To: Cc: Dimitri Fedrau , Andrew Lunn , Heiner Kallweit , Russell King , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Stefan Eichenberger , netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v5 net-next 12/13] net: phy: marvell-88q2xxx: cleanup mv88q2xxx_config_init Date: Mon, 22 Jan 2024 22:28:45 +0100 Message-Id: <20240122212848.3645785-13-dima.fedrau@gmail.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240122212848.3645785-1-dima.fedrau@gmail.com> References: <20240122212848.3645785-1-dima.fedrau@gmail.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org mv88q2xxx_config_init calls genphy_c45_read_pma which is done by mv88q2xxx_read_status, it calls also mv88q2xxx_config_aneg which is also called by the PHY state machine. Let the PHY state machine handle the phydriver ops in their intendend way. Signed-off-by: Dimitri Fedrau Reviewed-by: Andrew Lunn --- drivers/net/phy/marvell-88q2xxx.c | 9 +-------- 1 file changed, 1 insertion(+), 8 deletions(-) diff --git a/drivers/net/phy/marvell-88q2xxx.c b/drivers/net/phy/marvell-88q2xxx.c index e40ea351fcde..081ed110c87e 100644 --- a/drivers/net/phy/marvell-88q2xxx.c +++ b/drivers/net/phy/marvell-88q2xxx.c @@ -367,20 +367,13 @@ static int mv88q2xxx_config_aneg(struct phy_device *phydev) static int mv88q2xxx_config_init(struct phy_device *phydev) { - int ret; - /* The 88Q2XXX PHYs do have the extended ability register available, but * register MDIO_PMA_EXTABLE where they should signalize it does not * work according to specification. Therefore, we force it here. */ phydev->pma_extable = MDIO_PMA_EXTABLE_BT1; - /* Read the current PHY configuration */ - ret = genphy_c45_read_pma(phydev); - if (ret) - return ret; - - return mv88q2xxx_config_aneg(phydev); + return 0; } static int mv88q2xxx_get_sqi(struct phy_device *phydev) From patchwork Mon Jan 22 21:28:46 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dimitri Fedrau X-Patchwork-Id: 13526287 X-Patchwork-Delegate: kuba@kernel.org Received: from mail-lf1-f49.google.com (mail-lf1-f49.google.com [209.85.167.49]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D81E74D13C; Mon, 22 Jan 2024 21:30:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.167.49 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705959012; cv=none; b=ewO2e1c9NGL4Hu2W9UxjmfaYQBTv3TOHsaT3lHS2fLW0+yWxgbm2MvzLhcGMKrIZ6oEThY21hfiLeGgrMSG85XgVTQrz0/pEaBpRIXKUISomhHLpEcCmu+mW/+RDfWi3XBBcJjO0qjPGaAcnsZ+6WoYodctYHqjNhBSwQsZU0GI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705959012; c=relaxed/simple; bh=3c1kyapsmhYjTrjxTlzTOIoGyA4EaMTb1a6wJCs6mDM=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=YBjUEIcIe6r4Q3mqz0NfzNYIVVp7TqtPygzPGP+JsNUjjaU+vNJHxwOLcYa5tg7FIfg4WIN6oe0QkUtpWYKs0bkLS/9i/KGEnnH0W18eB60Nj5HYCbWgL6UdLmUYcOsA7NZw3mZpXdfcV1fCkS3tm0ks1J8CeUz3ym9a6LAvx8s= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=bwwPSwqb; arc=none smtp.client-ip=209.85.167.49 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="bwwPSwqb" Received: by mail-lf1-f49.google.com with SMTP id 2adb3069b0e04-50ea9e189ebso3786062e87.3; Mon, 22 Jan 2024 13:30:10 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1705959009; x=1706563809; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=5Shwh36aSxCxZjdxLJZjEG9Pe0NenbHGEeLdgmjb+AU=; b=bwwPSwqbniEybdhFgVYzwtuV6+B7N0UQ0JaSu8MZw1AtBuTAFbdiqJ5vINQsb14GHF j8+dbw2mjHnAjO9EAO2LReZb++vzeEslXek4Pmckz13XyWuA4P4TE9iq/4CRrpaxmBlr gCxzhxbjf4RG+3mr3d3uKDlS3tdsSn3+8MXF4FzOyGceSkIP9aKLyz0P0cW02kd+Lz24 6S64YyayEARF8ir4YbW7GY9ZNfLvv6cmJZ+nJ3CzceKVBxMNefUl65u5OFykZRtSk7o5 kCAVqpspd/gnhgggId4DG3iv/K/QCRd7m3iUOnfTcGJXJzvPjX6tg+EwLRCTa1xgHdUm B67w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1705959009; x=1706563809; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=5Shwh36aSxCxZjdxLJZjEG9Pe0NenbHGEeLdgmjb+AU=; b=rF+D2FGkf0lWVe/B4n+ANUfb1yx10DH0zPJBVYpeY5+zW9TY8JEA4faLav9iR9YhKs a/zB8wg2OrY+wtUPgTMouq2M7P24nJNduGwX6uOJmKt8A68IhFC8ooc45SByZxjsYLAl tarvKqL/uNzY3SANz0+FZkhZXvdjmu3TrH97a/VeBIyQedStQbueIxkSjRTkI/cxfGKI q3RSe0+kdHD+1U9k+xOlUBo3WCDZxUQRVwKQrDG3KdjxjAolivphdPGE30U36/Wfog/X 6TLmMtF3gHvf85GlG6FKvbLbK7fYPbBJGgtk3TDghKmMN53xF04Ys6RCuZwJ0soSqsRY +Rng== X-Gm-Message-State: AOJu0YwK+pbK5YloH1wal/RvPkQC32i78vvaYD+w9u4qHrLeH8k/97dR mc34GVhyoVMjpMbwlKaFyfOCmqoRgPHuH8U1Wjelf4HJsO0lb2Hm X-Google-Smtp-Source: AGHT+IGUKCVZ8Hr0I37alZ/CIjUa101djK4Dg+UrpfTYJ+Et84b39JrLGQg6n7eGjnk2+0e9+OyhUw== X-Received: by 2002:ac2:58e1:0:b0:50f:72f:cf8a with SMTP id v1-20020ac258e1000000b0050f072fcf8amr1473425lfo.137.1705959008897; Mon, 22 Jan 2024 13:30:08 -0800 (PST) Received: from debian.fritz.box ([93.184.186.109]) by smtp.gmail.com with ESMTPSA id j25-20020a1709066dd900b00a26af4d96c6sm13823336ejt.4.2024.01.22.13.30.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Jan 2024 13:30:08 -0800 (PST) From: Dimitri Fedrau To: Cc: Dimitri Fedrau , Andrew Lunn , Heiner Kallweit , Russell King , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Stefan Eichenberger , netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v5 net-next 13/13] net: phy: marvell-88q2xxx: remove redundant code Date: Mon, 22 Jan 2024 22:28:46 +0100 Message-Id: <20240122212848.3645785-14-dima.fedrau@gmail.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240122212848.3645785-1-dima.fedrau@gmail.com> References: <20240122212848.3645785-1-dima.fedrau@gmail.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org Remove redundant code in mv88q222x_revb0_config_init, phydev->pma_extable is already set in mv88q2xxx_config_init. Just call mv88q2xxx_config_init in mv88q222x_revb0_config_init. Signed-off-by: Dimitri Fedrau --- drivers/net/phy/marvell-88q2xxx.c | 24 +++++++++--------------- 1 file changed, 9 insertions(+), 15 deletions(-) diff --git a/drivers/net/phy/marvell-88q2xxx.c b/drivers/net/phy/marvell-88q2xxx.c index 081ed110c87e..6df580442b6b 100644 --- a/drivers/net/phy/marvell-88q2xxx.c +++ b/drivers/net/phy/marvell-88q2xxx.c @@ -373,6 +373,14 @@ static int mv88q2xxx_config_init(struct phy_device *phydev) */ phydev->pma_extable = MDIO_PMA_EXTABLE_BT1; + /* Configure interrupt with default settings, output is driven low for + * active interrupt and high for inactive. + */ + if (phy_interrupt_is_valid(phydev)) + return phy_set_bits_mmd(phydev, MDIO_MMD_PCS, + MDIO_MMD_PCS_MV_GPIO_INT_CTRL, + MDIO_MMD_PCS_MV_GPIO_INT_CTRL_TRI_DIS); + return 0; } @@ -703,21 +711,7 @@ static int mv88q222x_revb0_config_init(struct phy_device *phydev) return ret; } - /* The 88Q2XXX PHYs do have the extended ability register available, but - * register MDIO_PMA_EXTABLE where they should signalize it does not - * work according to specification. Therefore, we force it here. - */ - phydev->pma_extable = MDIO_PMA_EXTABLE_BT1; - - /* Configure interrupt with default settings, output is driven low for - * active interrupt and high for inactive. - */ - if (phy_interrupt_is_valid(phydev)) - return phy_set_bits_mmd(phydev, MDIO_MMD_PCS, - MDIO_MMD_PCS_MV_GPIO_INT_CTRL, - MDIO_MMD_PCS_MV_GPIO_INT_CTRL_TRI_DIS); - - return 0; + return mv88q2xxx_config_init(phydev); } static int mv88q222x_cable_test_start(struct phy_device *phydev)