From patchwork Mon Jan 22 22:57:02 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Griffin X-Patchwork-Id: 13526405 Received: from mail-wm1-f53.google.com (mail-wm1-f53.google.com [209.85.128.53]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3CE781F611 for ; Mon, 22 Jan 2024 22:57:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.53 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705964252; cv=none; b=iiZJAzTEtHOL/zBvsjoTOP2XhBH0XyJcwHkQnmdF8gRbku3jacIbR7KeXFsd/2HFjvzi7qTmWtWnRfh3z7SJYs6pMS0i3MZTZ34dlqMu2kSPTwvaIyKWm2iDW1seF4MybYsqP0ziEIQVaHsalFPFRx8yDNJtGrjKoBxhRG86iGM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705964252; c=relaxed/simple; bh=ADcQXaAoCN3feVEUxUAN7RPLnjxcu0Da4xFhPbbzd5Y=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=HOJVaEydoJ2UYvIlblxaWy1Vp7sKjx+amORNaCCbjbpnbc9Kjv/YEu/6Pa3WH9pbAuxZj/HWiIrFt9yx1iH+HoHhP2+/j7DrddfPWth5kmAFjmnrlDVbNa5E5L9MavqrsKIm5LUlgD/vP2gJ1sZtDPLMjPMi5TPfv11e4gp42XM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=U+rueY/u; arc=none smtp.client-ip=209.85.128.53 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="U+rueY/u" Received: by mail-wm1-f53.google.com with SMTP id 5b1f17b1804b1-40eb033c192so6977695e9.0 for ; Mon, 22 Jan 2024 14:57:28 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1705964247; x=1706569047; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=JBly9XkHZ0SVFvJINs6dkm8lumCZ4YgOwJi4aC1YyJM=; b=U+rueY/ums3yLa+tPEPHkPAH413XgjgrkNiM90wko/POsOVn897uZzu6UmuieY6ZNH moSQzOKLGVx8RFDIj9qzOvIU/GhNCPuhG9ZK6QJd8/SZn6rGl5Nj2/ciyDCZFdcO7e7C GHtCWLm66ybuQKe9Cpn/L0NaKRM6q8eWQhJsLR3a52i5Ppm7HzklHHM9sEGPAr42pamZ DCSWKBfVT+OGseYwtMR3mh1GYRl+tWUJs2tEIPeX85z3/RUDY/VzeTh/td3LW2tHH1tY bw8yTpAhQAOn9KedVyX1fWVYvP+8MR9Fhw6GN0TzJUGAZIzqatAHVK3aNI1XAPZTzjbc Zaww== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1705964247; x=1706569047; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=JBly9XkHZ0SVFvJINs6dkm8lumCZ4YgOwJi4aC1YyJM=; b=qFus4dNfrZ1wwRRfL2TfLdWnXUreh13Z0eUoxqHVyPcjXqxAFEek3gM5PtSNCTOKlY jhBDZ2vcIjPiGUoJXHCwu99ni5Mj4tl8qfWoydj3+9Ki5mU4mn8toxnIBN/cU6l0VGqq tcnTeQwh4KkhjIAxcM4uKBUpBRnM9Dz6EzhohdoWZlkbo5DnsqUCDpanE8ZqdBQ/DA/O rpPoBDJoR8btaTU5dAgFKZkQPP3x2uHlqdR/8vuBm0N+nTLZ/pCu8s/gnkbrWXd6V3Pi E3E/Xy84SV6waUN+UpMHKNPMz/UY/0BOCCzSpV9uX5UrEdVJPH84y82Rl7CyXCzBYOwR 0Vzg== X-Gm-Message-State: AOJu0YyKbrq38Xr5wIm67+QQ8pDi85gL5w4OCB3EWyDvsI788Jg91yj2 KhAc0wvUYavOd/DVRiJvd3tzelf8JPU+JdpWV6qczkVtADAC3IgctwnZzaTPy9g= X-Google-Smtp-Source: AGHT+IGsC8TYulGe/aeYf5Jm4N+xn/nAtZGRWcp3Eljm49ls5iykYPcGcShpWbH/uU3Qy1q7Jmq4Bw== X-Received: by 2002:a05:600c:45cc:b0:40e:a565:3ce2 with SMTP id s12-20020a05600c45cc00b0040ea5653ce2mr2204825wmo.73.1705964247305; Mon, 22 Jan 2024 14:57:27 -0800 (PST) Received: from gpeter-l.lan (host-92-18-76-30.as13285.net. [92.18.76.30]) by smtp.gmail.com with ESMTPSA id fa26-20020a05600c519a00b0040e89ff10f5sm19776847wmb.1.2024.01.22.14.57.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Jan 2024 14:57:26 -0800 (PST) From: Peter Griffin To: arnd@arndb.de, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux@roeck-us.net, wim@linux-watchdog.org, conor+dt@kernel.org, alim.akhtar@samsung.com, jaewon02.kim@samsung.com, chanho61.park@samsung.com, semen.protsenko@linaro.org Cc: kernel-team@android.com, peter.griffin@linaro.org, tudor.ambarus@linaro.org, andre.draszik@linaro.org, saravanak@google.com, willmcvicker@google.com, linux-fsd@tesla.com, linux-watchdog@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org Subject: [PATCH 1/9] dt-bindings: watchdog: samsung-wdt: deprecate samsung,syscon-phandle Date: Mon, 22 Jan 2024 22:57:02 +0000 Message-ID: <20240122225710.1952066-2-peter.griffin@linaro.org> X-Mailer: git-send-email 2.43.0.429.g432eaa2c6b-goog In-Reply-To: <20240122225710.1952066-1-peter.griffin@linaro.org> References: <20240122225710.1952066-1-peter.griffin@linaro.org> Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The watchdog driver no longer requires a phandle to obtain a regmap to the PMU registers. So mark this as deprecated. Signed-off-by: Peter Griffin --- .../devicetree/bindings/watchdog/samsung-wdt.yaml | 15 +-------------- 1 file changed, 1 insertion(+), 14 deletions(-) diff --git a/Documentation/devicetree/bindings/watchdog/samsung-wdt.yaml b/Documentation/devicetree/bindings/watchdog/samsung-wdt.yaml index 77a5ddd0426e..3970d6bf8576 100644 --- a/Documentation/devicetree/bindings/watchdog/samsung-wdt.yaml +++ b/Documentation/devicetree/bindings/watchdog/samsung-wdt.yaml @@ -56,6 +56,7 @@ properties: description: Phandle to the PMU system controller node (in case of Exynos5250, Exynos5420, Exynos7, Exynos850 and gs101). + deprecated: true required: - compatible @@ -66,20 +67,6 @@ required: allOf: - $ref: watchdog.yaml# - - if: - properties: - compatible: - contains: - enum: - - google,gs101-wdt - - samsung,exynos5250-wdt - - samsung,exynos5420-wdt - - samsung,exynos7-wdt - - samsung,exynos850-wdt - - samsung,exynosautov9-wdt - then: - required: - - samsung,syscon-phandle - if: properties: compatible: From patchwork Mon Jan 22 22:57:03 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Griffin X-Patchwork-Id: 13526406 Received: from mail-wm1-f42.google.com (mail-wm1-f42.google.com [209.85.128.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 464A03613E for ; Mon, 22 Jan 2024 22:57:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.42 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705964253; cv=none; b=kf6stNvtdeqPOBuq/BxYmJ271fKiUXVafepRYyG9yVkCesYkR380rLzbK/RPJ8ci7i21Mgv+kEUyYDSGULFwm8OUK2XSmFqr3UW8XshBSB2Tg1YNShbpJygyKWaCl6tMl4LISScnhmA7Xn9HanFTcrjymggYBRgNxcapNpKlGJI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705964253; c=relaxed/simple; bh=U1+KXcli4NL1ac1CPhNG+FdVI8hN+zTTVbZpOOz+6tY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=s6RX8uCCU5VJG6w1wiG7WdgFZcOzUHvMjPz2M6nWmelugxfZ7CLevQDIuNlqNmGZ8F8Hu93o1G59d+q+MTsNCauJzZTBWW8Zl/96rez2nfkx6mPA5SIXFRJ+WutRtZJx0/1eLcnnKdQpmT6otIQ5uVyNQh3OpKFd7OrhPSad4bg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=T05qkwEC; arc=none smtp.client-ip=209.85.128.42 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="T05qkwEC" Received: by mail-wm1-f42.google.com with SMTP id 5b1f17b1804b1-40eb28271f8so7282435e9.2 for ; Mon, 22 Jan 2024 14:57:30 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1705964249; x=1706569049; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=EkT1f8/auJS4w5tPSadT4tBL2vbp3PChzChd9rePwv0=; b=T05qkwECDeJbqNuo9xfac+xmo7BjyxF2yPrguHGFXqLAxfUAANrQK1lGpbckCqodx4 GbhxMI0Nk6jy5ai/7nISDDMelTVmelWdfewxX4kOAgW7bYmIXMwRQ8zu8wJqjBzD6w91 LasK5jyxIzHyC+CkHQaiFUiBALPowBPNIdxx+AtrmUu/KWBiLiKgBiH2HljZ5TTVW6n4 3+mEpWpnxdBATX6+eEYS799+MwUVQIPxfbHDj5O5cRWvH2bfa4F0peLEDSpeheHBznYV xG5qJDWm3EOWX8aHjSZNBI2FQZTTDcWXMQY+5Xz/053cz2Id7Nm3nbLzOFw3nFLYnhQf 5MgA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1705964249; x=1706569049; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=EkT1f8/auJS4w5tPSadT4tBL2vbp3PChzChd9rePwv0=; b=tu29koYFRuUzeKyAFpRSe6rJOHTIs/BeXAzIWO/Rh0Qd+tar3K+UnCFroLU6bKAVMq JU19ksprP9aJR6CKxrHCWfu8tgZ1Vg8r0aqrJUUyKc7/2tp83APLNbYtgXcsMPsHauGR U/YNwAySSbZd6hSfNxvkjSX0ClI+3E3yF0XKCbnK349qLO1yPPVcZmBgGMIoK6wBEbNK pk3twhLgLykksO0K3HpkuGua+2DFSdcwQ53Dh0U75xtJ2Xf22WSlt3AA4rRMXvyzBWzp SKhEXWtiZ0DWrFUSsDtDxN3s6m8PojFQy9LfdwmZsAtuHQgWJRYl2L46qnA1A4bBXcFo idrQ== X-Gm-Message-State: AOJu0Yx164hsAXUp9izkq6iQ3JxwGGEgvtGgrnjAqg1tK29BqiJkzO29 CAOy/MLb5rN698mNeN/dZ/Fdyf2Rq2rVOduYGhhrx2zLM0wFVN8jJj/ZuE3ARWU= X-Google-Smtp-Source: AGHT+IHkc9S01pb4+H9jQwA2GpQSFpzYPum9UGXBQkktPuNZUGJVOV7WCzXUX8o5u0vmioR+ISGUrw== X-Received: by 2002:a05:600c:5250:b0:40e:6930:4c99 with SMTP id fc16-20020a05600c525000b0040e69304c99mr1381965wmb.113.1705964248744; Mon, 22 Jan 2024 14:57:28 -0800 (PST) Received: from gpeter-l.lan (host-92-18-76-30.as13285.net. [92.18.76.30]) by smtp.gmail.com with ESMTPSA id fa26-20020a05600c519a00b0040e89ff10f5sm19776847wmb.1.2024.01.22.14.57.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Jan 2024 14:57:28 -0800 (PST) From: Peter Griffin To: arnd@arndb.de, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux@roeck-us.net, wim@linux-watchdog.org, conor+dt@kernel.org, alim.akhtar@samsung.com, jaewon02.kim@samsung.com, chanho61.park@samsung.com, semen.protsenko@linaro.org Cc: kernel-team@android.com, peter.griffin@linaro.org, tudor.ambarus@linaro.org, andre.draszik@linaro.org, saravanak@google.com, willmcvicker@google.com, linux-fsd@tesla.com, linux-watchdog@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org Subject: [PATCH 2/9] soc: samsung: exynos-pmu: Add exynos_pmu_update/read/write APIs and SoC quirks Date: Mon, 22 Jan 2024 22:57:03 +0000 Message-ID: <20240122225710.1952066-3-peter.griffin@linaro.org> X-Mailer: git-send-email 2.43.0.429.g432eaa2c6b-goog In-Reply-To: <20240122225710.1952066-1-peter.griffin@linaro.org> References: <20240122225710.1952066-1-peter.griffin@linaro.org> Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Newer Exynos SoCs have atomic set/clear bit hardware for PMU registers as these registers can be accessed by multiple masters. Some platforms also protect the PMU registers for security hardening reasons so they can't be written by normal world and are only write acessible in el3 via a SMC call. Add support for both of these usecases using SoC specific quirks that are determined from the DT compatible string. Drivers which need to read and write PMU registers should now use these new exynos_pmu_*() APIs instead of obtaining a regmap using syscon_regmap_lookup_by_phandle() Depending on the SoC specific quirks, the exynos_pmu_*() APIs will access the PMU register in the appropriate way. Signed-off-by: Peter Griffin --- drivers/soc/samsung/exynos-pmu.c | 209 ++++++++++++++++++++++++- drivers/soc/samsung/exynos-pmu.h | 4 + include/linux/soc/samsung/exynos-pmu.h | 28 ++++ 3 files changed, 234 insertions(+), 7 deletions(-) diff --git a/drivers/soc/samsung/exynos-pmu.c b/drivers/soc/samsung/exynos-pmu.c index 250537d7cfd6..e9e933ede568 100644 --- a/drivers/soc/samsung/exynos-pmu.c +++ b/drivers/soc/samsung/exynos-pmu.c @@ -5,6 +5,7 @@ // // Exynos - CPU PMU(Power Management Unit) support +#include #include #include #include @@ -12,29 +13,204 @@ #include #include #include +#include #include #include #include "exynos-pmu.h" +/** + * DOC: Quirk flags for different Exynos PMU IP-cores + * + * This driver supports multiple Exynos based SoCs, each of which might have a + * different set of registers and features supported. + * + * Quirk flags described below serve the purpose of telling the driver about + * mentioned SoC traits, and can be specified in driver data for each particular + * supported device. + * + * %QUIRK_HAS_ATOMIC_BITSETHW: PMU IP has special atomic bit set/clear HW + * to protect against PMU registers being accessed from multiple bus masters. + * + * %QUIRK_PMU_ALIVE_WRITE_SEC: PMU registers are *not* write accesible from + * normal world. This is found on some SoCs as a security hardening measure. PMU + * registers on these SoCs can only be written via a SMC call and registers are + * checked by EL3 firmware against an allowlist before the write can procede. + * Note: This quirk should only be set for platforms whose el3 firmware + * implements the TENSOR_SMC_PMU_SEC_REG interface below. + */ + +#define QUIRK_HAS_ATOMIC_BITSETHW BIT(0) +#define QUIRK_PMU_ALIVE_WRITE_SEC BIT(1) + +#define PMUALIVE_MASK GENMASK(14, 0) + struct exynos_pmu_context { struct device *dev; const struct exynos_pmu_data *pmu_data; + struct regmap *pmureg; + void __iomem *pmu_base_addr; + phys_addr_t pmu_base_pa; + /* protect PMU reg atomic update operations */ + spinlock_t update_lock; }; -void __iomem *pmu_base_addr; static struct exynos_pmu_context *pmu_context; +/* + * Some SoCs are configured so that PMU_ALIVE registers can only be written + * from el3. As Linux needs to write some of these registers, the following + * SMC register read/write/read,write,modify interface is used. + * + * Note: This SMC interface is known to be implemented on gs101 and derivative + * SoCs. + */ +#define TENSOR_SMC_PMU_SEC_REG (0x82000504) +#define TENSOR_PMUREG_READ 0 +#define TENSOR_PMUREG_WRITE 1 +#define TENSOR_PMUREG_RMW 2 + +int set_priv_reg(phys_addr_t reg, u32 val) +{ + struct arm_smccc_res res; + + arm_smccc_smc(TENSOR_SMC_PMU_SEC_REG, + reg, + TENSOR_PMUREG_WRITE, + val, 0, 0, 0, 0, &res); + + if (res.a0) + pr_warn("%s(): SMC failed: %lu\n", __func__, res.a0); + + return (int)res.a0; +} + +int rmw_priv_reg(phys_addr_t reg, u32 mask, u32 val) +{ + struct arm_smccc_res res; + + arm_smccc_smc(TENSOR_SMC_PMU_SEC_REG, + reg, + TENSOR_PMUREG_RMW, + mask, val, 0, 0, 0, &res); + + if (res.a0) + pr_warn("%s(): SMC failed: %lu\n", __func__, res.a0); + + return (int)res.a0; +} + +/* + * For SoCs that have set/clear bit hardware (as indicated by + * QUIRK_HAS_ATOMIC_BITSETHW) this function can be used when + * the PMU register will be accessed by multiple masters. + * + * For example, to set bits 13:8 in PMU reg offset 0x3e80 + * exynos_pmu_set_bit_atomic(0x3e80, 0x3f00, 0x3f00); + * + * To clear bits 13:8 in PMU offset 0x3e80 + * exynos_pmu_set_bit_atomic(0x3e80, 0x0, 0x3f00); + */ +static inline void exynos_pmu_set_bit_atomic(unsigned int offset, + u32 val, u32 mask) +{ + unsigned long flags; + unsigned int i; + + spin_lock_irqsave(&pmu_context->update_lock, flags); + for (i = 0; i < 32; i++) { + if (mask & BIT(i)) { + if (val & BIT(i)) { + offset |= 0xc000; + pmu_raw_writel(i, offset); + } else { + offset |= 0x8000; + pmu_raw_writel(i, offset); + } + } + } + spin_unlock_irqrestore(&pmu_context->update_lock, flags); +} + +int exynos_pmu_update_bits(unsigned int offset, unsigned int mask, + unsigned int val) +{ + if (pmu_context->pmu_data && + pmu_context->pmu_data->quirks & QUIRK_PMU_ALIVE_WRITE_SEC) + return rmw_priv_reg(pmu_context->pmu_base_pa + offset, + mask, val); + + return regmap_update_bits(pmu_context->pmureg, offset, mask, val); +} +EXPORT_SYMBOL(exynos_pmu_update_bits); + void pmu_raw_writel(u32 val, u32 offset) { - writel_relaxed(val, pmu_base_addr + offset); + if (pmu_context->pmu_data && + pmu_context->pmu_data->quirks & QUIRK_PMU_ALIVE_WRITE_SEC) + return (void)set_priv_reg(pmu_context->pmu_base_pa + offset, + val); + + return writel_relaxed(val, pmu_context->pmu_base_addr + offset); } u32 pmu_raw_readl(u32 offset) { - return readl_relaxed(pmu_base_addr + offset); + return readl_relaxed(pmu_context->pmu_base_addr + offset); +} + +int exynos_pmu_read(unsigned int offset, unsigned int *val) +{ + if (!pmu_context) + return -ENODEV; + + /* + * For platforms that protect PMU registers they + * are still accessible to read from normal world + */ + return regmap_read(pmu_context->pmureg, offset, val); +} +EXPORT_SYMBOL(exynos_pmu_read); + +int exynos_pmu_write(unsigned int offset, unsigned int val) +{ + if (!pmu_context) + return -ENODEV; + + if (pmu_context->pmu_data && + pmu_context->pmu_data->quirks & QUIRK_PMU_ALIVE_WRITE_SEC) + return set_priv_reg(pmu_context->pmu_base_pa + offset, val); + + return regmap_write(pmu_context->pmureg, offset, val); +} +EXPORT_SYMBOL(exynos_pmu_write); + +int exynos_pmu_update(unsigned int offset, unsigned int mask, unsigned int val) +{ + int ret = 0; + + if (!pmu_context) + return -ENODEV; + + if (pmu_context->pmu_data && + pmu_context->pmu_data->quirks & QUIRK_HAS_ATOMIC_BITSETHW) { + /* + * Use atomic operations for PMU_ALIVE registers (offset 0~0x3FFF) + * as the target registers can be accessed by multiple masters. + */ + if (offset > PMUALIVE_MASK) + return exynos_pmu_update_bits(offset, mask, val); + + exynos_pmu_set_bit_atomic(offset, val, mask); + + } else { + return exynos_pmu_update_bits(offset, mask, val); + } + + return ret; } +EXPORT_SYMBOL(exynos_pmu_update); void exynos_sys_powerdown_conf(enum sys_powerdown mode) { @@ -75,11 +251,18 @@ void exynos_sys_powerdown_conf(enum sys_powerdown mode) #define exynos_pmu_data_arm_ptr(data) NULL #endif +static const struct exynos_pmu_data gs101_pmu_data = { + .quirks = QUIRK_HAS_ATOMIC_BITSETHW | QUIRK_PMU_ALIVE_WRITE_SEC, +}; + /* * PMU platform driver and devicetree bindings. */ static const struct of_device_id exynos_pmu_of_device_ids[] = { { + .compatible = "google,gs101-pmu", + .data = &gs101_pmu_data, + }, { .compatible = "samsung,exynos3250-pmu", .data = exynos_pmu_data_arm_ptr(exynos3250_pmu_data), }, { @@ -125,18 +308,30 @@ EXPORT_SYMBOL_GPL(exynos_get_pmu_regmap); static int exynos_pmu_probe(struct platform_device *pdev) { + struct resource *res; struct device *dev = &pdev->dev; int ret; - pmu_base_addr = devm_platform_ioremap_resource(pdev, 0); - if (IS_ERR(pmu_base_addr)) - return PTR_ERR(pmu_base_addr); - pmu_context = devm_kzalloc(&pdev->dev, sizeof(struct exynos_pmu_context), GFP_KERNEL); if (!pmu_context) return -ENOMEM; + + pmu_context->pmu_base_addr = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(pmu_context->pmu_base_addr)) + return PTR_ERR(pmu_context->pmu_base_addr); + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!res) + return -ENODEV; + + pmu_context->pmu_base_pa = res->start; + pmu_context->pmureg = exynos_get_pmu_regmap(); + if (IS_ERR(pmu_context->pmureg)) + return PTR_ERR(pmu_context->pmureg); + + spin_lock_init(&pmu_context->update_lock); pmu_context->dev = dev; pmu_context->pmu_data = of_device_get_match_data(dev); diff --git a/drivers/soc/samsung/exynos-pmu.h b/drivers/soc/samsung/exynos-pmu.h index 1c652ffd79b4..570c6e4dc8c3 100644 --- a/drivers/soc/samsung/exynos-pmu.h +++ b/drivers/soc/samsung/exynos-pmu.h @@ -25,8 +25,12 @@ struct exynos_pmu_data { void (*pmu_init)(void); void (*powerdown_conf)(enum sys_powerdown); void (*powerdown_conf_extra)(enum sys_powerdown); + u32 quirks; }; +int set_priv_reg(phys_addr_t reg, u32 val); +int rmw_priv_reg(phys_addr_t reg, u32 mask, u32 val); + extern void __iomem *pmu_base_addr; #ifdef CONFIG_EXYNOS_PMU_ARM_DRIVERS diff --git a/include/linux/soc/samsung/exynos-pmu.h b/include/linux/soc/samsung/exynos-pmu.h index a4f5516cc956..2c5ce21fb00b 100644 --- a/include/linux/soc/samsung/exynos-pmu.h +++ b/include/linux/soc/samsung/exynos-pmu.h @@ -21,11 +21,39 @@ enum sys_powerdown { extern void exynos_sys_powerdown_conf(enum sys_powerdown mode); #ifdef CONFIG_EXYNOS_PMU extern struct regmap *exynos_get_pmu_regmap(void); +extern int exynos_pmu_update_bits(unsigned int offset, unsigned int mask, + unsigned int val); +extern int exynos_pmu_update(unsigned int offset, unsigned int mask, + unsigned int val); +extern int exynos_pmu_write(unsigned int offset, unsigned int val); +extern int exynos_pmu_read(unsigned int offset, unsigned int *val); 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[92.18.76.30]) by smtp.gmail.com with ESMTPSA id fa26-20020a05600c519a00b0040e89ff10f5sm19776847wmb.1.2024.01.22.14.57.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Jan 2024 14:57:29 -0800 (PST) From: Peter Griffin To: arnd@arndb.de, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux@roeck-us.net, wim@linux-watchdog.org, conor+dt@kernel.org, alim.akhtar@samsung.com, jaewon02.kim@samsung.com, chanho61.park@samsung.com, semen.protsenko@linaro.org Cc: kernel-team@android.com, peter.griffin@linaro.org, tudor.ambarus@linaro.org, andre.draszik@linaro.org, saravanak@google.com, willmcvicker@google.com, linux-fsd@tesla.com, linux-watchdog@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org Subject: [PATCH 3/9] watchdog: s3c2410_wdt: update to use new exynos_pmu_*() apis Date: Mon, 22 Jan 2024 22:57:04 +0000 Message-ID: <20240122225710.1952066-4-peter.griffin@linaro.org> X-Mailer: git-send-email 2.43.0.429.g432eaa2c6b-goog In-Reply-To: <20240122225710.1952066-1-peter.griffin@linaro.org> References: <20240122225710.1952066-1-peter.griffin@linaro.org> Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Instead of obtaining the PMU regmap directly use the new exynos_pmu_*() APIs. The exynos_pmu_ APIs allow support of newer Exynos SoCs that have atomic set/clear bit hardware and platforms where the PMU registers can only be accessed via SMC call. As all platforms that have PMU registers use these new APIs, remove the syscon regmap lookup code, as it is now redundant. Signed-off-by: Peter Griffin --- drivers/watchdog/Kconfig | 1 + drivers/watchdog/s3c2410_wdt.c | 25 +++++++++---------------- 2 files changed, 10 insertions(+), 16 deletions(-) diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig index 7d22051b15a2..b3e90e1ddf14 100644 --- a/drivers/watchdog/Kconfig +++ b/drivers/watchdog/Kconfig @@ -513,6 +513,7 @@ config S3C2410_WATCHDOG depends on ARCH_S3C64XX || ARCH_S5PV210 || ARCH_EXYNOS || COMPILE_TEST select WATCHDOG_CORE select MFD_SYSCON if ARCH_EXYNOS + select EXYNOS_PMU help Watchdog timer block in the Samsung S3C64xx, S5Pv210 and Exynos SoCs. This will reboot the system when the timer expires with diff --git a/drivers/watchdog/s3c2410_wdt.c b/drivers/watchdog/s3c2410_wdt.c index 349d30462c8c..fd3a9ce870a0 100644 --- a/drivers/watchdog/s3c2410_wdt.c +++ b/drivers/watchdog/s3c2410_wdt.c @@ -28,6 +28,8 @@ #include #include +#include + #define S3C2410_WTCON 0x00 #define S3C2410_WTDAT 0x04 #define S3C2410_WTCNT 0x08 @@ -187,7 +189,6 @@ struct s3c2410_wdt { struct watchdog_device wdt_device; struct notifier_block freq_transition; const struct s3c2410_wdt_variant *drv_data; - struct regmap *pmureg; }; static const struct s3c2410_wdt_variant drv_data_s3c2410 = { @@ -355,8 +356,8 @@ static int s3c2410wdt_disable_wdt_reset(struct s3c2410_wdt *wdt, bool mask) const u32 val = mask ? mask_val : 0; int ret; - ret = regmap_update_bits(wdt->pmureg, wdt->drv_data->disable_reg, - mask_val, val); + ret = exynos_pmu_update(wdt->drv_data->disable_reg, + mask_val, val); if (ret < 0) dev_err(wdt->dev, "failed to update reg(%d)\n", ret); @@ -370,8 +371,8 @@ static int s3c2410wdt_mask_wdt_reset(struct s3c2410_wdt *wdt, bool mask) const u32 val = (mask ^ val_inv) ? mask_val : 0; int ret; - ret = regmap_update_bits(wdt->pmureg, wdt->drv_data->mask_reset_reg, - mask_val, val); + ret = exynos_pmu_update(wdt->drv_data->mask_reset_reg, + mask_val, val); if (ret < 0) dev_err(wdt->dev, "failed to update reg(%d)\n", ret); @@ -384,8 +385,8 @@ static int s3c2410wdt_enable_counter(struct s3c2410_wdt *wdt, bool en) const u32 val = en ? mask_val : 0; int ret; - ret = regmap_update_bits(wdt->pmureg, wdt->drv_data->cnt_en_reg, - mask_val, val); + ret = exynos_pmu_update(wdt->drv_data->cnt_en_reg, + mask_val, val); if (ret < 0) dev_err(wdt->dev, "failed to update reg(%d)\n", ret); @@ -617,7 +618,7 @@ static inline unsigned int s3c2410wdt_get_bootstatus(struct s3c2410_wdt *wdt) if (!(wdt->drv_data->quirks & QUIRK_HAS_PMU_RST_STAT)) return 0; - ret = regmap_read(wdt->pmureg, wdt->drv_data->rst_stat_reg, &rst_stat); + ret = exynos_pmu_read(wdt->drv_data->rst_stat_reg, &rst_stat); if (ret) dev_warn(wdt->dev, "Couldn't get RST_STAT register\n"); else if (rst_stat & BIT(wdt->drv_data->rst_stat_bit)) @@ -698,14 +699,6 @@ static int s3c2410wdt_probe(struct platform_device *pdev) if (ret) return ret; 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[92.18.76.30]) by smtp.gmail.com with ESMTPSA id fa26-20020a05600c519a00b0040e89ff10f5sm19776847wmb.1.2024.01.22.14.57.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Jan 2024 14:57:30 -0800 (PST) From: Peter Griffin To: arnd@arndb.de, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux@roeck-us.net, wim@linux-watchdog.org, conor+dt@kernel.org, alim.akhtar@samsung.com, jaewon02.kim@samsung.com, chanho61.park@samsung.com, semen.protsenko@linaro.org Cc: kernel-team@android.com, peter.griffin@linaro.org, tudor.ambarus@linaro.org, andre.draszik@linaro.org, saravanak@google.com, willmcvicker@google.com, linux-fsd@tesla.com, linux-watchdog@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org Subject: [PATCH 4/9] arm64: dts: fsd: remove deprecated samsung,syscon-phandle Date: Mon, 22 Jan 2024 22:57:05 +0000 Message-ID: <20240122225710.1952066-5-peter.griffin@linaro.org> X-Mailer: git-send-email 2.43.0.429.g432eaa2c6b-goog In-Reply-To: <20240122225710.1952066-1-peter.griffin@linaro.org> References: <20240122225710.1952066-1-peter.griffin@linaro.org> Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 samsung,syscon-phandle is no longer used by the Samsung watchdog driver to access PMU registers. Signed-off-by: Peter Griffin --- arch/arm64/boot/dts/tesla/fsd.dtsi | 3 --- 1 file changed, 3 deletions(-) diff --git a/arch/arm64/boot/dts/tesla/fsd.dtsi b/arch/arm64/boot/dts/tesla/fsd.dtsi index aaffb50b8b60..9b55e44c1db0 100644 --- a/arch/arm64/boot/dts/tesla/fsd.dtsi +++ b/arch/arm64/boot/dts/tesla/fsd.dtsi @@ -625,7 +625,6 @@ watchdog_0: watchdog@100a0000 { compatible = "tesla,fsd-wdt", "samsung,exynos7-wdt"; reg = <0x0 0x100a0000 0x0 0x100>; interrupts = ; - samsung,syscon-phandle = <&pmu_system_controller>; clocks = <&fin_pll>; clock-names = "watchdog"; }; @@ -634,7 +633,6 @@ watchdog_1: watchdog@100b0000 { compatible = "tesla,fsd-wdt", "samsung,exynos7-wdt"; reg = <0x0 0x100b0000 0x0 0x100>; interrupts = ; - samsung,syscon-phandle = <&pmu_system_controller>; clocks = <&fin_pll>; clock-names = "watchdog"; }; @@ -643,7 +641,6 @@ watchdog_2: watchdog@100c0000 { compatible = "tesla,fsd-wdt", "samsung,exynos7-wdt"; reg = <0x0 0x100c0000 0x0 0x100>; interrupts = ; - samsung,syscon-phandle = <&pmu_system_controller>; clocks = <&fin_pll>; clock-names = "watchdog"; }; From patchwork Mon Jan 22 22:57:06 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Griffin X-Patchwork-Id: 13526409 Received: from mail-wr1-f50.google.com (mail-wr1-f50.google.com [209.85.221.50]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0231347A4B for ; Mon, 22 Jan 2024 22:57:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.50 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705964256; cv=none; b=slmWS0VHd9s1TO339qTvZ4l+cHaQE47dYqXitJp9vNFu1LaAJDBr6+1uLFU+5YDOhpk0hQuMW82JOnYsS9VsLMmrcaP1WElUqU0fnqPCrsXEp4opi96GMJMOjiRonWP9iFbPM5RxxQ8vJmbqpcLeMWutUCEP31dKtz+VWf5JH3o= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705964256; c=relaxed/simple; bh=NU25j/nRSRJjYdR9Xkbm95iBy1+9quhbyDaHdu07SNc=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=aVmLOWb19eLCderdUdjcxwvpaXfPvtSwXHPmeFfJq+Y1bDncws1SWJ9Ka8FSYuJeC+4rUODDwN+NBDphSrBqpjUxl51/x9mViDaeDlY4EJHO7sGcuZ4mEY1b+2Bjw0CVALLzHtogIuKFRZYkwVB+ddEZpdqIXkaitOV0ksLztXI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=uQYLpdmd; arc=none smtp.client-ip=209.85.221.50 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="uQYLpdmd" Received: by mail-wr1-f50.google.com with SMTP id ffacd0b85a97d-3392291b21bso3156625f8f.1 for ; Mon, 22 Jan 2024 14:57:34 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1705964253; x=1706569053; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=pJbJnRKpWToFu2q+V6O7FlsxtcgPK6P8cGRt1rv+n50=; b=uQYLpdmdMVOzzWipAtTQ459d+DbOM3ZuixH/tzo2gFJ4sj15tsIs6nlNHNcL5A7//7 yaxdYwtGdqQzmYqFqDZk9/h8y35ZiYcqFeeW0g8sQ2Aa3tYNaZBxOUYIAu4kpVZg9rga r33t3Cd7Yd1QoYs8tagh1vrX20KOYBzTs5kvW8X0RYV4jE2M+KPrSzIBLRy0/d3mHZeR GQ7ifuTLDJEWD8JW1/tTBdkriGHkBCpQ6qjbRrociOQjnYqB6t2cLiJpeH8v+BeW9OwD JRQPBBHa6pg2vcMa9IFaSyq25bbHpU1DgLlE5ikapiIA2htHyNi6lYf/CAmqCA/CdY5d R8AQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1705964253; x=1706569053; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=pJbJnRKpWToFu2q+V6O7FlsxtcgPK6P8cGRt1rv+n50=; b=hbDvJSZdozVfRrV6/DqLpQQw2xv5bsJnItH9pfa3b8wCcIz0k0I9Sc+9snbAxDrGdS 0qTGYIoH0BcLIMhDzswjoibGMgu3uI+ZUeXMH8Aprsq65OfbwyAvyxHAlb7kZXwFtTKq HcJkViKHWJXX5sZvqgDlpcnT6JO4CAD0OdLDOGfBfd3Zvz4d9OHWH1jXyuZjqcfGAk6I bnybM6BK/nKg636HdCPJl3fgtlxX2ogCn4VhwR/P4dCXWKGCQNUdlO8B0S2APaB5aguy +8pGOvnEKNigk7Mwyn9EbpCwGVa0zrFj3cVEWlExgUJxVNJGkycz3p4XNU56jtzlEMPu gCow== X-Gm-Message-State: AOJu0YyY7h1YrqfbDqkr/K0fmaGlxA+Q53A8dM/Bm8SIS2+BHucojBoT xdFT0jf7XAAn/SwmsZSZDmds9zejCH7YY+8aKe+C9XjKBqRobhh0Obe0x9ZhIFc= X-Google-Smtp-Source: AGHT+IG/jFOxju1LtglICeFEljCYH82Da8abwgt9uhjEC3EDk+nmoQu4sACeu8Vd9SIMCqy6XTt4bg== X-Received: by 2002:a05:600c:ace:b0:40e:46b2:24da with SMTP id c14-20020a05600c0ace00b0040e46b224damr2627569wmr.71.1705964253325; Mon, 22 Jan 2024 14:57:33 -0800 (PST) Received: from gpeter-l.lan (host-92-18-76-30.as13285.net. [92.18.76.30]) by smtp.gmail.com with ESMTPSA id fa26-20020a05600c519a00b0040e89ff10f5sm19776847wmb.1.2024.01.22.14.57.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Jan 2024 14:57:32 -0800 (PST) From: Peter Griffin To: arnd@arndb.de, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux@roeck-us.net, wim@linux-watchdog.org, conor+dt@kernel.org, alim.akhtar@samsung.com, jaewon02.kim@samsung.com, chanho61.park@samsung.com, semen.protsenko@linaro.org Cc: kernel-team@android.com, peter.griffin@linaro.org, tudor.ambarus@linaro.org, andre.draszik@linaro.org, saravanak@google.com, willmcvicker@google.com, linux-fsd@tesla.com, linux-watchdog@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org Subject: [PATCH 5/9] arm64: dts: exynosautov9: remove deprecated samsung,syscon-phandle Date: Mon, 22 Jan 2024 22:57:06 +0000 Message-ID: <20240122225710.1952066-6-peter.griffin@linaro.org> X-Mailer: git-send-email 2.43.0.429.g432eaa2c6b-goog In-Reply-To: <20240122225710.1952066-1-peter.griffin@linaro.org> References: <20240122225710.1952066-1-peter.griffin@linaro.org> Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 samsung,syscon-phandle is no longer used by the Samsung watchdog driver to access PMU registers. Signed-off-by: Peter Griffin --- arch/arm64/boot/dts/exynos/exynosautov9.dtsi | 2 -- 1 file changed, 2 deletions(-) diff --git a/arch/arm64/boot/dts/exynos/exynosautov9.dtsi b/arch/arm64/boot/dts/exynos/exynosautov9.dtsi index c871a2f49fda..94c8d68fe92c 100644 --- a/arch/arm64/boot/dts/exynos/exynosautov9.dtsi +++ b/arch/arm64/boot/dts/exynos/exynosautov9.dtsi @@ -1551,7 +1551,6 @@ watchdog_cl0: watchdog@10050000 { interrupts = ; clocks = <&cmu_peris CLK_GOUT_WDT_CLUSTER0>, <&xtcxo>; clock-names = "watchdog", "watchdog_src"; - samsung,syscon-phandle = <&pmu_system_controller>; samsung,cluster-index = <0>; }; @@ -1561,7 +1560,6 @@ watchdog_cl1: watchdog@10060000 { interrupts = ; clocks = <&cmu_peris CLK_GOUT_WDT_CLUSTER1>, <&xtcxo>; clock-names = "watchdog", "watchdog_src"; - samsung,syscon-phandle = <&pmu_system_controller>; samsung,cluster-index = <1>; }; From patchwork Mon Jan 22 22:57:07 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Griffin X-Patchwork-Id: 13526410 Received: from mail-wm1-f52.google.com (mail-wm1-f52.google.com [209.85.128.52]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E9E01495C9 for ; Mon, 22 Jan 2024 22:57:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.52 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705964258; cv=none; b=D/OFY3IFqNJTyt/rk9sFiqDi43ghi2QionPJww6jZDv6zbCVA5IoRnL0LROcfoOO3rOVkiAi/DtYpm2HDjhGLpVQeNtDEJJi3RDDrXH/4ElGjwGGReeS2svv8rjwDYmp07hr+xLpFJroJhcRqg7szYkxfERW0uDuhD0Ck5iwZ3Q= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705964258; c=relaxed/simple; bh=ZgVtAIKrhtdCLGsKgWlIaERKd0KusdG4ZWad/DmmfvI=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=diNgID8nVusf05LRkgXpVHXOI2mj+O8gUZzDGZnq1pQrmYJ2BtXkG1FY1+lfVQv3iexkSKdvKdCdCTX+/XoBBsKgxxGkzpjDOkQVSANg9hHCM+9/oth2vyd1MEHpAxt9E6F1QRXeHj5B/6mJCsuc5lmUCIVeRAg5/PxWcuJ5ppE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=WQhmuVoa; arc=none smtp.client-ip=209.85.128.52 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="WQhmuVoa" Received: by mail-wm1-f52.google.com with SMTP id 5b1f17b1804b1-40e60e137aaso41196495e9.0 for ; Mon, 22 Jan 2024 14:57:36 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1705964255; x=1706569055; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=7y+1O2dDRcam6iTMZXdaVDgBYCAnl5nZ5iJ12xvO9iQ=; b=WQhmuVoarWFIGtqtGwscjgHLusKzOTmo7CZPnJ3x6zaPkP+FRhKGGgvnR5v6gc9crx ZlVGVQ1k72+2OqS5KNyXOS3mhKQdTeUGTWgeT1KEnGud12Gr9TE0kQhJ6Ou5h+VJRt84 odcjzIkD4qenZk+nNiVFtlXMaGDHdJgi0VWk7McGLgoTNtZPzjjjyvL6kD43rAjV54Ro KyYYk50UdefbRF856JC5c2qnLORX1hqHoDoMUlhZ9zykgCDS5u77P49k3xSX/k3diMq0 JO+gJzS3KOnSjf8rnFh5CEHiG1S8zbUp7TkPbg40x+PN0CPyNqW3ZD/moSmqddDoB/1H g1Bg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1705964255; x=1706569055; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=7y+1O2dDRcam6iTMZXdaVDgBYCAnl5nZ5iJ12xvO9iQ=; b=S9whDxzK0DQFzwfVAEzojdwagHZbivUeZxn2ZwZuNCkik1zSk20vd8QxwaLWzGzBLX o836PhRQdssHIDqAxR4ktnfzmu7znwy72QfjKE0hqcJ4IiJhGxdNoss9QTaixruG9X6y tBUiUzSMqsyLvl6kBPPWQZkZcVJqAPe5yjuIoffjbxOpSmofygi4BM7rEC624v5ORrjj IoTqoD5GxqWauRwT5sNJ8wK7zibaoJiM7MCgNzzzkHZqxa2oic+KkJv8nWm1p/KiNNyP U/VGfd4of18HtKLIlmG/Su3ilutC/n2i0s4CiqyrzjOKBEJSAyhEM2ED97LJbrK3rJjB dThA== X-Gm-Message-State: AOJu0Yzf14UAkmvCkeb2E04BCu446U6g09SkbTTcPIoCSPuQuREueqzi aOfFrk3KYPElaENcLg9Ft/EMRWcBj6M4ojsg4xk+8TKgaC1tSHlZwJrHf8bY7ow= X-Google-Smtp-Source: AGHT+IHqRrOEHIHhSifFZN302yhKTakQXstI0NxfnOUmXlruuoJ4Ui4e3EJWHkPdJKGLM3ndNTcg/w== X-Received: by 2002:a05:600c:5107:b0:40e:4782:fea7 with SMTP id o7-20020a05600c510700b0040e4782fea7mr2785067wms.180.1705964255173; Mon, 22 Jan 2024 14:57:35 -0800 (PST) Received: from gpeter-l.lan (host-92-18-76-30.as13285.net. [92.18.76.30]) by smtp.gmail.com with ESMTPSA id fa26-20020a05600c519a00b0040e89ff10f5sm19776847wmb.1.2024.01.22.14.57.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Jan 2024 14:57:34 -0800 (PST) From: Peter Griffin To: arnd@arndb.de, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux@roeck-us.net, wim@linux-watchdog.org, conor+dt@kernel.org, alim.akhtar@samsung.com, jaewon02.kim@samsung.com, chanho61.park@samsung.com, semen.protsenko@linaro.org Cc: kernel-team@android.com, peter.griffin@linaro.org, tudor.ambarus@linaro.org, andre.draszik@linaro.org, saravanak@google.com, willmcvicker@google.com, linux-fsd@tesla.com, linux-watchdog@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org Subject: [PATCH 6/9] arm64: dts: exynos850: remove deprecated samsung,syscon-phandle Date: Mon, 22 Jan 2024 22:57:07 +0000 Message-ID: <20240122225710.1952066-7-peter.griffin@linaro.org> X-Mailer: git-send-email 2.43.0.429.g432eaa2c6b-goog In-Reply-To: <20240122225710.1952066-1-peter.griffin@linaro.org> References: <20240122225710.1952066-1-peter.griffin@linaro.org> Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 samsung,syscon-phandle is no longer used by the Samsung watchdog driver to access PMU registers and is deprecated. Signed-off-by: Peter Griffin --- arch/arm64/boot/dts/exynos/exynos850.dtsi | 2 -- 1 file changed, 2 deletions(-) diff --git a/arch/arm64/boot/dts/exynos/exynos850.dtsi b/arch/arm64/boot/dts/exynos/exynos850.dtsi index da3f4a791e68..6d4789c77a1c 100644 --- a/arch/arm64/boot/dts/exynos/exynos850.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos850.dtsi @@ -216,7 +216,6 @@ watchdog_cl0: watchdog@10050000 { interrupts = ; clocks = <&cmu_peri CLK_GOUT_WDT0_PCLK>, <&oscclk>; clock-names = "watchdog", "watchdog_src"; - samsung,syscon-phandle = <&pmu_system_controller>; samsung,cluster-index = <0>; status = "disabled"; }; @@ -227,7 +226,6 @@ watchdog_cl1: watchdog@10060000 { interrupts = ; clocks = <&cmu_peri CLK_GOUT_WDT1_PCLK>, <&oscclk>; clock-names = "watchdog", "watchdog_src"; - samsung,syscon-phandle = <&pmu_system_controller>; samsung,cluster-index = <1>; status = "disabled"; }; From patchwork Mon Jan 22 22:57:08 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Griffin X-Patchwork-Id: 13526412 Received: from mail-wr1-f51.google.com (mail-wr1-f51.google.com [209.85.221.51]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7F2B84A991 for ; Mon, 22 Jan 2024 22:57:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.51 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705964261; cv=none; b=O1p8GNyECehH3GOaYefrqB3tqbRq+TMaUHGk/IlC6ScSOjXaExSfNO0vcEkLeb7RmC7h4aliPMdaZ6UpIgWU4UqN6UV9WlgkSqwzZQ2KXarqr1Lc4jnKgINKw+ajt4msKNut1BCVNTpGsExF9qsImxq74zHvJzAJA9p1oJrJCF4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705964261; c=relaxed/simple; bh=VbkBWnzy+0UFddPvAXBKeoRNgIhOC3IP1F6/lPbA/gA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=GGtMNv0umq98cGzL2WRt/djTcv5MqGh1/DI+wuwIeyvWzXilBfdsGRv4lrSLygR8e1IQgWeGkbyENHslCMv5EC9ueXzMwDBFl8mjH8J1PPSpRoLv8r6+hydbp1s/4bn+5xeHngZbhDc43HTliAOBJGJMMiGSo/giRV2K+TXawd0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=WOnk8lb+; arc=none smtp.client-ip=209.85.221.51 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="WOnk8lb+" Received: by mail-wr1-f51.google.com with SMTP id ffacd0b85a97d-339289fead2so2923177f8f.3 for ; Mon, 22 Jan 2024 14:57:38 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1705964257; x=1706569057; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=e6ViflgtGKoar4JoRupvo6UR3+8nq9fr7o9SkHHwUZY=; b=WOnk8lb+B85aeoOIuthPlyiCSOwnxdQ5+kTfxa72PIquEmDgDtBSC9UpqWBTxPSTQh 08j66f9IS8VxIEUXV9Sid87pId/9t2bYJ+kcLZ4uCPJP0vrQYba4wfO9WEgumANLmCUh 4nB6LqYI0A+WAULwntiyoOmSn9IqRmyQGBk1yjR9hMBKoTUqijiU0CDR5JGMbfxPYHng HQSPU+sj+1XfBabLG4FudjAo6xcfSSH2Mxg97OagYwB2bTbdP7ynL6FoYVnVidxFg1R3 b+P1bH1/82DFIbarP82nDHxXWH5Tp5pUO56fR7rURJt9DW9vLmOktHDYqQTD9jf2T+vL 0zuA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1705964257; x=1706569057; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=e6ViflgtGKoar4JoRupvo6UR3+8nq9fr7o9SkHHwUZY=; b=CONjr0ltkhuza3bRdqxoJxDfcgA8fNEO/rNOjirXZph3vzKF6M6ZuehD73A9NuFgQP kD+tVBaknF6nWJXf03SJFre7xI6G8x87M7TYmLXNC4GftKi78XyDAO3QJaqPb/ZYvsz+ 4PZkOBTxSrJvI/4sFU7xsPzcqUJbFPqNErIFddYrMCK+5vtylL75ly3Gc3uafXDXz161 gXtcnC9JftSkYxwKN9CGnBGhq6qjH1sOYR7+AQ/7fIECn/g1ts60ETETZK5Km+C5MWM9 v2RIOh54aDmR9qF+VsFjdo3ldIjiSuPYsusQTtIlRCiuSSPe3QHct1dCjQFzBt3tXBcA Nd6w== X-Gm-Message-State: AOJu0Yw9/tR6kkRd63hoJq36BTqyDZCPCt7M4W7MJw/g0+gaAoPNlWNj W/RXgnrgVNPLAtC1LFk2IhQLyHKUIwxVEG4ArzaZHFAbCyoU3oayd6fwJlKiEks= X-Google-Smtp-Source: AGHT+IHwPlPcC1gFMy2RUxu4+dzTot/pZ/X/gGnPYFqMXOZZ3nFzZdmylLHz87taKykx7APs0vxeGw== X-Received: by 2002:a05:600c:358a:b0:40e:93b4:25ef with SMTP id p10-20020a05600c358a00b0040e93b425efmr2798923wmq.26.1705964256708; Mon, 22 Jan 2024 14:57:36 -0800 (PST) Received: from gpeter-l.lan (host-92-18-76-30.as13285.net. [92.18.76.30]) by smtp.gmail.com with ESMTPSA id fa26-20020a05600c519a00b0040e89ff10f5sm19776847wmb.1.2024.01.22.14.57.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Jan 2024 14:57:35 -0800 (PST) From: Peter Griffin To: arnd@arndb.de, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux@roeck-us.net, wim@linux-watchdog.org, conor+dt@kernel.org, alim.akhtar@samsung.com, jaewon02.kim@samsung.com, chanho61.park@samsung.com, semen.protsenko@linaro.org Cc: kernel-team@android.com, peter.griffin@linaro.org, tudor.ambarus@linaro.org, andre.draszik@linaro.org, saravanak@google.com, willmcvicker@google.com, linux-fsd@tesla.com, linux-watchdog@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org Subject: [PATCH 7/9] arm64: dts: exynos7: remove deprecated samsung,syscon-phandle Date: Mon, 22 Jan 2024 22:57:08 +0000 Message-ID: <20240122225710.1952066-8-peter.griffin@linaro.org> X-Mailer: git-send-email 2.43.0.429.g432eaa2c6b-goog In-Reply-To: <20240122225710.1952066-1-peter.griffin@linaro.org> References: <20240122225710.1952066-1-peter.griffin@linaro.org> Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 samsung,syscon-phandle is no longer used by the Samsung watchdog driver to access PMU registers. Signed-off-by: Peter Griffin --- arch/arm64/boot/dts/exynos/exynos7.dtsi | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm64/boot/dts/exynos/exynos7.dtsi b/arch/arm64/boot/dts/exynos/exynos7.dtsi index 9cb6bd61262e..347c346e3cfb 100644 --- a/arch/arm64/boot/dts/exynos/exynos7.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos7.dtsi @@ -555,7 +555,6 @@ watchdog: watchdog@101d0000 { interrupts = ; clocks = <&clock_peris PCLK_WDT>; clock-names = "watchdog"; - samsung,syscon-phandle = <&pmu_system_controller>; status = "disabled"; }; From patchwork Mon Jan 22 22:57:09 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Griffin X-Patchwork-Id: 13526411 Received: from mail-wm1-f53.google.com (mail-wm1-f53.google.com [209.85.128.53]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BE7844B5A2 for ; Mon, 22 Jan 2024 22:57:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.53 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705964261; cv=none; b=A23Gm2RN2A3awHylaj5z0n1rbtLX1zkgbHYc3CZeurgKFLIjsrj1NUAyf7wdP3DIEti5kaNo7jgsyM8UMqrVXEvMBn3MlXzIjf4zs3JHWZNGTIeh3amhIogW9jw8PoMnSBft1MirPusIoBqoiTcQblzo1j4i21hG0+qWcrhMIZM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705964261; c=relaxed/simple; bh=t8ZhB9Hu7K4Ql69piBPtPrEhaMrRJa2GJ7YXvafwt4A=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=kUKfsSeUzCuZ93SWpNlVy8W7sX+EupVfGTjTiywDipwZnPjPFeN8Gns8E6kKgJ5/L9tDbDmRstYt5bsAeMNIMcTZ0D2JF3PxM7C0wSOjXy9bUSUrkUJkOTn/uXdo2SNC/2zqKWOELgrs10YqcYCOWSXF1Ja5hr/JsCFh97q1Ixo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=PqEfn9aQ; arc=none smtp.client-ip=209.85.128.53 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="PqEfn9aQ" Received: by mail-wm1-f53.google.com with SMTP id 5b1f17b1804b1-40eacb4bfa0so16649405e9.1 for ; Mon, 22 Jan 2024 14:57:39 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1705964258; x=1706569058; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=9+yXcHZUiMblwUqkt8towiLq/bcfaAns/f7tUicypCM=; b=PqEfn9aQMDjMpVjxcwU3m06SInZctx95KFmBTKBsntncoscyHDc2lliCVayNpxOYQQ SnUEnO6h/F9bl26o4vmJUAbbewhFPTnJ5YybFJYUC83L0RUIswVo3MBNhhYt/fWyPlL+ HcyAhfzlNdTng9JeUiraWKSWJ1tbi//VRhnXxGc773QVcIxczQKJuHQfD/BgjGgnKMcn uVAYpVymfpBIRn5Kj6bbwowYemvkNzgaiRuzl0X/iJGbjrBN3ls8xOXcmIk60hgX/Eyq vB1sp/akhwPkY5bKsuA8zxAyxlqgLRbRFPIpHA6duuUl1Yw0vr24hJA86lbWCcxX90Wo lrKA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1705964258; x=1706569058; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=9+yXcHZUiMblwUqkt8towiLq/bcfaAns/f7tUicypCM=; b=TVLv43QtYDLS4Q2bqPPuPjrKV5oENZmjvbQOzF9JVzax2t+HXHOMfclYaIez/dbDal QfM6IVS8xhJBWIL/E2lntv0zEmBtZTvFyMUWKINzZyPCz+w96gXd1djNQNTQzHIResOg D+aHLwulw/slW+m4Q5r467/oaQjwnffzFgncrXrE8Eqw+6NCLE8MkeT911bUC+jR8cdi nUFZWd0jSYdv8ykWmY7UKz2bQfPqFJSP6Vp236aCNAlLS87LaEaOULMvdbQwHmeQ3t73 03HNhlgSC4GqiFzNa03Qr8NYyKuyY2hVRGCjpdv1sjvXvmgdg2t+d1FKXBblFjYGBFsa qcEA== X-Gm-Message-State: AOJu0YwlQFv7vliWfbY0d8v91NPFIqKjGwcQ3VE41ONkPNj9ylyz/r8A kzy3qMMauUMWs7ZeRD/+P6iVxbOqM/CIUdxrAaxKcsLeUB1l5T8Hi+duydz9fzU= X-Google-Smtp-Source: AGHT+IGTxTra3oeT53FfIH97Y2Gx41002Oxx5G+brDmtK77zTRluoeyF5o89lKBl/s6gRCsv7yvONw== X-Received: by 2002:a05:600c:1ca6:b0:40e:b0a1:b96e with SMTP id k38-20020a05600c1ca600b0040eb0a1b96emr676113wms.69.1705964258092; Mon, 22 Jan 2024 14:57:38 -0800 (PST) Received: from gpeter-l.lan (host-92-18-76-30.as13285.net. [92.18.76.30]) by smtp.gmail.com with ESMTPSA id fa26-20020a05600c519a00b0040e89ff10f5sm19776847wmb.1.2024.01.22.14.57.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Jan 2024 14:57:37 -0800 (PST) From: Peter Griffin To: arnd@arndb.de, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux@roeck-us.net, wim@linux-watchdog.org, conor+dt@kernel.org, alim.akhtar@samsung.com, jaewon02.kim@samsung.com, chanho61.park@samsung.com, semen.protsenko@linaro.org Cc: kernel-team@android.com, peter.griffin@linaro.org, tudor.ambarus@linaro.org, andre.draszik@linaro.org, saravanak@google.com, willmcvicker@google.com, linux-fsd@tesla.com, linux-watchdog@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org Subject: [PATCH 8/9] ARM: dts: samsung: exynos4: remove deprecated samsung,syscon-phandle Date: Mon, 22 Jan 2024 22:57:09 +0000 Message-ID: <20240122225710.1952066-9-peter.griffin@linaro.org> X-Mailer: git-send-email 2.43.0.429.g432eaa2c6b-goog In-Reply-To: <20240122225710.1952066-1-peter.griffin@linaro.org> References: <20240122225710.1952066-1-peter.griffin@linaro.org> Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 samsung,syscon-phandle is no longer used by the Samsung watchdog driver to access PMU registers. Signed-off-by: Peter Griffin --- arch/arm/boot/dts/samsung/exynos4x12.dtsi | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/boot/dts/samsung/exynos4x12.dtsi b/arch/arm/boot/dts/samsung/exynos4x12.dtsi index b4b5e769145b..0fea32616c89 100644 --- a/arch/arm/boot/dts/samsung/exynos4x12.dtsi +++ b/arch/arm/boot/dts/samsung/exynos4x12.dtsi @@ -311,7 +311,6 @@ watchdog: watchdog@10060000 { interrupts = ; clocks = <&clock CLK_WDT>; clock-names = "watchdog"; - samsung,syscon-phandle = <&pmu_system_controller>; }; adc: adc@126c0000 { From patchwork Mon Jan 22 22:57:10 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Griffin X-Patchwork-Id: 13526413 Received: from mail-wm1-f41.google.com (mail-wm1-f41.google.com [209.85.128.41]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 12ED44BA91 for ; Mon, 22 Jan 2024 22:57:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.41 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705964264; cv=none; b=Z571LKkdyUg0ZFvoPnWuB/q+dkudAjH3bTDXa3Wr6so2+kt9e9use+8rO5aayz8I9rpWTDTnI55QB741KS1d+je6SMghTkHza6EFLWWI7FbA8p/oMFIrIpIunUQX6NQGoV16Uqsh30fuHT3XrXHMcil9vW4CL7fZ3kr/Z4tBJq8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705964264; c=relaxed/simple; bh=6Fww45r8KMq9qH9gjFBGszYrLznUeDKKB4S+eDk2dqU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Bl9M6ghenfw6Ww+Sud7rr+LiXsNvxo5PVDeTBWkyE5viF4UndKhNFoyIqmh/X9nztfASF7Lgr1aXNMjjEsmeKosV+lkBfIMSkUYoRecLvYKOakmprd4ZOS4ZCCtfxTnqZhT9W9JhFq+jA4SL8f6OwXsEQZMeaIAIuLt49/ZXRWg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=jKiFJ1GC; arc=none smtp.client-ip=209.85.128.41 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="jKiFJ1GC" Received: by mail-wm1-f41.google.com with SMTP id 5b1f17b1804b1-40e80046264so47533625e9.0 for ; Mon, 22 Jan 2024 14:57:41 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1705964260; x=1706569060; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=yR0AO5T3Lm52GetAuhWGDlBbvPmAefipWgZrjsJSJcM=; b=jKiFJ1GCKKlFtDaECgZa64YK1ExR9aWypvp9vvl5lhUd3K49tl7R+MojlpME9pL3kq kw8ZdngSy98q2b2gXYSYMe8q27mIlvuHx6AuErBItlaEVq7tNhQDYianBmVG3OqxIaBw gQ9G1Ls1UhJ0gP25eqJT5lh2JyYYXJTcdb8AC1aIzgfHb78kaIhG4CP+J8lojdYa7hkP UhO6PqcWlXyAzRb68oBZfnI5SOC582eMaQ8GRL06xtO7EgB2Urtv70hFKDsAKHnURPM0 JO2ahBDkOViF8pBzCm0/tBNkketXwBEvDzynQpYUCC3DM+vnmUDQokXnaCUYU8UdLxlv CdsQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1705964260; x=1706569060; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=yR0AO5T3Lm52GetAuhWGDlBbvPmAefipWgZrjsJSJcM=; b=pJpqhtzrIoLhZwRKm7uOBYMmq5a34DNhtLO9EcFJ1WjaMc/qLbpmFhUn0wVaeSmSOm qtYbg96bjj39JfJx2WXlednfywVLCkFapXnLlpfNYZrWaeiacSU7sRGw250d980kvpvF jSra4gLRQFd3XeAn2f9wXbxJovCA09dRkYAe0zJRkTnzfR3eIIFYDNU13jUtQw1/avVo 5xdtX2RshTob75IFdTapW85NT5452+lrghGStBn05EA2PNAWhqr0syWpdKnhUuQtYmBe 8dTeTOwA0sJuYeTy81c8I+nRR0s4Mx/EuHxCT9jH2sH5TL6UCy5Obme8JWaxbXgsUXFW cF3w== X-Gm-Message-State: AOJu0YzrGBYH1kw9v7Fyqpwb5i9BfdEw9+1TUvv45su/79Is3KHdyhK0 AVU6D/6KysLshqTU8Ve8WRl8cueAOqJh2J68sobpBnjhpZqcuwfbjRgZvGLpgMc= X-Google-Smtp-Source: AGHT+IE/3oSYmQaHmUVIEZrmPeRaKj7ezaMnrpX2IRhfyS/TY5XiBAOhqPClwNkExF4LwyWJ4DWvjA== X-Received: by 2002:a05:600c:a43:b0:40e:62aa:fa7b with SMTP id c3-20020a05600c0a4300b0040e62aafa7bmr2887046wmq.111.1705964260529; Mon, 22 Jan 2024 14:57:40 -0800 (PST) Received: from gpeter-l.lan (host-92-18-76-30.as13285.net. [92.18.76.30]) by smtp.gmail.com with ESMTPSA id fa26-20020a05600c519a00b0040e89ff10f5sm19776847wmb.1.2024.01.22.14.57.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Jan 2024 14:57:38 -0800 (PST) From: Peter Griffin To: arnd@arndb.de, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux@roeck-us.net, wim@linux-watchdog.org, conor+dt@kernel.org, alim.akhtar@samsung.com, jaewon02.kim@samsung.com, chanho61.park@samsung.com, semen.protsenko@linaro.org Cc: kernel-team@android.com, peter.griffin@linaro.org, tudor.ambarus@linaro.org, andre.draszik@linaro.org, saravanak@google.com, willmcvicker@google.com, linux-fsd@tesla.com, linux-watchdog@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org Subject: [PATCH 9/9] ARM: dts: exynos5250: remove deprecated samsung,syscon-phandle Date: Mon, 22 Jan 2024 22:57:10 +0000 Message-ID: <20240122225710.1952066-10-peter.griffin@linaro.org> X-Mailer: git-send-email 2.43.0.429.g432eaa2c6b-goog In-Reply-To: <20240122225710.1952066-1-peter.griffin@linaro.org> References: <20240122225710.1952066-1-peter.griffin@linaro.org> Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 samsung,syscon-phandle is no longer used by the Samsung watchdog driver to access PMU registers. Signed-off-by: Peter Griffin --- arch/arm/boot/dts/samsung/exynos5250.dtsi | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/boot/dts/samsung/exynos5250.dtsi b/arch/arm/boot/dts/samsung/exynos5250.dtsi index 99c84bebf25a..2bbeb0f0d898 100644 --- a/arch/arm/boot/dts/samsung/exynos5250.dtsi +++ b/arch/arm/boot/dts/samsung/exynos5250.dtsi @@ -312,7 +312,6 @@ watchdog@101d0000 { interrupts = ; clocks = <&clock CLK_WDT>; clock-names = "watchdog"; - samsung,syscon-phandle = <&pmu_system_controller>; }; mfc: codec@11000000 {