From patchwork Wed Jan 24 14:43:01 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Chen, Jason Z" X-Patchwork-Id: 13529301 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.7]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8362A41745 for ; Wed, 24 Jan 2024 14:43:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.7 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706107442; cv=none; b=godE/TFWK0F5QU6RArqm+xNjtGHTbreNQucQrsLndl2Fa7zoRFqIZIabFDqlP3O678moV/9Ivqcph8hZ09O4gVuKuccrBZG56kOmCiT/5JHkCDiNX3xjBQBZrVrPCrd/QYuO+8s8SGORHwQSbirn2Hx6qNm2TZk0MHwtxyKMCsA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706107442; c=relaxed/simple; bh=iXwq4xQoxEzpkcV/uk2xUz2WCBKyjauvTVldSryotLE=; h=From:To:Cc:Subject:Date:Message-Id:MIME-Version; b=GqAbyJatz37enH9v4SgUIgzPMRjG9NtrLIDrCH2r21vDK5sWKu04orxLzNjdjAuh54x62QKYW3EqtT8DddGD0mc/XjE43edDa5L5O2qXOStVDRoWFeajxRPIDLJv6ZiJzhRYre8nKBR+lEyV6U1MEfCWjPPGItqpBI9EoXwljwo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=Ai50uLTs; arc=none smtp.client-ip=192.198.163.7 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="Ai50uLTs" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1706107440; x=1737643440; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=iXwq4xQoxEzpkcV/uk2xUz2WCBKyjauvTVldSryotLE=; b=Ai50uLTs1LlY5kt3NjNF19+E27IgE6fr883Jf2foMsaYsu2ujs0iZj9P xZ/hwVEvijpLfByQ7anY7CYzpHKAIbivxU/2Ds9zBHgbZVkSZtPkrQQdM 7Taux0VYB4h8h8ECPuqnZRhH6uvxDHMlm+XuNr3z+ZSHlFFWEvSPgdw6H LqeKIJZie4tFkK2QEAIwWYJRI80s6D3U0FT9dtcTOZoPu4hx/VL1n2Q// QIZO0grgV+WsZ9faVfVVBPRFt7KdK2yY19tIjrl95grE1rUPuphsDmkU2 03j0vgeEtwTIc3KQjstbTc0HHuaYG3jmhoxPIcM7jVwOMOAkX3e3H4KOO Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10962"; a="23324966" X-IronPort-AV: E=Sophos;i="6.05,216,1701158400"; d="scan'208";a="23324966" Received: from orviesa003.jf.intel.com ([10.64.159.143]) by fmvoesa101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Jan 2024 06:43:58 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.05,216,1701158400"; d="scan'208";a="1945708" Received: from jasonz-ms-7d25.itwn.intel.com ([10.227.107.10]) by orviesa003.jf.intel.com with ESMTP; 24 Jan 2024 06:43:54 -0800 From: "Chen, Jason Z" To: sakari.ailus@linux.intel.com, tfiga@chromium.org, senozhatsky@chromium.org Cc: bingbu.cao@linux.intel.com, linux-media@vger.kernel.org, andy.yeh@intel.com, qingwu.zhang@intel.com, Jason Chen Subject: [PATCH v6] media: ov08x40: Reduce start streaming time Date: Wed, 24 Jan 2024 22:43:01 +0800 Message-Id: <20240124144301.1126453-1-jason.z.chen@intel.com> X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Jason Chen Because video duration involves calculating the streaming time, and i2c communication incurs too many XTALK register settings every 4 bytes with i2c START and STOP. So we have opted switch to the i2c burst method. This method involves writing the XTALK registers in the order of the register block. The start streaming time can be reduced from around 400ms to 150ms Signed-off-by: Jason Chen Reviewed-by: Sergey Senozhatsky --- drivers/media/i2c/ov08x40.c | 1211 ++--------------------------------- 1 file changed, 59 insertions(+), 1152 deletions(-) diff --git a/drivers/media/i2c/ov08x40.c b/drivers/media/i2c/ov08x40.c index ddcb4b6848b..01cf3b8be6c 100644 --- a/drivers/media/i2c/ov08x40.c +++ b/drivers/media/i2c/ov08x40.c @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0 // Copyright (c) 2022 Intel Corporation. +#include #include #include #include @@ -95,6 +96,12 @@ /* Vertical Window Offset */ #define OV08X40_REG_V_WIN_OFFSET 0x3813 +/* Burst Register */ +#define OV08X40_REG_XTALK_FIRST_A 0x5a80 +#define OV08X40_REG_XTALK_LAST_A 0x5b9f +#define OV08X40_REG_XTALK_FIRST_B 0x5bc0 +#define OV08X40_REG_XTALK_LAST_B 0x5f1f + enum { OV08X40_LINK_FREQ_400MHZ_INDEX, }; @@ -682,1158 +689,6 @@ static const struct ov08x40_reg mode_3856x2416_regs[] = { {0x3502, 0x10}, {0x3508, 0x0f}, {0x3509, 0x80}, - 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{0x5e58, 0x75}, - {0x5e59, 0x75}, - {0x5e5a, 0x75}, - {0x5e5b, 0x75}, - {0x5e5c, 0x75}, - {0x5e5d, 0x75}, - {0x5e5e, 0x75}, - {0x5e5f, 0x75}, - {0x5e60, 0x75}, - {0x5e61, 0x75}, - {0x5e62, 0x75}, - {0x5e63, 0x75}, - {0x5e64, 0x75}, - {0x5e65, 0x75}, - {0x5e66, 0x75}, - {0x5e67, 0x75}, - {0x5e68, 0x75}, - {0x5e69, 0x75}, - {0x5e6a, 0x75}, - {0x5e6b, 0x75}, - {0x5e6c, 0x75}, - {0x5e6d, 0x75}, - {0x5e6e, 0x75}, - {0x5e6f, 0x75}, - {0x5e70, 0x75}, - {0x5e71, 0x75}, - {0x5e72, 0x75}, - {0x5e73, 0x75}, - {0x5e74, 0x75}, - {0x5e75, 0x75}, - {0x5e76, 0x75}, - {0x5e77, 0x75}, - {0x5e78, 0x75}, - {0x5e79, 0x75}, - {0x5e7a, 0x75}, - {0x5e7b, 0x75}, - {0x5e7c, 0x75}, - {0x5e7d, 0x75}, - {0x5e7e, 0x75}, - {0x5e7f, 0x75}, - {0x5e80, 0x75}, - {0x5e81, 0x75}, - {0x5e82, 0x75}, - {0x5e83, 0x75}, - {0x5e84, 0x75}, - {0x5e85, 0x75}, - {0x5e86, 0x75}, - {0x5e87, 0x75}, - {0x5e88, 0x75}, - {0x5e89, 0x75}, - {0x5e8a, 0x75}, - {0x5e8b, 0x75}, - {0x5e8c, 0x75}, - {0x5e8d, 0x75}, - {0x5e8e, 0x75}, - {0x5e8f, 0x75}, - {0x5e90, 0x75}, - {0x5e91, 0x75}, - {0x5e92, 0x75}, - {0x5e93, 0x75}, - {0x5e94, 0x75}, - {0x5e95, 0x75}, - {0x5e96, 0x75}, - {0x5e97, 0x75}, - {0x5e98, 0x75}, - {0x5e99, 0x75}, - {0x5e9a, 0x75}, - {0x5e9b, 0x75}, - {0x5e9c, 0x75}, - {0x5e9d, 0x75}, - {0x5e9e, 0x75}, - {0x5e9f, 0x75}, - {0x5ea0, 0x75}, - {0x5ea1, 0x75}, - {0x5ea2, 0x75}, - {0x5ea3, 0x75}, - {0x5ea4, 0x75}, - {0x5ea5, 0x75}, - {0x5ea6, 0x75}, - {0x5ea7, 0x75}, - {0x5ea8, 0x75}, - {0x5ea9, 0x75}, - {0x5eaa, 0x75}, - {0x5eab, 0x75}, - {0x5eac, 0x75}, - {0x5ead, 0x75}, - {0x5eae, 0x75}, - {0x5eaf, 0x75}, - {0x5eb0, 0x75}, - {0x5eb1, 0x75}, - {0x5eb2, 0x75}, - {0x5eb3, 0x75}, - {0x5eb4, 0x75}, - {0x5eb5, 0x75}, - {0x5eb6, 0x75}, - {0x5eb7, 0x75}, - {0x5eb8, 0x75}, - {0x5eb9, 0x75}, - {0x5eba, 0x75}, - {0x5ebb, 0x75}, - {0x5ebc, 0x75}, - {0x5ebd, 0x75}, - {0x5ebe, 0x75}, - {0x5ebf, 0x75}, - {0x5ec0, 0x75}, - {0x5ec1, 0x75}, - {0x5ec2, 0x75}, - {0x5ec3, 0x75}, - {0x5ec4, 0x75}, - {0x5ec5, 0x75}, - {0x5ec6, 0x75}, - {0x5ec7, 0x75}, - {0x5ec8, 0x75}, - {0x5ec9, 0x75}, - {0x5eca, 0x75}, - {0x5ecb, 0x75}, - {0x5ecc, 0x75}, - {0x5ecd, 0x75}, - {0x5ece, 0x75}, - {0x5ecf, 0x75}, - {0x5ed0, 0x75}, - {0x5ed1, 0x75}, - {0x5ed2, 0x75}, - {0x5ed3, 0x75}, - {0x5ed4, 0x75}, - {0x5ed5, 0x75}, - {0x5ed6, 0x75}, - {0x5ed7, 0x75}, - {0x5ed8, 0x75}, - {0x5ed9, 0x75}, - {0x5eda, 0x75}, - {0x5edb, 0x75}, - {0x5edc, 0x75}, - {0x5edd, 0x75}, - {0x5ede, 0x75}, - {0x5edf, 0x75}, - {0x5ee0, 0x75}, - {0x5ee1, 0x75}, - {0x5ee2, 0x75}, - {0x5ee3, 0x75}, - {0x5ee4, 0x75}, - {0x5ee5, 0x75}, - {0x5ee6, 0x75}, - {0x5ee7, 0x75}, - {0x5ee8, 0x75}, - {0x5ee9, 0x75}, - {0x5eea, 0x75}, - {0x5eeb, 0x75}, - {0x5eec, 0x75}, - {0x5eed, 0x75}, - {0x5eee, 0x75}, - {0x5eef, 0x75}, - {0x5ef0, 0x75}, - {0x5ef1, 0x75}, - {0x5ef2, 0x75}, - {0x5ef3, 0x75}, - {0x5ef4, 0x75}, - {0x5ef5, 0x75}, - {0x5ef6, 0x75}, - {0x5ef7, 0x75}, - {0x5ef8, 0x75}, - {0x5ef9, 0x75}, - {0x5efa, 0x75}, - {0x5efb, 0x75}, - {0x5efc, 0x75}, - {0x5efd, 0x75}, - {0x5efe, 0x75}, - {0x5eff, 0x75}, - {0x5f00, 0x75}, - {0x5f01, 0x75}, - {0x5f02, 0x75}, - {0x5f03, 0x75}, - {0x5f04, 0x75}, - {0x5f05, 0x75}, - {0x5f06, 0x75}, - {0x5f07, 0x75}, - {0x5f08, 0x75}, - {0x5f09, 0x75}, - {0x5f0a, 0x75}, - {0x5f0b, 0x75}, - {0x5f0c, 0x75}, - {0x5f0d, 0x75}, - {0x5f0e, 0x75}, - {0x5f0f, 0x75}, - {0x5f10, 0x75}, - {0x5f11, 0x75}, - {0x5f12, 0x75}, - {0x5f13, 0x75}, - {0x5f14, 0x75}, - {0x5f15, 0x75}, - {0x5f16, 0x75}, - {0x5f17, 0x75}, - {0x5f18, 0x75}, - {0x5f19, 0x75}, - {0x5f1a, 0x75}, - {0x5f1b, 0x75}, - {0x5f1c, 0x75}, - {0x5f1d, 0x75}, - {0x5f1e, 0x75}, - {0x5f1f, 0x75}, }; static const struct ov08x40_reg mode_1928x1208_regs[] = { @@ -2493,6 +1348,42 @@ static int ov08x40_read_reg(struct ov08x40 *ov08x, return 0; } +static int ov08x40_burst_fill_regs(struct ov08x40 *ov08x, u16 first_reg, + u16 last_reg, u8 val) +{ + struct i2c_client *client = v4l2_get_subdevdata(&ov08x->sd); + struct i2c_msg msgs; + size_t i, num_regs; + int ret; + + num_regs = last_reg - first_reg + 1; + msgs.addr = client->addr; + msgs.flags = 0; + msgs.len = 2 + num_regs; + msgs.buf = kmalloc(msgs.len, GFP_KERNEL); + + if (!msgs.buf) + return -ENOMEM; + + put_unaligned_be16(first_reg, msgs.buf); + + for (i = 0; i < num_regs; ++i) + msgs.buf[2 + i] = val; + + ret = i2c_transfer(client->adapter, &msgs, 1); + + kfree(msgs.buf); + + if (ret != 1) { + dev_err(&client->dev, "Failed regs transferred: %d\n", ret); + return -EIO; + } + + dev_dbg(&client->dev, "I2C burst transfer succeeded\n"); + + return 0; +} + /* Write registers up to 4 at a time */ static int ov08x40_write_reg(struct ov08x40 *ov08x, u16 reg, u32 len, u32 __val) @@ -2936,6 +1827,22 @@ static int ov08x40_start_streaming(struct ov08x40 *ov08x) return ret; } + /* Use i2c burst to write register on full size registers */ + if (ov08x->cur_mode->exposure_shift == 1) { + ret = ov08x40_burst_fill_regs(ov08x, OV08X40_REG_XTALK_FIRST_A, + OV08X40_REG_XTALK_LAST_A, 0x75); + if (ret == 0) + ret = ov08x40_burst_fill_regs(ov08x, + OV08X40_REG_XTALK_FIRST_B, + OV08X40_REG_XTALK_LAST_B, + 0x75); + } + + if (ret) { + dev_err(&client->dev, "%s failed to set regs\n", __func__); + return ret; + } + /* Apply customized values from user */ ret = __v4l2_ctrl_handler_setup(ov08x->sd.ctrl_handler); if (ret)