From patchwork Thu Feb 1 06:15:05 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Mi, Dapeng" X-Patchwork-Id: 13540681 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.9]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9FC2784A2B; Thu, 1 Feb 2024 06:07:42 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.9 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706767664; cv=none; b=M75LZ2BGxFxOgy22iVCXPA/OdG6WxQ28iWyNEVdPmR/skhd2HuzKNXptTYWPrVB5tb7lC+19ZAwXouvlOhl+pQRZwV3jOIHQ64n8FNplJbJL9zS6L/nuWrf0nWle7vEgRgRk07lKK1u3blopbQMKscZ8813l/M2l03I08fdQ53M= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706767664; c=relaxed/simple; bh=2Mh1AT0f2dbPt4JXsiALccjzvLIfnSSqSxigb7iI0+0=; h=From:To:Cc:Subject:Date:Message-Id:MIME-Version; b=PabyGuUW3ASnOuRM+OWCLfZGNEPxA2z+mWt2qc6mZFFhbloRKzvrKaiTHbR0JJLK5HWtckhePWrP9W604kUmMXgS+Bj4ZOqQxdRkwIu6mVdkgdTW8rh1J58k6S86n27YxSxK36F6uaSK9Mkkcu8CdRnoniDw6c9smVblGq3u1yM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=nzqp2sYE; arc=none smtp.client-ip=192.198.163.9 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="nzqp2sYE" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1706767663; x=1738303663; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=2Mh1AT0f2dbPt4JXsiALccjzvLIfnSSqSxigb7iI0+0=; b=nzqp2sYEPWOnwkw6Fu6zI8vhn0lElEF4LmYPGHoXnJxAiWrTREJFVOkJ 84ie2zE9xxZZzSXlIMQk5oNtXBobFUkpFhMhWRtIOsvZ7Mg7JQG+MzEhD glpBB9WpUY2O/Iu0p30nLGleOMXPyt8tlHE01R2CNdO/0pg3PAnGsSx6m dmt9aTjg4vZ8x/6VC2Swg49KVmPD+ZsfWJIO7sr3V1HKI/SFF/M9VExZe XhEyVCm/tsEvxStk2yr6PYDsakvx53fZx+JCyyFWItTK3pGQMXNViFp2r nSEtn4rhI2EL9rV/TMlnax0SQh/1ZegP4OdlCG3qQK6K35BSc1H2For+G w==; X-IronPort-AV: E=McAfee;i="6600,9927,10969"; a="10574908" X-IronPort-AV: E=Sophos;i="6.05,234,1701158400"; d="scan'208";a="10574908" Received: from fmviesa001.fm.intel.com ([10.60.135.141]) by fmvoesa103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 31 Jan 2024 22:07:42 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.05,234,1701158400"; d="scan'208";a="30776298" Received: from dmi-pnp-i7.sh.intel.com ([10.239.159.155]) by fmviesa001.fm.intel.com with ESMTP; 31 Jan 2024 22:07:39 -0800 From: Dapeng Mi To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Kan Liang , Jim Mattson , Jinrong Liang , Aaron Lewis , Dapeng Mi , Dapeng Mi Subject: [PATCH] KVM: selftests: Test top-down slots event Date: Thu, 1 Feb 2024 14:15:05 +0800 Message-Id: <20240201061505.2027804-1-dapeng1.mi@linux.intel.com> X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Although the fixed counter 3 and the exclusive pseudo slots events is not supported by KVM yet, the architectural slots event is supported by KVM and can be programed on any GP counter. Thus add validation for this architectural slots event. Top-down slots event "counts the total number of available slots for an unhalted logical processor, and increments by machine-width of the narrowest pipeline as employed by the Top-down Microarchitecture Analysis method." So suppose the measured count of slots event would be always larger than 0. pmu_counters_test passed with this patch on Intel Sapphire Rapids. Signed-off-by: Dapeng Mi --- tools/testing/selftests/kvm/x86_64/pmu_counters_test.c | 1 + 1 file changed, 1 insertion(+) base-commit: f0f3b810edda57f317d79f452056786257089667 diff --git a/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c b/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c index ae5f6042f1e8..99bcb619b861 100644 --- a/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c +++ b/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c @@ -117,6 +117,7 @@ static void guest_assert_event_count(uint8_t idx, fallthrough; case INTEL_ARCH_CPU_CYCLES_INDEX: case INTEL_ARCH_REFERENCE_CYCLES_INDEX: + case INTEL_ARCH_TOPDOWN_SLOTS_INDEX: GUEST_ASSERT_NE(count, 0); break; default: