From patchwork Thu Feb 1 18:06:58 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christina Quast X-Patchwork-Id: 13541598 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 968E2C48292 for ; Thu, 1 Feb 2024 18:07:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References:Message-Id :MIME-Version:Subject:Date:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=XoCbBbqFm8mE1t/Uu6dX06zSVsiJZVAaXQi3uqbmbGs=; b=qvCe0lCiCVenci mU1GIsZ8YZNCjKGsX5dxr7nNG7+fok7E/Mw35/e3VTopmUPAiBkwFYZHNWkas9mXdM/5HUcGU0JCs sR9TblwUh5nNTI18rKWObYKVC0moNxAElIe2lWjyvuMX5TBQEUZ1md3/Zi75kTwHxFxRHS9S7BBr8 /wYXpI74mwM1wYRqtmscMfw6CC+BviLeiKAyCiBGUrWviBsxrKcVcfAZpHX+uCyHcgIE0SKExH60a Rkcev9RZc9BA0vmzvJEUk16uzyXgzaJq/taGs/mmAa8HNzHXLMU2BpSla54eBiwm+2bcWW8pqkoWm IkMGt6KXeUVnwfAgVCVA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rVbTA-00000008wGL-0Ibp; Thu, 01 Feb 2024 18:07:24 +0000 Received: from mail.someserver.de ([2a01:4f8:241:f700:8fb:afff:fef5:f64e]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rVbT5-00000008wBt-40P1; Thu, 01 Feb 2024 18:07:21 +0000 Received: from localhost (unknown [195.162.191.218]) by mail.someserver.de (Postfix) with ESMTPSA id 2965DA21AE; Thu, 1 Feb 2024 19:07:13 +0100 (CET) From: Christina Quast Date: Thu, 01 Feb 2024 19:06:58 +0100 Subject: [PATCH v2 1/3] DONOTMERGE: rust: prelude: add bit function MIME-Version: 1.0 Message-Id: <20240201-rockchip-rust-phy_depend-v2-1-c5fa4faab924@christina-quast.de> References: <20240201-rockchip-rust-phy_depend-v2-0-c5fa4faab924@christina-quast.de> In-Reply-To: <20240201-rockchip-rust-phy_depend-v2-0-c5fa4faab924@christina-quast.de> To: Miguel Ojeda , Alex Gaynor , Wedson Almeida Filho , Boqun Feng , Gary Guo , =?utf-8?q?Bj=C3=B6rn_Roy_Baron?= , Benno Lossin , Andreas Hindborg , Alice Ryhl , FUJITA Tomonori , Trevor Gross , Andrew Lunn , Heiner Kallweit , Russell King , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Heiko Stuebner Cc: rust-for-linux@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, Christina Quast X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=ed25519-sha256; t=1706810819; l=1166; i=contact@christina-quast.de; s=20240130; h=from:subject:message-id; bh=I9yo8gFF9g6Nktp5khK01f/99bXfCpCeui/xCrTFEX0=; b=PD/auZkWvS/a6RAELm9LZMt+cqhgGaqOca8QQUD5tdAWmf0dbh8OFZXYaJmqZgB58v2xzsXPY 6aq5k52d6jBD1X+2SRUI45jUSSAeNaaKZovXt/2kXeZa7O2MuqHekKw X-Developer-Key: i=contact@christina-quast.de; a=ed25519; pk=aoQfinjbnr265vCkIZdYteLDcmIqLBhY1m74WfFUU9E= X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240201_100720_215511_F6EC0263 X-CRM114-Status: GOOD ( 11.01 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org In order to create masks easily, the define BIT() is used in C code. This commit adds the same functionality to the rust kernel. Do not merge this commit, because rust/kernel/types.rs in Rust-for-Linux already contains this functionality and will be merged into next-net soon. But this driver does not compile without this commit, so I am adding it to the patchset to get more feedback on the actual driver. Signed-off-by: Christina Quast --- rust/kernel/prelude.rs | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/rust/kernel/prelude.rs b/rust/kernel/prelude.rs index ae21600970b3..16e483de2f27 100644 --- a/rust/kernel/prelude.rs +++ b/rust/kernel/prelude.rs @@ -38,3 +38,19 @@ pub use super::init::{InPlaceInit, Init, PinInit}; pub use super::current; + +/// Returns a `u32` number that has only the `n`th bit set. +/// +/// # Arguments +/// +/// * `n` - A `u32` that specifies the bit position (zero-based index) +/// +/// # Example +/// +/// ``` +/// let b = bit(2); +/// assert_eq!(b, 4); +#[inline] +pub const fn bit(n: u32) -> u32 { + 1 << n +} From patchwork Thu Feb 1 18:06:59 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christina Quast X-Patchwork-Id: 13541597 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 20B30C4828E for ; Thu, 1 Feb 2024 18:07:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References:Message-Id :MIME-Version:Subject:Date:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=XCJCL3eeC5B8J50Pt0v3NNQI7JJoYlwf9wrN04MboxU=; b=mfG5MX0F+l4hN5 c6el6kXlEMBCHwoCtl34n7ctlM/L8q8akM1zGZmDAgqb72VfKhy0nwRdnknwUwnUi/FBMFQTbCFXX 9nW6f+YhUZl++6bf4QcMXgtRMNqB04wviUQHyC58C7pFMzVHA8GIeMTP2KRVywgmyoVke+oRW9AjJ 8TZs+DcbBb8PppEA0XZXgfhi/UKE60cyhQQqnPKh2bJed69YqSQ4G71wOBG87aVzTfs0Zc2iojwvJ HNB198smTaokucclr5/6qJjLbzDAr6iLGbZcaGIZwl3NRNpz0P0DRdaJrR1PfXZ/sOIaqq1AdMi/d NsEDny0wKtIL8AmLG2kA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rVbT9-00000008wFg-1ijE; Thu, 01 Feb 2024 18:07:23 +0000 Received: from mail.someserver.de ([2a01:4f8:241:f700:8fb:afff:fef5:f64e]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rVbT5-00000008wC7-3pEJ; Thu, 01 Feb 2024 18:07:21 +0000 Received: from localhost (unknown [195.162.191.218]) by mail.someserver.de (Postfix) with ESMTPSA id 8B6DAA2250; Thu, 1 Feb 2024 19:07:15 +0100 (CET) From: Christina Quast Date: Thu, 01 Feb 2024 19:06:59 +0100 Subject: [PATCH v2 2/3] rust: phy: add some phy_driver and genphy_ functions MIME-Version: 1.0 Message-Id: <20240201-rockchip-rust-phy_depend-v2-2-c5fa4faab924@christina-quast.de> References: <20240201-rockchip-rust-phy_depend-v2-0-c5fa4faab924@christina-quast.de> In-Reply-To: <20240201-rockchip-rust-phy_depend-v2-0-c5fa4faab924@christina-quast.de> To: Miguel Ojeda , Alex Gaynor , Wedson Almeida Filho , Boqun Feng , Gary Guo , =?utf-8?q?Bj=C3=B6rn_Roy_Baron?= , Benno Lossin , Andreas Hindborg , Alice Ryhl , FUJITA Tomonori , Trevor Gross , Andrew Lunn , Heiner Kallweit , Russell King , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Heiko Stuebner Cc: rust-for-linux@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, Christina Quast X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=ed25519-sha256; t=1706810819; l=2422; i=contact@christina-quast.de; s=20240130; h=from:subject:message-id; bh=lj9jzLLyVHFhew0Zi2auFkzyMGCjvKyZGt3bltSvs9k=; b=aBY8aB9sq9C6dAXsUFZ7GKm0DaKOL3Rg4HPRhXog0o3VGGiSAUmMpGA4nPU0r6SNJlN/kCQ8Q 6lt+pqrQgCmB3oQRdIWJxLCdbPCslYHVrYtUjsrYQoPoH+xjpDn+Imd X-Developer-Key: i=contact@christina-quast.de; a=ed25519; pk=aoQfinjbnr265vCkIZdYteLDcmIqLBhY1m74WfFUU9E= X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240201_100720_168129_5E20190D X-CRM114-Status: UNSURE ( 9.89 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Those functions are need for the rockchip_rust.rs implementation. Added functions: genphy_config_aneg config_init Getter functions for mdix and speed. Signed-off-by: Christina Quast --- rust/kernel/net/phy.rs | 31 +++++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) diff --git a/rust/kernel/net/phy.rs b/rust/kernel/net/phy.rs index e457b3c7cb2f..373a4d358e9f 100644 --- a/rust/kernel/net/phy.rs +++ b/rust/kernel/net/phy.rs @@ -95,6 +95,22 @@ pub fn phy_id(&self) -> u32 { unsafe { (*phydev).phy_id } } + /// Gets the current crossover of the PHY. + pub fn mdix(&self) -> u8 { + let phydev = self.0.get(); + // SAFETY: The struct invariant ensures that we may access + // this field without additional synchronization. + unsafe { (*phydev).mdix } + } + + /// Gets the speed of the PHY. + pub fn speed(&mut self) -> u32 { + let phydev = self.0.get(); + // SAFETY: The struct invariant ensures that we may access + // this field without additional synchronization. + unsafe { (*phydev).speed as u32 } + } + /// Gets the state of PHY state machine states. pub fn state(&self) -> DeviceState { let phydev = self.0.get(); @@ -300,6 +316,15 @@ pub fn genphy_read_abilities(&mut self) -> Result { // So it's just an FFI call. to_result(unsafe { bindings::genphy_read_abilities(phydev) }) } + + /// Writes BMCR + pub fn genphy_config_aneg(&mut self) -> Result { + let phydev = self.0.get(); + // SAFETY: `phydev` is pointing to a valid object by the type invariant of `Self`. + // So it's just an FFI call. + // second param = false => autoneg not requested + to_result(unsafe { bindings::__genphy_config_aneg(phydev, false) }) + } } /// Defines certain other features this PHY supports (like interrupts). @@ -583,6 +608,12 @@ fn soft_reset(_dev: &mut Device) -> Result { Err(code::ENOTSUPP) } + /// Called to initialize the PHY, + /// including after a reset + fn config_init(_dev: &mut Device) -> Result { + Err(code::ENOTSUPP) + } + /// Probes the hardware to determine what abilities it has. fn get_features(_dev: &mut Device) -> Result { Err(code::ENOTSUPP) From patchwork Thu Feb 1 18:07:00 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christina Quast X-Patchwork-Id: 13541599 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3F573C4828D for ; Thu, 1 Feb 2024 18:07:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References:Message-Id :MIME-Version:Subject:Date:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=gJ4uqDv7L9/9BIANbbffbtOhgYkFOlZ9A47xCt5N21I=; b=rDaX4BgMlq5Kd7 7qtky23x1Tv0J43BAj9yf7J7scTfp1udl/nf9jNErcJ7dFz+s8mhPXYRhe5t8gggBNh2Ijypx6O7P UkDHKNfm/gHrrpfaoQsGy8d0Inp37SA2K4X+9s0l68aj8zChKXMPIss/wS8bi7DWd0aJ6BoqxlUei Y/4FTcm4xryxSakuvg+AEmMQ3Y/qhUwJ6/FN75BLkesCxSew0hqfM48VfXtDq36aNhBe/kzZNtuOr PEyKQnGzVa+2Aj1OfmbhsrEVn8VGk7u9WnWPECBOrzpHp3lGs7qLpxDW8XYlCkYCsuO762/KS5T5s IQgFJ4kdhMTWHO/64qKA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rVbTH-00000008wLr-072n; Thu, 01 Feb 2024 18:07:31 +0000 Received: from mail.someserver.de ([116.202.193.223]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rVbTE-00000008wDA-0WtM; Thu, 01 Feb 2024 18:07:29 +0000 Received: from localhost (unknown [195.162.191.218]) by mail.someserver.de (Postfix) with ESMTPSA id F41BCA2267; Thu, 1 Feb 2024 19:07:17 +0100 (CET) From: Christina Quast Date: Thu, 01 Feb 2024 19:07:00 +0100 Subject: [PATCH v2 3/3] net: phy: add Rust Rockchip PHY driver MIME-Version: 1.0 Message-Id: <20240201-rockchip-rust-phy_depend-v2-3-c5fa4faab924@christina-quast.de> References: <20240201-rockchip-rust-phy_depend-v2-0-c5fa4faab924@christina-quast.de> In-Reply-To: <20240201-rockchip-rust-phy_depend-v2-0-c5fa4faab924@christina-quast.de> To: Miguel Ojeda , Alex Gaynor , Wedson Almeida Filho , Boqun Feng , Gary Guo , =?utf-8?q?Bj=C3=B6rn_Roy_Baron?= , Benno Lossin , Andreas Hindborg , Alice Ryhl , FUJITA Tomonori , Trevor Gross , Andrew Lunn , Heiner Kallweit , Russell King , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Heiko Stuebner Cc: rust-for-linux@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, Christina Quast X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=ed25519-sha256; t=1706810819; l=6330; i=contact@christina-quast.de; s=20240130; h=from:subject:message-id; bh=TIHsrpiXhvakc3QpotZKPzxEDzOuO24UX7NpNCsypps=; b=8X+Cl8CgP8FACgRIhTspxgnky8uPVFD6oK9+YPkEb03a9uYnKVWs2Fjil6lGl/w6frseON75r cp6NdHHykN+DubHZ8prPcfHHGD5OQHP108x7AX4hJtENdpJQ/MTXYUM X-Developer-Key: i=contact@christina-quast.de; a=ed25519; pk=aoQfinjbnr265vCkIZdYteLDcmIqLBhY1m74WfFUU9E= X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240201_100728_582856_1484C637 X-CRM114-Status: GOOD ( 15.10 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This is the Rust implementation of drivers/net/phy/rockchip.c. The features are equivalent. You can choose C or Rust version kernel configuration. Signed-off-by: Christina Quast --- drivers/net/phy/Kconfig | 8 +++ drivers/net/phy/Makefile | 4 ++ drivers/net/phy/rockchip_rust.rs | 131 +++++++++++++++++++++++++++++++++++++++ 3 files changed, 143 insertions(+) diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig index 9e2672800f0b..8b73edb7e836 100644 --- a/drivers/net/phy/Kconfig +++ b/drivers/net/phy/Kconfig @@ -362,6 +362,14 @@ config ROCKCHIP_PHY help Currently supports the integrated Ethernet PHY. +config ROCKCHIP_RUST_PHY + bool "Rust driver for Rockchip Ethernet PHYs" + depends on RUST_PHYLIB_ABSTRACTIONS && ROCKCHIP_PHY + help + Uses the Rust reference driver for Rockchip PHYs (rockchip_rust.ko). + The features are equivalent. It supports the integrated Ethernet PHY. + + config SMSC_PHY tristate "SMSC PHYs" select CRC16 diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile index 6097afd44392..045d2913bf2e 100644 --- a/drivers/net/phy/Makefile +++ b/drivers/net/phy/Makefile @@ -94,7 +94,11 @@ obj-$(CONFIG_NXP_TJA11XX_PHY) += nxp-tja11xx.o obj-$(CONFIG_QSEMI_PHY) += qsemi.o obj-$(CONFIG_REALTEK_PHY) += realtek.o obj-$(CONFIG_RENESAS_PHY) += uPD60620.o +ifdef CONFIG_ROCKCHIP_RUST_PHY +obj-$(CONFIG_ROCKCHIP_PHY) += rockchip_rust.o +else obj-$(CONFIG_ROCKCHIP_PHY) += rockchip.o +endif obj-$(CONFIG_SMSC_PHY) += smsc.o obj-$(CONFIG_STE10XP) += ste10Xp.o obj-$(CONFIG_TERANETICS_PHY) += teranetics.o diff --git a/drivers/net/phy/rockchip_rust.rs b/drivers/net/phy/rockchip_rust.rs new file mode 100644 index 000000000000..17a1f94da8c1 --- /dev/null +++ b/drivers/net/phy/rockchip_rust.rs @@ -0,0 +1,131 @@ +// SPDX-License-Identifier: GPL-2.0 +// Copyright (C) 2024 Christina Quast + +//! Rust Rockchip PHY driver +//! +//! C version of this driver: [`drivers/net/phy/rockchip.c`](./rockchip.c) +use kernel::{ + c_str, + net::phy::{self, DeviceId, Driver}, + prelude::*, + uapi, +}; + +kernel::module_phy_driver! { + drivers: [PhyRockchip], + device_table: [ + DeviceId::new_with_driver::(), + ], + name: "rust_asix_phy", + author: "FUJITA Tomonori ", + description: "Rust Asix PHYs driver", + license: "GPL", +} + + +const MII_INTERNAL_CTRL_STATUS: u16 = 17; +const SMI_ADDR_TSTCNTL: u16 = 20; +const SMI_ADDR_TSTWRITE: u16 = 23; + +const MII_AUTO_MDIX_EN: u16 = bit(7); +const MII_MDIX_EN: u16 = bit(6); + +const TSTCNTL_WR: u16 = bit(14) | bit(10); + +const TSTMODE_ENABLE: u16 = 0x400; +const TSTMODE_DISABLE: u16 = 0x0; + +const WR_ADDR_A7CFG: u16 = 0x18; + +struct PhyRockchip; + +impl PhyRockchip { + /// Helper function for helper_integrated_phy_analog_init + fn helper_init_tstmode(dev: &mut phy::Device) -> Result { + // Enable access to Analog and DSP register banks + dev.write(SMI_ADDR_TSTCNTL, TSTMODE_ENABLE)?; + dev.write(SMI_ADDR_TSTCNTL, TSTMODE_DISABLE)?; + dev.write(SMI_ADDR_TSTCNTL, TSTMODE_ENABLE) + } + + /// Helper function for helper_integrated_phy_analog_init + fn helper_close_tstmode(dev: &mut phy::Device) -> Result { + dev.write(SMI_ADDR_TSTCNTL, TSTMODE_DISABLE) + } + + /// Helper function for rockchip_config_init + fn helper_integrated_phy_analog_init(dev: &mut phy::Device) -> Result { + Self::helper_init_tstmode(dev)?; + dev.write(SMI_ADDR_TSTWRITE, 0xB)?; + dev.write(SMI_ADDR_TSTCNTL, TSTCNTL_WR | WR_ADDR_A7CFG)?; + Self::helper_close_tstmode(dev) + } + + /// Helper function for config_init + fn helper_config_init(dev: &mut phy::Device) -> Result { + let val = !MII_AUTO_MDIX_EN & dev.read(MII_INTERNAL_CTRL_STATUS)?; + dev.write(MII_INTERNAL_CTRL_STATUS, val)?; + Self::helper_integrated_phy_analog_init(dev) + } + + fn helper_set_polarity(dev: &mut phy::Device, polarity: u8) -> Result { + let reg = !MII_AUTO_MDIX_EN & dev.read(MII_INTERNAL_CTRL_STATUS)?; + let val = match polarity as u32 { + // status: MDI; control: force MDI + uapi::ETH_TP_MDI => Some(reg & !MII_MDIX_EN), + // status: MDI-X; control: force MDI-X + uapi::ETH_TP_MDI_X => Some(reg | MII_MDIX_EN), + // uapi::ETH_TP_MDI_AUTO => control: auto-select + // uapi::ETH_TP_MDI_INVALID => status: unknown; control: unsupported + _ => None, + }; + if let Some(v) = val { + if v != reg { + return dev.write(MII_INTERNAL_CTRL_STATUS, v); + } + } + Ok(()) + + } +} + +#[vtable] +impl Driver for PhyRockchip { + const FLAGS: u32 = 0; + const NAME: &'static CStr = c_str!("Rockchip integrated EPHY"); + const PHY_DEVICE_ID: DeviceId = DeviceId::new_with_custom_mask(0x1234d400, 0xfffffff0); + + fn link_change_notify(dev: &mut phy::Device) { + // If mode switch happens from 10BT to 100BT, all DSP/AFE + // registers are set to default values. So any AFE/DSP + // registers have to be re-initialized in this case. + if dev.state() == phy::DeviceState::Running && dev.speed() == uapi::SPEED_100 { + if let Err(e) = Self::helper_integrated_phy_analog_init(dev) { + pr_err!("rockchip: integrated_phy_analog_init err: {:?}", e); + } + } + } + + fn soft_reset(dev: &mut phy::Device) -> Result { + dev.genphy_soft_reset() + } + + fn config_init(dev: &mut phy::Device) -> Result { + PhyRockchip::helper_config_init(dev) + } + + fn config_aneg(dev: &mut phy::Device) -> Result { + PhyRockchip::helper_set_polarity(dev, dev.mdix())?; + dev.genphy_config_aneg() + } + + fn suspend(dev: &mut phy::Device) -> Result { + dev.genphy_suspend() + } + + fn resume(dev: &mut phy::Device) -> Result { + let _ = dev.genphy_resume(); + + PhyRockchip::helper_config_init(dev) + } +}