From patchwork Sun Feb 4 09:03:36 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Siddharth Vadapalli X-Patchwork-Id: 13544582 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E983AC4828F for ; Sun, 4 Feb 2024 09:04:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:Subject:CC :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=NNBd4aaXwfHhGwf4cuZZfOGbvfbT7GVkdpj9kuJfJ4g=; b=OWFewK2cWN5OJw 9wGYuz62W5OaNkgL3h673sZIQaPz4zmb/NAClQTPekN7P0ikIWyRXZQRGbRli0EPKuhNdMKuAzo4T uDI/mRiGNynoocXHdIGedx9pfCy+Dn4peIuBaYOFJweT5jot3X6VOIMlkI7NtMz0ig1G1WhQhbkpN O1/9GCn4ysn1A7HnRH9owFjIXWHeEcgLh6x04T++/E6CkJOfEUbytAZ8wbvNijKJ7rzd3m+29CRKP O9qP6ovDg9LebQzm0HRbxGKmHdk8G5IgrJUIfjKxjIOUR1bCQh21rLoI6ha3QOp/bHIUUWeYuI6bd fnCWC3Gms27DwGKab8eA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rWYPr-00000000SDk-1hLs; Sun, 04 Feb 2024 09:03:55 +0000 Received: from fllv0016.ext.ti.com ([198.47.19.142]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rWYPn-00000000SDD-3AQq for linux-arm-kernel@lists.infradead.org; Sun, 04 Feb 2024 09:03:53 +0000 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 41493eVh075412; Sun, 4 Feb 2024 03:03:40 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1707037420; bh=d7UPPrPOD40sPgSNdfcsyxepCid0SjSq84tpHp7IiJ8=; h=From:To:CC:Subject:Date; b=pgjn5A/AtQAEpw7f0PqQtCKLLwKjl/gHnRwDqsYnNm7lw+oO0W0WTgu6SlreuFudL 5rTPeA3nEGELzQbYOOkiBrQTDoDiOjceq9D8bHl5scB5EXX2rX/X7EN3VF+f3U5FMs nwA6TCxOY47Sp95auTeFk/0H4Nidw+E3kwbTfows= Received: from DLEE107.ent.ti.com (dlee107.ent.ti.com [157.170.170.37]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 41493eXV005601 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Sun, 4 Feb 2024 03:03:40 -0600 Received: from DLEE105.ent.ti.com (157.170.170.35) by DLEE107.ent.ti.com (157.170.170.37) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Sun, 4 Feb 2024 03:03:40 -0600 Received: from lelvsmtp6.itg.ti.com (10.180.75.249) by DLEE105.ent.ti.com (157.170.170.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Sun, 4 Feb 2024 03:03:40 -0600 Received: from uda0492258.dhcp.ti.com (uda0492258.dhcp.ti.com [172.24.227.9]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 41493a97125185; Sun, 4 Feb 2024 03:03:37 -0600 From: Siddharth Vadapalli To: , , , CC: , , , , , Subject: [PATCH v2] dt-bindings: mfd: syscon: Add ti,j784s4-pcie-ctrl compatible Date: Sun, 4 Feb 2024 14:33:36 +0530 Message-ID: <20240204090336.3209063-1-s-vadapalli@ti.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240204_010351_957907_1BB29311 X-CRM114-Status: UNSURE ( 9.63 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The PCIE_CTRL registers within the CTRL_MMR space of TI's J784S4 SoC are used to configure the link speed, lane count and mode of operation of the respective PCIe instance. Add compatible for allowing the PCIe driver to obtain a regmap for the PCIE_CTRL register within the System Controller device-tree node in order to configure the PCIe instance accordingly. The Technical Reference Manual for J784S4 SoC with details of the PCIE_CTRL registers is available at: https://www.ti.com/lit/zip/spruj52 Signed-off-by: Siddharth Vadapalli Acked-by: Krzysztof Kozlowski --- Hello, This patch is based on linux-next tagged next-20240202. v1: https://lore.kernel.org/r/20240131112342.1300893-1-s-vadapalli@ti.com/ Changes since v1: - Changed compatible to be SoC specific. - Updated commit message to be SoC specific. Regards, Siddharth. Documentation/devicetree/bindings/mfd/syscon.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml index 084b5c2a2a3c..2376b612f94e 100644 --- a/Documentation/devicetree/bindings/mfd/syscon.yaml +++ b/Documentation/devicetree/bindings/mfd/syscon.yaml @@ -73,6 +73,7 @@ properties: - rockchip,rv1126-qos - starfive,jh7100-sysmain - ti,am654-dss-oldi-io-ctrl + - ti,j784s4-pcie-ctrl - const: syscon