From patchwork Mon Feb 5 17:55:28 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 13545955 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id EAA4FC48292 for ; Mon, 5 Feb 2024 17:55:46 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id A917E10FAA9; Mon, 5 Feb 2024 17:55:41 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.b="f03hKT1c"; dkim-atps=neutral Received: from mail-wm1-f49.google.com (mail-wm1-f49.google.com [209.85.128.49]) by gabe.freedesktop.org (Postfix) with ESMTPS id 0CB2710FAA0 for ; Mon, 5 Feb 2024 17:55:39 +0000 (UTC) Received: by mail-wm1-f49.google.com with SMTP id 5b1f17b1804b1-40fdffc3831so1982755e9.1 for ; Mon, 05 Feb 2024 09:55:38 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1707155737; x=1707760537; darn=lists.freedesktop.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=szbyE8B5HmerWTS9QCGM8GNA9TtBAZ10zn0t2kxJOBs=; b=f03hKT1c83NYp5e3AMpRO6AiTaJE5TmIbbtpvmmrIVH5wzxwj2nFhk1kTUcXZtAUWO AD7xx/h72DJFcjNdR4lTA9PZHeYQDqx6s+YAxrzDnKkCja7xvu0xD8JXhhwINPxZDvXO dzxm85C6NnW0Dz9hQmPIO81FhEjFrkMqwUsP43A/av6ggBr/z498npMirzmKqtyF+Gty 64jOdQ9/aaRFXYkQi5JN3lrVtf4SmVuYwc4caiaGnRhUwuJUKeABhKKoUrjPlbcOV7kI Qo3249MrD0Wq38Yvm2/fZDQT85o0bU0SqEGh41k3WzX2S9nTunEZPjtrHOIfq7ub+NlR JuVg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1707155737; x=1707760537; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=szbyE8B5HmerWTS9QCGM8GNA9TtBAZ10zn0t2kxJOBs=; b=ANIiJRFrYmkPBRjKDX/mYjAem4dBJahOHdAhLWQcgXHG7+jT7oELsOMLeI45OWkIge VN3i7cnZKwZ90vVaMrPL4Ai1aLje+2vjfccVUcEvsj6gtDhkbhHATdmtxv+XoXktcJ96 o/gut3xBxlFxvM2acLeAnsHBVBH9WO/vKqgfMQQV5lcg7PsfnVK2tcD27yABiB0f6iEd 9khz0MrmLxTNv+E3EPTzYDztbqkDlhMnxDPTOndmev54xm0tsA8sd6gaUMSWVstu1OJw dbAN4YP/4PXtCB8y+L/wfBp8DmK1uI/plsEV1D7MRTkkgsrgJGJsrgBRqdrbZoS6PYcL G8NA== X-Gm-Message-State: AOJu0YzMIEGcpUJQSInLY2/Pc2jbuFScqBC0Lxjidg3LEWd/7cv/EOPh BJ2QTOb5F2PItDuR3WKYBztcaNUc1RMXvuhOThdFAhxaTtKEyJtTm9jI2ma8ncI= X-Google-Smtp-Source: AGHT+IHzPv5LMbjyU60gsDCwrFazyTvvle25BDscy8+ByFFpC7e2TQ4l8+2KODtVkD57MCSsp9Hdug== X-Received: by 2002:a05:6000:d8a:b0:33b:3fe8:640e with SMTP id dv10-20020a0560000d8a00b0033b3fe8640emr155686wrb.16.1707155737401; Mon, 05 Feb 2024 09:55:37 -0800 (PST) X-Forwarded-Encrypted: i=0; AJvYcCVM50fTjxTu0/xwr/5kMMi/SDP0CggyLV2aA//oJFKPwxW7n64dPykTFS0U9qE8rqv5Sc/wDNjmK5Dq9fhxmoYnuFCF+VNi7IcUqwGxpB/1zS7cXPmMA15BKXOJVHCm7iPpCaiCFeORxD9HGhs5r3BVQ9MhzlY8ON6S0mE8bX9WlRzQjbTkCChDcXOeBYMT8rxOHkKSHgxVeYqrri9eeZnV2vbdtGFeIZOTrA3g386MnQLa74//9u3PcDlop3CFKicmbz4dFvVhr4o3OdheJkOj47cv1KhZfLNbfX19XTqvbAQcSvBOL88AtC+hod0RPb9fd3NblrYr3gYEqFecREA+N9EvwrJezbA+7o8fojrD3FIOMfQA0JHcPBF7orMpL1Y3cZ5BR9rrrb89Hxp1N2BJavlEbeuECXI+KyY2jRIe7ImTf0M9xK5wXezlFUWfva3mbhYeSKV140KgIuR6ecCBmN5Vg47pE5mplktNY3zkWTXKu6FDYQTLxNTpDfcUzcgLbiaCJYD/S7F+sFuZauZYMpCb4uUutOpkAhiQcEf59b8M6G5ynRfib0V3u58hDb8EVMXFWN/jp0h9oul/N+m22WV4SJa5/fi27fJAncxu8cf6RZmuzknLNRdwiKjCn0zQO2QMO4Bg/DPq5SVlrIQc/FFpcLaGvwXJJQ3x4ckF69ArauH5I7OwGmsY/Dm+J/nwfslGfDcjnICd7be+YGN5W+BMGd0zcO0o57F/ngCUjVbSpPXJMomej1CG/T+TLYfeWH5WxcwVEJc8r7IDlBMYgjNIebA9GwGhQcrO Received: from arrakeen.starnux.net ([2a01:e0a:982:cbb0:52eb:f6ff:feb3:451a]) by smtp.gmail.com with ESMTPSA id je16-20020a05600c1f9000b0040ee8765901sm517556wmb.43.2024.02.05.09.55.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 05 Feb 2024 09:55:37 -0800 (PST) From: Neil Armstrong Date: Mon, 05 Feb 2024 18:55:28 +0100 Subject: [PATCH v10 1/7] dt-bindings: arm: amlogic: Document the MNT Reform 2 CM4 adapter with a BPI-CM4 Module MIME-Version: 1.0 Message-Id: <20240205-amlogic-v6-4-upstream-dsi-ccf-vim3-v10-1-dc06073d5330@linaro.org> References: <20240205-amlogic-v6-4-upstream-dsi-ccf-vim3-v10-0-dc06073d5330@linaro.org> In-Reply-To: <20240205-amlogic-v6-4-upstream-dsi-ccf-vim3-v10-0-dc06073d5330@linaro.org> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Kevin Hilman , Jerome Brunet , Michael Turquette , Stephen Boyd , Martin Blumenstingl , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter , Nicolas Belin , Jagan Teki Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, dri-devel@lists.freedesktop.org, Neil Armstrong , Conor Dooley X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=886; i=neil.armstrong@linaro.org; h=from:subject:message-id; bh=dsHeljQP++qeke1zASpQ3YPnuH6eGTAu4r6z8mvmrbM=; b=owEBbQKS/ZANAwAKAXfc29rIyEnRAcsmYgBlwSETaOGV/LfGvPj9RkwIO8SpqVlmJ5bu/JPHvBxw MhoMyGSJAjMEAAEKAB0WIQQ9U8YmyFYF/h30LIt33NvayMhJ0QUCZcEhEwAKCRB33NvayMhJ0UlYD/ 9D5EgwF9dY0ePJOrDxc0L/pBLl3YvRvByoSAHYyvlLebG1LealyXE13WkrJPxKU2gxouPPprPZoSg7 xV2Cmd5Ci3GvXtq/VBV5zMQOXmvtORdpoKgYhFB0+P8L+ttJHXyH+X8QhaDyfefFOr2zexMrmoEDf2 EtjTA/3rGN9AOpi7bOr9FxtyR3/kgAN6unsXB0W622z0QDAK110rj4ITdGXemGRgomf11zjk4fyvpf IKkCct4yYWkopzIKn8HXVU1ETWmrB8ovYPIGENVEn2b2o2fj0VLXai9mUhU88O/PIlUVaoQ+V7jY9a MNV+Md/lM9z4lQlHEjABIHPMtMipSJqkxFUN5SdKnTP/ovZpZu68S3XKCf/8f42zLwbiXtVz3qyeCw BX95wWutuiELlGhLkxYoB87jlFl0VzRce1lASTpG0BtlTWUInPiMHVgW6Ws4DbkrYD4WL/VhdieM+T Yykb94ImYEKlvsVGMpkyojwJ7H1gyeZrXRpTafAc16tdBH77g2D1Ev8X11FrgQaI89mmL4zEENO+pM GqfEggf444uxQs3HuyFDX9fdCepIaIKOSCXhkHh+S4niRQPbtev0i3ZGw9yh+BM4Yae+erHyobbvbA 08bciuZ5EXewIPkwV7zyBR28akMd5/uA8UA0WFFxskAkp+NjyF3maME9d2IQ== X-Developer-Key: i=neil.armstrong@linaro.org; a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The MNT Reform 2 CM4 adapter can be populated with any Raspberry Pi CM4 compatible module such as a BPI-CM4 Module, document that. Acked-by: Conor Dooley Signed-off-by: Neil Armstrong --- Documentation/devicetree/bindings/arm/amlogic.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/amlogic.yaml b/Documentation/devicetree/bindings/arm/amlogic.yaml index caab7ceeda45..2154a4614fda 100644 --- a/Documentation/devicetree/bindings/arm/amlogic.yaml +++ b/Documentation/devicetree/bindings/arm/amlogic.yaml @@ -164,6 +164,7 @@ properties: items: - enum: - bananapi,bpi-cm4io + - mntre,reform2-cm4 - const: bananapi,bpi-cm4 - const: amlogic,a311d - const: amlogic,g12b From patchwork Mon Feb 5 17:55:29 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 13545957 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 28316C48292 for ; Mon, 5 Feb 2024 17:55:52 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 9F24310FB2F; Mon, 5 Feb 2024 17:55:43 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.b="ChwpUKup"; dkim-atps=neutral Received: from mail-wm1-f47.google.com (mail-wm1-f47.google.com [209.85.128.47]) by gabe.freedesktop.org (Postfix) with ESMTPS id 6A1E110FAA9 for ; Mon, 5 Feb 2024 17:55:40 +0000 (UTC) Received: by mail-wm1-f47.google.com with SMTP id 5b1f17b1804b1-40fccd09082so22985255e9.2 for ; Mon, 05 Feb 2024 09:55:40 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1707155739; x=1707760539; darn=lists.freedesktop.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=7IUPR9d02dtJIVzX3UuZrrXfP4OKmNv4PgS6wUBZYrw=; b=ChwpUKupXocEZwNkCv7kUz5YE5ebUeS8f6oUp7klES9viEDFJyKb/LHYAkv1g52J1d M0EX6829hDRhWPlhwvVvsIcndD/Gfzd2S6BCHOIdCEtIR1nNM+LTUUJb0Vi/jns3DguJ 4gLdYbwyxuGESmTCaNmdrcGiB90i/Y2Rxas2dledUIl0X15WrWW4VhSGcDd7GeDQ2d5v nGx2FLOzGQzz1Luf9UqnX07OxRwkpkYOMbfOLGbL4lZ+hz+x3T4liJZP1Gh+2LPisbmC PGN8xE1/8JYTBl5jWY0JbTICPK5FN/7V4jPIU2PcbCVvbVzalHdHbQCxeAaizS9bCYj8 7NyA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1707155739; x=1707760539; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=7IUPR9d02dtJIVzX3UuZrrXfP4OKmNv4PgS6wUBZYrw=; b=VvyTmC+CezCHz/rjhVblPfVmo4A8uoaczgwMqUQK1cJLxBs2ovFnr0jb5bN2fKnEh3 4Y7FKLqGc3C1oSXFHKHxWPjF2zSg2cDGTymKo6kBVANnVcB2lxWQ0oJBJDBCTxiVRgBy +Q9NkBkJALMXDsW8AapttyjP5tqEuHhytb6I5g3YYnU1vFXl/rdkSHqlLXvisyOFIk69 58gJE8LN3Qm4hhcNKFlXFHTTLZEbz+KdG/iFFEN3mbU1jjKn+m8lVvn68s/3qmmATQNV z932aKkq2RrGTB840QFUAuhHl0XGyrv+cIT3kpwUImFmCpOwK/gelIrzSHsdIcmxuHkJ 5SMQ== X-Gm-Message-State: AOJu0YzU7PE60g3G5A+qSwEGRWlnQADPuzfLsuKeMlhoRPmkUD8zB4wo 1WztD3kQHpf4th2qMgENPM91oO2D7Hyar3wSVEYYlu2TieshjOx2lnEAZ2q6Igo= X-Google-Smtp-Source: AGHT+IFN+yLUedhPaehLL/1exsFXa45xhACL3vqMCYezZMmd83Xo2s/0ZMKZ8kYdbpOQcQpnJ5AsgA== X-Received: by 2002:a05:600c:2255:b0:40e:fa6b:f355 with SMTP id a21-20020a05600c225500b0040efa6bf355mr359245wmm.41.1707155738856; Mon, 05 Feb 2024 09:55:38 -0800 (PST) X-Forwarded-Encrypted: i=0; AJvYcCXbtuxgYZnfxxF4ZBOxrecZd8vN1RFObCsvN4VGJBdjPqpMMpsJWbmmcBoO9T+cZeYeXGql16IsaeRKHFSO8Psd261DswqFLP4TxLNw8Y7hOoiYtyHRzZHwMIRFVb8IF0VswUblhJduwp00X/uSHcngOk65+1JzCgJ8j84EpMdyKO4P1FdipzjrCzoylVtmE8GORsgl/ITCO54DXfHistXo7GXQo5tpZARko6qVN2L3RNgxvoCFsnrSBdDbR7Ju1B6CQi2mJKDOlNPMNNd+qaGho6nkLDo/YKWmcOGtdSwocllDySDHYcYTaup6Pgs8JK6E0ZzwQ9DUyc+n3wLzSoR0h9laTzDiNghXEv6jAW7oPb6hiXDuaXqp/ibQGoTFiae8nIe1y2RQ/EkANc3E0B6p35PMVgaNBiS1Nas/MEOciOBRu8clyn3htN1KyJmwwyDZeQxmq0DXjBbX5+920N3HksNuQZ1BjqcKMaqGWu3ttCXecWrqWUCHai3iluuA8xobqbsZTNlwn8cZa3xNV9/RYc1YamycMLaM5t5GOxcALQsiBm9KfCOOvhvLSRmNbibIezI0jVQclvsSfFpI2RBep2Le4uYm0nSUptaCDhF06Kb7yJ9GvsX95WKd5AJ+pYeDqSyZ1nZ+JduNGNhUCw0GjvGqTs7TP/K6/AdfZEUIV9mQcLGCwa1kNEXsjBR1ZY1mV1f1zbcHvMsxgzj4eMlyLQvGhTP5i0SxDLi46QLy/kFEcuYQfHuSyBIZxUtB8do= Received: from arrakeen.starnux.net ([2a01:e0a:982:cbb0:52eb:f6ff:feb3:451a]) by smtp.gmail.com with ESMTPSA id je16-20020a05600c1f9000b0040ee8765901sm517556wmb.43.2024.02.05.09.55.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 05 Feb 2024 09:55:38 -0800 (PST) From: Neil Armstrong Date: Mon, 05 Feb 2024 18:55:29 +0100 Subject: [PATCH v10 2/7] clk: meson: add vclk driver MIME-Version: 1.0 Message-Id: <20240205-amlogic-v6-4-upstream-dsi-ccf-vim3-v10-2-dc06073d5330@linaro.org> References: <20240205-amlogic-v6-4-upstream-dsi-ccf-vim3-v10-0-dc06073d5330@linaro.org> In-Reply-To: <20240205-amlogic-v6-4-upstream-dsi-ccf-vim3-v10-0-dc06073d5330@linaro.org> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Kevin Hilman , Jerome Brunet , Michael Turquette , Stephen Boyd , Martin Blumenstingl , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter , Nicolas Belin , Jagan Teki Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, dri-devel@lists.freedesktop.org, Neil Armstrong X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=7703; i=neil.armstrong@linaro.org; h=from:subject:message-id; bh=Smlla1YZJOXz+za+ZZXCQUR8f4zJcKmwkP7WPfkHnjw=; b=owEBbQKS/ZANAwAKAXfc29rIyEnRAcsmYgBlwSEU8tOZQkTdCjVssb54fByFS/vJM4zBoexrCGED yegbuuuJAjMEAAEKAB0WIQQ9U8YmyFYF/h30LIt33NvayMhJ0QUCZcEhFAAKCRB33NvayMhJ0RluEA Ccp5IfaBOMWkzrq1HuMxujWIGePdsjqNJ4tL4+GNdykxafMPQQ8vqi5HnZ+O3Q0MJe3YUyhkUyibVH JvFPMnKYPHSWxiY0UypgLQg9f6Hd6hKveiGSBHjUAQ7hrMCD/XDNWf8/x6XuuqZhW9pUOjc4WC5Fb+ zszbRxr1z5y+sPthUyT8zGZnCyiU/cXcq1SgnIXxHnG2Zovv5Z9INvZPLPGL7/oZqD3WvVbRdYFda1 5WsFRRPY/meR6Dx1y1iUd1KyZs1BJfR6eSmGD23GnYpB0cWUngu8hz8E0Uf6UA/We6M/zSfLTVU5iw 4CUHIIqUbXpu1OWTNT2j8TwUSWO6/i1PFO8fNwrC6Wby29NzloW0t/0z8mxHO92Z6c8UjzggB1MSYj O9EImIqNI3dmGqm8hl6qd4w7M3lPbgXfKayuMTK8clFEU3szCDh+tEdoLC0HS/XlzemASxik6mg1kK BoeDLoO5jNG6eM//ITPhYmNvpUO0H2EO2rBVqnFyMFWUakOVngUb5RqqMrdYcia5esrhOrDFBg8RNr UVSFoQbzDzx2/etjhH1KNf6iDpNkXNdabOb+Z+X3cmTuofJCfl0ZG9dkOjpUeorbca1YRW8Quxtci/ 2dEmw70wVop+RAwIBjqi1WDHcQT8nEwZ+YhcFHGae5/skwfIPjSZT4+PWsQw== X-Developer-Key: i=neil.armstrong@linaro.org; a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The VCLK and VCLK_DIV clocks have supplementary bits. The VCLK gate has a "SOFT RESET" bit to toggle after the whole VCLK sub-tree rate has been set, this is implemented in the gate enable callback. The VCLK_DIV clocks as enable and reset bits used to disable and reset the divider, associated with CLK_SET_RATE_GATE it ensures the rate is set while the divider is disabled and in reset mode. The VCLK_DIV enable bit isn't implemented as a gate since it's part of the divider logic and vendor does this exact sequence to ensure the divider is correctly set. Signed-off-by: Neil Armstrong --- drivers/clk/meson/Kconfig | 4 ++ drivers/clk/meson/Makefile | 1 + drivers/clk/meson/vclk.c | 141 +++++++++++++++++++++++++++++++++++++++++++++ drivers/clk/meson/vclk.h | 51 ++++++++++++++++ 4 files changed, 197 insertions(+) diff --git a/drivers/clk/meson/Kconfig b/drivers/clk/meson/Kconfig index 29ffd14d267b..8a9823789fa3 100644 --- a/drivers/clk/meson/Kconfig +++ b/drivers/clk/meson/Kconfig @@ -30,6 +30,10 @@ config COMMON_CLK_MESON_VID_PLL_DIV tristate select COMMON_CLK_MESON_REGMAP +config COMMON_CLK_MESON_VCLK + tristate + select COMMON_CLK_MESON_REGMAP + config COMMON_CLK_MESON_CLKC_UTILS tristate diff --git a/drivers/clk/meson/Makefile b/drivers/clk/meson/Makefile index 9ee4b954c896..9ba43fe7a07a 100644 --- a/drivers/clk/meson/Makefile +++ b/drivers/clk/meson/Makefile @@ -12,6 +12,7 @@ obj-$(CONFIG_COMMON_CLK_MESON_PLL) += clk-pll.o obj-$(CONFIG_COMMON_CLK_MESON_REGMAP) += clk-regmap.o obj-$(CONFIG_COMMON_CLK_MESON_SCLK_DIV) += sclk-div.o obj-$(CONFIG_COMMON_CLK_MESON_VID_PLL_DIV) += vid-pll-div.o +obj-$(CONFIG_COMMON_CLK_MESON_VCLK) += vclk.o # Amlogic Clock controllers diff --git a/drivers/clk/meson/vclk.c b/drivers/clk/meson/vclk.c new file mode 100644 index 000000000000..3ea813a0a995 --- /dev/null +++ b/drivers/clk/meson/vclk.c @@ -0,0 +1,141 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2024 Neil Armstrong + */ + +#include +#include "vclk.h" + +/* The VCLK gate has a supplementary reset bit to pulse after ungating */ + +static inline struct meson_vclk_gate_data * +clk_get_meson_vclk_gate_data(struct clk_regmap *clk) +{ + return (struct meson_vclk_gate_data *)clk->data; +} + +static int meson_vclk_gate_enable(struct clk_hw *hw) +{ + struct clk_regmap *clk = to_clk_regmap(hw); + struct meson_vclk_gate_data *vclk = clk_get_meson_vclk_gate_data(clk); + + meson_parm_write(clk->map, &vclk->enable, 1); + + /* Do a reset pulse */ + meson_parm_write(clk->map, &vclk->reset, 1); + meson_parm_write(clk->map, &vclk->reset, 0); + + return 0; +} + +static void meson_vclk_gate_disable(struct clk_hw *hw) +{ + struct clk_regmap *clk = to_clk_regmap(hw); + struct meson_vclk_gate_data *vclk = clk_get_meson_vclk_gate_data(clk); + + meson_parm_write(clk->map, &vclk->enable, 0); +} + +static int meson_vclk_gate_is_enabled(struct clk_hw *hw) +{ + struct clk_regmap *clk = to_clk_regmap(hw); + struct meson_vclk_gate_data *vclk = clk_get_meson_vclk_gate_data(clk); + + return meson_parm_read(clk->map, &vclk->enable); +} + +const struct clk_ops meson_vclk_gate_ops = { + .enable = meson_vclk_gate_enable, + .disable = meson_vclk_gate_disable, + .is_enabled = meson_vclk_gate_is_enabled, +}; +EXPORT_SYMBOL_GPL(meson_vclk_gate_ops); + +/* The VCLK Divider has supplementary reset & enable bits */ + +static inline struct meson_vclk_div_data * +clk_get_meson_vclk_div_data(struct clk_regmap *clk) +{ + return (struct meson_vclk_div_data *)clk->data; +} + +static unsigned long meson_vclk_div_recalc_rate(struct clk_hw *hw, + unsigned long prate) +{ + struct clk_regmap *clk = to_clk_regmap(hw); + struct meson_vclk_div_data *vclk = clk_get_meson_vclk_div_data(clk); + + return divider_recalc_rate(hw, prate, meson_parm_read(clk->map, &vclk->div), + vclk->table, vclk->flags, vclk->div.width); +} + +static int meson_vclk_div_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) +{ + struct clk_regmap *clk = to_clk_regmap(hw); + struct meson_vclk_div_data *vclk = clk_get_meson_vclk_div_data(clk); + + return divider_determine_rate(hw, req, vclk->table, vclk->div.width, + vclk->flags); +} + +static int meson_vclk_div_set_rate(struct clk_hw *hw, unsigned long rate, + unsigned long parent_rate) +{ + struct clk_regmap *clk = to_clk_regmap(hw); + struct meson_vclk_div_data *vclk = clk_get_meson_vclk_div_data(clk); + int ret; + + ret = divider_get_val(rate, parent_rate, vclk->table, vclk->div.width, + vclk->flags); + if (ret < 0) + return ret; + + meson_parm_write(clk->map, &vclk->div, ret); + + return 0; +}; + +static int meson_vclk_div_enable(struct clk_hw *hw) +{ + struct clk_regmap *clk = to_clk_regmap(hw); + struct meson_vclk_div_data *vclk = clk_get_meson_vclk_div_data(clk); + + /* Unreset the divider when ungating */ + meson_parm_write(clk->map, &vclk->reset, 0); + meson_parm_write(clk->map, &vclk->enable, 1); + + return 0; +} + +static void meson_vclk_div_disable(struct clk_hw *hw) +{ + struct clk_regmap *clk = to_clk_regmap(hw); + struct meson_vclk_div_data *vclk = clk_get_meson_vclk_div_data(clk); + + /* Reset the divider when gating */ + meson_parm_write(clk->map, &vclk->enable, 0); + meson_parm_write(clk->map, &vclk->reset, 1); +} + +static int meson_vclk_div_is_enabled(struct clk_hw *hw) +{ + struct clk_regmap *clk = to_clk_regmap(hw); + struct meson_vclk_div_data *vclk = clk_get_meson_vclk_div_data(clk); + + return meson_parm_read(clk->map, &vclk->enable); +} + +const struct clk_ops meson_vclk_div_ops = { + .recalc_rate = meson_vclk_div_recalc_rate, + .determine_rate = meson_vclk_div_determine_rate, + .set_rate = meson_vclk_div_set_rate, + .enable = meson_vclk_div_enable, + .disable = meson_vclk_div_disable, + .is_enabled = meson_vclk_div_is_enabled, +}; +EXPORT_SYMBOL_GPL(meson_vclk_div_ops); + +MODULE_DESCRIPTION("Amlogic vclk clock driver"); +MODULE_AUTHOR("Neil Armstrong "); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/clk/meson/vclk.h b/drivers/clk/meson/vclk.h new file mode 100644 index 000000000000..20b0b181db09 --- /dev/null +++ b/drivers/clk/meson/vclk.h @@ -0,0 +1,51 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2024 Neil Armstrong + */ + +#ifndef __VCLK_H +#define __VCLK_H + +#include "clk-regmap.h" +#include "parm.h" + +/** + * struct meson_vclk_gate_data - vclk_gate regmap backed specific data + * + * @enable: vclk enable field + * @reset: vclk reset field + * @flags: hardware-specific flags + * + * Flags: + * Same as clk_gate except CLK_GATE_HIWORD_MASK which is ignored + */ +struct meson_vclk_gate_data { + struct parm enable; + struct parm reset; + u8 flags; +}; + +extern const struct clk_ops meson_vclk_gate_ops; + +/** + * struct meson_vclk_div_data - vclk_div regmap back specific data + * + * @div: divider field + * @enable: vclk divider enable field + * @reset: vclk divider reset field + * @table: array of value/divider pairs, last entry should have div = 0 + * + * Flags: + * Same as clk_divider except CLK_DIVIDER_HIWORD_MASK which is ignored + */ +struct meson_vclk_div_data { + struct parm div; + struct parm enable; + struct parm reset; + const struct clk_div_table *table; + u8 flags; +}; + +extern const struct clk_ops meson_vclk_div_ops; + +#endif /* __VCLK_H */ From patchwork Mon Feb 5 17:55:30 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 13545956 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CE4F9C48297 for ; Mon, 5 Feb 2024 17:55:49 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B30B010FB30; Mon, 5 Feb 2024 17:55:43 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.b="WIuN/WV9"; dkim-atps=neutral Received: from mail-wm1-f46.google.com (mail-wm1-f46.google.com [209.85.128.46]) by gabe.freedesktop.org (Postfix) with ESMTPS id B057110FAF3 for ; Mon, 5 Feb 2024 17:55:41 +0000 (UTC) Received: by mail-wm1-f46.google.com with SMTP id 5b1f17b1804b1-40fe00cb134so1814465e9.3 for ; Mon, 05 Feb 2024 09:55:41 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1707155740; x=1707760540; darn=lists.freedesktop.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=ZkiDF6CyURpbjnTnlPpjl05T1hEzDiWol01BVqEjgn0=; b=WIuN/WV9P3QBus9TcssyLax20ThbcYCqtgIh2toFF6IWEy0b0G2teRfisRoQQlIumC P58ma81D0JdI3aQ4dExn/PLQdkcLBOavNVeB59GNiRTFy5bMidwHIqvX126oQea9n58a 04maemJMZDJWmhBswfEye/qdzxjMEzcKdfPHkRia1bX2wrDStg7QJz3oQDs6yfAl8Ih5 8UH9ksU4tl/Lxir+w3Qd1Km7Anuz9yxlibqLQ0DN9VjX+IuVFC+xXrW2hML/e1/pUZ4K c/V6jYdJNWnvHakP40COTBZiUFNaXyxOvCoNEKPEShUtBKmtDIWSwjKfDJ8tB/mU0qjV qhlg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1707155740; x=1707760540; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ZkiDF6CyURpbjnTnlPpjl05T1hEzDiWol01BVqEjgn0=; b=KoB7pIisL9v8GIaDDJUKjNsh8tt8wzclBJxggocT7ZQ8W4Y1e2Rktlb5zLa1xvfMUF EB6DhAfSVbTc9GK1iJ2aTi11FRX8xH1VwYIWHV1Rf5JdrZQPzB1z2hsIKLATSpxbxKea NGtH/bif2OFRyoZ8tqHP4on0L6yhZ+dd52llLFfLX3m8jbl4xuHRINr6eeLqHOmUYde0 e8XopiOPp5Ao3A/1Ue/c+sOW6Pta5ebqKR+hSwBKodMInNlRFNtebXBhGh0Jfta3Oe2v nw2i1RZEw170lYXiqKLTQ7VB6WIaMdHpLgwj4V+3735fWtEoMhmwD90EKAg+L/2D/WYs fYwA== X-Gm-Message-State: AOJu0YyffN69m8hcdkj/Jb5rYedPCxYjo0L3vkgur/pinzJpZWnDvOqc 1cXa3uhIQ3uuI8mYOTElRiLh9eisTFWIbfJ9xM0S1hqTHboMlfl0mOnIrVESZTg= X-Google-Smtp-Source: AGHT+IETQBGHOnAagAgMuffwKFHFP8vTVTzJToIQcFvVHqE01f3YvEkn203TM64MOOaOv+xNt/Bd8w== X-Received: by 2002:a05:600c:5755:b0:40f:d2ff:85b1 with SMTP id jw21-20020a05600c575500b0040fd2ff85b1mr319812wmb.25.1707155740089; Mon, 05 Feb 2024 09:55:40 -0800 (PST) X-Forwarded-Encrypted: i=0; AJvYcCVZScdR35F1dmrk3FwTtHiaHAlXV3DYGNV3amdyK0nzRRy32zPD3lgfR+G/zrWFiyQi2uU8i1JBMpw82mqBUxqL4B+cIptkYNu5FE0sGlWP9Vugmaq6RjjYUbNF2MkPxuALgtJpy/AzQjsKup3xZbbavx4sAAG5ZkOYeo4EMEfUPBvY6Q8DRednB/dxtECyNJe3+eE33+tSoInBLWMR7dW8laSXHB6eH5izdleZfmCg/3ULfy1P2CmkCAcI0rad8QBfPiZQg0FaBKewCYag6VeEaS4bv+TAl/9886PI7JbK+EplM1tza6g/jjiMGSmfZfBiJM2pXvytC8PFr/1aEbujDhM5SJbP21ZLHCkw0EJ8GmLu/9wh/jx50gmcSjplloo/60MVx+Jof7x5PvAKfXWn9/FCslIOrtfMeqa0yc/W9GUt20jSUIHAK+hR95u6hwQ99uyIJUH9Vx469R/KTLCfoyFrLrl2L5+D/MnYF/Mk69GPrRi8QB9eJ7X+iWkICWStX8mZq+PSdHDMh5eptGoizSK9CRUASSgwKBsPNmzRli84UvKJgfiSPfVrQ8b91dRBeezHCCj7GbAxAuii0i9K9n5IibDI2afO0JinqEpv+keFl4pKSEYKOHUg18PgML1MrTH0xtoq1wBBPoE5luSeUsQ2tg1Az/v4gBVtI3Al+OyAeDy5DbhiMUci3G6BsT5CwTH5ZIxamyqKNJbY/wvHLg75CRVTD2MrnazxOni1YcPH+1kKLGqQXsVEVnrZUUo= Received: from arrakeen.starnux.net ([2a01:e0a:982:cbb0:52eb:f6ff:feb3:451a]) by smtp.gmail.com with ESMTPSA id je16-20020a05600c1f9000b0040ee8765901sm517556wmb.43.2024.02.05.09.55.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 05 Feb 2024 09:55:39 -0800 (PST) From: Neil Armstrong Date: Mon, 05 Feb 2024 18:55:30 +0100 Subject: [PATCH v10 3/7] clk: meson: g12a: make VCLK2 and ENCL clock path configurable by CCF MIME-Version: 1.0 Message-Id: <20240205-amlogic-v6-4-upstream-dsi-ccf-vim3-v10-3-dc06073d5330@linaro.org> References: <20240205-amlogic-v6-4-upstream-dsi-ccf-vim3-v10-0-dc06073d5330@linaro.org> In-Reply-To: <20240205-amlogic-v6-4-upstream-dsi-ccf-vim3-v10-0-dc06073d5330@linaro.org> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Kevin Hilman , Jerome Brunet , Michael Turquette , Stephen Boyd , Martin Blumenstingl , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter , Nicolas Belin , Jagan Teki Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, dri-devel@lists.freedesktop.org, Neil Armstrong X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=8195; i=neil.armstrong@linaro.org; h=from:subject:message-id; bh=hnsfiSsJKInr4JylyhW7C8X4DcUP5JxEtf5koT8x+g4=; b=owEBbQKS/ZANAwAKAXfc29rIyEnRAcsmYgBlwSEUk5CX06yo7N4kEWfDk4rTAYGmo9doFA7V9cBp dvDU6OiJAjMEAAEKAB0WIQQ9U8YmyFYF/h30LIt33NvayMhJ0QUCZcEhFAAKCRB33NvayMhJ0a8ED/ 4oP/DPfQe+plv8p72/ryqS4Dq8cSiowWNzJq6W0+obvJsrY6K57XJAGL0//PhbTfAOTx7T6CBfdJlx YaPO4GgWqnHAaJXbl2xEbAx2USsAdbcMcNr9JCE/VF+ARySMkvGY1ht0MxM+xSQJ6Zy5qbGUaSZ0eq tuFI44yyzajKydbZJvTN3toYMp8Q63eDuAoEPlN0YCV2d5NleMIfODBeR8xTuPFCkRgwUJHdhP3TWq /r8qkvi3P/ruWqJuxKxDJfg+dPFK1PpAwJDvXybIyi5a8zf+E9DOpW/SMF+3B1mxH0jPz3Ftnwo354 bEFFcUAG/U9GqDMidwsrLJ8Gyo1nAJUh9KuQUlrQjZIFUnFAvt1is2r3tUsiXM7lBZNTXLHnWjtxep 1hKr3SbA3R04Z9ZaeVIYHEGcHPRInc4aR8XNsEG0Afo5hCk63RBzmo0s6hMCC/zkcviJ04J2A4S6s/ zmE2Ok7xuoXJdA3oEHvGZg57XyuPvU2qSEp49phdlw4bjrIITC8CXsTgBeUKRTZDuwqM27zEU15Fii ++qHa044A7sR/zpWpb7YTBjzto+u9FNEtPfMtP1AUvwWE6KgVRPRRsvSLbkURjvVZq9CwKdzlrg616 1MXEsomMRMfnNTTAnrtKSZELyxtUeT0NeC9xjtTNNo6SAY5BuDPiyBDJuW/g== X-Developer-Key: i=neil.armstrong@linaro.org; a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" In order to setup the DSI clock, let's make the unused VCLK2 clock path configuration via CCF. The nocache option is removed from following clocks: - vclk2_sel - vclk2_input - vclk2_div - vclk2 - vclk_div1 - vclk2_div2_en - vclk2_div4_en - vclk2_div6_en - vclk2_div12_en - vclk2_div2 - vclk2_div4 - vclk2_div6 - vclk2_div12 - cts_encl_sel vclk2 and vclk2_div uses the newly introduced vclk regmap driver to handle the enable and reset bits. In order to set a rate on cts_encl via the vclk2 clock path, the NO_REPARENT flag is set on cts_encl_sel & vclk2_sel in order to keep CCF from selection a parent. The parents of cts_encl_sel & vclk2_sel are expected to be defined in DT or manually set by the display driver at some point. The following clock scheme is to be used for DSI: xtal \_ gp0_pll_dco \_ gp0_pll |- vclk2_sel | \_ vclk2_input | \_ vclk2_div | \_ vclk2 | \_ vclk2_div1 | \_ cts_encl_sel | \_ cts_encl -> to VPU LCD Encoder |- mipi_dsi_pxclk_sel \_ mipi_dsi_pxclk_div \_ mipi_dsi_pxclk -> to DSI controller The mipi_dsi_pxclk_div is set as bypass with a single /1 entry in div_table in order to use the same GP0 for mipi_dsi_pxclk and vclk2_input. The SET_RATE_PARENT is only set on the mipi_dsi_pxclk_sel clock so the DSI bitclock is the reference base clock to calculate the vclk2_div value when pixel clock is set on the cts_encl endpoint. Signed-off-by: Neil Armstrong --- drivers/clk/meson/Kconfig | 1 + drivers/clk/meson/g12a.c | 72 ++++++++++++++++++++++++++++++++++------------- 2 files changed, 53 insertions(+), 20 deletions(-) diff --git a/drivers/clk/meson/Kconfig b/drivers/clk/meson/Kconfig index 8a9823789fa3..59a40a49f8e1 100644 --- a/drivers/clk/meson/Kconfig +++ b/drivers/clk/meson/Kconfig @@ -144,6 +144,7 @@ config COMMON_CLK_G12A select COMMON_CLK_MESON_EE_CLKC select COMMON_CLK_MESON_CPU_DYNDIV select COMMON_CLK_MESON_VID_PLL_DIV + select COMMON_CLK_MESON_VCLK select MFD_SYSCON help Support for the clock controller on Amlogic S905D2, S905X2 and S905Y2 diff --git a/drivers/clk/meson/g12a.c b/drivers/clk/meson/g12a.c index 90f4c6103014..083882e53b65 100644 --- a/drivers/clk/meson/g12a.c +++ b/drivers/clk/meson/g12a.c @@ -22,6 +22,7 @@ #include "clk-regmap.h" #include "clk-cpu-dyndiv.h" #include "vid-pll-div.h" +#include "vclk.h" #include "meson-eeclk.h" #include "g12a.h" @@ -3165,7 +3166,7 @@ static struct clk_regmap g12a_vclk2_sel = { .ops = &clk_regmap_mux_ops, .parent_hws = g12a_vclk_parent_hws, .num_parents = ARRAY_SIZE(g12a_vclk_parent_hws), - .flags = CLK_SET_RATE_NO_REPARENT | CLK_GET_RATE_NOCACHE, + .flags = CLK_SET_RATE_NO_REPARENT, }, }; @@ -3193,7 +3194,6 @@ static struct clk_regmap g12a_vclk2_input = { .ops = &clk_regmap_gate_ops, .parent_hws = (const struct clk_hw *[]) { &g12a_vclk2_sel.hw }, .num_parents = 1, - .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, }, }; @@ -3215,19 +3215,32 @@ static struct clk_regmap g12a_vclk_div = { }; static struct clk_regmap g12a_vclk2_div = { - .data = &(struct clk_regmap_div_data){ - .offset = HHI_VIID_CLK_DIV, - .shift = 0, - .width = 8, + .data = &(struct meson_vclk_div_data){ + .div = { + .reg_off = HHI_VIID_CLK_DIV, + .shift = 0, + .width = 8, + }, + .enable = { + .reg_off = HHI_VIID_CLK_DIV, + .shift = 16, + .width = 1, + }, + .reset = { + .reg_off = HHI_VIID_CLK_DIV, + .shift = 17, + .width = 1, + }, + .flags = CLK_DIVIDER_ROUND_CLOSEST, }, .hw.init = &(struct clk_init_data){ .name = "vclk2_div", - .ops = &clk_regmap_divider_ops, + .ops = &meson_vclk_div_ops, .parent_hws = (const struct clk_hw *[]) { &g12a_vclk2_input.hw }, .num_parents = 1, - .flags = CLK_GET_RATE_NOCACHE, + .flags = CLK_SET_RATE_GATE, }, }; @@ -3246,16 +3259,24 @@ static struct clk_regmap g12a_vclk = { }; static struct clk_regmap g12a_vclk2 = { - .data = &(struct clk_regmap_gate_data){ - .offset = HHI_VIID_CLK_CNTL, - .bit_idx = 19, + .data = &(struct meson_vclk_gate_data){ + .enable = { + .reg_off = HHI_VIID_CLK_CNTL, + .shift = 19, + .width = 1, + }, + .reset = { + .reg_off = HHI_VIID_CLK_CNTL, + .shift = 15, + .width = 1, + }, }, .hw.init = &(struct clk_init_data) { .name = "vclk2", - .ops = &clk_regmap_gate_ops, + .ops = &meson_vclk_gate_ops, .parent_hws = (const struct clk_hw *[]) { &g12a_vclk2_div.hw }, .num_parents = 1, - .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, + .flags = CLK_SET_RATE_PARENT, }, }; @@ -3339,7 +3360,7 @@ static struct clk_regmap g12a_vclk2_div1 = { .ops = &clk_regmap_gate_ops, .parent_hws = (const struct clk_hw *[]) { &g12a_vclk2.hw }, .num_parents = 1, - .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, + .flags = CLK_SET_RATE_PARENT, }, }; @@ -3353,7 +3374,7 @@ static struct clk_regmap g12a_vclk2_div2_en = { .ops = &clk_regmap_gate_ops, .parent_hws = (const struct clk_hw *[]) { &g12a_vclk2.hw }, .num_parents = 1, - .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, + .flags = CLK_SET_RATE_PARENT, }, }; @@ -3367,7 +3388,7 @@ static struct clk_regmap g12a_vclk2_div4_en = { .ops = &clk_regmap_gate_ops, .parent_hws = (const struct clk_hw *[]) { &g12a_vclk2.hw }, .num_parents = 1, - .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, + .flags = CLK_SET_RATE_PARENT, }, }; @@ -3381,7 +3402,7 @@ static struct clk_regmap g12a_vclk2_div6_en = { .ops = &clk_regmap_gate_ops, .parent_hws = (const struct clk_hw *[]) { &g12a_vclk2.hw }, .num_parents = 1, - .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, + .flags = CLK_SET_RATE_PARENT, }, }; @@ -3395,7 +3416,7 @@ static struct clk_regmap g12a_vclk2_div12_en = { .ops = &clk_regmap_gate_ops, .parent_hws = (const struct clk_hw *[]) { &g12a_vclk2.hw }, .num_parents = 1, - .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, + .flags = CLK_SET_RATE_PARENT, }, }; @@ -3461,6 +3482,7 @@ static struct clk_fixed_factor g12a_vclk2_div2 = { &g12a_vclk2_div2_en.hw }, .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, }, }; @@ -3474,6 +3496,7 @@ static struct clk_fixed_factor g12a_vclk2_div4 = { &g12a_vclk2_div4_en.hw }, .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, }, }; @@ -3487,6 +3510,7 @@ static struct clk_fixed_factor g12a_vclk2_div6 = { &g12a_vclk2_div6_en.hw }, .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, }, }; @@ -3500,6 +3524,7 @@ static struct clk_fixed_factor g12a_vclk2_div12 = { &g12a_vclk2_div12_en.hw }, .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, }, }; @@ -3561,7 +3586,7 @@ static struct clk_regmap g12a_cts_encl_sel = { .ops = &clk_regmap_mux_ops, .parent_hws = g12a_cts_parent_hws, .num_parents = ARRAY_SIZE(g12a_cts_parent_hws), - .flags = CLK_SET_RATE_NO_REPARENT | CLK_GET_RATE_NOCACHE, + .flags = CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT, }, }; @@ -3717,15 +3742,22 @@ static struct clk_regmap g12a_mipi_dsi_pxclk_sel = { .ops = &clk_regmap_mux_ops, .parent_hws = g12a_mipi_dsi_pxclk_parent_hws, .num_parents = ARRAY_SIZE(g12a_mipi_dsi_pxclk_parent_hws), - .flags = CLK_SET_RATE_NO_REPARENT, + .flags = CLK_SET_RATE_NO_REPARENT | CLK_SET_RATE_PARENT, }, }; +/* Force as bypass by forcing a single /1 table entry, and not rely of boot value */ +static const struct clk_div_table g12a_mipi_dsi_pxclk_div_table[] = { + { .val = 0, .div = 1 }, + { /* sentinel */ }, +}; + static struct clk_regmap g12a_mipi_dsi_pxclk_div = { .data = &(struct clk_regmap_div_data){ .offset = HHI_MIPIDSI_PHY_CLK_CNTL, .shift = 0, .width = 7, + .table = g12a_mipi_dsi_pxclk_div_table, }, .hw.init = &(struct clk_init_data){ .name = "mipi_dsi_pxclk_div", From patchwork Mon Feb 5 17:55:31 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 13545961 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 956CEC48297 for ; Mon, 5 Feb 2024 17:55:58 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B864310FB3B; Mon, 5 Feb 2024 17:55:47 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.b="eu4X3fOG"; dkim-atps=neutral Received: from mail-wm1-f51.google.com (mail-wm1-f51.google.com [209.85.128.51]) by gabe.freedesktop.org (Postfix) with ESMTPS id 053CD10FB28 for ; Mon, 5 Feb 2024 17:55:43 +0000 (UTC) Received: by mail-wm1-f51.google.com with SMTP id 5b1f17b1804b1-40fdd65a9bdso7455075e9.2 for ; Mon, 05 Feb 2024 09:55:42 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1707155741; x=1707760541; darn=lists.freedesktop.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=/kTGO29vezq1Gc7J5O9OI72ko2OnA3sM69gX9LY6c8Y=; b=eu4X3fOGjFzkh+aYCkvKhQ+TbSmng7vyeyAGtXXYTRbph2O9aeixjawRtycO8RFapM Ef6tOmsSMNL6RzoM+FO8bKx6tzVtHDN7clmyIESH0MAhmdjtWnShQRKkx2hW01MmFSdx 5iLtoEhdKEoAAUUCVD4TQd9YAQDdevoWoVKoZU3bHgcBermVtbJ1okR2Nc8nLiSeOCz/ iNMG8rIhmtjiM3g88V9M0c7bYEE4THDNElqw1t246LApdufXbqGFzPHYN+KqvjIlS4Mo e0EvkCTt9GtGNVkao5DPS5VKRM/rK6N4WxkH+kxECxFYJmj7t4gXh/NqJn9Z3qiMB2xk FpGg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1707155741; x=1707760541; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=/kTGO29vezq1Gc7J5O9OI72ko2OnA3sM69gX9LY6c8Y=; b=U7Z71ovN1pr3TqtnQyBBr3jIdjwwsqFwZYrDblPhHF7wUNFN5UBArhPAOeDbtrf2qh l0vRZLsxiEYvfQP7VAGBYyShv2gNjque2i2DbVhOlAxX0g6KsCCk/wiSZmvfYwce3HDy CYi0zxX5oJES3UHHBEPcPqdZPfYUaEpfs/UKZNbcHtYiuJkvWcKq9hQDtcV5nF8B5Puq 2ReMDzipd+waZN/9R3tE4yHtRAo0JCKNDO6BGdC+JbI0m216Uumld9Jk+nDuoB+WOFs2 q0IBbbA9AklO2BJ8EAsff0dcAjvgVQwsAXyhGwMG5SO9u7ol3dTJYOqDDxbc//B8xWUd 8S3w== X-Gm-Message-State: AOJu0Yy/y2QaU1svqSRW5bPITdtYlV4BQ/r9HSEbW2IkdowwZAi5cISp CDXWSxTm+t4+lOxKiwKDtueTuMXkikv45LiVCkwdFg6J8uzRJJuckVx9mtZde5w= X-Google-Smtp-Source: AGHT+IFaTHgGhy9XHjQX3HZeB2JEULMM1CNBGC9GZqY1QPaVhgAIUfcH9PYMzLk1SOsavnXKC+2l+g== X-Received: by 2002:a05:600c:1c02:b0:40e:f67d:d5f9 with SMTP id j2-20020a05600c1c0200b0040ef67dd5f9mr355270wms.4.1707155741431; Mon, 05 Feb 2024 09:55:41 -0800 (PST) X-Forwarded-Encrypted: i=0; AJvYcCXv164Rb/MjNSq/GnHSz2slhbj77T70wXKz076hC/kAWvtWZyXcRewm4yYlOnItzMT+KxRBmLo7ILUP9U+uktRLSu+wywU9KC6I9zzfHukz82cZFIZUZ0crw8ZUQLUdif/0PUH1v/Qb7xyx9raAFJeQBvdGhsSAEQuLppe1OQlipq4cLsmGvgNgxdq6O4syZeQgHAk1oYfrgxgPSOv6U0IMrHoDO4z4FaP6pRhJJwc0+IuwTRG2tdTRBLFYGTqaAZHbvkXCcJV9iJM2BIqqDzVRr3JXV8SUx5pB3dSfC+BTyDbgb3OrFmBWNQ2S1qeRE46NRzyxELs3GKOBh4K4Kde2f/5uT53Fuvjl5E//8GSyjS17ZDGGOZ0xCZlmTEKiC70W+m1V0G0COaHLbxFN07SqoF3vVYXJVr7pCdMz0Bg1GcBWfYQ3OG6sYg9JME0mty+HDfaOmYI6jvMcOK5KC1wrfbRbbz8bp2W2zHr7gqnvm1H/yv0qMk5Q3/z0lD/rHaEug6HpQ0sQ4UfsRmI2Hsr53CRRGmqLlGd/ghhuXwq1wv/vG3totXQhuT6LjnIyvgo3hIzUgg5GuGo51DYrxCRsGItu036VgUcP+XNt/ECkupMwDKZEeC9NJto+neqOvG2rT9/p2XZEFTw9vxU+Qi9tLlhuqjrx6zMth+HAkv3Afxt8WV7yoz8SwLoz/VPd2WWBCjfAirKw+LxsrjxKUKjATCLvIljk7Q5Izh949D6C1Hmv9/UZC4stlAZvYiWw9Tg= Received: from arrakeen.starnux.net ([2a01:e0a:982:cbb0:52eb:f6ff:feb3:451a]) by smtp.gmail.com with ESMTPSA id je16-20020a05600c1f9000b0040ee8765901sm517556wmb.43.2024.02.05.09.55.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 05 Feb 2024 09:55:40 -0800 (PST) From: Neil Armstrong Date: Mon, 05 Feb 2024 18:55:31 +0100 Subject: [PATCH v10 4/7] drm/meson: gate px_clk when setting rate MIME-Version: 1.0 Message-Id: <20240205-amlogic-v6-4-upstream-dsi-ccf-vim3-v10-4-dc06073d5330@linaro.org> References: <20240205-amlogic-v6-4-upstream-dsi-ccf-vim3-v10-0-dc06073d5330@linaro.org> In-Reply-To: <20240205-amlogic-v6-4-upstream-dsi-ccf-vim3-v10-0-dc06073d5330@linaro.org> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Kevin Hilman , Jerome Brunet , Michael Turquette , Stephen Boyd , Martin Blumenstingl , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter , Nicolas Belin , Jagan Teki Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, dri-devel@lists.freedesktop.org, Neil Armstrong X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=1213; i=neil.armstrong@linaro.org; h=from:subject:message-id; bh=IE7LBQJSwmFpro9NRvngqeq31VcV/n9f72AsydUqbws=; b=owEBbQKS/ZANAwAKAXfc29rIyEnRAcsmYgBlwSEVQAxTmc2Mi1THlqhQKITJhQ6jRe1YxMSAnbv+ TbbdaV2JAjMEAAEKAB0WIQQ9U8YmyFYF/h30LIt33NvayMhJ0QUCZcEhFQAKCRB33NvayMhJ0cLPD/ 4sXVqcu6M0soSWNW7qB/VG2yRyCqRZlP+HfhrykDyTg+9WG9KEwllxNUC87INl9I0/eYkJbB8tjfl7 cGB4wluRZIubLWb7oiOlwQOaAM4R0iWsXe16E+SHd0OEEaHrAcfqMdyYyKTD0jgfduGlGfCkoHCB+m Hhk1itzbJkMbTvD2TumjnjJ/g70e7CeEt0ez9UN4eDF0rAzQgDxJ9NfUj4oHJhBNgPrWvIKl0++dtq Q3pD3gCFhQwuD2DrW4gTZQObKmAHrRFGBqBFhIYOk83pALZmm39fXAuu1KVP+yt46ISyJ84GizN/00 BKgKW/bJDNL+z8HdbFv6YeWKSP8Ey90aTF6YGPvcGIOj9E1a/ot5iTS5rLdNchvObxeGgCR8jdmbGZ ZzEkHtPwEn9rsrCLxUfxXu8HvIi5QBXrKPZAIp3ASTYIcIIKQcBMY5XzqpXreRGGv7rdgLqhuAAbYk wktdeESe7TNgfMqSMR1s0in5cmnjEf+BmouAgSpZQ0VJ+Ltr5vBgeaPISg5Ekxp1DJt8W+loq0b+Nl W7M2QYAbyZgXjq2biY1pfNtGUOTNkZc42VmAKHwupT5XlPdbarqKluglNXmlZ0NLB6OLw1RTX0EvDv qHjPNMXksmy+zHdIIwm3XpX6OUN3/xAjYHtHASedXPRN++zX/U7UTDUuu+oA== X-Developer-Key: i=neil.armstrong@linaro.org; a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Disable the px_clk when setting the rate to recover a fully configured and correctly reset VCLK clock tree after the rate is set. Fixes: 77d9e1e6b846 ("drm/meson: add support for MIPI-DSI transceiver") Signed-off-by: Neil Armstrong --- drivers/gpu/drm/meson/meson_dw_mipi_dsi.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/gpu/drm/meson/meson_dw_mipi_dsi.c b/drivers/gpu/drm/meson/meson_dw_mipi_dsi.c index a6bc1bdb3d0d..a10cff3ca1fe 100644 --- a/drivers/gpu/drm/meson/meson_dw_mipi_dsi.c +++ b/drivers/gpu/drm/meson/meson_dw_mipi_dsi.c @@ -95,6 +95,7 @@ static int dw_mipi_dsi_phy_init(void *priv_data) return ret; } + clk_disable_unprepare(mipi_dsi->px_clk); ret = clk_set_rate(mipi_dsi->px_clk, mipi_dsi->mode->clock * 1000); if (ret) { @@ -103,6 +104,12 @@ static int dw_mipi_dsi_phy_init(void *priv_data) return ret; } + ret = clk_prepare_enable(mipi_dsi->px_clk); + if (ret) { + dev_err(mipi_dsi->dev, "Failed to enable DSI Pixel clock (ret %d)\n", ret); + return ret; + } + switch (mipi_dsi->dsi_device->format) { case MIPI_DSI_FMT_RGB888: dpi_data_format = DPI_COLOR_24BIT; From patchwork Mon Feb 5 17:55:32 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 13545958 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3E4E9C4828D for ; Mon, 5 Feb 2024 17:55:54 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id AFC2E10FB1B; Mon, 5 Feb 2024 17:55:45 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.b="W2sehIFL"; dkim-atps=neutral Received: from mail-wm1-f44.google.com (mail-wm1-f44.google.com [209.85.128.44]) by gabe.freedesktop.org (Postfix) with ESMTPS id 22E3C10FAE0 for ; Mon, 5 Feb 2024 17:55:44 +0000 (UTC) Received: by mail-wm1-f44.google.com with SMTP id 5b1f17b1804b1-40fdc500db5so7918785e9.1 for ; Mon, 05 Feb 2024 09:55:44 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1707155742; x=1707760542; darn=lists.freedesktop.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=fuSB6hXQgNnhjhBZYMiuriEMaNCWnOiIqJ/w1UyCkVs=; b=W2sehIFL/CD3DunfixmVJsj2AeUvn0FfQugIsXIm7zUO2+ISzAfH2aAVeBJJEYyn7A 31Qtqw4/45UMBGTJY0gPKKuOrFSSV/tPr6/GuXJHZr48M/bc8H+m9ESvTDVDmS5cHCaT ttotFOoazpG5rK7MBL4Dyteh7r8pfrZv/NhFkvMZ2MtF5kEp/aZEBQkP9pyPu/Zixr6e 2K2m/iG5jC8sOdPqonLTX8MuRWckXbPn1A3k5rd7b8EG3f9pecn8+YrGKGj+lxqqpxcB TKEiU7BPJ72jFOtdvcQreuIqYcXx+zSZPFH+3Ej50qY/tRNqcRoObopaabP33JmNoofb tuvw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1707155742; x=1707760542; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=fuSB6hXQgNnhjhBZYMiuriEMaNCWnOiIqJ/w1UyCkVs=; b=ckHOiQF/qOPp4NLR5orkkxZ10NogFeYf4CCcJ8+YefcfbgDzm/4A7/F1RmgEZFePfo 1TQMeT0fXERI4x8Caa//aOBAHgiGv/ctN+PoLvjW1ALd0UT94RB2O40QrnFfzgSImlcY yeVfo0p2bO2w6LIIGC3hjiasjhwKn0gkNykTwkcx53Evh2uQ1pSH9/7skBmngETQs+Qb feI3NCpRiLvdF2h6PWIKKYC/dIOx36ZPAIcIH7Vf2m42OBu002FKmpJrkkys7mIuCkyx 5duooUsIq1pEiFLN4Hr/jJKI4auDO4Z71yE8VOwwlS51E1WqmZFVLxxo3uPavhujPDh5 yYRQ== X-Gm-Message-State: AOJu0Yy6xcuEvJB4dXjpFoMIfLgLE3CvMYPgbSXovrH8p64p+dPMY4cD CUYSI8FYohK5ByPUHhH4rD0PKw7vHXrV2PUTcKGHO6mWPtfQAZiBv0qyebgWGKiSpU59JxTDmdI +lOiyVw== X-Google-Smtp-Source: AGHT+IFQBoZVwEzaKSHH6GSHnwF+OsB+LadCOAluYT1wt3+X1dAsrpBvWeyGAz3FdiU/rHpHIDmccg== X-Received: by 2002:a05:600c:5612:b0:40f:d3b3:b6d2 with SMTP id jr18-20020a05600c561200b0040fd3b3b6d2mr386193wmb.14.1707155742633; Mon, 05 Feb 2024 09:55:42 -0800 (PST) X-Forwarded-Encrypted: i=0; AJvYcCVCoTPb98vKy8EX56dDFMSTkbZ4dn33RHsT29UyQh81X0ZnajudOIax7Wv1spxLx4brCiYzTK1zQRGxJGeQ7GAYyy1SQzMG6KVmHAhAV0EIw58NtxOz48nJ6RiXBIt5pyU4kz8IXas7fu30K5YVJOOehG6CzKmeMRjKSb1KwHOA60P3jogmgB9Q+HVgCBwoeg+4HB1K2OysMOVSJF5uG5UGADD0oQ0RFdUtwVaXpms3wDpNvAHDEop4yrtppGP54r01UmZYo2hZnKBGggUPiwiVUS8EIBUAu3O94O1m/0Yq1xqsTh61ZUbYchP8gyTjwrulBosbqAGlO9jYzAk+2B6huKi46Mdf0NoHutLb29EVzIQBL5BirHlLoo4CJGOmwFZl/C057TzxAm/sjwUMbWEVSq8JDBKVuNewezn64ko/F5dVO/k0vpBN6caqbOwPfn/W9c6/JjVlWv/0ourL69xeKGjRUbvuBfGO+rXSrTdDtGkZdFnFxj7mlT2gFziwHDfyDf3LiIyTEP37En0pJ+glHrXHX1cDhkrAb79UJhPOsRRXl93SCqh0bih2rjRy2c1dfZ46778K5/ca93e4DwHWN+GUXAcXbGvuHFnU7wiIDlVoI/RNVN/Qdx792+lAZ9q4O8BMcLSyGFge8N5lQH9IAO+SmCGW751m3S890UQzSUsMOgChfoX+UP6fKfOhBnA+R5J2gc5w7XE+3H8sVVJiLe3rUhnCLjoCAWZysMwo/oqjSUIKc/PimMY1NQH+hl0= Received: from arrakeen.starnux.net ([2a01:e0a:982:cbb0:52eb:f6ff:feb3:451a]) by smtp.gmail.com with ESMTPSA id je16-20020a05600c1f9000b0040ee8765901sm517556wmb.43.2024.02.05.09.55.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 05 Feb 2024 09:55:42 -0800 (PST) From: Neil Armstrong Date: Mon, 05 Feb 2024 18:55:32 +0100 Subject: [PATCH v10 5/7] arm64: meson: g12-common: add the MIPI DSI nodes MIME-Version: 1.0 Message-Id: <20240205-amlogic-v6-4-upstream-dsi-ccf-vim3-v10-5-dc06073d5330@linaro.org> References: <20240205-amlogic-v6-4-upstream-dsi-ccf-vim3-v10-0-dc06073d5330@linaro.org> In-Reply-To: <20240205-amlogic-v6-4-upstream-dsi-ccf-vim3-v10-0-dc06073d5330@linaro.org> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Kevin Hilman , Jerome Brunet , Michael Turquette , Stephen Boyd , Martin Blumenstingl , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter , Nicolas Belin , Jagan Teki Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, dri-devel@lists.freedesktop.org, Neil Armstrong X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=3028; i=neil.armstrong@linaro.org; h=from:subject:message-id; bh=xeZV8gmIC9/2/oObVVqqYZ0sOhta5dqkacXris9lM8k=; b=owEBbQKS/ZANAwAKAXfc29rIyEnRAcsmYgBlwSEVWuoZmhF/j2rik1x2MG72GYw9Kha028viMega ujV9kvOJAjMEAAEKAB0WIQQ9U8YmyFYF/h30LIt33NvayMhJ0QUCZcEhFQAKCRB33NvayMhJ0cS6EA CqhLE5qwspTDUuycmAMyzXEEr/Go7L95TsFMEWIs0O/+j+GlxMrfBP532OgRvBzsRyPlwyHZ38xYpI SpLpmvOyL+VdJfZBlSGESjEDF7VR6QXZaMs0muBRoWAj2/qwv2VxET/TDfLdT/tlDZfwyBFwNpUtep o308DxP7aREzgPjCPBkvgi6xuXp32mpY5usnVc/C4SXuO9JSJNX1xPPXUVnDm+J6bDh9lhAY0s0OaK SqN3XktjiEcQoNcADYZCMYLB/gX3YrvIK26lK8jGjWJCjrbKHAQYc3NQFcGBpI/jlS1zbfuROjMlWy TmJC4AKfRevlCScpEdChqcpe3DN9uNPcGBywX7ht8yABd24M5OSczw65UUVaKddTe/saxppXBsX0Bc p0CK7JGX6UtJP6BwxtPpoBoVPWRCd96UaD5BIUSQd3HaCW/vOdJl9e7/9Qf1qF5y5WXOyWN/YnBiCG sJv0aUVVu0Lt3ypCPuCXJ/ZUbZFhiu0ty2Y7T9hyJCYlq4NP/ynL9XcrF259EtAA5dZPcw6HMHfhYO 386WN81iKkYoSOlxoPGzzNsUpV7Lh9FD4zE8ViajjaK5CgCTN/AOdqp55oGC2TpIl6bnpEMO6sSFBK aGwmO95ejsdCV1LDyKyP7FHQahCy+B+w9ZiTkKChwEnmhKve8ZbpzV2tDamw== X-Developer-Key: i=neil.armstrong@linaro.org; a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Add the MIPI DSI Analog & Digital PHY nodes and the DSI control nodes with proper port endpoint to the VPU. Signed-off-by: Neil Armstrong --- arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi | 70 +++++++++++++++++++++++ 1 file changed, 70 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi index ff68b911b729..7300408262d5 100644 --- a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi @@ -1663,9 +1663,28 @@ pwrc: power-controller { <250000000>, <0>; /* Do Nothing */ }; + + mipi_analog_dphy: phy { + compatible = "amlogic,g12a-mipi-dphy-analog"; + #phy-cells = <0>; + status = "disabled"; + }; }; }; + mipi_dphy: phy@44000 { + compatible = "amlogic,axg-mipi-dphy"; + reg = <0x0 0x44000 0x0 0x2000>; + clocks = <&clkc CLKID_MIPI_DSI_PHY>; + clock-names = "pclk"; + resets = <&reset RESET_MIPI_DSI_PHY>; + reset-names = "phy"; + phys = <&mipi_analog_dphy>; + phy-names = "analog"; + #phy-cells = <0>; + status = "disabled"; + }; + usb3_pcie_phy: phy@46000 { compatible = "amlogic,g12a-usb3-pcie-phy"; reg = <0x0 0x46000 0x0 0x2000>; @@ -2152,6 +2171,15 @@ hdmi_tx_out: endpoint { remote-endpoint = <&hdmi_tx_in>; }; }; + + /* DPI output port */ + dpi_port: port@2 { + reg = <2>; + + dpi_out: endpoint { + remote-endpoint = <&mipi_dsi_in>; + }; + }; }; gic: interrupt-controller@ffc01000 { @@ -2189,6 +2217,48 @@ gpio_intc: interrupt-controller@f080 { amlogic,channel-interrupts = <64 65 66 67 68 69 70 71>; }; + mipi_dsi: dsi@7000 { + compatible = "amlogic,meson-g12a-dw-mipi-dsi"; + reg = <0x0 0x7000 0x0 0x1000>; + resets = <&reset RESET_MIPI_DSI_HOST>; + reset-names = "top"; + clocks = <&clkc CLKID_MIPI_DSI_HOST>, + <&clkc CLKID_MIPI_DSI_PXCLK>, + <&clkc CLKID_CTS_ENCL>; + clock-names = "pclk", "bit", "px"; + phys = <&mipi_dphy>; + phy-names = "dphy"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + + assigned-clocks = <&clkc CLKID_MIPI_DSI_PXCLK_SEL>, + <&clkc CLKID_CTS_ENCL_SEL>, + <&clkc CLKID_VCLK2_SEL>; + assigned-clock-parents = <&clkc CLKID_GP0_PLL>, + <&clkc CLKID_VCLK2_DIV1>, + <&clkc CLKID_GP0_PLL>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + /* VPU VENC Input */ + mipi_dsi_venc_port: port@0 { + reg = <0>; + + mipi_dsi_in: endpoint { + remote-endpoint = <&dpi_out>; + }; + }; + + /* DSI Output */ + mipi_dsi_panel_port: port@1 { + reg = <1>; + }; + }; + }; + watchdog: watchdog@f0d0 { compatible = "amlogic,meson-gxbb-wdt"; reg = <0x0 0xf0d0 0x0 0x10>; From patchwork Mon Feb 5 17:55:33 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 13545959 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id F389CC48292 for ; Mon, 5 Feb 2024 17:55:55 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id A3A3910FB37; Mon, 5 Feb 2024 17:55:47 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.b="cgAndRvh"; dkim-atps=neutral Received: from mail-wm1-f46.google.com (mail-wm1-f46.google.com [209.85.128.46]) by gabe.freedesktop.org (Postfix) with ESMTPS id 8728310FAF3 for ; Mon, 5 Feb 2024 17:55:45 +0000 (UTC) Received: by mail-wm1-f46.google.com with SMTP id 5b1f17b1804b1-40fdb18ffc7so11254905e9.1 for ; Mon, 05 Feb 2024 09:55:45 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1707155744; x=1707760544; darn=lists.freedesktop.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=fpZ1u2+bVNzAT3eWYSmp4vx9viRRZYpXPKY6TeLyQEI=; b=cgAndRvhpUdh5eDRNtNlzWgCzGHAUv7utp5/YmqHLyc6xbzOwrXuI0WYDfgexLBhyw +k6k/5/wZ30EFTG0ClqnM+O5XlkyTdOb7fYvAwes2H9GtDKnoPIf55Dw39senoltirCe g7DTEecq5HA/c9ucD/RcHUvpFOePp9BjwxGg3DFkxO1ZROy8zMEdl+44kuaDT8YkEPYQ uRu6JbJmNL4XfVRW5cnIb3bWHm7JEkEZOGV8OwBOrUCyU+2yaiYEUH/0wrypBWqNfnlP /FBy2thIsRF+P+xP1CJEws1bB5+ihr7merERDnYnoR/qJ4nZqM4zQZhFVHqX5CnuDzw5 eYVA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1707155744; x=1707760544; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=fpZ1u2+bVNzAT3eWYSmp4vx9viRRZYpXPKY6TeLyQEI=; b=jdLODyD/SYIwQ2pt8PR7IgIuLO8Cr/hRPC/ea5i7Wbm39j4ovZs9Id+sNS9qebALMA hTNigJE1odIiCAalRTkImIcgFNhnmBVgyge9TVSNES2ElB+kUQLrh6WgcFLVUFzcwzfZ Ce4UXxAqOGcnLjjUfMAU6lfCFiaCjoaCtMuoFK3dHpDELje17lbVwynnViy0qlh1lv6J 7PDV/jX6Gsbfyid0edYE0HTg/vm+TcJCncg5zP2hBEbv3etinX3YKO7IusfiQVjIdu9T UTR+aPbUoBCAz16qFNGQZt1iwrtPH2JDkKaQIm2Rw6JKtAKfUrVxzIM7UO36A2ijqsKA VWJA== X-Gm-Message-State: AOJu0Yzyj8rGV65FAZF1N3wEYbYj+IX2AmngARxd6qzWjdgKej4oG3Xn 8bGINNAX7dxdjZzzhKRBYJlCyQ6oyTkgCE78yFd4jZ9MD3sQdyFiO4clWlJ1EIs= X-Google-Smtp-Source: AGHT+IGMawpNhtBNlj/DIThK1IdOGLKErx9wrqn011RATd8Gcn5Mb2osk8v0MvYCtAnpElqyEzv96g== X-Received: by 2002:a05:600c:1e1f:b0:40e:f736:8152 with SMTP id ay31-20020a05600c1e1f00b0040ef7368152mr391015wmb.14.1707155743988; Mon, 05 Feb 2024 09:55:43 -0800 (PST) X-Forwarded-Encrypted: i=0; AJvYcCUvlgUiiRbjZJ9ZcR725O++iGzXJoEOLZeeIR+LvnKxgwv6M+D0/hzsZmEq/xuRx+59px9XI/fCDICC3BUpD2PZ4/LecLa/3N6bxpyNKjGrvBuyTx/2l9UyYG7HNR3SzCV2GYEWlxTUGXzxpcrnGJEs0P2j0ZRgOISCfWwaJofK88vfoYVgobmurL6zm6SS4zk+GRN75/F8WvD5JGGlpsUWmxQWnYIczm4tYlkcKFZSl8Fn5Xd+EBqurx9S4/803rg8/gsJX/f9CU2dDm96J72jLpiLcDJA82/eZ1b6S3BfpDZ3DVDB3BQ1bkhDka+UdEkrZGybNa211lctY4IkbRh2D2jDYq/x1pceLihA2UmLKfFRa8Uh+YV9FN4JDtJMa8unwmAbPFVzAKNr/IOMZMm3o9Nx2V92sbt0R3Wp4SnVurff4NXHcBoyWyxbPNXgvvVv5p2Rcq64GL1OhLBnlCphub895w0mwktm4srRcbWYyHSMtr/FCKKA9m937ZkO9BgAe9QMqYzgZcYFfPgyeML7XCTNJMeyZnBk9YSHFW6zW4awi+5we8fcpYlOQhO5RyQUORy1Otn6gjpuYqF8wDE7CRI/erhbuFmcNelTSxin41hHORyoYzqbV0z7BSiMMv56XveFDnHY4OODj71L4WBm/rfHO4vCgjMWHVugY/58zAJcDBRuCe/3G6pshyWFNc66aB1Lf1F7JpsqxwqmZ82iCS2oRJWmnCThrhmOlU0/4Rf/Clkya4WA4N5rUR5uGsQ= Received: from arrakeen.starnux.net ([2a01:e0a:982:cbb0:52eb:f6ff:feb3:451a]) by smtp.gmail.com with ESMTPSA id je16-20020a05600c1f9000b0040ee8765901sm517556wmb.43.2024.02.05.09.55.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 05 Feb 2024 09:55:43 -0800 (PST) From: Neil Armstrong Date: Mon, 05 Feb 2024 18:55:33 +0100 Subject: [PATCH v10 6/7] arm64: meson: khadas-vim3l: add TS050 DSI panel overlay MIME-Version: 1.0 Message-Id: <20240205-amlogic-v6-4-upstream-dsi-ccf-vim3-v10-6-dc06073d5330@linaro.org> References: <20240205-amlogic-v6-4-upstream-dsi-ccf-vim3-v10-0-dc06073d5330@linaro.org> In-Reply-To: <20240205-amlogic-v6-4-upstream-dsi-ccf-vim3-v10-0-dc06073d5330@linaro.org> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Kevin Hilman , Jerome Brunet , Michael Turquette , Stephen Boyd , Martin Blumenstingl , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter , Nicolas Belin , Jagan Teki Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, dri-devel@lists.freedesktop.org, Neil Armstrong X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=3677; i=neil.armstrong@linaro.org; h=from:subject:message-id; bh=DPGGuaJdRW3xL473nMSjoqE2TG+EWGQ6YkhOzqtm1Do=; b=owEBbQKS/ZANAwAKAXfc29rIyEnRAcsmYgBlwSEWDKhUeQ70VFCVlU06YKjKhY3IDBxtFeyvbTgh uLcwGWmJAjMEAAEKAB0WIQQ9U8YmyFYF/h30LIt33NvayMhJ0QUCZcEhFgAKCRB33NvayMhJ0dgoD/ 9ygCnRpWwsl+EqlWTo6p9gyHPg4glwK5RKRWhekTcgM8QejnAqphIh0gKKbZa7zj3aUEjtniNSLIZN ajOyAxeoSb+tmVIn1Av81VY2tvI7Vip2piimUtgXvRbgEA2rtEXyJpZNjznlP9KdUoLMPnXw8j8BLw UQx3ofKhBONPDcFp3sajaexIbvBUJ3lETFxYSPGnoDCR7OlCjL7D9NA20lzz+FUggespijK8tr86ar Ytvd6Nlr/kgzjhtNUeg3/yXsZqGf1RCWtkCCaF2s1974VbqVxZH6AXsI3uPV6raNIi0/ICf1vUKBuL rS/Bh2dsF84IborkjYFcsRoy7bvg6b+whQ7zRplT117Mdetw1MHaHLAa1vb0sKvOaZx1zLfb8S6wox E/wrhKw9HsLu8X+rhfmAcidrTr1gypATJix6J+Y6cR8rTpM2/+dVfGfblm3cNxNzdYP3RHo2EDsudS qAZr4nfhPHcaisSt51i0SlCkc0yWusS2OEvn3eY19f6ry4TI2Sv1joeyiz0nBP5qExCe1/yxu/oYUB 8zF3DVLjbSm67nKvpTlIUWr684dMAM0EhN642RqItpGIbPdaIf56fDQdJqrUUdik6QEy5ABZNUV1nn 5rDtK6pMiWaTT4hZwr9dkDWHhlbhaK5u83gY4xyUWZM4hcsL0KPlkZKR1Ecw== X-Developer-Key: i=neil.armstrong@linaro.org; a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" This add dtbo overlay to support the Khadas TS050 panel on the Khadas VIM3 & VIM3L boards. Signed-off-by: Neil Armstrong --- arch/arm64/boot/dts/amlogic/Makefile | 3 + .../boot/dts/amlogic/meson-khadas-vim3-ts050.dtso | 108 +++++++++++++++++++++ 2 files changed, 111 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile index cc8b34bd583d..5e5ea0f14fe2 100644 --- a/arch/arm64/boot/dts/amlogic/Makefile +++ b/arch/arm64/boot/dts/amlogic/Makefile @@ -80,3 +80,6 @@ dtb-$(CONFIG_ARCH_MESON) += meson-sm1-odroid-hc4.dtb dtb-$(CONFIG_ARCH_MESON) += meson-sm1-sei610.dtb dtb-$(CONFIG_ARCH_MESON) += meson-sm1-x96-air-gbit.dtb dtb-$(CONFIG_ARCH_MESON) += meson-sm1-x96-air.dtb + +# Overlays +dtb-$(CONFIG_ARCH_MESON) += meson-khadas-vim3-ts050.dtbo diff --git a/arch/arm64/boot/dts/amlogic/meson-khadas-vim3-ts050.dtso b/arch/arm64/boot/dts/amlogic/meson-khadas-vim3-ts050.dtso new file mode 100644 index 000000000000..a41b4e619580 --- /dev/null +++ b/arch/arm64/boot/dts/amlogic/meson-khadas-vim3-ts050.dtso @@ -0,0 +1,108 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2019 BayLibre, SAS + * Author: Neil Armstrong + */ + +#include +#include +#include +#include +#include + +/dts-v1/; +/plugin/; + +/* + * Enable Khadas TS050 DSI Panel + Touch Controller + * on Khadas VIM3 (A311D) and VIM3L (S905D3) + */ + +&{/} { + panel_backlight: backlight { + compatible = "pwm-backlight"; + pwms = <&pwm_AO_cd 0 25000 0>; + brightness-levels = <0 255>; + num-interpolated-steps = <255>; + default-brightness-level = <200>; + }; +}; + +&i2c3 { + #address-cells = <1>; + #size-cells = <0>; + pinctrl-0 = <&i2c3_sda_a_pins>, <&i2c3_sck_a_pins>; + pinctrl-names = "default"; + status = "okay"; + + touch-controller@38 { + compatible = "edt,edt-ft5206"; + reg = <0x38>; + interrupt-parent = <&gpio_intc>; + interrupts = ; + reset-gpios = <&gpio_expander 6 GPIO_ACTIVE_LOW>; + touchscreen-size-x = <1080>; + touchscreen-size-y = <1920>; + status = "okay"; + }; +}; + +&mipi_dsi { + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + + assigned-clocks = <&clkc CLKID_GP0_PLL>, + <&clkc CLKID_MIPI_DSI_PXCLK_SEL>, + <&clkc CLKID_MIPI_DSI_PXCLK>, + <&clkc CLKID_CTS_ENCL_SEL>, + <&clkc CLKID_VCLK2_SEL>; + assigned-clock-parents = <0>, + <&clkc CLKID_GP0_PLL>, + <0>, + <&clkc CLKID_VCLK2_DIV1>, + <&clkc CLKID_GP0_PLL>; + assigned-clock-rates = <960000000>, + <0>, + <960000000>, + <0>, + <0>; + + panel@0 { + compatible = "khadas,ts050"; + reset-gpios = <&gpio_expander 0 GPIO_ACTIVE_LOW>; + enable-gpios = <&gpio_expander 1 GPIO_ACTIVE_HIGH>; + power-supply = <&vcc_3v3>; + backlight = <&panel_backlight>; + reg = <0>; + + port { + mipi_in_panel: endpoint { + remote-endpoint = <&mipi_out_panel>; + }; + }; + }; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@1 { + mipi_out_panel: endpoint { + remote-endpoint = <&mipi_in_panel>; + }; + }; + }; +}; + +&mipi_analog_dphy { + status = "okay"; +}; + +&mipi_dphy { + status = "okay"; +}; + +&pwm_AO_cd { + pinctrl-0 = <&pwm_ao_c_6_pins>, <&pwm_ao_d_e_pins>; +}; From patchwork Mon Feb 5 17:55:34 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 13545960 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 69ADDC48298 for ; Mon, 5 Feb 2024 17:55:57 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B8BCE10FB40; Mon, 5 Feb 2024 17:55:47 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.b="P/N/qXbd"; dkim-atps=neutral Received: from mail-wm1-f45.google.com (mail-wm1-f45.google.com [209.85.128.45]) by gabe.freedesktop.org (Postfix) with ESMTPS id C0CF410FB4B for ; Mon, 5 Feb 2024 17:55:46 +0000 (UTC) Received: by mail-wm1-f45.google.com with SMTP id 5b1f17b1804b1-40fdf2b69b2so2239685e9.1 for ; Mon, 05 Feb 2024 09:55:46 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1707155745; x=1707760545; darn=lists.freedesktop.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=6CEQapZHD/xXUBiMxlOlNXosOM3ZH2y4glGOQxeOqG8=; b=P/N/qXbdkzFwfl9nnpJ12fmQAUnYv/iGjH4N7Wc5SojbBK7v12RJV1Vz/KH1VHXuGR W9QMpb4hTLw3dKXzAJR0S3BDUdUnefNmXXE75q6VRxUVb/9TrhJ77FPhvl3jU5anbrt7 zHQvOfN8GbUrB4v3XVvEp++L45ynn/JejbclIeLJgAfu88NPAK2Mxy1N6P4io1WS6RmA yhL9UHsyFuaRuT02+ITcPZ+d0Hi65oRjUXw/DTCijz0U5AlGalvsF1rXgia0sUdrkaO2 a6tELc27hmEx4HdJxrfAP6GJM/A5bPHvzproZsPDn3pIQ2MyMNVHaDGjNOtcDItgEdDL 6N6g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1707155745; x=1707760545; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=6CEQapZHD/xXUBiMxlOlNXosOM3ZH2y4glGOQxeOqG8=; b=IFqEHR2lZyYzWPIUmy+zziEjQte744TPfTAjYlsvIUgjFTBqpbB78XQmAtxDnN7uOv b4KrnTQn1vgqBkIs96JlQj7hkFAPXFpkgMZ7bqDYxGEN9fNQSpOmPJ4AtbntipDWMP6+ y6jXuHnBgvBkidRfiaQUA24uy58fRv5WuXHDpCTwyro8nK1cwZIa+AooUwxMKJj7AApH n5lGm99y+h7wKcgv6SfDf33RrS/F7SE1SVEimP2OdhxKy7Udqp7Dd6/Ob3ig5MsUE9My bXTRYD92sU+nXixKglB67wDwl8/Q+4FS1qnzXCvjcDIIDwCZNXO7d7rmnK4LODTJrmjP fArQ== X-Gm-Message-State: AOJu0YxJXYGizPgPPM7ynGucyfAvqtLKNZlKV3eEa9YmRNTV0pekytxD rkt4HUesfHRjfriysl3QP65wdghY1BvB7uHDtur6PSSflcJPGwtsnAlRRN0qt9c= X-Google-Smtp-Source: AGHT+IHWGYX67kI897F0xxQ1R57GLuS/Mf0fPYGnhxw/gflc8fuYMw62u+lGxIKF7czBDtQjsKUlpA== X-Received: by 2002:a05:600c:3b14:b0:40e:aca0:7b0a with SMTP id m20-20020a05600c3b1400b0040eaca07b0amr5078664wms.10.1707155745205; Mon, 05 Feb 2024 09:55:45 -0800 (PST) X-Forwarded-Encrypted: i=0; AJvYcCWofnczo5qzLNWBcE7kn+sulFLJTNvvVa2/a7OyvgOcln1J1Rhqqk02dKd5qXoZm+MiR4A4E8g+Y+PUCfIgnhr0CVTwKmiYGB50Wy5B7bfDRvSCK+eu3LNl9WVqGInvgLv8zIqwcU6ZYaticfNOdhl3XlyTEUz6V8EMYt5dzy3WFjbgvWhzQRT4j1a+D1XTgLaxgMHoSQo5qy7rt8yT8UhJoa9rGljl5NagfiW+FiKOXoKwc5ECpAjQ7XsjJCVpj+z2Nos6mA4g8kyswRHRPm2EyPFtC3Jk2ag3Fihg9SrS6HB0Q/FjkYLj63vjupsQ90lvAKfESuRG3PDmoy4cKx+Xx5HduLHelMv03bO0kOIszVhM3EMbrbCTBh3N+gH85XL1U6x+wgvyjns0pw/xO8ou04yGGzE2aLbYg0X9Lh4BPVUoO5+9hjKVGEF8tJABzGF7JSD2Qva2OUFA/N2Zss6Y72JHhjHoJuduvnISwYbjt4c3twFq7EUeOEjCz/ffh0JGYomf4yn2e775Zw98miJ3ke14NUTZ71wWxAsgrN0NXHDe+cZDJFnUlOQUAU5CFxLOyTChoYWDEPC+1qlFTmk0FKtUvyhAW9F49FOiA+QA9Z3ydXejw/QUAAT/TuLybYZDqulQcL/2pPbr2XmyzBjSDqXJZsBXjt/C4gZ2fQUi6jyP4T997HoFaZyqrnsIHWPiqzQjetOo+/lVAJSb9HcrkTNfkqu3192WhLg06xZgEUqsTDk9xgvnV6/9KLNkRfI1yWCJjzrCXEptGqcTCvyuZg== Received: from arrakeen.starnux.net ([2a01:e0a:982:cbb0:52eb:f6ff:feb3:451a]) by smtp.gmail.com with ESMTPSA id je16-20020a05600c1f9000b0040ee8765901sm517556wmb.43.2024.02.05.09.55.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 05 Feb 2024 09:55:44 -0800 (PST) From: Neil Armstrong Date: Mon, 05 Feb 2024 18:55:34 +0100 Subject: [PATCH v10 7/7] arm64: dts: amlogic: meson-g12b-bananapi-cm4: add support for MNT Reform2 with CM4 adaper MIME-Version: 1.0 Message-Id: <20240205-amlogic-v6-4-upstream-dsi-ccf-vim3-v10-7-dc06073d5330@linaro.org> References: <20240205-amlogic-v6-4-upstream-dsi-ccf-vim3-v10-0-dc06073d5330@linaro.org> In-Reply-To: <20240205-amlogic-v6-4-upstream-dsi-ccf-vim3-v10-0-dc06073d5330@linaro.org> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Kevin Hilman , Jerome Brunet , Michael Turquette , Stephen Boyd , Martin Blumenstingl , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter , Nicolas Belin , Jagan Teki Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, dri-devel@lists.freedesktop.org, Neil Armstrong , "Lukas F. Hartmann" X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=9577; i=neil.armstrong@linaro.org; h=from:subject:message-id; bh=7Kf3HPglDKUG/aYHn5uv+MfHpQhrMt9zxAb8kCgv5B4=; b=owEBbQKS/ZANAwAKAXfc29rIyEnRAcsmYgBlwSEWwwOqUxztWQoBbKdkamxaSzTOoRPntDcXO046 nrmoXoOJAjMEAAEKAB0WIQQ9U8YmyFYF/h30LIt33NvayMhJ0QUCZcEhFgAKCRB33NvayMhJ0e8SD/ 4pbVBzy4chIUxiD+X/Nf2MyjkJ/JOEaJooi/C5nSaln+aIHELuMx1tZX3vc5c3t2shtdnnhrx5t7eL u4lHN8uTjZk73H4gws6PTh0pF1upUJJ0n/iopjIqglgtxTH73M6pw4RYxeTD8+Y+lKyRrTLnTZZ4mv zATk7EI2cxc2czEPQVei5ktOJoN0KR9cqSdqiD45Z34nLQzxTzfoRXDyJRNSiCRmYkv8YhgTKdXHCx zAOLGMhHW21OkUIZOmdAryOZbhEtKxglr31ydY7YZozXRLuGjuBQG5+d0IH06/NU4DcohGWbCilVFe 8iA26w2FErSKxYnEsdmlaK3QbJNrP18dr6UiRP6kfWgKQ2Yvkxr5iaFJkdhw6DbJkBjwpkc5HFVYGc ovq+Pqm0g2U+jSfAzDCGXsLRL5VWtJiYa9Qsudk5aq+7PY/ZOAOsKU3PRWSces22nFfTOQD0WrSMeI XgY9h/GupRFR/ca+VfsMUnOmE4Xyd7EJ5IhQKEmrtrHAyHxR5lV6hImB4DeuqeLiHzFiaz7GoTOREa zhWCwosaAmE4RmAiIlNeHyeNiLpK8MX6xNiv32a67v602PUX/JsPyPRXQidDwfqAzz5cpCFoL2x329 G7ge6uOKhQFZqbyHTb27Pdg7QvvZceB4ZknUzGryKuB/+ZWCJxZ3MIRX1Rvw== X-Developer-Key: i=neil.armstrong@linaro.org; a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" This adds a basic devicetree for the MNT Reform2 DIY laptop when using a CM4 adapter and a BPI-CM4 module. Co-developed-by: Lukas F. Hartmann Signed-off-by: Neil Armstrong --- arch/arm64/boot/dts/amlogic/Makefile | 1 + .../meson-g12b-bananapi-cm4-mnt-reform2.dts | 384 +++++++++++++++++++++ 2 files changed, 385 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile index 5e5ea0f14fe2..0d819a63b15e 100644 --- a/arch/arm64/boot/dts/amlogic/Makefile +++ b/arch/arm64/boot/dts/amlogic/Makefile @@ -15,6 +15,7 @@ dtb-$(CONFIG_ARCH_MESON) += meson-g12a-x96-max.dtb dtb-$(CONFIG_ARCH_MESON) += meson-g12b-a311d-bananapi-m2s.dtb dtb-$(CONFIG_ARCH_MESON) += meson-g12b-a311d-khadas-vim3.dtb dtb-$(CONFIG_ARCH_MESON) += meson-g12b-bananapi-cm4-cm4io.dtb +dtb-$(CONFIG_ARCH_MESON) += meson-g12b-bananapi-cm4-mnt-reform2.dtb dtb-$(CONFIG_ARCH_MESON) += meson-g12b-gsking-x.dtb dtb-$(CONFIG_ARCH_MESON) += meson-g12b-gtking-pro.dtb dtb-$(CONFIG_ARCH_MESON) += meson-g12b-gtking.dtb diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4-mnt-reform2.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4-mnt-reform2.dts new file mode 100644 index 000000000000..003efed529ba --- /dev/null +++ b/arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4-mnt-reform2.dts @@ -0,0 +1,384 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2023 Neil Armstrong + * Copyright 2023 MNT Research GmbH + */ + +/dts-v1/; + +#include "meson-g12b-bananapi-cm4.dtsi" +#include +#include +#include + +/ { + model = "MNT Reform 2 with BPI-CM4 Module"; + compatible = "mntre,reform2-cm4", "bananapi,bpi-cm4", "amlogic,a311d", "amlogic,g12b"; + chassis-type = "laptop"; + + aliases { + ethernet0 = ðmac; + i2c0 = &i2c1; + i2c1 = &i2c3; + }; + + hdmi_connector: hdmi-connector { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi_connector_in: endpoint { + remote-endpoint = <&hdmi_tx_tmds_out>; + }; + }; + }; + + leds { + compatible = "gpio-leds"; + + led-blue { + color = ; + function = LED_FUNCTION_STATUS; + gpios = <&gpio_ao GPIOAO_7 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "heartbeat"; + }; + + led-green { + color = ; + function = LED_FUNCTION_STATUS; + gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_HIGH>; + }; + }; + + sound { + compatible = "amlogic,axg-sound-card"; + model = "MNT-REFORM2-BPI-CM4"; + audio-widgets = "Headphone", "Headphone Jack", + "Speaker", "External Speaker", + "Microphone", "Mic Jack"; + audio-aux-devs = <&tdmout_a>, <&tdmout_b>, <&tdmin_b>; + audio-routing = "TDMOUT_A IN 0", "FRDDR_A OUT 0", + "TDMOUT_A IN 1", "FRDDR_B OUT 0", + "TDMOUT_A IN 2", "FRDDR_C OUT 0", + "TDM_A Playback", "TDMOUT_A OUT", + "TDMOUT_B IN 0", "FRDDR_A OUT 1", + "TDMOUT_B IN 1", "FRDDR_B OUT 1", + "TDMOUT_B IN 2", "FRDDR_C OUT 1", + "TDM_B Playback", "TDMOUT_B OUT", + "TDMIN_B IN 1", "TDM_B Capture", + "TDMIN_B IN 4", "TDM_B Loopback", + "TODDR_A IN 1", "TDMIN_B OUT", + "TODDR_B IN 1", "TDMIN_B OUT", + "TODDR_C IN 1", "TDMIN_B OUT", + "Headphone Jack", "HP_L", + "Headphone Jack", "HP_R", + "External Speaker", "SPK_LP", + "External Speaker", "SPK_LN", + "External Speaker", "SPK_RP", + "External Speaker", "SPK_RN", + "LINPUT1", "Mic Jack", + "Mic Jack", "MICB"; + + assigned-clocks = <&clkc CLKID_MPLL2>, + <&clkc CLKID_MPLL0>, + <&clkc CLKID_MPLL1>; + assigned-clock-parents = <0>, <0>, <0>; + assigned-clock-rates = <294912000>, + <270950400>, + <393216000>; + + dai-link-0 { + sound-dai = <&frddr_a>; + }; + + dai-link-1 { + sound-dai = <&frddr_b>; + }; + + dai-link-2 { + sound-dai = <&frddr_c>; + }; + + dai-link-3 { + sound-dai = <&toddr_a>; + }; + + dai-link-4 { + sound-dai = <&toddr_b>; + }; + + dai-link-5 { + sound-dai = <&toddr_c>; + }; + + /* 8ch hdmi interface */ + dai-link-6 { + sound-dai = <&tdmif_a>; + dai-format = "i2s"; + dai-tdm-slot-tx-mask-0 = <1 1>; + dai-tdm-slot-tx-mask-1 = <1 1>; + dai-tdm-slot-tx-mask-2 = <1 1>; + dai-tdm-slot-tx-mask-3 = <1 1>; + mclk-fs = <256>; + + codec { + sound-dai = <&tohdmitx TOHDMITX_I2S_IN_A>; + }; + }; + + /* Analog Audio */ + dai-link-7 { + sound-dai = <&tdmif_b>; + dai-format = "i2s"; + dai-tdm-slot-tx-mask-0 = <1 1>; + mclk-fs = <256>; + + codec { + sound-dai = <&wm8960>; + }; + }; + + /* hdmi glue */ + dai-link-8 { + sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>; + + codec { + sound-dai = <&hdmi_tx>; + }; + }; + }; + + reg_main_1v8: regulator-main-1v8 { + compatible = "regulator-fixed"; + regulator-name = "1V8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <®_main_3v3>; + }; + + reg_main_1v2: regulator-main-1v2 { + compatible = "regulator-fixed"; + regulator-name = "1V2"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + vin-supply = <®_main_5v>; + }; + + reg_main_3v3: regulator-main-3v3 { + compatible = "regulator-fixed"; + regulator-name = "3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + reg_main_5v: regulator-main-5v { + compatible = "regulator-fixed"; + regulator-name = "5V"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; + + reg_main_usb: regulator-main-usb { + compatible = "regulator-fixed"; + regulator-name = "USB_PWR"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <®_main_5v>; + }; + + backlight: backlight { + compatible = "pwm-backlight"; + pwms = <&pwm_AO_ab 0 10000 0>; + power-supply = <®_main_usb>; + enable-gpios = <&gpio 58 GPIO_ACTIVE_HIGH>; + brightness-levels = <0 32 64 128 160 200 255>; + default-brightness-level = <6>; + }; + + panel { + compatible = "innolux,n125hce-gn1"; + power-supply = <®_main_3v3>; + backlight = <&backlight>; + no-hpd; + + port { + panel_in: endpoint { + remote-endpoint = <&edp_bridge_out>; + }; + }; + }; + + clock_12288: clock_12288 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <12288000>; + }; +}; + +&mipi_analog_dphy { + status = "okay"; +}; + +&mipi_dphy { + status = "okay"; +}; + +&mipi_dsi { + status = "okay"; + + assigned-clocks = <&clkc CLKID_GP0_PLL>, + <&clkc CLKID_MIPI_DSI_PXCLK_SEL>, + <&clkc CLKID_MIPI_DSI_PXCLK>, + <&clkc CLKID_CTS_ENCL_SEL>, + <&clkc CLKID_VCLK2_SEL>; + assigned-clock-parents = <0>, + <&clkc CLKID_GP0_PLL>, + <0>, + <&clkc CLKID_VCLK2_DIV1>, + <&clkc CLKID_GP0_PLL>; + assigned-clock-rates = <936000000>, + <0>, + <936000000>, + <0>, + <0>; +}; + +&mipi_dsi_panel_port { + mipi_dsi_out: endpoint { + remote-endpoint = <&edp_bridge_in>; + }; +}; + +&cecb_AO { + status = "okay"; +}; + +ðmac { + status = "okay"; +}; + +&hdmi_tx { + status = "okay"; +}; + +&hdmi_tx_tmds_port { + hdmi_tx_tmds_out: endpoint { + remote-endpoint = <&hdmi_connector_in>; + }; +}; + +&pwm_AO_ab { + pinctrl-names = "default"; + pinctrl-0 = <&pwm_ao_a_pins>; + status = "okay"; +}; + +&i2c0 { + status = "okay"; +}; + +&i2c3 { + status = "okay"; + + edp_bridge: bridge@2c { + compatible = "ti,sn65dsi86"; + reg = <0x2c>; + enable-gpios = <&gpio GPIOX_10 GPIO_ACTIVE_HIGH>; // PIN_24 / GPIO8 + vccio-supply = <®_main_1v8>; + vpll-supply = <®_main_1v8>; + vcca-supply = <®_main_1v2>; + vcc-supply = <®_main_1v2>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + edp_bridge_in: endpoint { + remote-endpoint = <&mipi_dsi_out>; + }; + }; + + port@1 { + reg = <1>; + + edp_bridge_out: endpoint { + remote-endpoint = <&panel_in>; + }; + }; + }; + }; +}; + +&i2c2 { + status = "okay"; + + wm8960: codec@1a { + compatible = "wlf,wm8960"; + reg = <0x1a>; + clocks = <&clock_12288>; + clock-names = "mclk"; + #sound-dai-cells = <0>; + wlf,shared-lrclk; + }; + + rtc@68 { + compatible = "nxp,pcf8523"; + reg = <0x68>; + }; +}; + +&pcie { + status = "okay"; +}; + +&sd_emmc_b { + status = "okay"; +}; + +&tdmif_a { + status = "okay"; +}; + +&tdmout_a { + status = "okay"; +}; + +&tdmif_b { + pinctrl-0 = <&tdm_b_dout0_pins>, <&tdm_b_fs_pins>, <&tdm_b_sclk_pins>, <&tdm_b_din1_pins>; + pinctrl-names = "default"; + + assigned-clocks = <&clkc_audio AUD_CLKID_TDM_SCLK_PAD1>, + <&clkc_audio AUD_CLKID_TDM_LRCLK_PAD1>; + assigned-clock-parents = <&clkc_audio AUD_CLKID_MST_B_SCLK>, + <&clkc_audio AUD_CLKID_MST_B_LRCLK>; + assigned-clock-rates = <0>, <0>; +}; + +&tdmin_b { + status = "okay"; +}; + +&toddr_a { + status = "okay"; +}; + +&toddr_b { + status = "okay"; +}; + +&toddr_c { + status = "okay"; +}; + +&tohdmitx { + status = "okay"; +}; + +&usb { + dr_mode = "host"; + + status = "okay"; +};