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Tue, 06 Feb 2024 06:37:58 -0800 (PST) From: Markus Schneider-Pargmann To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Srinivas Kandagatla , Santosh Shilimkar Cc: Andrew Davis , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Markus Schneider-Pargmann Subject: [PATCH 1/4] nvmem: core: Read into buffers larger than data Date: Tue, 6 Feb 2024 15:37:08 +0100 Message-ID: <20240206143711.2410135-2-msp@baylibre.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240206143711.2410135-1-msp@baylibre.com> References: <20240206143711.2410135-1-msp@baylibre.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240206_063800_992086_264A52C1 X-CRM114-Status: GOOD ( 14.74 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The actual size that nvmem is using internally on a specific platform with a specific devicetree may not be known in the consumer code. The maximum size may be available at the same time. Allow the use of larger buffers in nvmem_cell_read_common() by setting buffers that are too large to zero before copying into them. Signed-off-by: Markus Schneider-Pargmann --- drivers/nvmem/core.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/nvmem/core.c b/drivers/nvmem/core.c index 980123fb4dde..6fa061ede605 100644 --- a/drivers/nvmem/core.c +++ b/drivers/nvmem/core.c @@ -1806,12 +1806,14 @@ static int nvmem_cell_read_common(struct device *dev, const char *cell_id, nvmem_cell_put(cell); return PTR_ERR(buf); } - if (len != count) { + if (len > count) { kfree(buf); nvmem_cell_put(cell); return -EINVAL; + } else if (len < count) { + memset(val + len, 0, count - len); } - memcpy(val, buf, count); + memcpy(val, buf, len); kfree(buf); nvmem_cell_put(cell); From patchwork Tue Feb 6 14:37:09 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Markus Schneider-Pargmann X-Patchwork-Id: 13547385 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0F721C48297 for ; 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This area is required by other devices/drivers as well, so using nvmem-cells can be a cleaner way to describe which information are used. If nvmem-cells are supplied, the address range is not required. Cells chipvariant, chippartno and chipmanufacturer are introduced to cover all required information. Signed-off-by: Markus Schneider-Pargmann Reviewed-by: Andrew Davis --- .../bindings/hwinfo/ti,k3-socinfo.yaml | 23 ++++++++++++++++++- 1 file changed, 22 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/hwinfo/ti,k3-socinfo.yaml b/Documentation/devicetree/bindings/hwinfo/ti,k3-socinfo.yaml index dada28b47ea0..f085b7275b7d 100644 --- a/Documentation/devicetree/bindings/hwinfo/ti,k3-socinfo.yaml +++ b/Documentation/devicetree/bindings/hwinfo/ti,k3-socinfo.yaml @@ -26,9 +26,24 @@ properties: reg: maxItems: 1 + nvmem-cells: + $ref: /schemas/types.yaml#/definitions/phandle-array + + nvmem-cell-names: + items: + - const: chipvariant + - const: chippartno + - const: chipmanufacturer + required: - compatible - - reg + +oneOf: + - required: + - reg + - required: + - nvmem-cells + - nvmem-cell-names additionalProperties: false @@ -38,3 +53,9 @@ examples: compatible = "ti,am654-chipid"; reg = <0x43000014 0x4>; }; + - | + chipid: chipid@14 { + compatible = "ti,am654-chipid"; + nvmem-cells = <&chip_variant>, <&chip_partno>, <&chip_manufacturer>; + nvmem-cell-names = "chipvariant", "chippartno", "chipmanufacturer"; + }; From patchwork Tue Feb 6 14:37:10 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Markus Schneider-Pargmann X-Patchwork-Id: 13547386 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BB6F2C4828D for ; Tue, 6 Feb 2024 14:38:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; 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Tue, 06 Feb 2024 06:38:00 -0800 (PST) From: Markus Schneider-Pargmann To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Srinivas Kandagatla , Santosh Shilimkar Cc: Andrew Davis , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Markus Schneider-Pargmann Subject: [PATCH 3/4] soc: ti: k3-socinfo: Add support for nvmem cells Date: Tue, 6 Feb 2024 15:37:10 +0100 Message-ID: <20240206143711.2410135-4-msp@baylibre.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240206143711.2410135-1-msp@baylibre.com> References: <20240206143711.2410135-1-msp@baylibre.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240206_063802_778789_53EACC23 X-CRM114-Status: GOOD ( 17.19 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Support nvmem cells to retrieve chip variant, part number and manufacturer. As multiple different devices depend on these information it is cleaner to abstract efuse fields with nvmem cells. If chipvariant nvmem cell is found, the driver assumes nvmem cells are being used and tries to find the other fields as well. If it can't find 'chipvariant' it will try to create a regmap. Some prints had to be updated as I don't read the full jtagid anymore. Signed-off-by: Markus Schneider-Pargmann Acked-by: Andrew Davis --- drivers/soc/ti/k3-socinfo.c | 67 +++++++++++++++++++++++++------------ 1 file changed, 46 insertions(+), 21 deletions(-) diff --git a/drivers/soc/ti/k3-socinfo.c b/drivers/soc/ti/k3-socinfo.c index 59101bf7cf23..99794aeb6206 100644 --- a/drivers/soc/ti/k3-socinfo.c +++ b/drivers/soc/ti/k3-socinfo.c @@ -6,6 +6,7 @@ */ #include +#include #include #include #include @@ -114,45 +115,68 @@ static int k3_chipinfo_probe(struct platform_device *pdev) struct regmap *regmap; u32 partno_id; u32 variant; - u32 jtag_id; u32 mfg; int ret; - regmap = device_node_to_regmap(node); - if (IS_ERR(regmap)) - return PTR_ERR(regmap); - - ret = regmap_read(regmap, CTRLMMR_WKUP_JTAGID_REG, &jtag_id); - if (ret < 0) - return ret; - - mfg = (jtag_id & CTRLMMR_WKUP_JTAGID_MFG_MASK) >> - CTRLMMR_WKUP_JTAGID_MFG_SHIFT; + ret = nvmem_cell_read_u32(dev, "chipvariant", &variant); + if (ret && ret != -ENOENT) + return dev_err_probe(dev, ret, + "Failed to read nvmem cell 'chipvariant': %pe", + ERR_PTR(ret)); + + if (ret != -ENOENT) { + ret = nvmem_cell_read_u32(dev, "chippartno", &partno_id); + if (ret) + return dev_err_probe(dev, ret, + "Failed to read nvmem cell 'chippartno': %pe", + ERR_PTR(ret)); + + ret = nvmem_cell_read_u32(dev, "chipmanufacturer", &mfg); + if (ret) + return dev_err_probe(dev, ret, + "Failed to read nvmem cell 'chipmanufacturer': %pe", + ERR_PTR(ret)); + } else { + u32 jtag_id; + + regmap = device_node_to_regmap(node); + if (IS_ERR(regmap)) + return PTR_ERR(regmap); + + ret = regmap_read(regmap, CTRLMMR_WKUP_JTAGID_REG, &jtag_id); + if (ret < 0) + return ret; + + mfg = (jtag_id & CTRLMMR_WKUP_JTAGID_MFG_MASK) >> + CTRLMMR_WKUP_JTAGID_MFG_SHIFT; + + variant = (jtag_id & CTRLMMR_WKUP_JTAGID_VARIANT_MASK) >> + CTRLMMR_WKUP_JTAGID_VARIANT_SHIFT; + + partno_id = (jtag_id & CTRLMMR_WKUP_JTAGID_PARTNO_MASK) >> + CTRLMMR_WKUP_JTAGID_PARTNO_SHIFT; + } if (mfg != CTRLMMR_WKUP_JTAGID_MFG_TI) { dev_err(dev, "Invalid MFG SoC\n"); return -ENODEV; } - variant = (jtag_id & CTRLMMR_WKUP_JTAGID_VARIANT_MASK) >> - CTRLMMR_WKUP_JTAGID_VARIANT_SHIFT; - - partno_id = (jtag_id & CTRLMMR_WKUP_JTAGID_PARTNO_MASK) >> - CTRLMMR_WKUP_JTAGID_PARTNO_SHIFT; - soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL); if (!soc_dev_attr) return -ENOMEM; ret = k3_chipinfo_partno_to_names(partno_id, soc_dev_attr); if (ret) { - dev_err(dev, "Unknown SoC JTAGID[0x%08X]: %d\n", jtag_id, ret); + dev_err(dev, "Unknown SoC JTAGID[variant=0x%X, partno=0x%X]: %d\n", + variant, partno_id, ret); goto err; } ret = k3_chipinfo_variant_to_sr(partno_id, variant, soc_dev_attr); if (ret) { - dev_err(dev, "Unknown SoC SR[0x%08X]: %d\n", jtag_id, ret); + dev_err(dev, "Unknown SoC SR[variant=0x%X, partno=0x%X]: %d\n", + variant, partno_id, ret); goto err; } @@ -166,9 +190,10 @@ static int k3_chipinfo_probe(struct platform_device *pdev) goto err_free_rev; } - dev_info(dev, "Family:%s rev:%s JTAGID[0x%08x] Detected\n", + dev_info(dev, "Family:%s rev:%s JTAGID[variant=0x%X, partno=0x%X] Detected\n", soc_dev_attr->family, - soc_dev_attr->revision, jtag_id); + soc_dev_attr->revision, + variant, partno_id); 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Tue, 06 Feb 2024 06:38:01 -0800 (PST) From: Markus Schneider-Pargmann To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Srinivas Kandagatla , Santosh Shilimkar Cc: Andrew Davis , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Markus Schneider-Pargmann Subject: [PATCH 4/4] arm64: dts: ti: k3-am62-wakeup: Add chip efuse nodes Date: Tue, 6 Feb 2024 15:37:11 +0100 Message-ID: <20240206143711.2410135-5-msp@baylibre.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240206143711.2410135-1-msp@baylibre.com> References: <20240206143711.2410135-1-msp@baylibre.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240206_063803_693095_86AF07B7 X-CRM114-Status: GOOD ( 10.82 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add efuse nodes describing chip variant and speed grade. Signed-off-by: Markus Schneider-Pargmann --- arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi | 36 +++++++++++++++++++++- 1 file changed, 35 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi index fef76f52a52e..14419df43624 100644 --- a/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi @@ -14,10 +14,44 @@ wkup_conf: syscon@43000000 { #size-cells = <1>; ranges = <0x0 0x00 0x43000000 0x20000>; + wkup_efuse: efuse@0 { + compatible = "socionext,uniphier-efuse"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x0 0x200>; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + chip_manufacturer: jtagidmfg@14 { + reg = <0x14 0x2>; + bits = <1 11>; + }; + + chip_partno: jtagidpartno@15 { + reg = <0x15 0x3>; + bits = <4 16>; + }; + + chip_variant: jtagidvariant@17 { + reg = <0x17 0x1>; + bits = <4 4>; + }; + + chip_speed: jtaguseridspeed@18 { + reg = <0x18 0x4>; + bits = <6 5>; + }; + }; + }; + chipid: chipid@14 { bootph-all; compatible = "ti,am654-chipid"; - reg = <0x14 0x4>; + nvmem-cells = <&chip_variant>, <&chip_partno>, <&chip_manufacturer>; + nvmem-cell-names = "chipvariant", "chippartno", "chipmanufacturer"; }; };