From patchwork Thu Feb 8 12:09:56 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Ilpo_J=C3=A4rvinen?= X-Patchwork-Id: 13549726 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4AB296F535; Thu, 8 Feb 2024 12:10:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.17 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707394217; cv=none; b=fLdN3pi+E0lQXVF/TmIxguhypqL+GAqLnOfQmH4e8e6bKme5CM64wHYzNAxz+ka1U8Faswlz7o1pK0KDs3t4i0Lo0lyuuYq/dUTi4rhEoR2702zIYprmPfB7gJOa3kEJKYuA3KmTkvr9Ok9mow/agNG7pdN+pGJvxYdmhoFrGC4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707394217; c=relaxed/simple; bh=X2Muz8pkoRwEhUvH9ti0eknrxae4vqD1PWSyx9/gso0=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version:Content-Type; b=k0LgsBpARegaw3w5NdsEB3RcThdT2maI/LkNn7wqb7Ra6gGHMurjvPosmEkdkTsxjL+Uowye6H4HPjFT0hzzNKwXNgkrkNviTqHmkMtCikbcCz6qTM6/scij+aNwZOljge2OvUZJ7UDqy60WhCqMr/ZCdPvmvjYXjLtmFF5R51c= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=H/Dt3l7y; arc=none smtp.client-ip=198.175.65.17 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="H/Dt3l7y" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1707394216; x=1738930216; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=X2Muz8pkoRwEhUvH9ti0eknrxae4vqD1PWSyx9/gso0=; b=H/Dt3l7yGZJ4WCUIGhrvpvs8vgp/fqSdn4/0G2wLaRzkhA3Udoy+RRgu SyhLH1Cc/qi3AXZ404Nhgj0Nn8rhvNYCPpPihSVVubUwkLdajcEcIgalS xL2CmUUikdwB8YsPXL/Mzw/QnQLao37FPFg2fOFPhjCMYuKUjL/qqLBm8 p1qFwFYLMJ0eTVkxslFrmD6vbPAFjvnEgDwICpfhdCrIVZ8YqnNk3HbOd Tu3KNIt0tmuU3byJR037jSGCTkiCdZSY0NqMVk3KtHqRdkr2OBfyy3h6u CorYwTq8cs2HpH2Giz9NhPLjNia4ImT6IhlyWnzyVrhjFDvCfWviqMagv A==; X-IronPort-AV: E=McAfee;i="6600,9927,10977"; a="1341297" X-IronPort-AV: E=Sophos;i="6.05,253,1701158400"; d="scan'208";a="1341297" Received: from fmviesa010.fm.intel.com ([10.60.135.150]) by orvoesa109.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Feb 2024 04:10:16 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.05,253,1701158400"; d="scan'208";a="1625935" Received: from ijarvine-desk1.ger.corp.intel.com (HELO localhost) ([10.246.52.95]) by fmviesa010-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Feb 2024 04:10:13 -0800 From: =?utf-8?q?Ilpo_J=C3=A4rvinen?= To: Thomas Bogendoerfer , linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org, Sergio Paracuellos Cc: =?utf-8?q?Ilpo_J=C3=A4rvinen?= Subject: [PATCH v2 1/4] MIPS: lantiq: Remove unused function pointer variables Date: Thu, 8 Feb 2024 14:09:56 +0200 Message-Id: <20240208120959.2513-2-ilpo.jarvinen@linux.intel.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240208120959.2513-1-ilpo.jarvinen@linux.intel.com> References: <20240208120959.2513-1-ilpo.jarvinen@linux.intel.com> Precedence: bulk X-Mailing-List: linux-mips@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Ever since introduction in the commit e47d488935ed ("MIPS: Lantiq: Add PCI controller support.") ltqpci_plat_dev_init has been unused. In 57c8cb8f2429 ("MIPS: pci: convert lantiq driver to OF") also ltq_pci_plat_arch_init was introduced. With those commit being more than 10 years ago, it seem neither is going to get used anytime soon. Thus, remove both unused function pointer variables. Signed-off-by: Ilpo Järvinen --- arch/mips/pci/fixup-lantiq.c | 9 --------- 1 file changed, 9 deletions(-) diff --git a/arch/mips/pci/fixup-lantiq.c b/arch/mips/pci/fixup-lantiq.c index 13009666204f..8bcc136976dc 100644 --- a/arch/mips/pci/fixup-lantiq.c +++ b/arch/mips/pci/fixup-lantiq.c @@ -7,17 +7,8 @@ #include #include -int (*ltq_pci_plat_arch_init)(struct pci_dev *dev) = NULL; -int (*ltq_pci_plat_dev_init)(struct pci_dev *dev) = NULL; - int pcibios_plat_dev_init(struct pci_dev *dev) { - if (ltq_pci_plat_arch_init) - return ltq_pci_plat_arch_init(dev); - - if (ltq_pci_plat_dev_init) - return ltq_pci_plat_dev_init(dev); - return 0; } From patchwork Thu Feb 8 12:09:57 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Ilpo_J=C3=A4rvinen?= X-Patchwork-Id: 13549727 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6142F71B41; Thu, 8 Feb 2024 12:10:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.17 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707394224; cv=none; b=sBxfaK5aI392R31TMTnCxIZpaDBIFTzUHQqq01h9hIvgtSLcd06WCq7qrseVD/40BGwITrPnnjYwVahNfJX0jnWSKaAtfMfs0NS7hutMYLuG1VmtbHMmIVstzGILBChhruiP47XhzBJ8VipS8qZ9xVYgbqjJZ/loXYaflXvGCLQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707394224; c=relaxed/simple; bh=JPdk+Lb9y/P3Nc1X0LzlAL+t7jsIt4F4AidZQorL+eU=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version:Content-Type; b=mEB6kCqdZu5yebB4xOSrDbw0SxG/DoB+S+du5eFzTKH6LtCAzM9zpo98528Rq4ppO2dLDkOjlp6scwmzuh3P2QXlUgJlk6yQs0JLWNAdhIUQ/mDHnWyCICU9b+UlOdM9ydvZr+IWlus47WV3ZJc3jQKWIZmY5SvcTBbtcDtg0UY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=CW1SfG+j; arc=none smtp.client-ip=198.175.65.17 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="CW1SfG+j" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1707394223; x=1738930223; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=JPdk+Lb9y/P3Nc1X0LzlAL+t7jsIt4F4AidZQorL+eU=; b=CW1SfG+jfDU1PP14CM2wroyUCTmSr7SCkhTgBk/SaEyVQrSl8R3jD5/j 5Pngr7RKaQNmZ95cCV84lYDJsBdQXBd7XiCJEJU9LldffxQDGXe/R7GSc 2Nm75ZgVsSBqLyPq0gZdk5Q1gR9MWT4o0pYHTEQdyhLgkqlH7dT5uT/HI Ttbmi3EqGtSg3kxEW0UtVndx1fg8lLR0SdgHxOkxV0IiAqPfK0r3d+ywE OaypUek0AQPzw3tNABnNv56lyyBWjKVjsSPQDe2AOTvKvEVNk0gulpXZd V+GNG/Z3gsj8bHTMmzNqyPqeR/3IjPU6myp5wp+vchd0VpGPDWiHG2R7v g==; X-IronPort-AV: E=McAfee;i="6600,9927,10977"; a="1341322" X-IronPort-AV: E=Sophos;i="6.05,253,1701158400"; d="scan'208";a="1341322" Received: from fmviesa010.fm.intel.com ([10.60.135.150]) by orvoesa109.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Feb 2024 04:10:23 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.05,253,1701158400"; d="scan'208";a="1625945" Received: from ijarvine-desk1.ger.corp.intel.com (HELO localhost) ([10.246.52.95]) by fmviesa010-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Feb 2024 04:10:20 -0800 From: =?utf-8?q?Ilpo_J=C3=A4rvinen?= To: Thomas Bogendoerfer , linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org, Sergio Paracuellos Cc: =?utf-8?q?Ilpo_J=C3=A4rvinen?= Subject: [PATCH v2 2/4] MIPS: ath79: Don't return PCIBIOS_* code from pcibios_enable_device() Date: Thu, 8 Feb 2024 14:09:57 +0200 Message-Id: <20240208120959.2513-3-ilpo.jarvinen@linux.intel.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240208120959.2513-1-ilpo.jarvinen@linux.intel.com> References: <20240208120959.2513-1-ilpo.jarvinen@linux.intel.com> Precedence: bulk X-Mailing-List: linux-mips@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 pcibios_plat_dev_init() is called from pcibios_enable_device() that should return normal errnos, not PCIBIOS return codes. In this case the impact is only cosmetic because PCIBIOS_SUCCESSFUL equals 0 that is success code with errnos as well. Nonetheless, remove the inconsistency by replacing the PCIBIOS_SUCCESSFUL with 0. Signed-off-by: Ilpo Järvinen --- arch/mips/pci/fixup-ath79.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/mips/pci/fixup-ath79.c b/arch/mips/pci/fixup-ath79.c index 09a4ce53424f..6a6c4f58f7f4 100644 --- a/arch/mips/pci/fixup-ath79.c +++ b/arch/mips/pci/fixup-ath79.c @@ -9,7 +9,7 @@ int pcibios_plat_dev_init(struct pci_dev *dev) { - return PCIBIOS_SUCCESSFUL; + return 0; } int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) From patchwork Thu Feb 8 12:09:58 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Ilpo_J=C3=A4rvinen?= X-Patchwork-Id: 13549728 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9DBC274E31; Thu, 8 Feb 2024 12:10:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.17 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707394231; cv=none; b=X0Gaqj83R+XR1HQpUHbigBAA26CawlpvzWLwvAGSAclLa2m0v3lfIxyYIjVWTPXYM0PH6oTfsvCXdFEZnOnOFtluR4gQIoWPbNt/3dC2wB4aT11Wo+TZfIMbNvn9Y4MXWXknFn0Bov811XC1WPQz45S+ojoFZzk6YxjGh5qnUUY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707394231; c=relaxed/simple; bh=ivHn9eMnqjSo1Ck3bYq1BD7aGM0SlKEDNFiHnIfMXAA=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version:Content-Type; b=N0VoSOCDejFg7twqSQsVA/e4Wow6qQLzLfJ3S5Ofn2kqfZAui8QMTfLeanINpDJ9oYl8EcxZtkXE4aEAb1q49pwIfMl7Q7XVOOBJJf4k8dG/1DT9Gi+HFpVHpEP20gJEApcroLqS0xjVGOkY8C1RStQL/r0LJka+Q2Ud0QcoHw4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=HGk9B80S; arc=none smtp.client-ip=198.175.65.17 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="HGk9B80S" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1707394230; x=1738930230; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=ivHn9eMnqjSo1Ck3bYq1BD7aGM0SlKEDNFiHnIfMXAA=; b=HGk9B80SwqoBiAWLwhqYRXOeRbh3ANwta7SzF/DrX5q9YQtqO4bApgo5 7TYOYjSdpoz/jfId87Ru+0avKbHkhdvUN7zRfpzoIIRlJQndUWAJSqVOM 5wDe4McS0KvZHys8rQM9kUbV2T87LggUENIQ3MRHHZukWPYKKUti9XwRJ bUqbJR3/gPWR9y2Sv94zTzP97r7npQgK1+IvooKqwQJJEGKFR78kn/4Ey a3InvSsZJy3JZIwkMskkMsHhGDJ6KEpy5YaXgA8goPQ+A7Gmh+QIrsLIj Bm3UbLjzF03UqP+3UuDANuKxPAL1M2lcptV7qVPzWvuIL2GLpuBccr/Dc A==; X-IronPort-AV: E=McAfee;i="6600,9927,10977"; a="1341344" X-IronPort-AV: E=Sophos;i="6.05,253,1701158400"; d="scan'208";a="1341344" Received: from fmviesa010.fm.intel.com ([10.60.135.150]) by orvoesa109.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Feb 2024 04:10:29 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.05,253,1701158400"; d="scan'208";a="1625955" Received: from ijarvine-desk1.ger.corp.intel.com (HELO localhost) ([10.246.52.95]) by fmviesa010-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Feb 2024 04:10:27 -0800 From: =?utf-8?q?Ilpo_J=C3=A4rvinen?= To: Thomas Bogendoerfer , linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org, Sergio Paracuellos Cc: =?utf-8?q?Ilpo_J=C3=A4rvinen?= Subject: [PATCH v2 3/4] MIPS: PCI: Return PCIBIOS_* from tx4927_pci_config_read/write() Date: Thu, 8 Feb 2024 14:09:58 +0200 Message-Id: <20240208120959.2513-4-ilpo.jarvinen@linux.intel.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240208120959.2513-1-ilpo.jarvinen@linux.intel.com> References: <20240208120959.2513-1-ilpo.jarvinen@linux.intel.com> Precedence: bulk X-Mailing-List: linux-mips@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 pci_ops .read/.write must return PCIBIOS_* codes but tx4927_pci_config_read/write() return -1 when mkaddr() cannot find devfn from the root bus. Return PCIBIOS_DEVICE_NOT_FOUND instead and pass that onward in the call chain instead of overwriting the return value. Also converts 0 -> PCIBIOS_SUCCESSFUL which has only cosmetic impact. Signed-off-by: Ilpo Järvinen Reviewed-by: Sergio Paracuellos --- arch/mips/pci/ops-tx4927.c | 16 ++++++++++------ 1 file changed, 10 insertions(+), 6 deletions(-) diff --git a/arch/mips/pci/ops-tx4927.c b/arch/mips/pci/ops-tx4927.c index f7802f100401..670efbc5c585 100644 --- a/arch/mips/pci/ops-tx4927.c +++ b/arch/mips/pci/ops-tx4927.c @@ -60,7 +60,7 @@ static int mkaddr(struct pci_bus *bus, unsigned int devfn, int where, { if (bus->parent == NULL && devfn >= PCI_DEVFN(TX4927_PCIC_MAX_DEVNU, 0)) - return -1; + return PCIBIOS_DEVICE_NOT_FOUND; __raw_writel(((bus->number & 0xff) << 0x10) | ((devfn & 0xff) << 0x08) | (where & 0xfc) | (bus->parent ? 1 : 0), @@ -69,7 +69,7 @@ static int mkaddr(struct pci_bus *bus, unsigned int devfn, int where, __raw_writel((__raw_readl(&pcicptr->pcistatus) & 0x0000ffff) | (PCI_STATUS_REC_MASTER_ABORT << 16), &pcicptr->pcistatus); - return 0; + return PCIBIOS_SUCCESSFUL; } static int check_abort(struct tx4927_pcic_reg __iomem *pcicptr) @@ -140,10 +140,12 @@ static int tx4927_pci_config_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val) { struct tx4927_pcic_reg __iomem *pcicptr = pci_bus_to_pcicptr(bus); + int ret; - if (mkaddr(bus, devfn, where, pcicptr)) { + ret = mkaddr(bus, devfn, where, pcicptr); + if (ret != PCIBIOS_SUCCESSFUL) { *val = 0xffffffff; - return -1; + return ret; } switch (size) { case 1: @@ -162,9 +164,11 @@ static int tx4927_pci_config_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val) { struct tx4927_pcic_reg __iomem *pcicptr = pci_bus_to_pcicptr(bus); + int ret; - if (mkaddr(bus, devfn, where, pcicptr)) - return -1; + ret = mkaddr(bus, devfn, where, pcicptr); + if (ret != PCIBIOS_SUCCESSFUL) + return ret; switch (size) { case 1: icd_writeb(val, where & 3, pcicptr); From patchwork Thu Feb 8 12:09:59 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Ilpo_J=C3=A4rvinen?= X-Patchwork-Id: 13549729 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C9F0B71B37; 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X-IronPort-AV: E=McAfee;i="6600,9927,10977"; a="1341362" X-IronPort-AV: E=Sophos;i="6.05,253,1701158400"; d="scan'208";a="1341362" Received: from fmviesa010.fm.intel.com ([10.60.135.150]) by orvoesa109.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Feb 2024 04:10:36 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.05,253,1701158400"; d="scan'208";a="1625964" Received: from ijarvine-desk1.ger.corp.intel.com (HELO localhost) ([10.246.52.95]) by fmviesa010-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Feb 2024 04:10:33 -0800 From: =?utf-8?q?Ilpo_J=C3=A4rvinen?= To: Thomas Bogendoerfer , linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org, Sergio Paracuellos Cc: =?utf-8?q?Ilpo_J=C3=A4rvinen?= Subject: [PATCH v2 4/4] MIPS: TXx9: Use PCI_SET_ERROR_RESPONSE() Date: Thu, 8 Feb 2024 14:09:59 +0200 Message-Id: <20240208120959.2513-5-ilpo.jarvinen@linux.intel.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240208120959.2513-1-ilpo.jarvinen@linux.intel.com> References: <20240208120959.2513-1-ilpo.jarvinen@linux.intel.com> Precedence: bulk X-Mailing-List: linux-mips@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Instead of literal, PCI error value should be set with PCI_SET_ERROR_RESPONSE(). Use it in tx4927_pci_config_read(). Signed-off-by: Ilpo Järvinen --- arch/mips/pci/ops-tx4927.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/mips/pci/ops-tx4927.c b/arch/mips/pci/ops-tx4927.c index 670efbc5c585..37087f4137ee 100644 --- a/arch/mips/pci/ops-tx4927.c +++ b/arch/mips/pci/ops-tx4927.c @@ -144,7 +144,7 @@ static int tx4927_pci_config_read(struct pci_bus *bus, unsigned int devfn, ret = mkaddr(bus, devfn, where, pcicptr); if (ret != PCIBIOS_SUCCESSFUL) { - *val = 0xffffffff; + PCI_SET_ERROR_RESPONSE(val); return ret; } switch (size) {