From patchwork Thu Feb 8 20:11:55 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dave Jiang X-Patchwork-Id: 13550425 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2483438395; Thu, 8 Feb 2024 20:15:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707423310; cv=none; b=tesCzHhueXVV03LesDZGIUihHcvW2xYHDoKp3affO9OJYJL23aWr+9vC25E7nN5kQJgftL6MAzIpPpB5Jmel4T25AtNoyjaWdFh4tbIVoMlPdfuxu8XgT0B68oId3l1tD3nP7G2+Gc55SDT1QuhBAi1c4t6DOXEu3gpg5Vq4qcQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707423310; c=relaxed/simple; bh=SnFD4thDmzHFnP2XNfMQHGr/CjUgf+A6Ds1ME3vLLWM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=HESJjeUlLAtIz0bTYRwpbthMeffdHPDn9/Auie5Mno89lq2G1+AdLnjeV5vBGDwK3unAFOe2K+7GaFaSVWAADHXlZ0hOahWb3t4wD3UvLZE7P13wYm9XyVYVQGGtsz08vAfEaEVfyOhIjEfw6JLEufHShWPcFXIz+mXt2BAimKE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 Received: by smtp.kernel.org (Postfix) with ESMTPSA id C9595C43390; Thu, 8 Feb 2024 20:15:09 +0000 (UTC) From: Dave Jiang To: linux-cxl@vger.kernel.org, nvdimm@lists.linux.dev Cc: vishal.l.verma@intel.com, Alison Schofield Subject: [NDCTL PATCH v7 1/4] ndctl: cxl: Add QoS class retrieval for the root decoder Date: Thu, 8 Feb 2024 13:11:55 -0700 Message-ID: <20240208201435.2081583-2-dave.jiang@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240208201435.2081583-1-dave.jiang@intel.com> References: <20240208201435.2081583-1-dave.jiang@intel.com> Precedence: bulk X-Mailing-List: nvdimm@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add libcxl API to retrieve the QoS class for the root decoder. Also add support to display the QoS class for the root decoder through the 'cxl list' command. The qos_class is the QTG ID of the CFMWS window that represents the root decoder. Reviewed-by: Alison Schofield Signed-off-by: Dave Jiang --- v7: - Remove QOS flag entirely. (Alison) --- cxl/json.c | 10 ++++++++++ cxl/lib/libcxl.c | 14 ++++++++++++++ cxl/lib/libcxl.sym | 1 + cxl/lib/private.h | 1 + cxl/libcxl.h | 3 +++ 5 files changed, 29 insertions(+) diff --git a/cxl/json.c b/cxl/json.c index 6fb17582a1cb..1d380e23d6ff 100644 --- a/cxl/json.c +++ b/cxl/json.c @@ -1062,6 +1062,16 @@ struct json_object *util_cxl_decoder_to_json(struct cxl_decoder *decoder, jobj); } + if (cxl_port_is_root(port)) { + int qos_class = cxl_root_decoder_get_qos_class(decoder); + + if (qos_class != CXL_QOS_CLASS_NONE) { + jobj = json_object_new_int(qos_class); + if (jobj) + json_object_object_add(jdecoder, "qos_class", jobj); + } + } + json_object_set_userdata(jdecoder, decoder, NULL); return jdecoder; } diff --git a/cxl/lib/libcxl.c b/cxl/lib/libcxl.c index 1537a33d370e..9a1ac7001803 100644 --- a/cxl/lib/libcxl.c +++ b/cxl/lib/libcxl.c @@ -2229,6 +2229,12 @@ static void *add_cxl_decoder(void *parent, int id, const char *cxldecoder_base) else decoder->interleave_ways = strtoul(buf, NULL, 0); + sprintf(path, "%s/qos_class", cxldecoder_base); + if (sysfs_read_attr(ctx, path, buf) < 0) + decoder->qos_class = CXL_QOS_CLASS_NONE; + else + decoder->qos_class = atoi(buf); + switch (port->type) { case CXL_PORT_ENDPOINT: sprintf(path, "%s/dpa_resource", cxldecoder_base); @@ -2423,6 +2429,14 @@ CXL_EXPORT unsigned long long cxl_decoder_get_size(struct cxl_decoder *decoder) return decoder->size; } +CXL_EXPORT int cxl_root_decoder_get_qos_class(struct cxl_decoder *decoder) +{ + if (!cxl_port_is_root(decoder->port)) + return -EINVAL; + + return decoder->qos_class; +} + CXL_EXPORT unsigned long long cxl_decoder_get_dpa_resource(struct cxl_decoder *decoder) { diff --git a/cxl/lib/libcxl.sym b/cxl/lib/libcxl.sym index 2149f84d764e..384fea2c25e3 100644 --- a/cxl/lib/libcxl.sym +++ b/cxl/lib/libcxl.sym @@ -282,4 +282,5 @@ global: LIBCXL_8 { global: cxl_memdev_wait_sanitize; + cxl_root_decoder_get_qos_class; } LIBCXL_7; diff --git a/cxl/lib/private.h b/cxl/lib/private.h index b26a8629e047..4847ff448f71 100644 --- a/cxl/lib/private.h +++ b/cxl/lib/private.h @@ -144,6 +144,7 @@ struct cxl_decoder { struct list_head targets; struct list_head regions; struct list_head stale_regions; + int qos_class; }; enum cxl_decode_state { diff --git a/cxl/libcxl.h b/cxl/libcxl.h index 352b3a866f63..e5c08da77f77 100644 --- a/cxl/libcxl.h +++ b/cxl/libcxl.h @@ -173,6 +173,8 @@ struct cxl_dport *cxl_port_get_dport_by_memdev(struct cxl_port *port, for (dport = cxl_dport_get_first(port); dport != NULL; \ dport = cxl_dport_get_next(dport)) +#define CXL_QOS_CLASS_NONE -1 + struct cxl_decoder; struct cxl_decoder *cxl_decoder_get_first(struct cxl_port *port); struct cxl_decoder *cxl_decoder_get_next(struct cxl_decoder *decoder); @@ -184,6 +186,7 @@ unsigned long long cxl_decoder_get_dpa_resource(struct cxl_decoder *decoder); unsigned long long cxl_decoder_get_dpa_size(struct cxl_decoder *decoder); unsigned long long cxl_decoder_get_max_available_extent(struct cxl_decoder *decoder); +int cxl_root_decoder_get_qos_class(struct cxl_decoder *decoder); enum cxl_decoder_mode { CXL_DECODER_MODE_NONE, From patchwork Thu Feb 8 20:11:56 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dave Jiang X-Patchwork-Id: 13550426 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8ACFA3612A; Thu, 8 Feb 2024 20:15:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707423312; cv=none; b=sgN2VpIKDvd2XibOFD2gK/WQVdCJuXIGh/Fa3ZGPTyfSwIlqOhIG1rqJAg8EKOHUU7oy0afuNUZ8yrK/HMvl9EZr91oIeSmf42Nco8+J2RcfIQ2O+5PR6M5REMjrTbJOuagYnBdISrV0z2Jl2suqJwTu3Hchjy2DCLwVTbT7h7A= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707423312; c=relaxed/simple; bh=QQslDRUw3qJ5pjWjjXuFKY/uwOEaJc0CC+jkUSPMC5g=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=iXRp6xmpPyPLCg/ChKxPXdj7IWq3KUwTR80DF8i6mdUHFLwSE+Zl23mMSWq1j0CjGPTfC2Vh/lkSeu4sqeotKhPpuHnAANSJWxNi7hMuCSQ49j2eBHzaZKDvnTTZxoOQTYVExEhQvDMSbH4FGi9YW991Ls27uW9kkurY11iODP8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 Received: by smtp.kernel.org (Postfix) with ESMTPSA id E0DE1C433F1; Thu, 8 Feb 2024 20:15:11 +0000 (UTC) From: Dave Jiang To: linux-cxl@vger.kernel.org, nvdimm@lists.linux.dev Cc: vishal.l.verma@intel.com, Alison Schofield Subject: [NDCTL PATCH v7 2/4] ndctl: cxl: Add QoS class support for the memory device Date: Thu, 8 Feb 2024 13:11:56 -0700 Message-ID: <20240208201435.2081583-3-dave.jiang@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240208201435.2081583-1-dave.jiang@intel.com> References: <20240208201435.2081583-1-dave.jiang@intel.com> Precedence: bulk X-Mailing-List: nvdimm@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add libcxl API to retrieve the QoS class tokens for the memory devices. Two API calls are added. One for 'ram' or 'volatile' mode and another for 'pmem' or 'persistent' mode. Support also added for displaying the QoS class tokens through the 'cxl list' command. Reviewed-by: Alison Schofield Signed-off-by: Dave Jiang --- v7: Add check for invalid qos_class for json --- cxl/json.c | 15 +++++++++++++++ cxl/lib/libcxl.c | 22 ++++++++++++++++++++++ cxl/lib/libcxl.sym | 2 ++ cxl/lib/private.h | 2 ++ cxl/libcxl.h | 2 ++ 5 files changed, 43 insertions(+) diff --git a/cxl/json.c b/cxl/json.c index 1d380e23d6ff..c8bd8c27447a 100644 --- a/cxl/json.c +++ b/cxl/json.c @@ -777,6 +777,7 @@ struct json_object *util_cxl_memdev_to_json(struct cxl_memdev *memdev, struct json_object *jdev, *jobj; unsigned long long serial, size; int numa_node; + int qos_class; jdev = json_object_new_object(); if (!jdev) @@ -791,6 +792,13 @@ struct json_object *util_cxl_memdev_to_json(struct cxl_memdev *memdev, jobj = util_json_object_size(size, flags); if (jobj) json_object_object_add(jdev, "pmem_size", jobj); + + qos_class = cxl_memdev_get_pmem_qos_class(memdev); + if (qos_class != CXL_QOS_CLASS_NONE) { + jobj = json_object_new_int(qos_class); + if (jobj) + json_object_object_add(jdev, "pmem_qos_class", jobj); + } } size = cxl_memdev_get_ram_size(memdev); @@ -798,6 +806,13 @@ struct json_object *util_cxl_memdev_to_json(struct cxl_memdev *memdev, jobj = util_json_object_size(size, flags); if (jobj) json_object_object_add(jdev, "ram_size", jobj); + + qos_class = cxl_memdev_get_ram_qos_class(memdev); + if (qos_class != CXL_QOS_CLASS_NONE) { + jobj = json_object_new_int(qos_class); + if (jobj) + json_object_object_add(jdev, "ram_qos_class", jobj); + } } if (flags & UTIL_JSON_HEALTH) { diff --git a/cxl/lib/libcxl.c b/cxl/lib/libcxl.c index 9a1ac7001803..6c293f1dfc91 100644 --- a/cxl/lib/libcxl.c +++ b/cxl/lib/libcxl.c @@ -1260,6 +1260,18 @@ static void *add_cxl_memdev(void *parent, int id, const char *cxlmem_base) goto err_read; memdev->ram_size = strtoull(buf, NULL, 0); + sprintf(path, "%s/pmem/qos_class", cxlmem_base); + if (sysfs_read_attr(ctx, path, buf) < 0) + memdev->pmem_qos_class = CXL_QOS_CLASS_NONE; + else + memdev->pmem_qos_class = atoi(buf); + + sprintf(path, "%s/ram/qos_class", cxlmem_base); + if (sysfs_read_attr(ctx, path, buf) < 0) + memdev->ram_qos_class = CXL_QOS_CLASS_NONE; + else + memdev->ram_qos_class = atoi(buf); + sprintf(path, "%s/payload_max", cxlmem_base); if (sysfs_read_attr(ctx, path, buf) < 0) goto err_read; @@ -1483,6 +1495,16 @@ CXL_EXPORT unsigned long long cxl_memdev_get_ram_size(struct cxl_memdev *memdev) return memdev->ram_size; } +CXL_EXPORT int cxl_memdev_get_pmem_qos_class(struct cxl_memdev *memdev) +{ + return memdev->pmem_qos_class; +} + +CXL_EXPORT int cxl_memdev_get_ram_qos_class(struct cxl_memdev *memdev) +{ + return memdev->ram_qos_class; +} + CXL_EXPORT const char *cxl_memdev_get_firmware_verison(struct cxl_memdev *memdev) { return memdev->firmware_version; diff --git a/cxl/lib/libcxl.sym b/cxl/lib/libcxl.sym index 384fea2c25e3..465c78dc6c70 100644 --- a/cxl/lib/libcxl.sym +++ b/cxl/lib/libcxl.sym @@ -283,4 +283,6 @@ LIBCXL_8 { global: cxl_memdev_wait_sanitize; cxl_root_decoder_get_qos_class; + cxl_memdev_get_pmem_qos_class; + cxl_memdev_get_ram_qos_class; } LIBCXL_7; diff --git a/cxl/lib/private.h b/cxl/lib/private.h index 4847ff448f71..07dc8c784f1d 100644 --- a/cxl/lib/private.h +++ b/cxl/lib/private.h @@ -47,6 +47,8 @@ struct cxl_memdev { struct list_node list; unsigned long long pmem_size; unsigned long long ram_size; + int ram_qos_class; + int pmem_qos_class; int payload_max; size_t lsa_size; struct kmod_module *module; diff --git a/cxl/libcxl.h b/cxl/libcxl.h index e5c08da77f77..a180f01cb05e 100644 --- a/cxl/libcxl.h +++ b/cxl/libcxl.h @@ -72,6 +72,8 @@ int cxl_memdev_get_minor(struct cxl_memdev *memdev); struct cxl_ctx *cxl_memdev_get_ctx(struct cxl_memdev *memdev); unsigned long long cxl_memdev_get_pmem_size(struct cxl_memdev *memdev); unsigned long long cxl_memdev_get_ram_size(struct cxl_memdev *memdev); +int cxl_memdev_get_pmem_qos_class(struct cxl_memdev *memdev); +int cxl_memdev_get_ram_qos_class(struct cxl_memdev *memdev); const char *cxl_memdev_get_firmware_verison(struct cxl_memdev *memdev); bool cxl_memdev_fw_update_in_progress(struct cxl_memdev *memdev); size_t cxl_memdev_fw_update_get_remaining(struct cxl_memdev *memdev); From patchwork Thu Feb 8 20:11:57 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dave Jiang X-Patchwork-Id: 13550427 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 59F6A383A9; Thu, 8 Feb 2024 20:15:14 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707423314; cv=none; b=Ml9uDpQPFs0JXeSMHPWunnAdYfXXuHl0OQ7LuHfpzP80rIuLYCHN4EIdT8ltACmOgs6tn2W2KIDFOkk4T+QAsBgsknB92KsIoOK1Xwmjg+ZFthZ1CdCV9NjB1Xv2Icr/Hld6jIWmaOiiNew4v5vZ88EZHsCt6w6cIdqdb7hgT7E= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707423314; c=relaxed/simple; bh=3PA5iTtSWy2AAHcM2OZFk8S0UaV68Shti0Fbzi/CAH8=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=C3s9zwji5lbI4XTzqc16Euj4js42jf6DrkmbuImtqOeuE+fqlt3bMvju3TefoOkOLHrPhZMwAdOxpcYJzSycRdyAXAU9rC/vICGC4sEWoQh2Br1hUioDe5sBG/SQUYphd9pOGP9lcelNxlbmO+8GoBA1GQ7/8NaBEra5mtdr9fQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 Received: by smtp.kernel.org (Postfix) with ESMTPSA id AF087C43394; Thu, 8 Feb 2024 20:15:13 +0000 (UTC) From: Dave Jiang To: linux-cxl@vger.kernel.org, nvdimm@lists.linux.dev Cc: vishal.l.verma@intel.com, Alison Schofield Subject: [NDCTL PATCH v7 3/4] ndctl: cxl: add QoS class check for CXL region creation Date: Thu, 8 Feb 2024 13:11:57 -0700 Message-ID: <20240208201435.2081583-4-dave.jiang@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240208201435.2081583-1-dave.jiang@intel.com> References: <20240208201435.2081583-1-dave.jiang@intel.com> Precedence: bulk X-Mailing-List: nvdimm@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The CFMWS provides a QTG ID. The kernel driver creates a root decoder that represents the CFMWS. A qos_class attribute is exported via sysfs for the root decoder. One or more qos_class tokens are retrieved via QTG ID _DSM from the ACPI0017 device for a CXL memory device. The input for the _DSM is the read and write latency and bandwidth for the path between the device and the CPU. The numbers are constructed by the kernel driver for the _DSM input. When a device is probed, QoS class tokens are retrieved. This is useful for a hot-plugged CXL memory device that does not have regions created. Add a QoS check during region creation. If --enforce-qos/-Q is set and the qos_class mismatches, the region creation will fail. Reviewed-by: Alison Schofield Signed-off-by: Dave Jiang --- v7: - Add qos_class_mismatched to region for cxl list (Vishal) - Add create_region -Q check (Vishal) --- Documentation/cxl/cxl-create-region.txt | 6 +++ cxl/json.c | 6 +++ cxl/lib/libcxl.c | 11 +++++ cxl/lib/libcxl.sym | 2 + cxl/lib/private.h | 1 + cxl/libcxl.h | 2 + cxl/region.c | 56 ++++++++++++++++++++++++- 7 files changed, 83 insertions(+), 1 deletion(-) diff --git a/Documentation/cxl/cxl-create-region.txt b/Documentation/cxl/cxl-create-region.txt index f11a412bddfe..b244af60b8a6 100644 --- a/Documentation/cxl/cxl-create-region.txt +++ b/Documentation/cxl/cxl-create-region.txt @@ -105,6 +105,12 @@ include::bus-option.txt[] supplied, the first cross-host bridge (if available), decoder that supports the largest interleave will be chosen. +-Q:: +--enforce-qos:: + Parameter to enforce qos_class mismatch failure. Region create operation + will fail of the qos_class of the root decoder and one of the memdev that + backs the region mismatches. + include::human-option.txt[] include::debug-option.txt[] diff --git a/cxl/json.c b/cxl/json.c index c8bd8c27447a..27cbacc84f3a 100644 --- a/cxl/json.c +++ b/cxl/json.c @@ -1238,6 +1238,12 @@ struct json_object *util_cxl_region_to_json(struct cxl_region *region, } } + if (cxl_region_qos_class_mismatched(region)) { + jobj = json_object_new_boolean(true); + if (jobj) + json_object_object_add(jregion, "qos_class_mismatched", jobj); + } + json_object_set_userdata(jregion, region, NULL); diff --git a/cxl/lib/libcxl.c b/cxl/lib/libcxl.c index 6c293f1dfc91..3461c4de2097 100644 --- a/cxl/lib/libcxl.c +++ b/cxl/lib/libcxl.c @@ -414,6 +414,17 @@ CXL_EXPORT int cxl_region_is_enabled(struct cxl_region *region) return is_enabled(path); } +CXL_EXPORT void cxl_region_qos_class_mismatched_set(struct cxl_region *region, + bool mismatched) +{ + region->qos_mismatched = mismatched; +} + +CXL_EXPORT bool cxl_region_qos_class_mismatched(struct cxl_region *region) +{ + return region->qos_mismatched; +} + CXL_EXPORT int cxl_region_disable(struct cxl_region *region) { const char *devname = cxl_region_get_devname(region); diff --git a/cxl/lib/libcxl.sym b/cxl/lib/libcxl.sym index 465c78dc6c70..47a9c3cafc71 100644 --- a/cxl/lib/libcxl.sym +++ b/cxl/lib/libcxl.sym @@ -285,4 +285,6 @@ global: cxl_root_decoder_get_qos_class; cxl_memdev_get_pmem_qos_class; cxl_memdev_get_ram_qos_class; + cxl_region_qos_class_mismatched_set; + cxl_region_qos_class_mismatched; } LIBCXL_7; diff --git a/cxl/lib/private.h b/cxl/lib/private.h index 07dc8c784f1d..88448d82d53f 100644 --- a/cxl/lib/private.h +++ b/cxl/lib/private.h @@ -174,6 +174,7 @@ struct cxl_region { struct daxctl_region *dax_region; struct kmod_module *module; struct list_head mappings; + bool qos_mismatched; }; struct cxl_memdev_mapping { diff --git a/cxl/libcxl.h b/cxl/libcxl.h index a180f01cb05e..7795496cdbbd 100644 --- a/cxl/libcxl.h +++ b/cxl/libcxl.h @@ -335,6 +335,8 @@ int cxl_region_clear_target(struct cxl_region *region, int position); int cxl_region_clear_all_targets(struct cxl_region *region); int cxl_region_decode_commit(struct cxl_region *region); int cxl_region_decode_reset(struct cxl_region *region); +void cxl_region_qos_class_mismatched_set(struct cxl_region *region, bool mismatched); +bool cxl_region_qos_class_mismatched(struct cxl_region *region); #define cxl_region_foreach(decoder, region) \ for (region = cxl_region_get_first(decoder); region != NULL; \ diff --git a/cxl/region.c b/cxl/region.c index 3a762db4800e..76df177ef246 100644 --- a/cxl/region.c +++ b/cxl/region.c @@ -32,6 +32,7 @@ static struct region_params { bool force; bool human; bool debug; + bool qos_enforce; } param = { .ways = INT_MAX, .granularity = INT_MAX, @@ -49,6 +50,8 @@ struct parsed_params { const char **argv; struct cxl_decoder *root_decoder; enum cxl_decoder_mode mode; + bool qos_enforce; + bool qos_mismatched; }; enum region_actions { @@ -81,7 +84,8 @@ OPT_STRING('U', "uuid", ¶m.uuid, \ "region uuid", "uuid for the new region (default: autogenerate)"), \ OPT_BOOLEAN('m', "memdevs", ¶m.memdevs, \ "non-option arguments are memdevs"), \ -OPT_BOOLEAN('u', "human", ¶m.human, "use human friendly number formats") +OPT_BOOLEAN('u', "human", ¶m.human, "use human friendly number formats"), \ +OPT_BOOLEAN('Q', "enforce-qos", ¶m.qos_enforce, "enforce of qos_class matching") static const struct option create_options[] = { BASE_OPTIONS(), @@ -360,6 +364,8 @@ static int parse_create_options(struct cxl_ctx *ctx, int count, } } + p->qos_enforce = param.qos_enforce; + return 0; err: @@ -467,6 +473,49 @@ static void set_type_from_decoder(struct cxl_ctx *ctx, struct parsed_params *p) p->mode = CXL_DECODER_MODE_PMEM; } +static int create_region_validate_qos_class(struct cxl_ctx *ctx, + struct parsed_params *p) +{ + int root_qos_class; + int qos_class; + int i; + + if (!p->qos_enforce) + return 0; + + root_qos_class = cxl_root_decoder_get_qos_class(p->root_decoder); + if (root_qos_class == CXL_QOS_CLASS_NONE) + return 0; + + for (i = 0; i < p->ways; i++) { + struct json_object *jobj = + json_object_array_get_idx(p->memdevs, i); + struct cxl_memdev *memdev = json_object_get_userdata(jobj); + + if (p->mode == CXL_DECODER_MODE_RAM) + qos_class = cxl_memdev_get_ram_qos_class(memdev); + else + qos_class = cxl_memdev_get_pmem_qos_class(memdev); + + /* No qos_class entries. Possibly no kernel support */ + if (qos_class == CXL_QOS_CLASS_NONE) + break; + + if (qos_class != root_qos_class) { + p->qos_mismatched = true; + if (p->qos_enforce) { + log_err(&rl, "%s QoS Class mismatches %s\n", + cxl_decoder_get_devname(p->root_decoder), + cxl_memdev_get_devname(memdev)); + + return -ENXIO; + } + } + } + + return 0; +} + static int create_region_validate_config(struct cxl_ctx *ctx, struct parsed_params *p) { @@ -507,6 +556,10 @@ found: return rc; collect_minsize(ctx, p); + rc = create_region_validate_qos_class(ctx, p); + if (rc) + return rc; + return 0; } @@ -654,6 +707,7 @@ static int create_region(struct cxl_ctx *ctx, int *count, return -EOPNOTSUPP; } + cxl_region_qos_class_mismatched_set(region, p->qos_mismatched); devname = cxl_region_get_devname(region); rc = cxl_region_determine_granularity(region, p); From patchwork Thu Feb 8 20:11:58 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dave Jiang X-Patchwork-Id: 13550428 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1B52A383AE; Thu, 8 Feb 2024 20:15:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707423316; cv=none; b=Ab0pu7kr+2OJHfrcvlAmliwvn4Nm/54cKHuKB+Gm9/cHe5KOUpt1BZpNwYkP6TXxdLnMFw89LHV8/jeHL3/FuhYsiMrRY5Zco01Y1p3ZQNmP2ze84XkBtwrm67c+5lC27rzQ/6Rh7ZbBGJdX794HoshYtmT4yYRotbKk0emZv58= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707423316; c=relaxed/simple; bh=R70MHtGtTzn5BVVEo0tCzvCCtBGQk0DnYfH6aahJv2M=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=SGwy/IDyiEBumL8X0BWv9OBXGS8FxNS7PNpK2a0eFIrBVgOFRDbdrX1kAIYGYMAz1P/60QkWUTtpwfGskWVUtyEPm4yOqs430o9uM1qrsEi/WS00Gp1gGazElIOZycSSVQg1J/GZHyxCKKh5ZpgoULLUx1gigFJUFfE7DnxbC/c= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 Received: by smtp.kernel.org (Postfix) with ESMTPSA id 7AF8BC43390; Thu, 8 Feb 2024 20:15:15 +0000 (UTC) From: Dave Jiang To: linux-cxl@vger.kernel.org, nvdimm@lists.linux.dev Cc: vishal.l.verma@intel.com Subject: [NDCTL PATCH v7 4/4] ndctl: add test for qos_class in CXL test suite Date: Thu, 8 Feb 2024 13:11:58 -0700 Message-ID: <20240208201435.2081583-5-dave.jiang@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240208201435.2081583-1-dave.jiang@intel.com> References: <20240208201435.2081583-1-dave.jiang@intel.com> Precedence: bulk X-Mailing-List: nvdimm@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add tests in cxl-qos-class.sh to verify qos_class are set with the fake qos_class create by the kernel. Root decoders should have qos_class attribute set. Memory devices should have ram_qos_class or pmem_qos_class set depending on which partitions are valid. Signed-off-by: Dave Jiang --- v7: - Add create_region -Q testing (Vishal) --- test/common | 4 ++ test/cxl-qos-class.sh | 102 ++++++++++++++++++++++++++++++++++++++++++ test/meson.build | 2 + 3 files changed, 108 insertions(+) create mode 100755 test/cxl-qos-class.sh diff --git a/test/common b/test/common index f1023ef20f7e..5694820c7adc 100644 --- a/test/common +++ b/test/common @@ -150,3 +150,7 @@ check_dmesg() grep -q "Call Trace" <<< $log && err $1 true } + + +# CXL COMMON +TEST_QOS_CLASS=42 diff --git a/test/cxl-qos-class.sh b/test/cxl-qos-class.sh new file mode 100755 index 000000000000..145df6134685 --- /dev/null +++ b/test/cxl-qos-class.sh @@ -0,0 +1,102 @@ +#!/bin/bash +# SPDX-License-Identifier: GPL-2.0 +# Copyright (C) 2024 Intel Corporation. All rights reserved. + +. $(dirname $0)/common + +rc=77 + +set -ex + +trap 'err $LINENO' ERR + +check_prereq "jq" + +modprobe -r cxl_test +modprobe cxl_test +rc=1 + +check_qos_decoders () { + # check root decoders have expected fake qos_class + # also make sure the number of root decoders equal to the number + # with qos_class found + json=$($CXL list -b cxl_test -D -d root) + decoders=$(echo "$json" | jq length) + count=0 + while read -r qos_class + do + ((qos_class == TEST_QOS_CLASS)) || err "$LINENO" + count=$((count+1)) + done <<< "$(echo "$json" | jq -r '.[] | .qos_class')" + + ((count == decoders)) || err "$LINENO"; +} + +check_qos_memdevs () { + # Check that memdevs that expose ram_qos_class or pmem_qos_class have + # expected fake value programmed. + json=$(cxl list -b cxl_test -M) + readarray -t lines < <(jq ".[] | .ram_size, .pmem_size, .ram_qos_class, .pmem_qos_class" <<<"$json") + for (( i = 0; i < ${#lines[@]}; i += 4 )) + do + ram_size=${lines[i]} + pmem_size=${lines[i+1]} + ram_qos_class=${lines[i+2]} + pmem_qos_class=${lines[i+3]} + + if [[ "$ram_size" != null ]] + then + ((ram_qos_class == TEST_QOS_CLASS)) || err "$LINENO" + fi + if [[ "$pmem_size" != null ]] + then + ((pmem_qos_class == TEST_QOS_CLASS)) || err "$LINENO" + fi + done +} + +# Based on cxl-create-region.sh create_single() +destroy_regions() +{ + if [[ "$*" ]]; then + $CXL destroy-region -f -b cxl_test "$@" + else + $CXL destroy-region -f -b cxl_test all + fi +} + +create_region_check_qos() +{ + # the 5th cxl_test decoder is expected to target a single-port + # host-bridge. Older cxl_test implementations may not define it, + # so skip the test in that case. + decoder=$($CXL list -b cxl_test -D -d root | + jq -r ".[4] | + select(.pmem_capable == true) | + select(.nr_targets == 1) | + .decoder") + + if [[ ! $decoder ]]; then + echo "no single-port host-bridge decoder found, skipping" + return + fi + + # Send create-region with -Q to enforce qos_class matching + region=$($CXL create-region -Q -d "$decoder" | jq -r ".region") + if [[ ! $region ]]; then + echo "failed to create single-port host-bridge region" + err "$LINENO" + fi + + destroy_regions "$region" +} + +check_qos_decoders + +check_qos_memdevs + +create_region_check_qos + +check_dmesg "$LINEO" + +modprobe -r cxl_test diff --git a/test/meson.build b/test/meson.build index 5eb35749a95b..4892df11119f 100644 --- a/test/meson.build +++ b/test/meson.build @@ -160,6 +160,7 @@ cxl_events = find_program('cxl-events.sh') cxl_poison = find_program('cxl-poison.sh') cxl_sanitize = find_program('cxl-sanitize.sh') cxl_destroy_region = find_program('cxl-destroy-region.sh') +cxl_qos_class = find_program('cxl-qos-class.sh') tests = [ [ 'libndctl', libndctl, 'ndctl' ], @@ -192,6 +193,7 @@ tests = [ [ 'cxl-poison.sh', cxl_poison, 'cxl' ], [ 'cxl-sanitize.sh', cxl_sanitize, 'cxl' ], [ 'cxl-destroy-region.sh', cxl_destroy_region, 'cxl' ], + [ 'cxl-qos-class.sh', cxl_qos_class, 'cxl' ], ] if get_option('destructive').enabled()