From patchwork Fri Feb 9 11:54:13 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shiyang Ruan X-Patchwork-Id: 13551146 Received: from esa4.hc1455-7.c3s2.iphmx.com (esa4.hc1455-7.c3s2.iphmx.com [68.232.139.117]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AEC372D05B for ; Fri, 9 Feb 2024 11:54:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.139.117 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707479672; cv=none; b=JFxD95VLKEEWqHrFoWMme5GEE6JVUId0cf9DJLGnxF65EDpn3SbWu++aJOqrf3lKhg0mXyuNxIKCkc5IXxtlU7bWZesTQtSACkDPadWqLvnui2Lb9B4BGdreQyflI9IoxJXe+eqSY6t59xPbzYSoSR+2NRTk8q/6hRuk/Vjkd/E= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707479672; c=relaxed/simple; bh=MnCVUOG7QYKmV55TxRoyxRi+hfSu7P6Gu8B4tvl7vLQ=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=F75sGJaT8FkAqDJhuqgyc/m0y+/mleLklk6Ys7AvGEX08BCPfkQhajAVwXirugr4SnwmQbNuIlzruxrXoivzc8MepoDUAhoI9uCzAjmeIilyq7Sqc0TPyYl7sbrYMWfb87ORxpyxRHpLOTdCYmXcsS9rIGwgDLBfj+5XaDr17LA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=fujitsu.com; spf=pass smtp.mailfrom=fujitsu.com; dkim=pass (2048-bit key) header.d=fujitsu.com header.i=@fujitsu.com header.b=V6HTYsii; arc=none smtp.client-ip=68.232.139.117 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=fujitsu.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=fujitsu.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=fujitsu.com header.i=@fujitsu.com header.b="V6HTYsii" DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=fujitsu.com; i=@fujitsu.com; q=dns/txt; s=fj2; t=1707479670; x=1739015670; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=MnCVUOG7QYKmV55TxRoyxRi+hfSu7P6Gu8B4tvl7vLQ=; b=V6HTYsiioleBT1pzL9q83IkALRROiI0SC6YPrDQSCN4h1lB8jfFZphen DqpLGPLEZdbyzID/b6cqY+H27gb9y8ODo4TIYIK3C2bpN35ZDBXqIcrDl H+B8YxgiDMMeCnOM7Q3/oFxdIWZBNf9jPQ6P99CKT1SOYKQxPEIGe3WRf Nz9M45qJmBVG+jp2toNOdWLZA8nrb0CgOLa48hhe1gTavhRYEaJw4Uqry IiYphkaQLr5CWI9kI4qR8371fUHKzeUiTlqmmFtBuFtMCP6VjY5BZRn1Q LPsbhC+b2UqAabcrWOgPsFd7vKR45xPRMHT2ix0xwtUkNzareu+W8pv31 A==; X-IronPort-AV: E=McAfee;i="6600,9927,10978"; a="149214304" X-IronPort-AV: E=Sophos;i="6.05,256,1701097200"; d="scan'208";a="149214304" Received: from unknown (HELO oym-r2.gw.nic.fujitsu.com) ([210.162.30.90]) by esa4.hc1455-7.c3s2.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Feb 2024 20:54:22 +0900 Received: from oym-m4.gw.nic.fujitsu.com (oym-nat-oym-m4.gw.nic.fujitsu.com [192.168.87.61]) by oym-r2.gw.nic.fujitsu.com (Postfix) with ESMTP id A6A2DF2D4E for ; Fri, 9 Feb 2024 20:54:20 +0900 (JST) Received: from kws-ab4.gw.nic.fujitsu.com (kws-ab4.gw.nic.fujitsu.com [192.51.206.22]) by oym-m4.gw.nic.fujitsu.com (Postfix) with ESMTP id 9903321A844 for ; Fri, 9 Feb 2024 20:54:19 +0900 (JST) Received: from edo.cn.fujitsu.com (edo.cn.fujitsu.com [10.167.33.5]) by kws-ab4.gw.nic.fujitsu.com (Postfix) with ESMTP id 3ABB61EA835 for ; Fri, 9 Feb 2024 20:54:19 +0900 (JST) Received: from irides.g08.fujitsu.local (unknown [10.167.226.114]) by edo.cn.fujitsu.com (Postfix) with ESMTP id C63EB1A006A; Fri, 9 Feb 2024 19:54:18 +0800 (CST) From: Shiyang Ruan To: qemu-devel@nongnu.org, linux-cxl@vger.kernel.org Cc: Jonathan.Cameron@huawei.com, dan.j.williams@intel.com Subject: [RFC PATCH 1/5] cxl/core: correct length of DPA field masks Date: Fri, 9 Feb 2024 19:54:13 +0800 Message-Id: <20240209115417.724638-4-ruansy.fnst@fujitsu.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240209115417.724638-1-ruansy.fnst@fujitsu.com> References: <20240209115417.724638-1-ruansy.fnst@fujitsu.com> Precedence: bulk X-Mailing-List: linux-cxl@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-TM-AS-Product-Ver: IMSS-9.1.0.1417-9.0.0.1002-28180.007 X-TM-AS-User-Approved-Sender: Yes X-TMASE-Version: IMSS-9.1.0.1417-9.0.1002-28180.007 X-TMASE-Result: 10--1.506000-10.000000 X-TMASE-MatchedRID: rMrifpT/n7G1UOlz1sLXchF4zyLyne+AVBDQSDMig9HHkH7uosEn7Hj6 +0kG6ijw4vM1YF6AJba/IVneJQLBZQtuKBGekqUpnH7sbImOEBTlWfEpOEu2d1ro1J0HyADyuN2 ViA1o+X1p8m481R42eL3i+dgqnYmih+XoUibFwoJARN3eHcDWfdeLTJRd5T2oJe7un0C4hwObDR BqS2n66yzP5xAyz9Oenvkw4sh/+PcMX5CwH5DTUmgGZNLBHGNe X-TMASE-SNAP-Result: 1.821001.0001-0-1-22:0,33:0,34:0-0 The length of Physical Address in General Media Event Record/DRAM Event Record is 64-bit, so the field mask should be defined as such length. Signed-off-by: Shiyang Ruan --- drivers/cxl/core/trace.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/cxl/core/trace.h b/drivers/cxl/core/trace.h index 89445435303a..388a87d972c2 100644 --- a/drivers/cxl/core/trace.h +++ b/drivers/cxl/core/trace.h @@ -253,11 +253,11 @@ TRACE_EVENT(cxl_generic_event, * DRAM Event Record * CXL rev 3.0 section 8.2.9.2.1.2; Table 8-44 */ -#define CXL_DPA_FLAGS_MASK 0x3F +#define CXL_DPA_FLAGS_MASK 0x3FULL #define CXL_DPA_MASK (~CXL_DPA_FLAGS_MASK) -#define CXL_DPA_VOLATILE BIT(0) -#define CXL_DPA_NOT_REPAIRABLE BIT(1) +#define CXL_DPA_VOLATILE BIT_ULL(0) +#define CXL_DPA_NOT_REPAIRABLE BIT_ULL(1) #define show_dpa_flags(flags) __print_flags(flags, "|", \ { CXL_DPA_VOLATILE, "VOLATILE" }, \ { CXL_DPA_NOT_REPAIRABLE, "NOT_REPAIRABLE" } \ From patchwork Fri Feb 9 11:54:14 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shiyang Ruan X-Patchwork-Id: 13551150 Received: from esa8.hc1455-7.c3s2.iphmx.com (esa8.hc1455-7.c3s2.iphmx.com [139.138.61.253]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 183522E62A for ; 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Fri, 9 Feb 2024 19:54:19 +0800 (CST) From: Shiyang Ruan To: qemu-devel@nongnu.org, linux-cxl@vger.kernel.org Cc: Jonathan.Cameron@huawei.com, dan.j.williams@intel.com Subject: [RFC PATCH 2/5] cxl/core: introduce cxl_memdev_dpa_to_hpa() Date: Fri, 9 Feb 2024 19:54:14 +0800 Message-Id: <20240209115417.724638-5-ruansy.fnst@fujitsu.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240209115417.724638-1-ruansy.fnst@fujitsu.com> References: <20240209115417.724638-1-ruansy.fnst@fujitsu.com> Precedence: bulk X-Mailing-List: linux-cxl@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-TM-AS-Product-Ver: IMSS-9.1.0.1417-9.0.0.1002-28180.007 X-TM-AS-User-Approved-Sender: Yes X-TMASE-Version: IMSS-9.1.0.1417-9.0.1002-28180.007 X-TMASE-Result: 10--0.230400-10.000000 X-TMASE-MatchedRID: E/JbUmZTmPmNrFmNgJn2XRFbgtHjUWLyBPY4SegK3jyCFz9ikiaZRugo SvaKsl/kIvrftAIhWmLy9zcRSkKatWk5Fql3Faa7GYJhRh6ssevxKR2kbb+f18jKFxQAxz7go8W MkQWv6iXBcIE78YqRWo6HM5rqDwqtDOrGF7ZOho2UDWJ+gGA8HODB/FnLVeD/eq3AljACGEWBY1 kgr1igAyCXLsbqmC2GIHzy4kLR1fJvckC7hSyyXDMdHQ58xd4CFcG3+ZRETICP9kUX1Z+buE3Lu mkbQiNwVCqTSPu8tVR7AxIEOt4h2Q== X-TMASE-SNAP-Result: 1.821001.0001-0-1-22:0,33:0,34:0-0 When a memdev is assigned to a region, its Device Physical Address will be mapped to Host Physical Address. Introduce this helper function to translate HPA from a given memdev and its DPA. Signed-off-by: Shiyang Ruan --- drivers/cxl/core/memdev.c | 12 ++++++++++++ drivers/cxl/cxlmem.h | 1 + 2 files changed, 13 insertions(+) diff --git a/drivers/cxl/core/memdev.c b/drivers/cxl/core/memdev.c index dae8802ecdb0..c304e709ef0e 100644 --- a/drivers/cxl/core/memdev.c +++ b/drivers/cxl/core/memdev.c @@ -319,6 +319,18 @@ static int cxl_validate_poison_dpa(struct cxl_memdev *cxlmd, u64 dpa) return 0; } +phys_addr_t cxl_memdev_dpa_to_hpa(struct cxl_memdev *cxlmd, u64 dpa) +{ + struct cxl_region *cxlr = cxl_dpa_to_region(cxlmd, dpa); + + if (cxlr) + return cxlr->params.res->start + dpa; + else { + dev_dbg(&cxlmd->dev, "device belongs to no region.\n"); + return 0; + } +} + int cxl_inject_poison(struct cxl_memdev *cxlmd, u64 dpa) { struct cxl_memdev_state *mds = to_cxl_memdev_state(cxlmd->cxlds); diff --git a/drivers/cxl/cxlmem.h b/drivers/cxl/cxlmem.h index 5303d6942b88..97ddab421e63 100644 --- a/drivers/cxl/cxlmem.h +++ b/drivers/cxl/cxlmem.h @@ -833,6 +833,7 @@ int cxl_poison_state_init(struct cxl_memdev_state *mds); int cxl_mem_get_poison(struct cxl_memdev *cxlmd, u64 offset, u64 len, struct cxl_region *cxlr); int cxl_trigger_poison_list(struct cxl_memdev *cxlmd); +phys_addr_t cxl_memdev_dpa_to_hpa(struct cxl_memdev *cxlmd, u64 dpa); int cxl_inject_poison(struct cxl_memdev *cxlmd, u64 dpa); int cxl_clear_poison(struct cxl_memdev *cxlmd, u64 dpa); From patchwork Fri Feb 9 11:54:15 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shiyang Ruan X-Patchwork-Id: 13551148 Received: from esa4.hc1455-7.c3s2.iphmx.com (esa4.hc1455-7.c3s2.iphmx.com [68.232.139.117]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4E8382E852 for ; Fri, 9 Feb 2024 11:54:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.139.117 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707479675; 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09 Feb 2024 20:54:22 +0900 Received: from yto-m4.gw.nic.fujitsu.com (yto-nat-yto-m4.gw.nic.fujitsu.com [192.168.83.67]) by yto-r3.gw.nic.fujitsu.com (Postfix) with ESMTP id C988F2382C for ; Fri, 9 Feb 2024 20:54:20 +0900 (JST) Received: from kws-ab4.gw.nic.fujitsu.com (kws-ab4.gw.nic.fujitsu.com [192.51.206.22]) by yto-m4.gw.nic.fujitsu.com (Postfix) with ESMTP id 0D154D7B8F for ; Fri, 9 Feb 2024 20:54:20 +0900 (JST) Received: from edo.cn.fujitsu.com (edo.cn.fujitsu.com [10.167.33.5]) by kws-ab4.gw.nic.fujitsu.com (Postfix) with ESMTP id 973951EA835 for ; Fri, 9 Feb 2024 20:54:19 +0900 (JST) Received: from irides.g08.fujitsu.local (unknown [10.167.226.114]) by edo.cn.fujitsu.com (Postfix) with ESMTP id 573551A00A1; Fri, 9 Feb 2024 19:54:19 +0800 (CST) From: Shiyang Ruan To: qemu-devel@nongnu.org, linux-cxl@vger.kernel.org Cc: Jonathan.Cameron@huawei.com, dan.j.williams@intel.com Subject: [RFC PATCH 3/5] cxl/core: introduce cxl_mem_report_poison() Date: Fri, 9 Feb 2024 19:54:15 +0800 Message-Id: <20240209115417.724638-6-ruansy.fnst@fujitsu.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240209115417.724638-1-ruansy.fnst@fujitsu.com> References: <20240209115417.724638-1-ruansy.fnst@fujitsu.com> Precedence: bulk X-Mailing-List: linux-cxl@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-TM-AS-Product-Ver: IMSS-9.1.0.1417-9.0.0.1002-28180.007 X-TM-AS-User-Approved-Sender: Yes X-TMASE-Version: IMSS-9.1.0.1417-9.0.1002-28180.007 X-TMASE-Result: 10--10.314200-10.000000 X-TMASE-MatchedRID: iRE9Ev702i8M5CG8CYBPxRhvfWx0TE/bpUdkPtBbnm48DTfVRLTQzC/6 oQ/dDcvKjFsElAmG+V4AFpgHFBD8OTalR2nLpNunvVD3+zz/FW/0swHSFcVJ6DoUdFbHYUawvwU evDt+uW5/XjpbSJS7a1Tdr6jAw79qMzwe5s18okMe4SzTjxRVolgy2ozNthE2S1jK4vkKprEEk8 U+JlahFNbw3DIpBm/jzHj1xOR70ZBNBEVz6twCz54CIKY/Hg3AGdQnQSTrKGPEQdG7H66TyH4gK q42LRYk15qh5+XAYnW7HdUyxQzt8SsIfslr3ZFShfFE3dU460d+3BndfXUhXQ== X-TMASE-SNAP-Result: 1.821001.0001-0-1-22:0,33:0,34:0-0 If poison is detected(reported from cxl memdev), OS should be notified to handle it. Introduce this function: 1. translate DPA to HPA; 2. construct a MCE instance; (TODO: more details need to be filled) 3. log it into MCE event queue; After that, MCE mechanism can walk over its notifier chain to execute specific handlers. Signed-off-by: Shiyang Ruan --- arch/x86/kernel/cpu/mce/core.c | 1 + drivers/cxl/core/mbox.c | 33 +++++++++++++++++++++++++++++++++ 2 files changed, 34 insertions(+) diff --git a/arch/x86/kernel/cpu/mce/core.c b/arch/x86/kernel/cpu/mce/core.c index bc39252bc54f..a64c0aceb7e0 100644 --- a/arch/x86/kernel/cpu/mce/core.c +++ b/arch/x86/kernel/cpu/mce/core.c @@ -131,6 +131,7 @@ void mce_setup(struct mce *m) m->ppin = cpu_data(m->extcpu).ppin; m->microcode = boot_cpu_data.microcode; } +EXPORT_SYMBOL_GPL(mce_setup); DEFINE_PER_CPU(struct mce, injectm); EXPORT_PER_CPU_SYMBOL_GPL(injectm); diff --git a/drivers/cxl/core/mbox.c b/drivers/cxl/core/mbox.c index 27166a411705..f9b6f50fbe80 100644 --- a/drivers/cxl/core/mbox.c +++ b/drivers/cxl/core/mbox.c @@ -4,6 +4,7 @@ #include #include #include +#include #include #include #include @@ -1290,6 +1291,38 @@ int cxl_set_timestamp(struct cxl_memdev_state *mds) } EXPORT_SYMBOL_NS_GPL(cxl_set_timestamp, CXL); +static void cxl_mem_report_poison(struct cxl_memdev *cxlmd, + struct cxl_poison_record *poison) +{ + struct mce m; + u64 dpa = le64_to_cpu(poison->address) & CXL_POISON_START_MASK; + u64 len = le64_to_cpu(poison->length), i; + phys_addr_t phys_addr = cxl_memdev_dpa_to_hpa(cxlmd, dpa); + + if (phys_addr) + return; + + /* + * Initialize struct mce. Call preempt_disable() to avoid + * "BUG: using smp_processor_id() in preemptible" for now, not sure + * if this is a correct way. + */ + preempt_disable(); + mce_setup(&m); + preempt_enable(); + + m.bank = -1; + /* Fake a memory read error with unknown channel */ + m.status = MCI_STATUS_VAL | MCI_STATUS_EN | MCI_STATUS_ADDRV | + MCI_STATUS_MISCV | 0x9f; + m.misc = (MCI_MISC_ADDR_PHYS << 6); + + for (i = 0; i < len; i++) { + m.addr = phys_addr++; + mce_log(&m); + } +} + int cxl_mem_get_poison(struct cxl_memdev *cxlmd, u64 offset, u64 len, struct cxl_region *cxlr) { From patchwork Fri Feb 9 11:54:16 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shiyang Ruan X-Patchwork-Id: 13551151 Received: from esa3.hc1455-7.c3s2.iphmx.com (esa3.hc1455-7.c3s2.iphmx.com [207.54.90.49]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 28D2A2E64F for ; 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Fri, 9 Feb 2024 19:54:19 +0800 (CST) From: Shiyang Ruan To: qemu-devel@nongnu.org, linux-cxl@vger.kernel.org Cc: Jonathan.Cameron@huawei.com, dan.j.williams@intel.com Subject: [RFC PATCH 4/5] cxl/core: add report option for cxl_mem_get_poison() Date: Fri, 9 Feb 2024 19:54:16 +0800 Message-Id: <20240209115417.724638-7-ruansy.fnst@fujitsu.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240209115417.724638-1-ruansy.fnst@fujitsu.com> References: <20240209115417.724638-1-ruansy.fnst@fujitsu.com> Precedence: bulk X-Mailing-List: linux-cxl@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-TM-AS-Product-Ver: IMSS-9.1.0.1417-9.0.0.1002-28180.007 X-TM-AS-User-Approved-Sender: Yes X-TMASE-Version: IMSS-9.1.0.1417-9.0.1002-28180.007 X-TMASE-Result: 10--10.285100-10.000000 X-TMASE-MatchedRID: SzbEz7SZt2sJoDeiZ6YZhB1kSRHxj+Z5/OuUJVcMZhtdXeeZrNJbgiu5 iQ9EM64EjZRdXn3Xp9M6uZyF2AGJsLVQ6XPWwtdyEXjPIvKd74BMkOX0UoduuR+GgVvXmL4ONE6 mRLCupPjovSNS3Zhlaq9YGVc6ZwjYP7A6mmzUskBKzjuZtPtIBMMKxxeacM3vnhD4vcFcha6N3H kV2EiaA9TrK+6tlqkXumMCMwce1mUfE8yM4pjsDwtuKBGekqUpI/NGWt0UYPBSuOQCfu1OIEDum 0PDABnfH5DUKb843LaYU+MayamLEm3qeHSd7sch X-TMASE-SNAP-Result: 1.821001.0001-0-1-22:0,33:0,34:0-0 When a poison event is received, driver uses GET_POISON_LIST command to get the poison list. Now driver has cxl_mem_get_poison(), so reuse it and add a parameter 'bool report', report poison record to MCE if set true. Signed-off-by: Shiyang Ruan --- drivers/cxl/core/mbox.c | 7 +++++-- drivers/cxl/core/memdev.c | 4 ++-- drivers/cxl/core/region.c | 8 ++++---- drivers/cxl/cxlmem.h | 2 +- 4 files changed, 12 insertions(+), 9 deletions(-) diff --git a/drivers/cxl/core/mbox.c b/drivers/cxl/core/mbox.c index f9b6f50fbe80..e1c67159acc4 100644 --- a/drivers/cxl/core/mbox.c +++ b/drivers/cxl/core/mbox.c @@ -1324,7 +1324,7 @@ static void cxl_mem_report_poison(struct cxl_memdev *cxlmd, } int cxl_mem_get_poison(struct cxl_memdev *cxlmd, u64 offset, u64 len, - struct cxl_region *cxlr) + struct cxl_region *cxlr, bool report) { struct cxl_memdev_state *mds = to_cxl_memdev_state(cxlmd->cxlds); struct cxl_mbox_poison_out *po; @@ -1355,10 +1355,13 @@ int cxl_mem_get_poison(struct cxl_memdev *cxlmd, u64 offset, u64 len, if (rc) break; - for (int i = 0; i < le16_to_cpu(po->count); i++) + for (int i = 0; i < le16_to_cpu(po->count); i++) { trace_cxl_poison(cxlmd, cxlr, &po->record[i], po->flags, po->overflow_ts, CXL_POISON_TRACE_LIST); + if (report) + cxl_mem_report_poison(cxlmd, &po->record[i]); + } /* Protect against an uncleared _FLAG_MORE */ nr_records = nr_records + le16_to_cpu(po->count); diff --git a/drivers/cxl/core/memdev.c b/drivers/cxl/core/memdev.c index c304e709ef0e..320bcb8af5b0 100644 --- a/drivers/cxl/core/memdev.c +++ b/drivers/cxl/core/memdev.c @@ -200,14 +200,14 @@ static int cxl_get_poison_by_memdev(struct cxl_memdev *cxlmd) if (resource_size(&cxlds->pmem_res)) { offset = cxlds->pmem_res.start; length = resource_size(&cxlds->pmem_res); - rc = cxl_mem_get_poison(cxlmd, offset, length, NULL); + rc = cxl_mem_get_poison(cxlmd, offset, length, NULL, false); if (rc) return rc; } if (resource_size(&cxlds->ram_res)) { offset = cxlds->ram_res.start; length = resource_size(&cxlds->ram_res); - rc = cxl_mem_get_poison(cxlmd, offset, length, NULL); + rc = cxl_mem_get_poison(cxlmd, offset, length, NULL, false); /* * Invalid Physical Address is not an error for * volatile addresses. Device support is optional. diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c index ce0e2d82bb2b..b008c7e13560 100644 --- a/drivers/cxl/core/region.c +++ b/drivers/cxl/core/region.c @@ -2386,7 +2386,7 @@ static int cxl_get_poison_unmapped(struct cxl_memdev *cxlmd, if (ctx->mode == CXL_DECODER_RAM) { offset = ctx->offset; length = resource_size(&cxlds->ram_res) - offset; - rc = cxl_mem_get_poison(cxlmd, offset, length, NULL); + rc = cxl_mem_get_poison(cxlmd, offset, length, NULL, false); if (rc == -EFAULT) rc = 0; if (rc) @@ -2404,7 +2404,7 @@ static int cxl_get_poison_unmapped(struct cxl_memdev *cxlmd, return 0; } - return cxl_mem_get_poison(cxlmd, offset, length, NULL); + return cxl_mem_get_poison(cxlmd, offset, length, NULL, false); } static int poison_by_decoder(struct device *dev, void *arg) @@ -2438,7 +2438,7 @@ static int poison_by_decoder(struct device *dev, void *arg) if (cxled->skip) { offset = cxled->dpa_res->start - cxled->skip; length = cxled->skip; - rc = cxl_mem_get_poison(cxlmd, offset, length, NULL); + rc = cxl_mem_get_poison(cxlmd, offset, length, NULL, false); if (rc == -EFAULT && cxled->mode == CXL_DECODER_RAM) rc = 0; if (rc) @@ -2447,7 +2447,7 @@ static int poison_by_decoder(struct device *dev, void *arg) offset = cxled->dpa_res->start; length = cxled->dpa_res->end - offset + 1; - rc = cxl_mem_get_poison(cxlmd, offset, length, cxled->cxld.region); + rc = cxl_mem_get_poison(cxlmd, offset, length, cxled->cxld.region, false); if (rc == -EFAULT && cxled->mode == CXL_DECODER_RAM) rc = 0; if (rc) diff --git a/drivers/cxl/cxlmem.h b/drivers/cxl/cxlmem.h index 97ddab421e63..f0877f055f53 100644 --- a/drivers/cxl/cxlmem.h +++ b/drivers/cxl/cxlmem.h @@ -831,7 +831,7 @@ void cxl_event_trace_record(const struct cxl_memdev *cxlmd, int cxl_set_timestamp(struct cxl_memdev_state *mds); int cxl_poison_state_init(struct cxl_memdev_state *mds); int cxl_mem_get_poison(struct cxl_memdev *cxlmd, u64 offset, u64 len, - struct cxl_region *cxlr); + struct cxl_region *cxlr, bool report); int cxl_trigger_poison_list(struct cxl_memdev *cxlmd); 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Fri, 9 Feb 2024 20:54:21 +0900 (JST) Received: from kws-ab3.gw.nic.fujitsu.com (kws-ab3.gw.nic.fujitsu.com [192.51.206.21]) by yto-m1.gw.nic.fujitsu.com (Postfix) with ESMTP id C8534D4254 for ; Fri, 9 Feb 2024 20:54:20 +0900 (JST) Received: from edo.cn.fujitsu.com (edo.cn.fujitsu.com [10.167.33.5]) by kws-ab3.gw.nic.fujitsu.com (Postfix) with ESMTP id 3889920097CF0 for ; Fri, 9 Feb 2024 20:54:20 +0900 (JST) Received: from irides.g08.fujitsu.local (unknown [10.167.226.114]) by edo.cn.fujitsu.com (Postfix) with ESMTP id D04721A009A; Fri, 9 Feb 2024 19:54:19 +0800 (CST) From: Shiyang Ruan To: qemu-devel@nongnu.org, linux-cxl@vger.kernel.org Cc: Jonathan.Cameron@huawei.com, dan.j.williams@intel.com Subject: [RFC PATCH 5/5] cxl/core: add poison injection event handler Date: Fri, 9 Feb 2024 19:54:17 +0800 Message-Id: <20240209115417.724638-8-ruansy.fnst@fujitsu.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240209115417.724638-1-ruansy.fnst@fujitsu.com> References: <20240209115417.724638-1-ruansy.fnst@fujitsu.com> Precedence: bulk X-Mailing-List: linux-cxl@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-TM-AS-Product-Ver: IMSS-9.1.0.1417-9.0.0.1002-28180.007 X-TM-AS-User-Approved-Sender: Yes X-TMASE-Version: IMSS-9.1.0.1417-9.0.1002-28180.007 X-TMASE-Result: 10--16.762300-10.000000 X-TMASE-MatchedRID: kREspPIIG7TvjhWxSrUkKRFbgtHjUWLy/OuUJVcMZhsshTvdDYMpJmdv IBM8UuLSCuUOawo+L53hfMsvIi6boIkJXr+VAiTlxDiakrJ+SpneGeDcpMd5NjoUdFbHYUawvwU evDt+uW5/XjpbSJS7axmGGSZ2LT4ZE2kkwHbrOXXfSQNpZkETVMMKxxeacM3vNS9A3X1uuOA1Qh zyZr8Mz4tgKpAlQHHw8P0p1mD2iGGtVKSQoU2TwYldKbZsGYatCoPXqoZQJeaqA3rusLu26mjMh fybFcqMJZ5+dQl9ac+AMuqetGVetnyef22ep6XYkGUtrowrXLg= X-TMASE-SNAP-Result: 1.821001.0001-0-1-22:0,33:0,34:0-0 Currently driver only trace cxl events, poison injection on cxl memdev is silent. OS needs to be notified then it could handle poison range in time. Per CXL spec, the device error event could be signaled through FW-First and OS-First methods. So, add poison event handler in OS-First method: - qemu: - CXL device report POISON event to OS by MSI by sending GMER after injecting a poison record - CXL driver a. read the POISON event through GMER; <-- this patch b. get POISON list; c. translate DPA to HPA; d. construct a mce instance, then call mce_log() to queue this mce instance; Signed-off-by: Shiyang Ruan --- drivers/cxl/core/mbox.c | 42 ++++++++++++++++++++++++++++------------- drivers/cxl/cxlmem.h | 8 ++++---- drivers/cxl/pci.c | 4 ++-- 3 files changed, 35 insertions(+), 19 deletions(-) diff --git a/drivers/cxl/core/mbox.c b/drivers/cxl/core/mbox.c index e1c67159acc4..fa65a98ada16 100644 --- a/drivers/cxl/core/mbox.c +++ b/drivers/cxl/core/mbox.c @@ -838,25 +838,41 @@ int cxl_enumerate_cmds(struct cxl_memdev_state *mds) } EXPORT_SYMBOL_NS_GPL(cxl_enumerate_cmds, CXL); -void cxl_event_trace_record(const struct cxl_memdev *cxlmd, - enum cxl_event_log_type type, - enum cxl_event_type event_type, - const uuid_t *uuid, union cxl_event *evt) +static void cxl_event_handle_poison(struct cxl_memdev *cxlmd, + struct cxl_event_gen_media *rec) { - if (event_type == CXL_CPER_EVENT_GEN_MEDIA) + u64 phys_addr = rec->phys_addr & CXL_DPA_MASK, len; + + if (rec->phys_addr & CXL_DPA_VOLATILE) + len = resource_size(&cxlmd->cxlds->ram_res) - phys_addr; + else + len = resource_size(&cxlmd->cxlds->dpa_res) - phys_addr; + + cxl_mem_get_poison(cxlmd, phys_addr, len, NULL, true); +} + +void cxl_event_handle_record(struct cxl_memdev *cxlmd, + enum cxl_event_log_type type, + enum cxl_event_type event_type, + const uuid_t *uuid, union cxl_event *evt) +{ + if (event_type == CXL_CPER_EVENT_GEN_MEDIA) { trace_cxl_general_media(cxlmd, type, &evt->gen_media); - else if (event_type == CXL_CPER_EVENT_DRAM) + /* handle poison event */ + if (type == CXL_EVENT_TYPE_FAIL) + cxl_event_handle_poison(cxlmd, &evt->gen_media); + } else if (event_type == CXL_CPER_EVENT_DRAM) trace_cxl_dram(cxlmd, type, &evt->dram); else if (event_type == CXL_CPER_EVENT_MEM_MODULE) trace_cxl_memory_module(cxlmd, type, &evt->mem_module); else trace_cxl_generic_event(cxlmd, type, uuid, &evt->generic); } -EXPORT_SYMBOL_NS_GPL(cxl_event_trace_record, CXL); +EXPORT_SYMBOL_NS_GPL(cxl_event_handle_record, CXL); -static void __cxl_event_trace_record(const struct cxl_memdev *cxlmd, - enum cxl_event_log_type type, - struct cxl_event_record_raw *record) +static void __cxl_event_handle_record(struct cxl_memdev *cxlmd, + enum cxl_event_log_type type, + struct cxl_event_record_raw *record) { enum cxl_event_type ev_type = CXL_CPER_EVENT_GENERIC; const uuid_t *uuid = &record->id; @@ -868,7 +884,7 @@ static void __cxl_event_trace_record(const struct cxl_memdev *cxlmd, else if (uuid_equal(uuid, &CXL_EVENT_MEM_MODULE_UUID)) ev_type = CXL_CPER_EVENT_MEM_MODULE; - cxl_event_trace_record(cxlmd, type, ev_type, uuid, &record->event); + cxl_event_handle_record(cxlmd, type, ev_type, uuid, &record->event); } static int cxl_clear_event_record(struct cxl_memdev_state *mds, @@ -979,8 +995,8 @@ static void cxl_mem_get_records_log(struct cxl_memdev_state *mds, break; for (i = 0; i < nr_rec; i++) - __cxl_event_trace_record(cxlmd, type, - &payload->records[i]); + __cxl_event_handle_record(cxlmd, type, + &payload->records[i]); if (payload->flags & CXL_GET_EVENT_FLAG_OVERFLOW) trace_cxl_overflow(cxlmd, type, payload); diff --git a/drivers/cxl/cxlmem.h b/drivers/cxl/cxlmem.h index f0877f055f53..1e9e3b9c11d1 100644 --- a/drivers/cxl/cxlmem.h +++ b/drivers/cxl/cxlmem.h @@ -824,10 +824,10 @@ void set_exclusive_cxl_commands(struct cxl_memdev_state *mds, void clear_exclusive_cxl_commands(struct cxl_memdev_state *mds, unsigned long *cmds); void cxl_mem_get_event_records(struct cxl_memdev_state *mds, u32 status); -void cxl_event_trace_record(const struct cxl_memdev *cxlmd, - enum cxl_event_log_type type, - enum cxl_event_type event_type, - const uuid_t *uuid, union cxl_event *evt); +void cxl_event_handle_record(struct cxl_memdev *cxlmd, + enum cxl_event_log_type type, + enum cxl_event_type event_type, + const uuid_t *uuid, union cxl_event *evt); int cxl_set_timestamp(struct cxl_memdev_state *mds); int cxl_poison_state_init(struct cxl_memdev_state *mds); int cxl_mem_get_poison(struct cxl_memdev *cxlmd, u64 offset, u64 len, diff --git a/drivers/cxl/pci.c b/drivers/cxl/pci.c index 233e7c42c161..29a5e641decd 100644 --- a/drivers/cxl/pci.c +++ b/drivers/cxl/pci.c @@ -1003,8 +1003,8 @@ static void cxl_cper_event_call(enum cxl_event_type ev_type, hdr_flags = get_unaligned_le24(rec->event.generic.hdr.flags); log_type = FIELD_GET(CXL_EVENT_HDR_FLAGS_REC_SEVERITY, hdr_flags); - cxl_event_trace_record(cxlds->cxlmd, log_type, ev_type, - &uuid_null, &rec->event); + cxl_event_handle_record(cxlds->cxlmd, log_type, ev_type, + &uuid_null, &rec->event); } static int __init cxl_pci_driver_init(void)