From patchwork Tue Feb 13 15:32:45 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Brown X-Patchwork-Id: 13555264 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A6D3CC4829A for ; Tue, 13 Feb 2024 15:36:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References:Message-Id :MIME-Version:Subject:Date:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=lZN5PYTCVw8dtWc6VnPvin767AUyWBxBI6glLarBT6I=; b=d975+JPKdyjpwr whdAWuzu/Vn1WkWLKu23Xc6w7HdTOXbiiRQVn9S7Xy0ypfMpTsqXNf72kCajBaEHFxWaJGpXSCwfE MLQDc+stg74ghR3DBrZhC/7/B6OSM58TGY97xdM/b4n4WdjMnDxi6TW8wIjNnksHG5YW0z7+S0fmy DAeliuJCSCMCRlxR2AoMHjVJkWKJhhXJ5LeRvw7pJ3589xX4DRj3oss7y2pwLOybsDI74BTIWEe/4 h1Fm8cWLNTG6cImHoL7aWrEXf7Jf2HFh0gAqHCkjTpVOgkL8JuhtExQ/bl/VJuSgO2PnOFeKA3Ef1 myP31BMUKaSLbJ76qFdw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rZupC-00000009lZa-0JPJ; Tue, 13 Feb 2024 15:35:58 +0000 Received: from dfw.source.kernel.org ([139.178.84.217]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rZup9-00000009lYB-01g7 for linux-arm-kernel@lists.infradead.org; Tue, 13 Feb 2024 15:35:56 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by dfw.source.kernel.org (Postfix) with ESMTP id DC73161555; Tue, 13 Feb 2024 15:35:52 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 752ABC43399; Tue, 13 Feb 2024 15:35:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1707838552; bh=SUBjxkuKBtRVkvGx34gf818xvgGWgaa/xPYwJFrPRlM=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=kd/9uVyyIJb5NAJl3o+ZexzNZwJkGOgxeNr2DwrbbuSFfxBuBBnCxfWzrjldxs9b5 fwoK01VQpIJun/p1nejaIMQcLSttc9fgvDlVuV/NPQl/KSsvv2FzNeTHNcOlUmsu3Y +Fg7t9vX/9ybXMMoKbL0ieHkQ7oxJXKE8GF8yM5SXgG8OXZj40nt6U+yttDzgbwFnW HdW4QpVJJrkvZnvRzhaax76ZQIvTjey69jbug2hzpf4sTWczabdocO6Coir8nYd3VI CZzDNzcXpa6G2PhiMPQrcVxw4hvuOv9zrMXvZkwoInPY08oGsds4vA+9mOIVPR4zUO ROIhKq36K23Bw== From: Mark Brown Date: Tue, 13 Feb 2024 15:32:45 +0000 Subject: [PATCH 1/2] arm64/sve: Ensure that all fields in ZCR_EL1 are set to known values MIME-Version: 1.0 Message-Id: <20240213-arm64-fp-init-vec-cr-v1-1-7e7c2d584f26@kernel.org> References: <20240213-arm64-fp-init-vec-cr-v1-0-7e7c2d584f26@kernel.org> In-Reply-To: <20240213-arm64-fp-init-vec-cr-v1-0-7e7c2d584f26@kernel.org> To: Catalin Marinas , Will Deacon Cc: Dave Martin , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Mark Brown X-Mailer: b4 0.13-dev-a684c X-Developer-Signature: v=1; a=openpgp-sha256; l=849; i=broonie@kernel.org; h=from:subject:message-id; bh=SUBjxkuKBtRVkvGx34gf818xvgGWgaa/xPYwJFrPRlM=; b=owEBbQGS/pANAwAKASTWi3JdVIfQAcsmYgBly4xU8jE97v/JDxRmvJyueiHa2XfsWKq9Yvi56jLQ ptOViZWJATMEAAEKAB0WIQSt5miqZ1cYtZ/in+ok1otyXVSH0AUCZcuMVAAKCRAk1otyXVSH0DflB/ 9VepOmmsuiVYGDQF13XF2tE56zYQ7dQMtVpBtyjZDXvgXXEI1IA/BeL4nUYq2sfeXiSzMyFFybqImD Gv6EgNRRqoAs1xXNH9TBCJMYZxLx11YF0apQqr8+VRyOCfl8eF99DhSRV+Im5cG/puiNysDr6j0XKi fNxRSdbsfh/y+1upsRPPRWLTOXqCSqDuDkhZz6ZlVpKOUG7zyabwO9v9gMbfSFwbNZUlxjqAXveva/ duOjOXx1Gjr1RcKcSAcQiMOzXb6hHrSU/cDyAtr7ZvowCzXfLiDc5knyWP+ysnEf79QWOfcbw4oVRl H9ox2a/OjlARoFxcgBJ9SVPJ8gVpLr X-Developer-Key: i=broonie@kernel.org; a=openpgp; fpr=3F2568AAC26998F9E813A1C5C3F436CA30F5D8EB X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240213_073555_125503_7FE1F4FB X-CRM114-Status: UNSURE ( 8.96 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org At present nothing in our CPU initialisation code ever sets unknown fields in ZCR_EL1 to known values, all updates to ZCR_EL1 are read/modify/write sequences for LEN. All the unknown fields are RES0, explicitly initialise them as such to avoid future surprises. Signed-off-by: Mark Brown --- arch/arm64/kernel/fpsimd.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/kernel/fpsimd.c b/arch/arm64/kernel/fpsimd.c index a5dc6f764195..cc3c9ad877a8 100644 --- a/arch/arm64/kernel/fpsimd.c +++ b/arch/arm64/kernel/fpsimd.c @@ -1134,6 +1134,8 @@ void cpu_enable_sve(const struct arm64_cpu_capabilities *__always_unused p) { write_sysreg(read_sysreg(CPACR_EL1) | CPACR_EL1_ZEN_EL1EN, CPACR_EL1); isb(); + + write_sysreg_s(0, SYS_ZCR_EL1); } void __init sve_setup(void) From patchwork Tue Feb 13 15:32:46 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Brown X-Patchwork-Id: 13555265 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8DBF2C48260 for ; Tue, 13 Feb 2024 15:36:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References:Message-Id :MIME-Version:Subject:Date:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=HIeIZ4u23o9KExG0AFAaONMrzPRZ6RZmLUepD5xm5Gw=; b=5AWBKm43V7K2yC gpgbcVHVgowPt8/afmCinztIvzQMp75lXsMgB1rKWu1T0ECQFmUZdT8YKL5lhY6T/Ke839IPQxRWj 1cflp9Nj0zE889qVl+4nY0Mp9vgCw3BMmGNkVz8jAr+0Eya1h/p2bRyrqSjNujsEb+ZyTU5lqsZL7 dLrZTRrn/r2r9xxJAEAB1yYb17nDVz16ZmQAUGnlBCHI5c2QW8RfzdUN/pSoUIvrNxpihprA77XIt StZIQxpboqUlvtgDFI5kp6F2B+3JoS1soKYSM+t87NDjBP5NjRT0m+YsoShUnWk8m3FbZtZPrwKtg lMpcBjV3qAle433WUeLQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rZupJ-00000009lbm-3vOu; Tue, 13 Feb 2024 15:36:05 +0000 Received: from dfw.source.kernel.org ([2604:1380:4641:c500::1]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rZup9-00000009lYG-0NiT for linux-arm-kernel@lists.infradead.org; Tue, 13 Feb 2024 15:35:57 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by dfw.source.kernel.org (Postfix) with ESMTP id 8DCFE61556; Tue, 13 Feb 2024 15:35:54 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 1C3C0C433F1; Tue, 13 Feb 2024 15:35:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1707838554; bh=3QP5xdQgCtutqWVSSb21JK6+dtuADu8WvFbwQO2EMwE=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=Z0CcMPpPKSEqSEkrJ8GWhfqOB59+LE1ZCYDCIWlQUQxGvnHCc5UcuvW7hTvKzjEct VVzNQLvxGHww6+0O28Vk2HqP7LwI8R4iEkLpIOJMm/yhR5IthxW5z8DUGPMUVBzB/S ngXi/4fauKql39WahyPOmof613fXlhQ0Vz0KPKa3tgD4ySdLvBinkNQqbzlB2UYQqB BSuzgpuO6zhhfWmNUyNIAlJ6WiY/gBK44cFnBmKsHsArls4n+GeFanY0QnH9BLIQEQ ZIFOjlouV0DmK1Pd6T4XyzfVRQdtykc1GjSXvelON6WCVhaym3binh+CYHKuEXVeJl Kd/5CjcsEwvRQ== From: Mark Brown Date: Tue, 13 Feb 2024 15:32:46 +0000 Subject: [PATCH 2/2] arm64/sme: Ensure that all fields in SMCR_EL1 are set to known values MIME-Version: 1.0 Message-Id: <20240213-arm64-fp-init-vec-cr-v1-2-7e7c2d584f26@kernel.org> References: <20240213-arm64-fp-init-vec-cr-v1-0-7e7c2d584f26@kernel.org> In-Reply-To: <20240213-arm64-fp-init-vec-cr-v1-0-7e7c2d584f26@kernel.org> To: Catalin Marinas , Will Deacon Cc: Dave Martin , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Mark Brown X-Mailer: b4 0.13-dev-a684c X-Developer-Signature: v=1; a=openpgp-sha256; l=981; i=broonie@kernel.org; h=from:subject:message-id; bh=3QP5xdQgCtutqWVSSb21JK6+dtuADu8WvFbwQO2EMwE=; b=owEBbQGS/pANAwAKASTWi3JdVIfQAcsmYgBly4xUA3rs0ghZm22tJlDf7DiTmlghGGgzwk5+CB7+ o8iscR+JATMEAAEKAB0WIQSt5miqZ1cYtZ/in+ok1otyXVSH0AUCZcuMVAAKCRAk1otyXVSH0A3DB/ 4nCFlJDvs+F0CTlMKwubqM8n+bW2BzQNqbAeq+wTMLRi7W6b6FyPofh0STmmfdePtpS4d1Y4jR16Ce 21nbI1rJfcnJhj0i4VofrhgfcYjvkEVXRJc6GTDWMOgpZj1pOno/HCUbKHZz+icpqMXuqlMRTQu+lg zM+sA2yJpndyJRBtrXYShEiYLdo+tS4Xo+yQgGdXBuf/dN+cUTYRNAHwQxEsK/BHPb9A5UlcF3ApCR XK6RyI+8Z4gRKs0dggA8u6rSIdt4fQjzG+qh0xkn1b7uwrkTP2uJgG0RnZRgehnrNx0gzdlTZVrQeh 8WLSDDH8meCJ2fQkPPMkavpklqjWbA X-Developer-Key: i=broonie@kernel.org; a=openpgp; fpr=3F2568AAC26998F9E813A1C5C3F436CA30F5D8EB X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240213_073555_250887_4E655EA6 X-CRM114-Status: UNSURE ( 9.28 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org At present nothing in our CPU initialisation code ever sets unknown fields in SMCR_EL1 to known values, all updates to SMCR_EL1 are read/modify/write sequences. All the unknown fields are RES0, explicitly initialise them as such to avoid future surprises. Signed-off-by: Mark Brown --- arch/arm64/kernel/fpsimd.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm64/kernel/fpsimd.c b/arch/arm64/kernel/fpsimd.c index cc3c9ad877a8..f96907b813fa 100644 --- a/arch/arm64/kernel/fpsimd.c +++ b/arch/arm64/kernel/fpsimd.c @@ -1247,6 +1247,9 @@ void cpu_enable_sme(const struct arm64_cpu_capabilities *__always_unused p) write_sysreg(read_sysreg(CPACR_EL1) | CPACR_EL1_SMEN_EL1EN, CPACR_EL1); isb(); + /* Ensure all bits in SMCR are set to known values */ + write_sysreg_s(0, SYS_SMCR_EL1); + /* Allow EL0 to access TPIDR2 */ write_sysreg(read_sysreg(SCTLR_EL1) | SCTLR_ELx_ENTP2, SCTLR_EL1); isb();