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Tue, 13 Feb 2024 16:05:33 GMT Received: from hu-jinlmao-lv.qualcomm.com (10.49.16.6) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Tue, 13 Feb 2024 08:05:33 -0800 From: Mao Jinlong To: Suzuki K Poulose , Mike Leach , James Clark , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "Mao Jinlong" , Tao Zhang , Alexander Shishkin CC: , , , , Subject: [PATCH v1 1/2] dt-bindings: arm: qcom,coresight-tpdm: Rename qcom,dsb-element-size Date: Tue, 13 Feb 2024 08:05:17 -0800 Message-ID: <20240213160521.15925-2-quic_jinlmao@quicinc.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240213160521.15925-1-quic_jinlmao@quicinc.com> References: <20240213160521.15925-1-quic_jinlmao@quicinc.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nalasex01a.na.qualcomm.com (10.47.209.196) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: onR72qy8Q1VlouIOQWWTCQAaNiNVnZ2j X-Proofpoint-GUID: onR72qy8Q1VlouIOQWWTCQAaNiNVnZ2j X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-02-13_08,2024-02-12_03,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 mlxlogscore=831 lowpriorityscore=0 spamscore=0 clxscore=1015 priorityscore=1501 mlxscore=0 malwarescore=0 suspectscore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2401310000 definitions=main-2402130126 Change qcom,dsb-element-size to qcom,dsb-element-bits as the unit is bit. Signed-off-by: Mao Jinlong --- .../devicetree/bindings/arm/qcom,coresight-tpdm.yaml | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml b/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml index d0647ffaed71..62188c51ceb5 100644 --- a/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml +++ b/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml @@ -44,7 +44,7 @@ properties: minItems: 1 maxItems: 2 - qcom,dsb-element-size: + qcom,dsb-element-bits: description: Specifies the DSB(Discrete Single Bit) element size supported by the monitor. The associated aggregator will read this size before it @@ -111,7 +111,7 @@ examples: compatible = "qcom,coresight-tpdm", "arm,primecell"; reg = <0x0684c000 0x1000>; - qcom,dsb-element-size = /bits/ 8 <32>; + qcom,dsb-element-bits = <32>; qcom,dsb-msrs-num = <16>; clocks = <&aoss_qmp>; From patchwork Tue Feb 13 16:05:18 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mao Jinlong X-Patchwork-Id: 13555323 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BBD895F551; Tue, 13 Feb 2024 16:05:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707840355; cv=none; b=DJmy0Si37kYdunjchwSLsP2ovNpewn7ElwQ+tj5oDgK8lUJ0kAQbIKI6U4n5ClV7YY3PKpHIcntJbIWy+Ldm/B1V1jv1zI4CCe11cQOX10NHVy+rD1vaywHi7yw2TWBSo/o9XAAaWxSMqaEFi9+mav7OH5Skms2j7c/TolfZZdI= ARC-Message-Signature: i=1; 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Signed-off-by: Mao Jinlong --- drivers/hwtracing/coresight/coresight-tpda.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/hwtracing/coresight/coresight-tpda.c b/drivers/hwtracing/coresight/coresight-tpda.c index 6863afe7ca94..5d20e10be24b 100644 --- a/drivers/hwtracing/coresight/coresight-tpda.c +++ b/drivers/hwtracing/coresight/coresight-tpda.c @@ -70,7 +70,7 @@ static int tpdm_read_element_size(struct tpda_drvdata *drvdata, if (tpdm_has_dsb_dataset(tpdm_data)) { rc = fwnode_property_read_u8(dev_fwnode(csdev->dev.parent), - "qcom,dsb-element-size", &drvdata->dsb_esize); + "qcom,dsb-element-bits", &drvdata->dsb_esize); } if (tpdm_has_cmb_dataset(tpdm_data)) { rc = fwnode_property_read_u32(dev_fwnode(csdev->dev.parent),