From patchwork Thu Feb 15 03:04:51 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Choong Yong Liang X-Patchwork-Id: 13557288 X-Patchwork-Delegate: kuba@kernel.org Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 788EB8C1E; Thu, 15 Feb 2024 03:07:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.10 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707966459; cv=none; b=R4/yTjGaZ0K4dbyoLRPJgrK/tlbHpCbwZ/AnL8cACrAuKCE+QGOjiuDreepMZYvmRna3SnBizNOJnE257NH2v8vsKjHHkVQPqS92ltGiEyZOIx7vUx6FDVYHh5pW0qNyujJlWI8pv8J9nnoRElESinMoxl9IWkaa5j5sGyzV9xE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707966459; c=relaxed/simple; bh=Id7jaa6k0BX7PLQJS3cBe6qIs2K9RSyvcFT8QOa3qkE=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=UpQA4hHPZXNyohAs/NxgeJLwzqMEdlsjObqZW2Bi/lbHirWAC2FqNFNDfnoWis9KE87j+kBzhAbiv05h5qgdIQocub68sun07KPxrNk2keltIY1uZmIv1LB/pKTgIC/umnH1uUex1w+6NKoyhvhGA+TTMsnGVAgsATlSE/brhus= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=JHe5034D; arc=none smtp.client-ip=198.175.65.10 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="JHe5034D" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1707966458; x=1739502458; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Id7jaa6k0BX7PLQJS3cBe6qIs2K9RSyvcFT8QOa3qkE=; b=JHe5034DGy5+/NTfiQ+rcMVtiGInq6FV40vtQMCJ4K+BbzD6suj/hiIS QQDv7H4Wd9aoMQxN2e0vZTeBAF1IAeDh/BlVCVu9JP/hoKGWr0Lk8/pSV /8JAgRRMQWDO4oKMvAxf75/y154zDtQrCcoAayfcvLVEFEZwMY/D4rIgu TjnA+hPffMPRMym1g2CI8tE5on7GWlAFsobwpi7tOjrnbuSXDmGyal+o0 PV6dOdNDVQD0fq42zORh8oU75HWpzuM4tl1GjcvmDOktMuKUVTW+L8erT 19KBesVneWJcBN942puWCa0kgWVQbm+ZfR9klckCUXfAXAsKvi0ipQxco Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10984"; a="19461225" X-IronPort-AV: E=Sophos;i="6.06,161,1705392000"; d="scan'208";a="19461225" Received: from fmviesa009.fm.intel.com ([10.60.135.149]) by orvoesa102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Feb 2024 19:07:37 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.06,161,1705392000"; d="scan'208";a="3385660" Received: from yongliang-ubuntu20-ilbpg12.png.intel.com ([10.88.229.33]) by fmviesa009.fm.intel.com with ESMTP; 14 Feb 2024 19:07:29 -0800 From: Choong Yong Liang To: Rajneesh Bhardwaj , David E Box , Hans de Goede , Mark Gross , Alexandre Torgue , Jose Abreu , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin , Richard Cochran , Russell King , Alexei Starovoitov , Daniel Borkmann , Jesper Dangaard Brouer , John Fastabend , Andrew Lunn , Heiner Kallweit , Philipp Zabel Cc: Andrew Halaney , Serge Semin , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, platform-driver-x86@vger.kernel.org, linux-hwmon@vger.kernel.org, bpf@vger.kernel.org, Voon Wei Feng , Michael Sit Wei Hong , Lai Peter Jun Ann , Abdul Rahim Faizal Subject: [PATCH net-next v5 1/9] net: phylink: provide mac_get_pcs_neg_mode() function Date: Thu, 15 Feb 2024 11:04:51 +0800 Message-Id: <20240215030500.3067426-2-yong.liang.choong@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240215030500.3067426-1-yong.liang.choong@linux.intel.com> References: <20240215030500.3067426-1-yong.liang.choong@linux.intel.com> Precedence: bulk X-Mailing-List: bpf@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org Phylink invokes the 'mac_get_pcs_neg_mode' function during interface mode switching and initial startup. This function is optional; if 'phylink_pcs_neg_mode' fails to accurately reflect the current PCS negotiation mode, the MAC driver can determine the mode based on the interface mode, current link negotiation mode, and advertising link mode. For instance, if the interface switches from 2500baseX to SGMII mode, and the current link mode is MLO_AN_PHY, calling 'phylink_pcs_neg_mode' would yield PHYLINK_PCS_NEG_OUTBAND. Since the MAC and PCS driver require PHYLINK_PCS_NEG_INBAND_ENABLED, the 'mac_get_pcs_neg_mode' function will calculate the mode based on the interface, current link negotiation mode, and advertising link mode, returning PHYLINK_PCS_NEG_OUTBAND to enable the PCS to configure the correct settings. Signed-off-by: Choong Yong Liang --- drivers/net/phy/phylink.c | 14 +++++++++++--- include/linux/phylink.h | 5 +++++ 2 files changed, 16 insertions(+), 3 deletions(-) diff --git a/drivers/net/phy/phylink.c b/drivers/net/phy/phylink.c index 503fd7c40523..b38b39a6d1f0 100644 --- a/drivers/net/phy/phylink.c +++ b/drivers/net/phy/phylink.c @@ -1151,9 +1151,17 @@ static void phylink_major_config(struct phylink *pl, bool restart, phylink_dbg(pl, "major config %s\n", phy_modes(state->interface)); - pl->pcs_neg_mode = phylink_pcs_neg_mode(pl->cur_link_an_mode, - state->interface, - state->advertising); + if (pl->mac_ops->mac_get_pcs_neg_mode) { + pl->pcs_neg_mode = pl->mac_ops->mac_get_pcs_neg_mode + (pl->config, + pl->cur_link_an_mode, + state->interface, + state->advertising); + } else { + pl->pcs_neg_mode = phylink_pcs_neg_mode(pl->cur_link_an_mode, + state->interface, + state->advertising); + } if (pl->using_mac_select_pcs) { pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface); diff --git a/include/linux/phylink.h b/include/linux/phylink.h index 6ba411732a0d..f0a6c00e8dab 100644 --- a/include/linux/phylink.h +++ b/include/linux/phylink.h @@ -168,6 +168,7 @@ void phylink_limit_mac_speed(struct phylink_config *config, u32 max_speed); * @mac_finish: finish a major reconfiguration of the interface. * @mac_link_down: take the link down. * @mac_link_up: allow the link to come up. + * @mac_get_pcs_neg_mode: Get PCS negotiation mode for interface mode. * * The individual methods are described more fully below. */ @@ -188,6 +189,10 @@ struct phylink_mac_ops { struct phy_device *phy, unsigned int mode, phy_interface_t interface, int speed, int duplex, bool tx_pause, bool rx_pause); + unsigned int (*mac_get_pcs_neg_mode)(struct phylink_config *config, + unsigned int mode, + phy_interface_t interface, + const unsigned long *advertising); }; #if 0 /* For kernel-doc purposes only. */ From patchwork Thu Feb 15 03:04:52 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Choong Yong Liang X-Patchwork-Id: 13557289 X-Patchwork-Delegate: kuba@kernel.org Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E5727D272; 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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin , Richard Cochran , Russell King , Alexei Starovoitov , Daniel Borkmann , Jesper Dangaard Brouer , John Fastabend , Andrew Lunn , Heiner Kallweit , Philipp Zabel Cc: Andrew Halaney , Serge Semin , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, platform-driver-x86@vger.kernel.org, linux-hwmon@vger.kernel.org, bpf@vger.kernel.org, Voon Wei Feng , Michael Sit Wei Hong , Lai Peter Jun Ann , Abdul Rahim Faizal Subject: [PATCH net-next v5 2/9] net: phylink: add phylink_pcs_neg_mode() declaration into phylink.h Date: Thu, 15 Feb 2024 11:04:52 +0800 Message-Id: <20240215030500.3067426-3-yong.liang.choong@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240215030500.3067426-1-yong.liang.choong@linux.intel.com> References: <20240215030500.3067426-1-yong.liang.choong@linux.intel.com> Precedence: bulk X-Mailing-List: bpf@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org Add phylink_pcs_neg_mode() declaration to the header file for other modules to call the function. Signed-off-by: Choong Yong Liang --- drivers/net/phy/phylink.c | 7 ++++--- include/linux/phylink.h | 3 +++ 2 files changed, 7 insertions(+), 3 deletions(-) diff --git a/drivers/net/phy/phylink.c b/drivers/net/phy/phylink.c index b38b39a6d1f0..b4345042d3fe 100644 --- a/drivers/net/phy/phylink.c +++ b/drivers/net/phy/phylink.c @@ -1093,9 +1093,9 @@ static void phylink_pcs_an_restart(struct phylink *pl) * Note: this is for cases where the PCS itself is involved in negotiation * (e.g. Clause 37, SGMII and similar) not Clause 73. */ -static unsigned int phylink_pcs_neg_mode(unsigned int mode, - phy_interface_t interface, - const unsigned long *advertising) +unsigned int phylink_pcs_neg_mode(unsigned int mode, + phy_interface_t interface, + const unsigned long *advertising) { unsigned int neg_mode; @@ -1139,6 +1139,7 @@ static unsigned int phylink_pcs_neg_mode(unsigned int mode, return neg_mode; } +EXPORT_SYMBOL_GPL(phylink_pcs_neg_mode); static void phylink_major_config(struct phylink *pl, bool restart, const struct phylink_link_state *state) diff --git a/include/linux/phylink.h b/include/linux/phylink.h index f0a6c00e8dab..74af8cfbdd92 100644 --- a/include/linux/phylink.h +++ b/include/linux/phylink.h @@ -594,6 +594,9 @@ int phylink_ethtool_set_eee(struct phylink *link, struct ethtool_keee *eee); int phylink_mii_ioctl(struct phylink *, struct ifreq *, int); int phylink_speed_down(struct phylink *pl, bool sync); int phylink_speed_up(struct phylink *pl); +unsigned int phylink_pcs_neg_mode(unsigned int mode, + phy_interface_t interface, + const unsigned long *advertising); #define phylink_zero(bm) \ bitmap_zero(bm, __ETHTOOL_LINK_MODE_MASK_NBITS) From patchwork Thu Feb 15 03:04:53 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Choong Yong Liang X-Patchwork-Id: 13557290 X-Patchwork-Delegate: kuba@kernel.org Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2C1D9DDD1; Thu, 15 Feb 2024 03:07:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.10 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707966475; cv=none; b=CHJySDgchONrqwGRFQatn9/aVrzWe0xkyDwRWmUCjhfCSYMVFd1ctVyND3s4dD1Bce9CBeVwBsqoGKLYsBs3MsOk2PawajUaWP4eT2BdH4Wp0s9wfcMxO3V6wvFeflgKD7a+pXRbi4F2l6XwvrjeRjcsIBmMykEbcYwOtAPrCJY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707966475; c=relaxed/simple; bh=v3YcIHzlZFo38gIzLCM5tNLAmbkmNuWw2PgAfJFV8dc=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=BZu70Pl7MSPbsMAiSQXuOw0TMjWsjvypE5XCpDTPDyKNrOeEE+fFcnpx3OLDpzClh364CAKEIyrmH23pwZzMDHRlFFUdFoYivXc1Trb3/BT6sfuYwuS+8DbCvmNMhNQaPzATSKDZRJw0ucBPmqgT37SHXnIGvu8BPVRU65pCTN4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=kD+Qn0ZP; arc=none smtp.client-ip=198.175.65.10 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="kD+Qn0ZP" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1707966475; x=1739502475; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=v3YcIHzlZFo38gIzLCM5tNLAmbkmNuWw2PgAfJFV8dc=; b=kD+Qn0ZPy188G8KIREi7TNKTp9fMm/mZ8bjO4FdyFbEjsMK2Lv6sDbxt IokgGEOjqEUjG0WkAUVKuhbTWgNSpXpCx4e6W8cZgvWKNXeh30EHkBSA3 ncld2BkCl4A1MH9mq/czA7JMD/Toatd+/F8zCYbgsjbxfzARdwt/KLXsz Y+4a3J3B1UtzuFoVjrRiJls+cN/7H8Z1Xx4igk5VU/1ZKWgs2VNNDR8ei Hqe/OoWJtwNeGR4LPP00uzYtwV0l+fkVe06llFsgc0GCHyfIfv2dQQcS7 tzLS7r42TtfEyA45AVtaCpX0ZwREmIXuThtvbCFAquzQOdPygmnuKp8UK A==; X-IronPort-AV: E=McAfee;i="6600,9927,10984"; a="19461278" X-IronPort-AV: E=Sophos;i="6.06,161,1705392000"; d="scan'208";a="19461278" Received: from fmviesa009.fm.intel.com ([10.60.135.149]) by orvoesa102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Feb 2024 19:07:54 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.06,161,1705392000"; d="scan'208";a="3385692" Received: from yongliang-ubuntu20-ilbpg12.png.intel.com ([10.88.229.33]) by fmviesa009.fm.intel.com with ESMTP; 14 Feb 2024 19:07:46 -0800 From: Choong Yong Liang To: Rajneesh Bhardwaj , David E Box , Hans de Goede , Mark Gross , Alexandre Torgue , Jose Abreu , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin , Richard Cochran , Russell King , Alexei Starovoitov , Daniel Borkmann , Jesper Dangaard Brouer , John Fastabend , Andrew Lunn , Heiner Kallweit , Philipp Zabel Cc: Andrew Halaney , Serge Semin , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, platform-driver-x86@vger.kernel.org, linux-hwmon@vger.kernel.org, bpf@vger.kernel.org, Voon Wei Feng , Michael Sit Wei Hong , Lai Peter Jun Ann , Abdul Rahim Faizal Subject: [PATCH net-next v5 3/9] net: stmmac: select PCS negotiation mode according to the interface mode Date: Thu, 15 Feb 2024 11:04:53 +0800 Message-Id: <20240215030500.3067426-4-yong.liang.choong@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240215030500.3067426-1-yong.liang.choong@linux.intel.com> References: <20240215030500.3067426-1-yong.liang.choong@linux.intel.com> Precedence: bulk X-Mailing-List: bpf@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org The 'stmmac_get_pcs_neg_mode' is invoked during link initialization or interface mode changes. In cases where 'priv->plat->get_pcs_neg_mode' is absent, the default 'phylink_pcs_neg_mode' function is utilized. Additionally, the 'intel_get_pcs_neg_mode' function is available to determine the PCS negotiation mode based on the provided interface mode. Signed-off-by: Choong Yong Liang --- .../net/ethernet/stmicro/stmmac/dwmac-intel.c | 48 +++++++++++++++---- .../net/ethernet/stmicro/stmmac/stmmac_main.c | 17 +++++++ include/linux/stmmac.h | 2 + 3 files changed, 57 insertions(+), 10 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c index 60283543ffc8..6f12e80b8a05 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c @@ -414,6 +414,39 @@ static void intel_mgbe_pse_crossts_adj(struct intel_priv_data *intel_priv, } } +static bool is_fixed_link(struct pci_dev *pdev) +{ + struct fwnode_handle *fwnode = dev_fwnode(&pdev->dev); + bool is_fixed_link = false; + + if (fwnode) { + struct fwnode_handle *fixed_node; + + fixed_node = fwnode_get_named_child_node(fwnode, "fixed-link"); + if (fixed_node) + is_fixed_link = true; + + fwnode_handle_put(fixed_node); + } + + return is_fixed_link; +} + +static unsigned int intel_get_pcs_neg_mode(phy_interface_t interface, + struct pci_dev *pdev) +{ + unsigned int neg_mode; + + if ((interface == PHY_INTERFACE_MODE_SGMII || + interface == PHY_INTERFACE_MODE_1000BASEX) && + !is_fixed_link(pdev)) + neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED; + else + neg_mode = PHYLINK_PCS_NEG_OUTBAND; + + return neg_mode; +} + static void common_default_data(struct plat_stmmacenet_data *plat) { plat->clk_csr = 2; /* clk_csr_i = 20-35MHz & MDC = clk_csr_i/16 */ @@ -590,15 +623,8 @@ static int intel_mgbe_common_data(struct pci_dev *pdev, } /* For fixed-link setup, we clear xpcs_an_inband */ - if (fwnode) { - struct fwnode_handle *fixed_node; - - fixed_node = fwnode_get_named_child_node(fwnode, "fixed-link"); - if (fixed_node) - plat->mdio_bus_data->xpcs_an_inband = false; - - fwnode_handle_put(fixed_node); - } + if (is_fixed_link(pdev)) + plat->mdio_bus_data->xpcs_an_inband = false; /* Ensure mdio bus scan skips intel serdes and pcs-xpcs */ plat->mdio_bus_data->phy_mask = 1 << INTEL_MGBE_ADHOC_ADDR; @@ -649,7 +675,7 @@ static int ehl_sgmii_data(struct pci_dev *pdev, plat->speed_mode_2500 = intel_speed_mode_2500; plat->serdes_powerup = intel_serdes_powerup; plat->serdes_powerdown = intel_serdes_powerdown; - + plat->get_pcs_neg_mode = intel_get_pcs_neg_mode; plat->clk_ptp_rate = 204800000; return ehl_common_data(pdev, plat); @@ -708,6 +734,7 @@ static int ehl_pse0_sgmii1g_data(struct pci_dev *pdev, plat->speed_mode_2500 = intel_speed_mode_2500; plat->serdes_powerup = intel_serdes_powerup; plat->serdes_powerdown = intel_serdes_powerdown; + plat->get_pcs_neg_mode = intel_get_pcs_neg_mode; return ehl_pse0_common_data(pdev, plat); } @@ -749,6 +776,7 @@ static int ehl_pse1_sgmii1g_data(struct pci_dev *pdev, plat->speed_mode_2500 = intel_speed_mode_2500; plat->serdes_powerup = intel_serdes_powerup; plat->serdes_powerdown = intel_serdes_powerdown; + plat->get_pcs_neg_mode = intel_get_pcs_neg_mode; return ehl_pse1_common_data(pdev, plat); } diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c index ae2ffa9595d6..dbd16fc38888 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c @@ -1104,11 +1104,28 @@ static void stmmac_mac_link_up(struct phylink_config *config, stmmac_hwtstamp_correct_latency(priv, priv); } +static unsigned int stmmac_get_pcs_neg_mode(struct phylink_config *config, + unsigned int mode, + phy_interface_t interface, + const unsigned long *advertising) +{ + struct stmmac_priv *priv = netdev_priv(to_net_dev(config->dev)); + unsigned int neg_mode; + + if (priv->plat->get_pcs_neg_mode) + neg_mode = priv->plat->get_pcs_neg_mode(interface, priv->plat->pdev); + else + neg_mode = phylink_pcs_neg_mode(mode, interface, advertising); + + return neg_mode; +} + static const struct phylink_mac_ops stmmac_phylink_mac_ops = { .mac_select_pcs = stmmac_mac_select_pcs, .mac_config = stmmac_mac_config, .mac_link_down = stmmac_mac_link_down, .mac_link_up = stmmac_mac_link_up, + .mac_get_pcs_neg_mode = stmmac_get_pcs_neg_mode, }; /** diff --git a/include/linux/stmmac.h b/include/linux/stmmac.h index dfa1828cd756..ffd66722eeda 100644 --- a/include/linux/stmmac.h +++ b/include/linux/stmmac.h @@ -277,6 +277,8 @@ struct plat_stmmacenet_data { int (*serdes_powerup)(struct net_device *ndev, void *priv); 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14 Feb 2024 19:08:02 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.06,161,1705392000"; d="scan'208";a="3385742" Received: from yongliang-ubuntu20-ilbpg12.png.intel.com ([10.88.229.33]) by fmviesa009.fm.intel.com with ESMTP; 14 Feb 2024 19:07:54 -0800 From: Choong Yong Liang To: Rajneesh Bhardwaj , David E Box , Hans de Goede , Mark Gross , Alexandre Torgue , Jose Abreu , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin , Richard Cochran , Russell King , Alexei Starovoitov , Daniel Borkmann , Jesper Dangaard Brouer , John Fastabend , Andrew Lunn , Heiner Kallweit , Philipp Zabel Cc: Andrew Halaney , Serge Semin , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, platform-driver-x86@vger.kernel.org, linux-hwmon@vger.kernel.org, bpf@vger.kernel.org, Voon Wei Feng , Michael Sit Wei Hong , Lai Peter Jun Ann , Abdul Rahim Faizal Subject: [PATCH net-next v5 4/9] net: pcs: xpcs: re-initiate clause 37 Auto-negotiation Date: Thu, 15 Feb 2024 11:04:54 +0800 Message-Id: <20240215030500.3067426-5-yong.liang.choong@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240215030500.3067426-1-yong.liang.choong@linux.intel.com> References: <20240215030500.3067426-1-yong.liang.choong@linux.intel.com> Precedence: bulk X-Mailing-List: bpf@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org According to the XPCS datasheet, a soft reset is required to initiate Clause 37 auto-negotiation when the XPCS switches interface modes. When the interface mode is set to 2500BASE-X, Clause 37 Auto-Negotiation is turned off. Subsequently, when the interface mode switches from 2500BASE-X to SGMII, re-initiating Clause 37 auto-negotiation is required for the SGMII interface mode to function properly. Signed-off-by: Choong Yong Liang --- drivers/net/pcs/pcs-xpcs.c | 62 +++++++++++++++++++++++++++++++++++--- 1 file changed, 57 insertions(+), 5 deletions(-) diff --git a/drivers/net/pcs/pcs-xpcs.c b/drivers/net/pcs/pcs-xpcs.c index 52a7757ee419..cf1ed89d6418 100644 --- a/drivers/net/pcs/pcs-xpcs.c +++ b/drivers/net/pcs/pcs-xpcs.c @@ -848,6 +848,60 @@ static int xpcs_config_2500basex(struct dw_xpcs *xpcs) return xpcs_write(xpcs, MDIO_MMD_VEND2, DW_VR_MII_MMD_CTRL, ret); } +static int xpcs_switch_to_aneg_c37_sgmii(const struct xpcs_compat *compat, + struct dw_xpcs *xpcs, + unsigned int neg_mode) +{ + bool an_c37_enabled; + int ret, mdio_ctrl; + + if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) { + mdio_ctrl = xpcs_read(xpcs, MDIO_MMD_VEND2, DW_VR_MII_MMD_CTRL); + if (mdio_ctrl < 0) + return mdio_ctrl; + + an_c37_enabled = mdio_ctrl & AN_CL37_EN; + if (!an_c37_enabled) { + //Perform soft reset to initiate C37 auto-negotiation + ret = xpcs_soft_reset(xpcs, compat); + if (ret) + return ret; + } + } + return 0; +} + +static int xpcs_switch_interface_mode(const struct xpcs_compat *compat, + struct dw_xpcs *xpcs, + phy_interface_t interface, + unsigned int neg_mode) +{ + int ret; + + if (xpcs->dev_flag == DW_DEV_TXGBE) { + ret = txgbe_xpcs_switch_mode(xpcs, interface); + if (ret) + return ret; + } else { + if (xpcs->interface != interface) { + xpcs->interface = interface; + + switch (compat->an_mode) { + case DW_AN_C37_SGMII: + ret = xpcs_switch_to_aneg_c37_sgmii(compat, + xpcs, + neg_mode); + if (ret) + return ret; + break; + default: + return 0; + } + } + } + return 0; +} + int xpcs_do_config(struct dw_xpcs *xpcs, phy_interface_t interface, const unsigned long *advertising, unsigned int neg_mode) { @@ -858,11 +912,9 @@ int xpcs_do_config(struct dw_xpcs *xpcs, phy_interface_t interface, if (!compat) return -ENODEV; - if (xpcs->dev_flag == DW_DEV_TXGBE) { - ret = txgbe_xpcs_switch_mode(xpcs, interface); - if (ret) - return ret; - } + ret = xpcs_switch_interface_mode(compat, xpcs, interface, neg_mode); + if (ret) + return ret; switch (compat->an_mode) { case DW_10GBASER: From patchwork Thu Feb 15 03:04:55 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Choong Yong Liang X-Patchwork-Id: 13557292 X-Patchwork-Delegate: kuba@kernel.org Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6E2388F68; Thu, 15 Feb 2024 03:08:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.10 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707966493; cv=none; b=HATGunwvAixTwUSVl3t5rWoT+fJey1Wpd7IFYzKzjdyYGx92BoaQ5oZBEhwl0W13qJ6TQU7VYVcR/S84CB5oxTEcqPYE76cp3fcaBQHJhrbvYDpG35ETKYsSRqS+6uxbm/dXRAkg/rbgnTB+eH43vEsX7/J8zkePSQX4B2LktCA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; 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14 Feb 2024 19:08:02 -0800 From: Choong Yong Liang To: Rajneesh Bhardwaj , David E Box , Hans de Goede , Mark Gross , Alexandre Torgue , Jose Abreu , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin , Richard Cochran , Russell King , Alexei Starovoitov , Daniel Borkmann , Jesper Dangaard Brouer , John Fastabend , Andrew Lunn , Heiner Kallweit , Philipp Zabel Cc: Andrew Halaney , Serge Semin , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, platform-driver-x86@vger.kernel.org, linux-hwmon@vger.kernel.org, bpf@vger.kernel.org, Voon Wei Feng , Michael Sit Wei Hong , Lai Peter Jun Ann , Abdul Rahim Faizal Subject: [PATCH net-next v5 5/9] arch: x86: Add IPC mailbox accessor function and add SoC register access Date: Thu, 15 Feb 2024 11:04:55 +0800 Message-Id: <20240215030500.3067426-6-yong.liang.choong@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240215030500.3067426-1-yong.liang.choong@linux.intel.com> References: <20240215030500.3067426-1-yong.liang.choong@linux.intel.com> Precedence: bulk X-Mailing-List: bpf@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org From: "David E. Box" - Exports intel_pmc_ipc() for host access to the PMC IPC mailbox - Add support to use IPC command allows host to access SoC registers through PMC firmware that are otherwise inaccessible to the host due to security policies. Signed-off-by: David E. Box Signed-off-by: Chao Qin Signed-off-by: Choong Yong Liang --- MAINTAINERS | 2 + arch/x86/Kconfig | 9 +++ arch/x86/platform/intel/Makefile | 1 + arch/x86/platform/intel/pmc_ipc.c | 75 +++++++++++++++++++ .../linux/platform_data/x86/intel_pmc_ipc.h | 34 +++++++++ 5 files changed, 121 insertions(+) create mode 100644 arch/x86/platform/intel/pmc_ipc.c create mode 100644 include/linux/platform_data/x86/intel_pmc_ipc.h diff --git a/MAINTAINERS b/MAINTAINERS index 2b775f4369e0..0276f1d53caf 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -10996,8 +10996,10 @@ M: Rajneesh Bhardwaj M: David E Box L: platform-driver-x86@vger.kernel.org S: Maintained +F: arch/x86/platform/intel/pmc_ipc.c F: Documentation/ABI/testing/sysfs-platform-intel-pmc F: drivers/platform/x86/intel/pmc/ +F: linux/platform_data/x86/intel_pmc_ipc.h INTEL PMIC GPIO DRIVERS M: Andy Shevchenko diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 5edec175b9bf..bceae28b9381 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -666,6 +666,15 @@ config X86_AMD_PLATFORM_DEVICE I2C and UART depend on COMMON_CLK to set clock. GPIO driver is implemented under PINCTRL subsystem. +config INTEL_PMC_IPC + tristate "Intel Core SoC Power Management Controller IPC mailbox" + depends on ACPI + help + This option enables sideband register access support for Intel SoC + power management controller IPC mailbox. + + If you don't require the option or are in doubt, say N. + config IOSF_MBI tristate "Intel SoC IOSF Sideband support for SoC platforms" depends on PCI diff --git a/arch/x86/platform/intel/Makefile b/arch/x86/platform/intel/Makefile index dbee3b00f9d0..470fc68de6ba 100644 --- a/arch/x86/platform/intel/Makefile +++ b/arch/x86/platform/intel/Makefile @@ -1,2 +1,3 @@ # SPDX-License-Identifier: GPL-2.0-only obj-$(CONFIG_IOSF_MBI) += iosf_mbi.o +obj-$(CONFIG_INTEL_PMC_IPC) += pmc_ipc.o \ No newline at end of file diff --git a/arch/x86/platform/intel/pmc_ipc.c b/arch/x86/platform/intel/pmc_ipc.c new file mode 100644 index 000000000000..a96234982710 --- /dev/null +++ b/arch/x86/platform/intel/pmc_ipc.c @@ -0,0 +1,75 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Intel Core SoC Power Management Controller IPC mailbox + * + * Copyright (c) 2023, Intel Corporation. + * All Rights Reserved. + * + * Authors: Choong Yong Liang + * David E. Box + */ +#include +#include +#include + +#define PMC_IPCS_PARAM_COUNT 7 + +int intel_pmc_ipc(struct pmc_ipc_cmd *ipc_cmd, u32 *rbuf) +{ + struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL }; + union acpi_object params[PMC_IPCS_PARAM_COUNT] = { + {.type = ACPI_TYPE_INTEGER,}, + {.type = ACPI_TYPE_INTEGER,}, + {.type = ACPI_TYPE_INTEGER,}, + {.type = ACPI_TYPE_INTEGER,}, + {.type = ACPI_TYPE_INTEGER,}, + {.type = ACPI_TYPE_INTEGER,}, + {.type = ACPI_TYPE_INTEGER,}, + }; + struct acpi_object_list arg_list = { PMC_IPCS_PARAM_COUNT, params }; + union acpi_object *obj; + int status; + + if (!ipc_cmd || !rbuf) + return -EINVAL; + + /* + * 0: IPC Command + * 1: IPC Sub Command + * 2: Size + * 3-6: Write Buffer for offset + */ + params[0].integer.value = ipc_cmd->cmd; + params[1].integer.value = ipc_cmd->sub_cmd; + params[2].integer.value = ipc_cmd->size; + params[3].integer.value = ipc_cmd->wbuf[0]; + params[4].integer.value = ipc_cmd->wbuf[1]; + params[5].integer.value = ipc_cmd->wbuf[2]; + params[6].integer.value = ipc_cmd->wbuf[3]; + + status = acpi_evaluate_object(NULL, "\\IPCS", &arg_list, &buffer); + if (ACPI_FAILURE(status)) + return -ENODEV; + + obj = buffer.pointer; + /* Check if the number of elements in package is 5 */ + if (obj && obj->type == ACPI_TYPE_PACKAGE && obj->package.count == 5) { + const union acpi_object *objs = obj->package.elements; + + if ((u8)objs[0].integer.value != 0) + return -EINVAL; + + rbuf[0] = objs[1].integer.value; + rbuf[1] = objs[2].integer.value; + rbuf[2] = objs[3].integer.value; + rbuf[3] = objs[4].integer.value; + } else { + return -EINVAL; + } + + return 0; +} +EXPORT_SYMBOL(intel_pmc_ipc); + +MODULE_LICENSE("GPL"); +MODULE_DESCRIPTION("Intel PMC IPC Mailbox accessor"); diff --git a/include/linux/platform_data/x86/intel_pmc_ipc.h b/include/linux/platform_data/x86/intel_pmc_ipc.h new file mode 100644 index 000000000000..d47b89f873fc --- /dev/null +++ b/include/linux/platform_data/x86/intel_pmc_ipc.h @@ -0,0 +1,34 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Intel Core SoC Power Management Controller Header File + * + * Copyright (c) 2023, Intel Corporation. + * All Rights Reserved. + * + * Authors: Choong Yong Liang + * David E. Box + */ +#ifndef INTEL_PMC_IPC_H +#define INTEL_PMC_IPC_H + +#define IPC_SOC_REGISTER_ACCESS 0xAA +#define IPC_SOC_SUB_CMD_READ 0x00 +#define IPC_SOC_SUB_CMD_WRITE 0x01 + +struct pmc_ipc_cmd { + u32 cmd; + u32 sub_cmd; + u32 size; + u32 wbuf[4]; +}; + +/** + * intel_pmc_ipc() - PMC IPC Mailbox accessor + * @ipc_cmd: struct pmc_ipc_cmd prepared with input to send + * @rbuf: Allocated u32[4] array for returned IPC data + * + * Return: 0 on success. Non-zero on mailbox error + */ +int intel_pmc_ipc(struct pmc_ipc_cmd *ipc_cmd, u32 *rbuf); + +#endif /* INTEL_PMC_IPC_H */ From patchwork Thu Feb 15 03:04:56 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Choong Yong Liang X-Patchwork-Id: 13557293 X-Patchwork-Delegate: kuba@kernel.org Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 63A11BA2E; Thu, 15 Feb 2024 03:08:19 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.10 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707966500; cv=none; b=pPBGtcvh/k9PiYjfoYF3On/GAXsg5gajzLExh7m39f2UPaKZl6tCncqfRulkPT6QQaUTOHXFU1hiQaUVA49njUKqvISwWg7MGlgdAvfQG4HFtZNrh0E2AZ7dqhpT8BbVE3TKwlEVxTUcDRInuGfHA3vLQECsFOkcQxCeGMi1QwU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707966500; c=relaxed/simple; bh=vvpIPgH1K2PujTnqInvxE+a2W/xss8TF8nrQRvP6KiQ=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=YhfxIY2y2iepAuVg5LU3z9dinbQyIvibPGuuutDhrxGhwPpYlVZlftwS61VeS9nTgd7Z05UbzxUdAoaN/uhHHm8yEK+QZdREVARS0XdrDSlyvzzkScrcpI73oWG35bSeHsXtsHxtpmXBkE0ylvM3Ny554SOJiX7mmFDTVnRy/Xc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=gZ7I4WHg; arc=none smtp.client-ip=198.175.65.10 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="gZ7I4WHg" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1707966500; x=1739502500; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=vvpIPgH1K2PujTnqInvxE+a2W/xss8TF8nrQRvP6KiQ=; b=gZ7I4WHgYWomjcwBvI1Pjb0NLZQYZEmzbWXGCQZKyEj2P4MKAkgb/Pfi BlEVr/JgsVAfuWbocwM9DaBkvP4urpvi/dBJqeKy4TN1P+ZTHThCYjULj fHyQxZgwRT2pgeNDu2x/cIFUujAgeBAMCCnktlCIWvccOzeKCK/48GGIF /VEmgEshCibmvuz7Aoy8/Dz6/t7WixABW3KFyKdvDfC/0SwWs6fpQcv7/ KcnVIHuytBZ7hLxztv4btdhYanLxvRdIEIVZZ7CdrjOFwklUqQK3++K3R i1Vh322HTQ7qM9Mc451O/q34JDzu9F9NPY6fZzgytyrgvslirvI3mKpcb g==; X-IronPort-AV: E=McAfee;i="6600,9927,10984"; a="19461373" X-IronPort-AV: E=Sophos;i="6.06,161,1705392000"; d="scan'208";a="19461373" Received: from fmviesa009.fm.intel.com ([10.60.135.149]) by orvoesa102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Feb 2024 19:08:19 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.06,161,1705392000"; d="scan'208";a="3385820" Received: from yongliang-ubuntu20-ilbpg12.png.intel.com ([10.88.229.33]) by fmviesa009.fm.intel.com with ESMTP; 14 Feb 2024 19:08:11 -0800 From: Choong Yong Liang To: Rajneesh Bhardwaj , David E Box , Hans de Goede , Mark Gross , Alexandre Torgue , Jose Abreu , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin , Richard Cochran , Russell King , Alexei Starovoitov , Daniel Borkmann , Jesper Dangaard Brouer , John Fastabend , Andrew Lunn , Heiner Kallweit , Philipp Zabel Cc: Andrew Halaney , Serge Semin , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, platform-driver-x86@vger.kernel.org, linux-hwmon@vger.kernel.org, bpf@vger.kernel.org, Voon Wei Feng , Michael Sit Wei Hong , Lai Peter Jun Ann , Abdul Rahim Faizal Subject: [PATCH net-next v5 6/9] net: stmmac: configure SerDes on mac_finish Date: Thu, 15 Feb 2024 11:04:56 +0800 Message-Id: <20240215030500.3067426-7-yong.liang.choong@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240215030500.3067426-1-yong.liang.choong@linux.intel.com> References: <20240215030500.3067426-1-yong.liang.choong@linux.intel.com> Precedence: bulk X-Mailing-List: bpf@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org SerDes will configure according to the provided interface mode after finish a major reconfiguration of the interface mode. Signed-off-by: Choong Yong Liang --- drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 13 +++++++++++++ include/linux/stmmac.h | 3 +++ 2 files changed, 16 insertions(+) diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c index dbd16fc38888..69a33e9f1a5c 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c @@ -1120,12 +1120,25 @@ static unsigned int stmmac_get_pcs_neg_mode(struct phylink_config *config, return neg_mode; } +static int stmmac_mac_finish(struct phylink_config *config, unsigned int mode, + phy_interface_t interface) +{ + struct net_device *ndev = to_net_dev(config->dev); + struct stmmac_priv *priv = netdev_priv(ndev); + + if (priv->plat->config_serdes) + priv->plat->config_serdes(ndev, priv->plat->bsp_priv, interface); + + return 0; +} + static const struct phylink_mac_ops stmmac_phylink_mac_ops = { .mac_select_pcs = stmmac_mac_select_pcs, .mac_config = stmmac_mac_config, .mac_link_down = stmmac_mac_link_down, .mac_link_up = stmmac_mac_link_up, .mac_get_pcs_neg_mode = stmmac_get_pcs_neg_mode, + .mac_finish = stmmac_mac_finish, }; /** diff --git a/include/linux/stmmac.h b/include/linux/stmmac.h index ffd66722eeda..fd3d7d25f871 100644 --- a/include/linux/stmmac.h +++ b/include/linux/stmmac.h @@ -279,6 +279,9 @@ struct plat_stmmacenet_data { void (*speed_mode_2500)(struct net_device *ndev, void *priv); unsigned int (*get_pcs_neg_mode)(phy_interface_t interface, struct pci_dev *pdev); + int (*config_serdes)(struct net_device *ndev, + void *priv, + phy_interface_t interface); void (*ptp_clk_freq_config)(struct stmmac_priv *priv); int (*init)(struct platform_device *pdev, void *priv); void (*exit)(struct platform_device *pdev, void *priv); From patchwork Thu Feb 15 03:04:57 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Choong Yong Liang X-Patchwork-Id: 13557294 X-Patchwork-Delegate: kuba@kernel.org Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 44C68182DD; Thu, 15 Feb 2024 03:08:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.10 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707966509; cv=none; b=DmucObqI0K7YyJK+FtGyeeVlWswSbwKUB1v3dQj1dy6rNS5gdy/tLz1p2nTzQl+telj0JsmFxU/QB846uTBd2bbYhmN8rON4oKYReKF+SLPJqMPoEN8mRYHKVI/Ru6nBfmM8dHsDXZo3uGhwHVXuYgMKkJ07Up1jWimb2Xru4dM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707966509; c=relaxed/simple; bh=fumAyhQKjC1W9BaMP5HdTDN5H3s/uIB2V97WkllaS/4=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=dnxHJVPoqnB9Ek24SDdiO7pCLEUyFgNUffpoG1AyLvdS/A2hrTCi05krH0oWLtEXINdGmEZqOQzEbYO4VEKgZtn5a1StbHIkrfJ1ya8MXQn+vLoKMU9hyRk3Z26gOz+VHivQIajWCLJ/1h+BYPaBeOZFN3j/+g185kBr2kndzrs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=UYuhYYKR; arc=none smtp.client-ip=198.175.65.10 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="UYuhYYKR" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1707966508; x=1739502508; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=fumAyhQKjC1W9BaMP5HdTDN5H3s/uIB2V97WkllaS/4=; b=UYuhYYKR9StN7zO0KXoPz+e6/DM5O1VS9d/MDi9COPIiYdJ/i6701N02 JJ++DKk+IAyAKBKSr4HbLrmmFVsz4uuLWKf4o8+ZTeVO2AG9qd5mFr6o4 xMwwjx0CI1PTIdrJnSXVk6JBBLpwAT6AMBtopo6dzGYfedP1ofL7noThv KzFgV68Zq6gGg9k1xpf8RPCqCBgLSCgEEaaCV8ZS6nnsfRaIFPMlJqhB0 se8SrJmVx8d4hY0bPOWx01wvzXsCeRc+h4D/2IjgiXQdXhWUNrwGMwziJ vULdISOIPHb5R8bpLF6kLVgBIT8Yrj8E7w54JvbxSPvaXaOfpzdTxYx0G Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10984"; a="19461394" X-IronPort-AV: E=Sophos;i="6.06,161,1705392000"; d="scan'208";a="19461394" Received: from fmviesa009.fm.intel.com ([10.60.135.149]) by orvoesa102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Feb 2024 19:08:27 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.06,161,1705392000"; d="scan'208";a="3385830" Received: from yongliang-ubuntu20-ilbpg12.png.intel.com ([10.88.229.33]) by fmviesa009.fm.intel.com with ESMTP; 14 Feb 2024 19:08:19 -0800 From: Choong Yong Liang To: Rajneesh Bhardwaj , David E Box , Hans de Goede , Mark Gross , Alexandre Torgue , Jose Abreu , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin , Richard Cochran , Russell King , Alexei Starovoitov , Daniel Borkmann , Jesper Dangaard Brouer , John Fastabend , Andrew Lunn , Heiner Kallweit , Philipp Zabel Cc: Andrew Halaney , Serge Semin , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, platform-driver-x86@vger.kernel.org, linux-hwmon@vger.kernel.org, bpf@vger.kernel.org, Voon Wei Feng , Michael Sit Wei Hong , Lai Peter Jun Ann , Abdul Rahim Faizal Subject: [PATCH net-next v5 7/9] stmmac: intel: configure SerDes according to the interface mode Date: Thu, 15 Feb 2024 11:04:57 +0800 Message-Id: <20240215030500.3067426-8-yong.liang.choong@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240215030500.3067426-1-yong.liang.choong@linux.intel.com> References: <20240215030500.3067426-1-yong.liang.choong@linux.intel.com> Precedence: bulk X-Mailing-List: bpf@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org From: "Tan, Tee Min" Intel platform will configure the SerDes through PMC api based on the provided interface mode. This patch adds several new functions below:- - intel_tsn_interface_is_available(): This new function reads FIA lane ownership registers and common lane registers through IPC commands to know which lane the mGbE port is assigned to. - intel_config_serdes(): To configure the SerDes based on the assigned lane and latest interface mode, it sends IPC command to the PMC through PMC driver/API. The PMC acts as a proxy for R/W on behalf of the driver. - intel_set_reg_access(): Set the register access to the available TSN interface. Signed-off-by: Tan, Tee Min Signed-off-by: Choong Yong Liang --- drivers/net/ethernet/stmicro/stmmac/Kconfig | 2 + .../net/ethernet/stmicro/stmmac/dwmac-intel.c | 115 +++++++++++++++++- .../net/ethernet/stmicro/stmmac/dwmac-intel.h | 75 ++++++++++++ 3 files changed, 191 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig b/drivers/net/ethernet/stmicro/stmmac/Kconfig index 4ec61f1ee71a..25405c305a21 100644 --- a/drivers/net/ethernet/stmicro/stmmac/Kconfig +++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig @@ -273,6 +273,8 @@ config DWMAC_INTEL default X86 depends on X86 && STMMAC_ETH && PCI depends on COMMON_CLK + depends on ACPI + select INTEL_PMC_IPC help This selects the Intel platform specific bus support for the stmmac driver. This driver is used for Intel Quark/EHL/TGL. diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c index 6f12e80b8a05..74cc0aa96faf 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c @@ -5,6 +5,7 @@ #include #include #include +#include #include "dwmac-intel.h" #include "dwmac4.h" #include "stmmac.h" @@ -14,6 +15,9 @@ struct intel_priv_data { int mdio_adhoc_addr; /* mdio address for serdes & etc */ unsigned long crossts_adj; bool is_pse; + const int *tsn_lane_registers; + int max_tsn_lane_registers; + int pid_modphy; }; /* This struct is used to associate PCI Function of MAC controller on a board, @@ -93,7 +97,7 @@ static int intel_serdes_powerup(struct net_device *ndev, void *priv_data) data &= ~SERDES_RATE_MASK; data &= ~SERDES_PCLK_MASK; - if (priv->plat->max_speed == 2500) + if (priv->plat->phy_interface == PHY_INTERFACE_MODE_2500BASEX) data |= SERDES_RATE_PCIE_GEN2 << SERDES_RATE_PCIE_SHIFT | SERDES_PCLK_37p5MHZ << SERDES_PCLK_SHIFT; else @@ -447,6 +451,103 @@ static unsigned int intel_get_pcs_neg_mode(phy_interface_t interface, return neg_mode; } +static bool intel_tsn_interface_is_available(struct net_device *ndev, + struct intel_priv_data *intel_priv) +{ + struct stmmac_priv *priv = netdev_priv(ndev); + struct pmc_ipc_cmd tmp = {0}; + u32 rbuf[4] = {0}; + int ret, i, j; + + if (priv->plat->serdes_powerup) { + tmp.cmd = IPC_SOC_REGISTER_ACCESS; + tmp.sub_cmd = IPC_SOC_SUB_CMD_READ; + + for (i = 0; i < 5; i++) { + tmp.wbuf[0] = R_PCH_FIA_15_PCR_LOS1_REG_BASE + i; + + ret = intel_pmc_ipc(&tmp, rbuf); + if (ret < 0) { + netdev_info(priv->dev, + "Failed to read from PMC.\n"); + return false; + } + + for (j = 0; j <= intel_priv->max_tsn_lane_registers; j++) + if ((rbuf[0] >> + (4 * (intel_priv->tsn_lane_registers[j] % 8)) & + B_PCH_FIA_PCR_L0O) == 0xB) + return true; + } + } + return false; +} + +static int intel_set_reg_access(const struct pmc_serdes_regs *regs, int max_regs) +{ + int ret = 0, i; + + for (i = 0; i < max_regs; i++) { + struct pmc_ipc_cmd tmp = {0}; + u32 buf[4] = {0}; + + tmp.cmd = IPC_SOC_REGISTER_ACCESS; + tmp.sub_cmd = IPC_SOC_SUB_CMD_WRITE; + tmp.wbuf[0] = (u32)regs[i].index; + tmp.wbuf[1] = regs[i].val; + + ret = intel_pmc_ipc(&tmp, buf); + if (ret < 0) + return ret; + } + + return ret; +} + +static int intel_config_serdes(struct net_device *ndev, + void *intel_data, + phy_interface_t interface) +{ + struct intel_priv_data *intel_priv = intel_data; + struct stmmac_priv *priv = netdev_priv(ndev); + int ret = 0; + + if (!intel_tsn_interface_is_available(ndev, intel_priv)) { + netdev_info(priv->dev, + "No TSN interface available to set the registers.\n"); + goto pmc_read_error; + } + + if (intel_priv->pid_modphy == PID_MODPHY1) { + if (interface == PHY_INTERFACE_MODE_2500BASEX) { + ret = intel_set_reg_access(pid_modphy1_2p5g_regs, + ARRAY_SIZE(pid_modphy1_2p5g_regs)); + } else { + ret = intel_set_reg_access(pid_modphy1_1g_regs, + ARRAY_SIZE(pid_modphy1_1g_regs)); + } + } else { + if (interface == PHY_INTERFACE_MODE_2500BASEX) { + ret = intel_set_reg_access(pid_modphy3_2p5g_regs, + ARRAY_SIZE(pid_modphy3_2p5g_regs)); + } else { + ret = intel_set_reg_access(pid_modphy3_1g_regs, + ARRAY_SIZE(pid_modphy3_1g_regs)); + } + } + + priv->plat->phy_interface = interface; + + if (ret < 0) + goto pmc_read_error; + +pmc_read_error: + intel_serdes_powerdown(ndev, intel_priv); + intel_serdes_powerup(ndev, intel_priv); + + return ret; +} + static void common_default_data(struct plat_stmmacenet_data *plat) { plat->clk_csr = 2; /* clk_csr_i = 20-35MHz & MDC = clk_csr_i/16 */ @@ -622,6 +723,15 @@ static int intel_mgbe_common_data(struct pci_dev *pdev, plat->mdio_bus_data->xpcs_an_inband = true; } + /* When the platform is able to switch between PHY_INTERFACE_MODE_SGMII + * and PHY_INTERFACE_MODE_2500BASEX interfaces, we clear xpcs_an_inband + * for PHY_INTERFACE_MODE_2500BASEX interface + */ + if (plat->phy_interface == PHY_INTERFACE_MODE_SGMII && + plat->max_speed == 2500) { + plat->mdio_bus_data->xpcs_an_inband = false; + } + /* For fixed-link setup, we clear xpcs_an_inband */ if (is_fixed_link(pdev)) plat->mdio_bus_data->xpcs_an_inband = false; @@ -676,6 +786,7 @@ static int ehl_sgmii_data(struct pci_dev *pdev, plat->serdes_powerup = intel_serdes_powerup; plat->serdes_powerdown = intel_serdes_powerdown; plat->get_pcs_neg_mode = intel_get_pcs_neg_mode; + plat->config_serdes = intel_config_serdes; plat->clk_ptp_rate = 204800000; return ehl_common_data(pdev, plat); @@ -735,6 +846,7 @@ static int ehl_pse0_sgmii1g_data(struct pci_dev *pdev, plat->serdes_powerup = intel_serdes_powerup; plat->serdes_powerdown = intel_serdes_powerdown; plat->get_pcs_neg_mode = intel_get_pcs_neg_mode; + plat->config_serdes = intel_config_serdes; return ehl_pse0_common_data(pdev, plat); } @@ -777,6 +889,7 @@ static int ehl_pse1_sgmii1g_data(struct pci_dev *pdev, plat->serdes_powerup = intel_serdes_powerup; plat->serdes_powerdown = intel_serdes_powerdown; plat->get_pcs_neg_mode = intel_get_pcs_neg_mode; + plat->config_serdes = intel_config_serdes; return ehl_pse1_common_data(pdev, plat); } diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.h b/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.h index 0a37987478c1..79c35ba969ea 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.h +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.h @@ -50,4 +50,79 @@ #define PCH_PTP_CLK_FREQ_19_2MHZ (GMAC_GPO0) #define PCH_PTP_CLK_FREQ_200MHZ (0) +#define PID_MODPHY1 0xAA +#define PID_MODPHY3 0xA8 + +#if IS_ENABLED(CONFIG_INTEL_PMC_IPC) +struct pmc_serdes_regs { + u8 index; + u32 val; +}; + +/* Modphy Register index */ +#define R_PCH_FIA_15_PCR_LOS1_REG_BASE 8 +#define R_PCH_FIA_15_PCR_LOS2_REG_BASE 9 +#define R_PCH_FIA_15_PCR_LOS3_REG_BASE 10 +#define R_PCH_FIA_15_PCR_LOS4_REG_BASE 11 +#define R_PCH_FIA_15_PCR_LOS5_REG_BASE 12 +#define B_PCH_FIA_PCR_L0O GENMASK(3, 0) +#define PID_MODPHY1_B_MODPHY_PCR_LCPLL_DWORD0 13 +#define PID_MODPHY1_N_MODPHY_PCR_LCPLL_DWORD2 14 +#define PID_MODPHY1_N_MODPHY_PCR_LCPLL_DWORD7 15 +#define PID_MODPHY1_N_MODPHY_PCR_LPPLL_DWORD10 16 +#define PID_MODPHY1_N_MODPHY_PCR_CMN_ANA_DWORD30 17 +#define PID_MODPHY3_B_MODPHY_PCR_LCPLL_DWORD0 18 +#define PID_MODPHY3_N_MODPHY_PCR_LCPLL_DWORD2 19 +#define PID_MODPHY3_N_MODPHY_PCR_LCPLL_DWORD7 20 +#define PID_MODPHY3_N_MODPHY_PCR_LPPLL_DWORD10 21 +#define PID_MODPHY3_N_MODPHY_PCR_CMN_ANA_DWORD30 22 + +#define B_MODPHY_PCR_LCPLL_DWORD0_1G 0x46AAAA41 +#define N_MODPHY_PCR_LCPLL_DWORD2_1G 0x00000139 +#define N_MODPHY_PCR_LCPLL_DWORD7_1G 0x002A0003 +#define N_MODPHY_PCR_LPPLL_DWORD10_1G 0x00170008 +#define N_MODPHY_PCR_CMN_ANA_DWORD30_1G 0x0000D4AC +#define B_MODPHY_PCR_LCPLL_DWORD0_2P5G 0x58555551 +#define N_MODPHY_PCR_LCPLL_DWORD2_2P5G 0x0000012D +#define N_MODPHY_PCR_LCPLL_DWORD7_2P5G 0x001F0003 +#define N_MODPHY_PCR_LPPLL_DWORD10_2P5G 0x00170008 +#define N_MODPHY_PCR_CMN_ANA_DWORD30_2P5G 0x8200ACAC + +static const struct pmc_serdes_regs pid_modphy3_1g_regs[] = { + { PID_MODPHY3_B_MODPHY_PCR_LCPLL_DWORD0, B_MODPHY_PCR_LCPLL_DWORD0_1G }, + { PID_MODPHY3_N_MODPHY_PCR_LCPLL_DWORD2, N_MODPHY_PCR_LCPLL_DWORD2_1G }, + { PID_MODPHY3_N_MODPHY_PCR_LCPLL_DWORD7, N_MODPHY_PCR_LCPLL_DWORD7_1G }, + { PID_MODPHY3_N_MODPHY_PCR_LPPLL_DWORD10, N_MODPHY_PCR_LPPLL_DWORD10_1G }, + { PID_MODPHY3_N_MODPHY_PCR_CMN_ANA_DWORD30, N_MODPHY_PCR_CMN_ANA_DWORD30_1G }, + {} +}; + +static const struct pmc_serdes_regs pid_modphy3_2p5g_regs[] = { + { PID_MODPHY3_B_MODPHY_PCR_LCPLL_DWORD0, B_MODPHY_PCR_LCPLL_DWORD0_2P5G }, + { PID_MODPHY3_N_MODPHY_PCR_LCPLL_DWORD2, N_MODPHY_PCR_LCPLL_DWORD2_2P5G }, + { PID_MODPHY3_N_MODPHY_PCR_LCPLL_DWORD7, N_MODPHY_PCR_LCPLL_DWORD7_2P5G }, + { PID_MODPHY3_N_MODPHY_PCR_LPPLL_DWORD10, N_MODPHY_PCR_LPPLL_DWORD10_2P5G }, + { PID_MODPHY3_N_MODPHY_PCR_CMN_ANA_DWORD30, N_MODPHY_PCR_CMN_ANA_DWORD30_2P5G }, + {} +}; + +static const struct pmc_serdes_regs pid_modphy1_1g_regs[] = { + { PID_MODPHY1_B_MODPHY_PCR_LCPLL_DWORD0, B_MODPHY_PCR_LCPLL_DWORD0_1G }, + { PID_MODPHY1_N_MODPHY_PCR_LCPLL_DWORD2, N_MODPHY_PCR_LCPLL_DWORD2_1G }, + { PID_MODPHY1_N_MODPHY_PCR_LCPLL_DWORD7, N_MODPHY_PCR_LCPLL_DWORD7_1G }, + { PID_MODPHY1_N_MODPHY_PCR_LPPLL_DWORD10, N_MODPHY_PCR_LPPLL_DWORD10_1G }, + { PID_MODPHY1_N_MODPHY_PCR_CMN_ANA_DWORD30, N_MODPHY_PCR_CMN_ANA_DWORD30_1G }, + {} +}; + +static const struct pmc_serdes_regs pid_modphy1_2p5g_regs[] = { + { PID_MODPHY1_B_MODPHY_PCR_LCPLL_DWORD0, B_MODPHY_PCR_LCPLL_DWORD0_2P5G }, + { PID_MODPHY1_N_MODPHY_PCR_LCPLL_DWORD2, N_MODPHY_PCR_LCPLL_DWORD2_2P5G }, + { PID_MODPHY1_N_MODPHY_PCR_LCPLL_DWORD7, N_MODPHY_PCR_LCPLL_DWORD7_2P5G }, + { PID_MODPHY1_N_MODPHY_PCR_LPPLL_DWORD10, N_MODPHY_PCR_LPPLL_DWORD10_2P5G }, + { PID_MODPHY1_N_MODPHY_PCR_CMN_ANA_DWORD30, N_MODPHY_PCR_CMN_ANA_DWORD30_2P5G }, + {} +}; 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14 Feb 2024 19:08:27 -0800 From: Choong Yong Liang To: Rajneesh Bhardwaj , David E Box , Hans de Goede , Mark Gross , Alexandre Torgue , Jose Abreu , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin , Richard Cochran , Russell King , Alexei Starovoitov , Daniel Borkmann , Jesper Dangaard Brouer , John Fastabend , Andrew Lunn , Heiner Kallweit , Philipp Zabel Cc: Andrew Halaney , Serge Semin , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, platform-driver-x86@vger.kernel.org, linux-hwmon@vger.kernel.org, bpf@vger.kernel.org, Voon Wei Feng , Michael Sit Wei Hong , Lai Peter Jun Ann , Abdul Rahim Faizal Subject: [PATCH net-next v5 8/9] stmmac: intel: interface switching support for EHL platform Date: Thu, 15 Feb 2024 11:04:58 +0800 Message-Id: <20240215030500.3067426-9-yong.liang.choong@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240215030500.3067426-1-yong.liang.choong@linux.intel.com> References: <20240215030500.3067426-1-yong.liang.choong@linux.intel.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org 'intel_get_pcs_neg_mode' and 'intel_config_serdes' was provided to handle interface mode change for EHL platform. Modphy register lane was provided to configure serdes on interface mode changing. Signed-off-by: Choong Yong Liang --- .../net/ethernet/stmicro/stmmac/dwmac-intel.c | 21 +++++++++++++++++-- .../net/ethernet/stmicro/stmmac/dwmac-intel.h | 4 ++++ 2 files changed, 23 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c index 74cc0aa96faf..c79d8e3c3b24 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c @@ -759,6 +759,8 @@ static int intel_mgbe_common_data(struct pci_dev *pdev, static int ehl_common_data(struct pci_dev *pdev, struct plat_stmmacenet_data *plat) { + struct intel_priv_data *intel_priv = plat->bsp_priv; + plat->rx_queues_to_use = 8; plat->tx_queues_to_use = 8; plat->flags |= STMMAC_FLAG_USE_PHY_WOL; @@ -774,21 +776,28 @@ static int ehl_common_data(struct pci_dev *pdev, plat->safety_feat_cfg->prtyen = 0; plat->safety_feat_cfg->tmouten = 0; + intel_priv->tsn_lane_registers = ehl_tsn_lane_registers; + intel_priv->max_tsn_lane_registers = ARRAY_SIZE(ehl_tsn_lane_registers); + return intel_mgbe_common_data(pdev, plat); } static int ehl_sgmii_data(struct pci_dev *pdev, struct plat_stmmacenet_data *plat) { + struct intel_priv_data *intel_priv = plat->bsp_priv; + plat->bus_id = 1; plat->phy_interface = PHY_INTERFACE_MODE_SGMII; - plat->speed_mode_2500 = intel_speed_mode_2500; + plat->max_speed = SPEED_2500; plat->serdes_powerup = intel_serdes_powerup; plat->serdes_powerdown = intel_serdes_powerdown; plat->get_pcs_neg_mode = intel_get_pcs_neg_mode; plat->config_serdes = intel_config_serdes; plat->clk_ptp_rate = 204800000; + intel_priv->pid_modphy = PID_MODPHY3; + return ehl_common_data(pdev, plat); } @@ -841,12 +850,16 @@ static struct stmmac_pci_info ehl_pse0_rgmii1g_info = { static int ehl_pse0_sgmii1g_data(struct pci_dev *pdev, struct plat_stmmacenet_data *plat) { + struct intel_priv_data *intel_priv = plat->bsp_priv; + plat->phy_interface = PHY_INTERFACE_MODE_SGMII; - plat->speed_mode_2500 = intel_speed_mode_2500; + plat->max_speed = SPEED_2500; plat->serdes_powerup = intel_serdes_powerup; plat->serdes_powerdown = intel_serdes_powerdown; plat->get_pcs_neg_mode = intel_get_pcs_neg_mode; plat->config_serdes = intel_config_serdes; + intel_priv->pid_modphy = PID_MODPHY1; + return ehl_pse0_common_data(pdev, plat); } @@ -884,12 +897,16 @@ static struct stmmac_pci_info ehl_pse1_rgmii1g_info = { static int ehl_pse1_sgmii1g_data(struct pci_dev *pdev, struct plat_stmmacenet_data *plat) { + struct intel_priv_data *intel_priv = plat->bsp_priv; + plat->phy_interface = PHY_INTERFACE_MODE_SGMII; plat->speed_mode_2500 = intel_speed_mode_2500; plat->serdes_powerup = intel_serdes_powerup; plat->serdes_powerdown = intel_serdes_powerdown; plat->get_pcs_neg_mode = intel_get_pcs_neg_mode; plat->config_serdes = intel_config_serdes; + intel_priv->pid_modphy = PID_MODPHY1; + return ehl_pse1_common_data(pdev, plat); } diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.h b/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.h index 79c35ba969ea..093eed977ab0 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.h +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.h @@ -123,6 +123,10 @@ static const struct pmc_serdes_regs pid_modphy1_2p5g_regs[] = { { PID_MODPHY1_N_MODPHY_PCR_CMN_ANA_DWORD30, N_MODPHY_PCR_CMN_ANA_DWORD30_2P5G }, {} }; + +static const int ehl_tsn_lane_registers[] = {7, 8, 9, 10, 11}; +#else +static const int ehl_tsn_lane_registers[] = {}; #endif /* CONFIG_INTEL_PMC_IPC */ #endif /* __DWMAC_INTEL_H__ */ From patchwork Thu Feb 15 03:04:59 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Choong Yong Liang X-Patchwork-Id: 13557341 X-Patchwork-Delegate: kuba@kernel.org Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 525B3611B; Thu, 15 Feb 2024 03:08:51 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.10 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707966533; cv=none; b=b7d+ZQ+ZdxstqR72As7cd8cqUKT1IExZenJmv974hft1OvRpUCYdTbU/FdEb1cctDLjbxl3Wi51HzKBN0/khsTugPfxQD+uijZ+UF4WTmRfnR/qvV1ACOTMCQNganY3bQb4cBYfKMB1lIEEfIfUWtkqp0wS74p+qxWxPBNZkSe8= ARC-Message-Signature: i=1; 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14 Feb 2024 19:08:35 -0800 From: Choong Yong Liang To: Rajneesh Bhardwaj , David E Box , Hans de Goede , Mark Gross , Alexandre Torgue , Jose Abreu , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin , Richard Cochran , Russell King , Alexei Starovoitov , Daniel Borkmann , Jesper Dangaard Brouer , John Fastabend , Andrew Lunn , Heiner Kallweit , Philipp Zabel Cc: Andrew Halaney , Serge Semin , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, platform-driver-x86@vger.kernel.org, linux-hwmon@vger.kernel.org, bpf@vger.kernel.org, Voon Wei Feng , Michael Sit Wei Hong , Lai Peter Jun Ann , Abdul Rahim Faizal Subject: [PATCH net-next v5 9/9] stmmac: intel: interface switching support for ADL-N platform Date: Thu, 15 Feb 2024 11:04:59 +0800 Message-Id: <20240215030500.3067426-10-yong.liang.choong@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240215030500.3067426-1-yong.liang.choong@linux.intel.com> References: <20240215030500.3067426-1-yong.liang.choong@linux.intel.com> Precedence: bulk X-Mailing-List: bpf@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org 'intel_get_pcs_neg_mode' and 'intel_config_serdes' was provided to handle interface mode change for ADL-S platform. Modphy register lane was provided to configure serdes on interface mode changing. Signed-off-by: Michael Sit Wei Hong Signed-off-by: Choong Yong Liang --- .../net/ethernet/stmicro/stmmac/dwmac-intel.c | 49 ++++++++++++++++++- .../net/ethernet/stmicro/stmmac/dwmac-intel.h | 2 + 2 files changed, 50 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c index c79d8e3c3b24..f0f3d35bdb69 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c @@ -992,6 +992,53 @@ static int adls_sgmii_phy1_data(struct pci_dev *pdev, static struct stmmac_pci_info adls_sgmii1g_phy1_info = { .setup = adls_sgmii_phy1_data, }; + +static int adln_common_data(struct pci_dev *pdev, + struct plat_stmmacenet_data *plat) +{ + struct intel_priv_data *intel_priv = plat->bsp_priv; + + plat->rx_queues_to_use = 6; + plat->tx_queues_to_use = 4; + plat->clk_ptp_rate = 204800000; + + plat->safety_feat_cfg->tsoee = 1; + plat->safety_feat_cfg->mrxpee = 0; + plat->safety_feat_cfg->mestee = 1; + plat->safety_feat_cfg->mrxee = 1; + plat->safety_feat_cfg->mtxee = 1; + plat->safety_feat_cfg->epsi = 0; + plat->safety_feat_cfg->edpp = 0; + plat->safety_feat_cfg->prtyen = 0; + plat->safety_feat_cfg->tmouten = 0; + + intel_priv->tsn_lane_registers = adln_tsn_lane_registers; + intel_priv->max_tsn_lane_registers = ARRAY_SIZE(adln_tsn_lane_registers); + + return intel_mgbe_common_data(pdev, plat); +} + +static int adln_sgmii_phy0_data(struct pci_dev *pdev, + struct plat_stmmacenet_data *plat) +{ + struct intel_priv_data *intel_priv = plat->bsp_priv; + + plat->bus_id = 1; + plat->phy_interface = PHY_INTERFACE_MODE_SGMII; + plat->max_speed = SPEED_2500; + plat->serdes_powerup = intel_serdes_powerup; + plat->serdes_powerdown = intel_serdes_powerdown; + plat->get_pcs_neg_mode = intel_get_pcs_neg_mode; + plat->config_serdes = intel_config_serdes; + intel_priv->pid_modphy = PID_MODPHY1; + + return adln_common_data(pdev, plat); +} + +static struct stmmac_pci_info adln_sgmii1g_phy0_info = { + .setup = adln_sgmii_phy0_data, +}; + static const struct stmmac_pci_func_data galileo_stmmac_func_data[] = { { .func = 6, @@ -1374,7 +1421,7 @@ static const struct pci_device_id intel_eth_pci_id_table[] = { { PCI_DEVICE_DATA(INTEL, TGLH_SGMII1G_1, &tgl_sgmii1g_phy1_info) }, { PCI_DEVICE_DATA(INTEL, ADLS_SGMII1G_0, &adls_sgmii1g_phy0_info) }, { PCI_DEVICE_DATA(INTEL, ADLS_SGMII1G_1, &adls_sgmii1g_phy1_info) }, - { PCI_DEVICE_DATA(INTEL, ADLN_SGMII1G, &tgl_sgmii1g_phy0_info) }, + { PCI_DEVICE_DATA(INTEL, ADLN_SGMII1G, &adln_sgmii1g_phy0_info) }, { PCI_DEVICE_DATA(INTEL, RPLP_SGMII1G, &tgl_sgmii1g_phy0_info) }, {} }; diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.h b/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.h index 093eed977ab0..2c6b50958988 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.h +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.h @@ -124,8 +124,10 @@ static const struct pmc_serdes_regs pid_modphy1_2p5g_regs[] = { {} }; +static const int adln_tsn_lane_registers[] = {6}; static const int ehl_tsn_lane_registers[] = {7, 8, 9, 10, 11}; #else +static const int adln_tsn_lane_registers[] = {}; static const int ehl_tsn_lane_registers[] = {}; #endif /* CONFIG_INTEL_PMC_IPC */