From patchwork Thu Feb 15 11:55:15 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Devarsh Thakkar X-Patchwork-Id: 13558259 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8C31BC4829E for ; Thu, 15 Feb 2024 11:56:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=rI6UYudX/HY6TaJZ7srmWYjNp4SJk6UvuWtreiPQDpM=; b=kJVp53DGpBVBYL u2acIn3q5NjG2NXWpVPImc4NZ/zUZYRPuj+H4IXWZd1R8vwqf2hUEHkJkMaPpM2i7tCj0I1DZ7bjr 65BfawEdY2innTbAnxgTf9XLPIlZybRzKgOzIb1xBOzZX2LN8j2/3/ki9n2hs0XNewW9Yp/KJD8qR RsCbdKglqMrKGGGhE23QcTvTi3Y2HNQ+VXzq1aKKHqqrOpF2sOijw4bc5BOMiNDC8tAVxOiHalwux OXIMHAeVjI8bVSS14+ya64bbg7+tTEuUiiTSriZHVCHoWmFV4DWL0S8BYLRvT2sw8O5ZKvFKxO/x8 kc4Ul/SKzQiBKTs8hgOw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1raaLG-0000000G8K1-3YGA; Thu, 15 Feb 2024 11:55:50 +0000 Received: from lelv0143.ext.ti.com ([198.47.23.248]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1raaL9-0000000G8GH-2yR1 for linux-arm-kernel@lists.infradead.org; Thu, 15 Feb 2024 11:55:45 +0000 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 41FBtJLr107233; Thu, 15 Feb 2024 05:55:19 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1707998119; bh=KwThmhxPNfVS3R3S3MVlJLNpP9wkS8Nnd0NoQ91I/qs=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=DSg68YJkBpXcOnYlEsp9b65tY/nUQPytl9eRxFbniljjpeTqfmc3VFOT39F7ZmQHH ZeeNmaj4jmsNjfdPMvwcs/lZhn9jIDSq7XAoxGuPi+Kfx3Yms0o+VxBv/MsLeyVokx 2WGifg+2eohqi7Nc0BZuX1NTQxOwz9WI7FAE36AY= Received: from DFLE109.ent.ti.com (dfle109.ent.ti.com [10.64.6.30]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 41FBtJvD002079 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 15 Feb 2024 05:55:19 -0600 Received: from DFLE112.ent.ti.com (10.64.6.33) by DFLE109.ent.ti.com (10.64.6.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Thu, 15 Feb 2024 05:55:19 -0600 Received: from lelvsmtp6.itg.ti.com (10.180.75.249) by DFLE112.ent.ti.com (10.64.6.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Thu, 15 Feb 2024 05:55:19 -0600 Received: from localhost (ti.dhcp.ti.com [172.24.227.95] (may be forged)) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 41FBtI2H036707; Thu, 15 Feb 2024 05:55:19 -0600 From: Devarsh Thakkar To: , , , , , , , , , , , , , , , , CC: , , , Subject: [PATCH v4 1/2] dt-bindings: display: ti,am65x-dss: Add support for common1 region Date: Thu, 15 Feb 2024 17:25:15 +0530 Message-ID: <20240215115516.3157909-2-devarsht@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240215115516.3157909-1-devarsht@ti.com> References: <20240215115516.3157909-1-devarsht@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240215_035543_905787_50C79B0A X-CRM114-Status: GOOD ( 12.39 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org TI keystone display subsystem present in AM65 and other SoCs such as AM62 support two separate register spaces namely "common" and "common1" which can be used by two separate hosts to program the display controller as described in respective Technical Reference Manuals [1]. The common1 register space has similar set of configuration registers as supported in common register space except the global configuration registers which are exclusive to common region. This adds binding for "common1" register region too as supported by the hardware. [1]: AM62x TRM: https://www.ti.com/lit/pdf/spruiv7 (Section 14.8.9.1 DSS Registers) AM65x TRM: https://www.ti.com/lit/pdf/spruid7 (Section 12.6.5 DSS Registers) AM62A TRM: https://www.ti.com/lit/pdf/spruj16 (Section 14.9.9 Display Subsystem Registers) Fixes: 2d8730f1021f ("dt-bindings: display: ti,am65x-dss: Add dt-schema yaml binding") Signed-off-by: Devarsh Thakkar Reviewed-by: Aradhya Bhatia Acked-by: Conor Dooley --- V2: Add Acked-by tag V3: Add Fixes tag V4: Add Reviewed-by and AM62A TRM link --- .../devicetree/bindings/display/ti/ti,am65x-dss.yaml | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml b/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml index b6767ef0d24d..55e3e490d0e6 100644 --- a/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml +++ b/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml @@ -37,6 +37,7 @@ properties: - description: OVR2 overlay manager for vp2 - description: VP1 video port 1 - description: VP2 video port 2 + - description: common1 DSS register area reg-names: items: @@ -47,6 +48,7 @@ properties: - const: ovr2 - const: vp1 - const: vp2 + - const: common1 clocks: items: @@ -147,9 +149,10 @@ examples: <0x04a07000 0x1000>, /* ovr1 */ <0x04a08000 0x1000>, /* ovr2 */ <0x04a0a000 0x1000>, /* vp1 */ - <0x04a0b000 0x1000>; /* vp2 */ + <0x04a0b000 0x1000>, /* vp2 */ + <0x04a01000 0x1000>; /* common1 */ reg-names = "common", "vidl1", "vid", - "ovr1", "ovr2", "vp1", "vp2"; + "ovr1", "ovr2", "vp1", "vp2", "common1"; ti,am65x-oldi-io-ctrl = <&dss_oldi_io_ctrl>; power-domains = <&k3_pds 67 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 67 1>, From patchwork Thu Feb 15 11:55:16 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Devarsh Thakkar X-Patchwork-Id: 13558258 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C7D5DC48BEB for ; Thu, 15 Feb 2024 11:55:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=oUX0jMiFqtm/NvlNSFuEJam6dOeuXlfE6bo/X92uxWw=; b=n2eoK1XifqRHga fjqUoMjmWVV3+5svO9o4olVrbSli4i/wn5Liw7usLjumwKn5a86RkBFkjQhVnekdpYTcrfgxCNgAX xPBO8UKVmrY26Vc7yhEFE0H/9KGyEpSQKXeWO/9Z+n5GW9zRItLRK9NbRJ09oQ3vcML7EJeWMbMIo D9lk36ys5W/plx4Z/lhjOSigwW3jqW3wv/Nmn5gYjZhuWjYGWClHILmnU2GJ1w94TWxjaSEoGJekQ l4U4sIC7suPUx4ZK0i/yFY1GpFKRFMxam+jDEIif74E7WFb5GjE9IKBlcpvFTZoLNDfas2k7Y/jY6 S7PJArpHP6B9oog77icQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1raaLF-0000000G8JB-2A4V; Thu, 15 Feb 2024 11:55:49 +0000 Received: from fllv0016.ext.ti.com ([198.47.19.142]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1raaL8-0000000G8G5-3hIG for linux-arm-kernel@lists.infradead.org; Thu, 15 Feb 2024 11:55:44 +0000 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 41FBtLMV112081; Thu, 15 Feb 2024 05:55:21 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1707998121; bh=bG0JxQHgRaJbExPTbkYR7ISFcSOMgQ2Et3X9nqX860g=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=oPgyj1cp7VBa5nmwO9/GHvnXaZfVuCbsdr96P/9QAFb8rr5BIaznar83Vnqzy6k7t uDDRmNJr4IOV5LzF1OA/MVyL094sanCSytduGOTMBUhFSu49DvFve3Vo4ahhujXdzD hR6y9r0HcDYi9c9stgg4knr815yNqlwdbTpk5siw= Received: from DLEE113.ent.ti.com (dlee113.ent.ti.com [157.170.170.24]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 41FBtLPZ002113 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 15 Feb 2024 05:55:21 -0600 Received: from DLEE107.ent.ti.com (157.170.170.37) by DLEE113.ent.ti.com (157.170.170.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Thu, 15 Feb 2024 05:55:20 -0600 Received: from lelvsmtp6.itg.ti.com (10.180.75.249) by DLEE107.ent.ti.com (157.170.170.37) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Thu, 15 Feb 2024 05:55:21 -0600 Received: from localhost (ti.dhcp.ti.com [172.24.227.95] (may be forged)) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 41FBtKRU036724; Thu, 15 Feb 2024 05:55:20 -0600 From: Devarsh Thakkar To: , , , , , , , , , , , , , , , , CC: , , , Subject: [PATCH v4 2/2] arm64: dts: ti: Add common1 register space for AM62x, AM62A & AM65x SoCs Date: Thu, 15 Feb 2024 17:25:16 +0530 Message-ID: <20240215115516.3157909-3-devarsht@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240215115516.3157909-1-devarsht@ti.com> References: <20240215115516.3157909-1-devarsht@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240215_035543_049817_475CD9B6 X-CRM114-Status: GOOD ( 10.21 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This adds common1 register space for AM62x, AM62A and AM65x SoC's which are using TI's Keystone display hardware and supporting it as described in Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml Fixes: 3618811657b3 ("arm64: dts: ti: k3-am62a-main: Add node for Display SubSystem (DSS)") Fixes: 8ccc1073c7bb ("arm64: dts: ti: k3-am62-main: Add node for DSS") Fixes: fc539b90eda2 ("arm64: dts: ti: am654: Add DSS node") Signed-off-by: Devarsh Thakkar Reviewed-by: Aradhya Bhatia --- V2: Add common1 region for AM62A SoC too V3: Add Fixes tag V4: Add Reviewed-by --- arch/arm64/boot/dts/ti/k3-am62-main.dtsi | 5 +++-- arch/arm64/boot/dts/ti/k3-am62a-main.dtsi | 5 +++-- arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 5 +++-- 3 files changed, 9 insertions(+), 6 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi index fe0cc4a9a501..8cee4d94cdd3 100644 --- a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi @@ -779,9 +779,10 @@ dss: dss@30200000 { <0x00 0x30207000 0x00 0x1000>, /* ovr1 */ <0x00 0x30208000 0x00 0x1000>, /* ovr2 */ <0x00 0x3020a000 0x00 0x1000>, /* vp1: Used for OLDI */ - <0x00 0x3020b000 0x00 0x1000>; /* vp2: Used as DPI Out */ + <0x00 0x3020b000 0x00 0x1000>, /* vp2: Used as DPI Out */ + <0x00 0x30201000 0x00 0x1000>; /* common1 */ reg-names = "common", "vidl1", "vid", - "ovr1", "ovr2", "vp1", "vp2"; + "ovr1", "ovr2", "vp1", "vp2", "common1"; power-domains = <&k3_pds 186 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 186 6>, <&dss_vp1_clk>, diff --git a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi index 972971159a62..f475daea548e 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi @@ -994,9 +994,10 @@ dss: dss@30200000 { <0x00 0x30207000 0x00 0x1000>, /* ovr1 */ <0x00 0x30208000 0x00 0x1000>, /* ovr2 */ <0x00 0x3020a000 0x00 0x1000>, /* vp1: Tied OFF in the SoC */ - <0x00 0x3020b000 0x00 0x1000>; /* vp2: Used as DPI Out */ + <0x00 0x3020b000 0x00 0x1000>, /* vp2: Used as DPI Out */ + <0x00 0x30201000 0x00 0x1000>; /* common1 */ reg-names = "common", "vidl1", "vid", - "ovr1", "ovr2", "vp1", "vp2"; + "ovr1", "ovr2", "vp1", "vp2", "common1"; power-domains = <&k3_pds 186 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 186 6>, <&k3_clks 186 0>, diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi index 07010d31350e..ff857117d719 100644 --- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi @@ -991,9 +991,10 @@ dss: dss@4a00000 { <0x0 0x04a07000 0x0 0x1000>, /* ovr1 */ <0x0 0x04a08000 0x0 0x1000>, /* ovr2 */ <0x0 0x04a0a000 0x0 0x1000>, /* vp1 */ - <0x0 0x04a0b000 0x0 0x1000>; /* vp2 */ + <0x0 0x04a0b000 0x0 0x1000>, /* vp2 */ + <0x0 0x04a01000 0x0 0x1000>; /* common1 */ reg-names = "common", "vidl1", "vid", - "ovr1", "ovr2", "vp1", "vp2"; + "ovr1", "ovr2", "vp1", "vp2", "common1"; ti,am65x-oldi-io-ctrl = <&dss_oldi_io_ctrl>;