From patchwork Sun Feb 18 15:13:52 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 13561882 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id F281AC48BF6 for ; Sun, 18 Feb 2024 15:14:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=td1/UXp9mJCcQMX9+YETurQiyMVfYOER8KcCnbdRLJM=; b=0VcKYL0I88ICGJ QoAhw4HnzApR3vQGe8kXPDemO392jvaY/6xwT10bJhyfiQXANt439JSf6hAzmrTyHmQ+kJsiLIv3L kiJPuB3Dw3IJpNlzkHCjuaG7BwBATL+D5MwRDVkBLxuBFkJUMePBk80N0UBgVvSjZKtGfFCwvTYyL r5Rr6WHJ7Rk+8SHATvBBRVJvfHwkKNdAFGv4rXzbUW3RDNynJQZtlFAnKcMp1dP3hST4xqpybvKSq uVgg45xHl7+XsJIpSEwl9ODoeujX+t4wr0FnMH6GXEIFZpHfWCE+tFJgi496eqfF8fWOBLW8gyjl6 tQXhKrq2zS8TV/hR1E0A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rbirp-00000007vXs-3e5z; Sun, 18 Feb 2024 15:14:09 +0000 Received: from mail-wm1-x32d.google.com ([2a00:1450:4864:20::32d]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rbiri-00000007vWa-1swW for linux-arm-kernel@lists.infradead.org; Sun, 18 Feb 2024 15:14:03 +0000 Received: by mail-wm1-x32d.google.com with SMTP id 5b1f17b1804b1-41260f94858so5982165e9.1 for ; Sun, 18 Feb 2024 07:14:01 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=tuxon.dev; s=google; t=1708269240; x=1708874040; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=v3INayNM3vP9PiYuaZtLXnwcILE1ew0o01Gi3XQP/5Q=; b=WDU1dPc0RjK+GXQ5bmwklgwbP/eqwNDPmAwqT6eNonCs8VcI2xYMD7NWkyVJDJT0cr c0+OPZrQxThgthX0dQH/WYe7by05WoCZVjJfc4Gv99vC5J1GMsWkALWeN+W1iDGpqPMq 0AUn+mpXS3acjoZt/rDj9d3RIzCJ4xRfajRAzU2UXF8Z2spuxu8oCAebjVatnIBBsEr0 rtFiEAGJYCz6k2oh+jSBOLTCCTTLre1qPnidL23c3CqRAgt4bEGO9xl0+uDD0PevX61s TVE5k14Kc+8gW0G7aTD8b6sVjhaJT8GwfKQQ0zgcVOiUJeBUAvEZOVDJGOJuQCJWbWX8 sgUw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1708269240; x=1708874040; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=v3INayNM3vP9PiYuaZtLXnwcILE1ew0o01Gi3XQP/5Q=; b=LQyErAER0r+JVsEb2VXJi49oP0qtbKlpASKvOmwXzC3grN6IW3mddhAFdsdNz0V5sg 2Sy1f/PFU6l/4CjxsqGQsrnHPo0xi8f08/i1/mVdHOAyhTRv3z5Ouc+B4O8KlI6JHahx Obb3hDBIJ4kL9/dJPZuIiIF1VjuOXU9nGVsv48cwl/YOH/s1MMzuqxC+VW4amL8o7T44 DyI0+FQmdp23qQgKMleVrCijyU00/SE5s/XZ/7+pyaGaOdvsWGxn9gs+DOTpW22Dy6Rk ZSSa2zRKYUFjAZIbesR+9lQH6NqfpNhh39mEv2dw4udpZH0SCriELoeYabi3/BdD6twe jGnA== X-Forwarded-Encrypted: i=1; AJvYcCWIDSSE1m5hulOSpoI2EMDv3uyK1PKZqnV+86mzqMNz+3+56jLiG5zNdeYfJSzzL4Xd07vb9ia5vmKZlpFxdtyLUzq7KrdohNIJdy/pvg9BCh7Csmk= X-Gm-Message-State: AOJu0YzcmALBwKeE0Z93QlDB09UPbZFaY0Ul7Qfq1x6WbauK0O5YQWyo JdybwNTbYFZd98u9ocu2/LTg8R9Y7czk/uKY+E3DpRKFe24LEhYxhSjOelKlSV8= X-Google-Smtp-Source: AGHT+IF2GNQ1KecR5Q/WvCiqLqgcAqs5/zZPRwICkdDauhhHxyvX3MpY9XT2uYz4KToBXVsgCfaaQg== X-Received: by 2002:a5d:6da7:0:b0:33d:500c:d498 with SMTP id u7-20020a5d6da7000000b0033d500cd498mr118535wrs.64.1708269240595; Sun, 18 Feb 2024 07:14:00 -0800 (PST) Received: from claudiu-X670E-Pro-RS.. ([82.78.167.20]) by smtp.gmail.com with ESMTPSA id bu19-20020a056000079300b0033d3d9447e3sm2150744wrb.83.2024.02.18.07.13.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 18 Feb 2024 07:14:00 -0800 (PST) From: Claudiu Beznea To: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, nicolas.ferre@microchip.com, alexandre.belloni@bootlin.com Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Claudiu Beznea Subject: [PATCH 1/2] ARM: dts: microchip: sama7g5: align dmas to the opening '<' Date: Sun, 18 Feb 2024 17:13:52 +0200 Message-Id: <20240218151353.3612621-2-claudiu.beznea@tuxon.dev> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240218151353.3612621-1-claudiu.beznea@tuxon.dev> References: <20240218151353.3612621-1-claudiu.beznea@tuxon.dev> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240218_071402_508476_E4A8C8DD X-CRM114-Status: GOOD ( 10.58 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Align dmas to the opening '<' to comply with the dts coding style, indentation section, point 3: "For arrays spanning across lines, it is preferred to align the continued entries with opening < from the first line." Signed-off-by: Claudiu Beznea --- arch/arm/boot/dts/microchip/sama7g5.dtsi | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/arch/arm/boot/dts/microchip/sama7g5.dtsi b/arch/arm/boot/dts/microchip/sama7g5.dtsi index 269e0a3ca269..15227a870d34 100644 --- a/arch/arm/boot/dts/microchip/sama7g5.dtsi +++ b/arch/arm/boot/dts/microchip/sama7g5.dtsi @@ -714,7 +714,7 @@ uart0: serial@200 { clocks = <&pmc PMC_TYPE_PERIPHERAL 38>; clock-names = "usart"; dmas = <&dma1 AT91_XDMAC_DT_PERID(6)>, - <&dma1 AT91_XDMAC_DT_PERID(5)>; + <&dma1 AT91_XDMAC_DT_PERID(5)>; dma-names = "tx", "rx"; atmel,use-dma-rx; atmel,use-dma-tx; @@ -740,7 +740,7 @@ i2c1: i2c@600 { clocks = <&pmc PMC_TYPE_PERIPHERAL 39>; atmel,fifo-size = <32>; dmas = <&dma0 AT91_XDMAC_DT_PERID(8)>, - <&dma0 AT91_XDMAC_DT_PERID(7)>; + <&dma0 AT91_XDMAC_DT_PERID(7)>; dma-names = "tx", "rx"; status = "disabled"; }; @@ -763,7 +763,7 @@ uart3: serial@200 { clocks = <&pmc PMC_TYPE_PERIPHERAL 41>; clock-names = "usart"; dmas = <&dma1 AT91_XDMAC_DT_PERID(12)>, - <&dma1 AT91_XDMAC_DT_PERID(11)>; + <&dma1 AT91_XDMAC_DT_PERID(11)>; dma-names = "tx", "rx"; atmel,use-dma-rx; atmel,use-dma-tx; @@ -807,7 +807,7 @@ uart4: serial@200 { clocks = <&pmc PMC_TYPE_PERIPHERAL 42>; clock-names = "usart"; dmas = <&dma1 AT91_XDMAC_DT_PERID(14)>, - <&dma1 AT91_XDMAC_DT_PERID(13)>; + <&dma1 AT91_XDMAC_DT_PERID(13)>; dma-names = "tx", "rx"; atmel,use-dma-rx; atmel,use-dma-tx; @@ -833,7 +833,7 @@ uart7: serial@200 { clocks = <&pmc PMC_TYPE_PERIPHERAL 45>; clock-names = "usart"; dmas = <&dma1 AT91_XDMAC_DT_PERID(20)>, - <&dma1 AT91_XDMAC_DT_PERID(19)>; + <&dma1 AT91_XDMAC_DT_PERID(19)>; dma-names = "tx", "rx"; atmel,use-dma-rx; atmel,use-dma-tx; @@ -928,7 +928,7 @@ i2c8: i2c@600 { clocks = <&pmc PMC_TYPE_PERIPHERAL 46>; atmel,fifo-size = <32>; dmas = <&dma0 AT91_XDMAC_DT_PERID(22)>, - <&dma0 AT91_XDMAC_DT_PERID(21)>; + <&dma0 AT91_XDMAC_DT_PERID(21)>; dma-names = "tx", "rx"; status = "disabled"; }; @@ -952,7 +952,7 @@ i2c9: i2c@600 { clocks = <&pmc PMC_TYPE_PERIPHERAL 47>; atmel,fifo-size = <32>; dmas = <&dma0 AT91_XDMAC_DT_PERID(24)>, - <&dma0 AT91_XDMAC_DT_PERID(23)>; + <&dma0 AT91_XDMAC_DT_PERID(23)>; dma-names = "tx", "rx"; status = "disabled"; }; @@ -977,7 +977,7 @@ spi11: spi@400 { #size-cells = <0>; atmel,fifo-size = <32>; dmas = <&dma0 AT91_XDMAC_DT_PERID(28)>, - <&dma0 AT91_XDMAC_DT_PERID(27)>; + <&dma0 AT91_XDMAC_DT_PERID(27)>; dma-names = "tx", "rx"; status = "disabled"; }; From patchwork Sun Feb 18 15:13:53 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 13561883 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B19D1C48BF6 for ; Sun, 18 Feb 2024 15:14:22 +0000 (UTC) DKIM-Signature: v=1; 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([82.78.167.20]) by smtp.gmail.com with ESMTPSA id bu19-20020a056000079300b0033d3d9447e3sm2150744wrb.83.2024.02.18.07.14.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 18 Feb 2024 07:14:01 -0800 (PST) From: Claudiu Beznea To: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, nicolas.ferre@microchip.com, alexandre.belloni@bootlin.com Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Claudiu Beznea Subject: [PATCH 2/2] ARM: dts: microchip: sam9x60: align dmas to the opening '<' Date: Sun, 18 Feb 2024 17:13:53 +0200 Message-Id: <20240218151353.3612621-3-claudiu.beznea@tuxon.dev> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240218151353.3612621-1-claudiu.beznea@tuxon.dev> References: <20240218151353.3612621-1-claudiu.beznea@tuxon.dev> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240218_071403_537222_A7DE0341 X-CRM114-Status: UNSURE ( 9.55 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Align dmas to the opening '<' to comply with the dts coding style, indentation section, point 3: "For arrays spanning across lines, it is preferred to align the continued entries with opening < from the first line." Signed-off-by: Claudiu Beznea --- arch/arm/boot/dts/microchip/sam9x60.dtsi | 64 ++++++++++++------------ 1 file changed, 32 insertions(+), 32 deletions(-) diff --git a/arch/arm/boot/dts/microchip/sam9x60.dtsi b/arch/arm/boot/dts/microchip/sam9x60.dtsi index 73d570a17269..291540e5d81e 100644 --- a/arch/arm/boot/dts/microchip/sam9x60.dtsi +++ b/arch/arm/boot/dts/microchip/sam9x60.dtsi @@ -179,7 +179,7 @@ uart4: serial@200 { (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(8))>, - <&dma0 + <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(9))>; @@ -202,7 +202,7 @@ spi4: spi@400 { (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(8))>, - <&dma0 + <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(9))>; @@ -220,7 +220,7 @@ i2c4: i2c@600 { (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(8))>, - <&dma0 + <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(9))>; @@ -248,7 +248,7 @@ uart5: serial@200 { (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(10))>, - <&dma0 + <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(11))>; @@ -271,7 +271,7 @@ spi5: spi@400 { (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(10))>, - <&dma0 + <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(11))>; @@ -289,7 +289,7 @@ i2c5: i2c@600 { (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(10))>, - <&dma0 + <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(11))>; @@ -377,7 +377,7 @@ uart11: serial@200 { (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(22))>, - <&dma0 + <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(23))>; @@ -399,7 +399,7 @@ i2c11: i2c@600 { (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(22))>, - <&dma0 + <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(23))>; @@ -426,7 +426,7 @@ uart12: serial@200 { (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(24))>, - <&dma0 + <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(25))>; @@ -448,7 +448,7 @@ i2c12: i2c@600 { (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(24))>, - <&dma0 + <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(25))>; @@ -583,7 +583,7 @@ uart6: serial@200 { (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(12))>, - <&dma0 + <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(13))>; @@ -605,7 +605,7 @@ i2c6: i2c@600 { (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(12))>, - <&dma0 + <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(13))>; @@ -632,7 +632,7 @@ uart7: serial@200 { (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(14))>, - <&dma0 + <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(15))>; @@ -654,7 +654,7 @@ i2c7: i2c@600 { (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(14))>, - <&dma0 + <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(15))>; @@ -681,7 +681,7 @@ uart8: serial@200 { (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(16))>, - <&dma0 + <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(17))>; @@ -703,7 +703,7 @@ i2c8: i2c@600 { (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(16))>, - <&dma0 + <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(17))>; @@ -730,7 +730,7 @@ uart0: serial@200 { (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(0))>, - <&dma0 + <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(1))>; @@ -753,7 +753,7 @@ spi0: spi@400 { (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(0))>, - <&dma0 + <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(1))>; @@ -771,7 +771,7 @@ i2c0: i2c@600 { (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(0))>, - <&dma0 + <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(1))>; @@ -798,7 +798,7 @@ uart1: serial@200 { (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(2))>, - <&dma0 + <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(3))>; @@ -821,7 +821,7 @@ spi1: spi@400 { (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(2))>, - <&dma0 + <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(3))>; @@ -839,7 +839,7 @@ i2c1: i2c@600 { (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(2))>, - <&dma0 + <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(3))>; @@ -866,7 +866,7 @@ uart2: serial@200 { (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(4))>, - <&dma0 + <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(5))>; @@ -889,7 +889,7 @@ spi2: spi@400 { (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(4))>, - <&dma0 + <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(5))>; @@ -907,7 +907,7 @@ i2c2: i2c@600 { (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(4))>, - <&dma0 + <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(5))>; @@ -934,7 +934,7 @@ uart3: serial@200 { (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(6))>, - <&dma0 + <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(7))>; @@ -957,7 +957,7 @@ spi3: spi@400 { (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(6))>, - <&dma0 + <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(7))>; @@ -975,7 +975,7 @@ i2c3: i2c@600 { (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(6))>, - <&dma0 + <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(7))>; @@ -1057,7 +1057,7 @@ uart9: serial@200 { (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(18))>, - <&dma0 + <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(19))>; @@ -1079,7 +1079,7 @@ i2c9: i2c@600 { (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(18))>, - <&dma0 + <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(19))>; @@ -1106,7 +1106,7 @@ uart10: serial@200 { (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(20))>, - <&dma0 + <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(21))>; @@ -1128,7 +1128,7 @@ i2c10: i2c@600 { (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(20))>, - <&dma0 + <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(21))>;