From patchwork Tue Feb 27 19:48:08 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cristian Marussi X-Patchwork-Id: 13574376 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 0C38C136647; Tue, 27 Feb 2024 19:48:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709063339; cv=none; b=nftxRM6isptAONWMu4fT3sx2XAP8gQNV5Di+yGeyKbUTYxjyIpn7XOM1tjfCI25TM+qJtpZRyjKjqJXGEsKmV35EsfBgugckJXpTSPZOYovGkTSb9ePu886bF53Dkw9MJw67xmRUnbXqAxBn6qYoU9IlU/udF3/2i13WX/TErWI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709063339; c=relaxed/simple; bh=weZTEjsjdHoRlUCwUSNUDmI0Zpbk1jjy/G6mdtv6kOU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=f8Yt7LdjtVcDzWHbN6jsc1N4ZbpA9A0IwWoJlTl3hgeTmY0dA490Oamd8vA+3fVEHk/Uilr00Ga+78pwVr+qxaYZ635fGrov27mbVHvSPFIgDXmesLQsuFbWBZf7HE+dqXuGlC0Ysh+ThM4j8TeiAc9w65DCKE91xmTN/uXMRlI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id BA77FFEC; Tue, 27 Feb 2024 11:49:31 -0800 (PST) Received: from pluto.. (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 946D73F762; Tue, 27 Feb 2024 11:48:50 -0800 (PST) From: Cristian Marussi To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: sudeep.holla@arm.com, james.quinlan@broadcom.com, f.fainelli@gmail.com, vincent.guittot@linaro.org, peng.fan@oss.nxp.com, michal.simek@amd.com, quic_sibis@quicinc.com, quic_nkela@quicinc.com, mturquette@baylibre.com, sboyd@kernel.org, souvik.chakravarty@arm.com, Cristian Marussi , linux-clk@vger.kernel.org Subject: [PATCH 1/5] clk: scmi: Allocate CLK operations dynamically Date: Tue, 27 Feb 2024 19:48:08 +0000 Message-ID: <20240227194812.1209532-2-cristian.marussi@arm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240227194812.1209532-1-cristian.marussi@arm.com> References: <20240227194812.1209532-1-cristian.marussi@arm.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 SCMI Clocks descriptors expose an increasing number of properties, thing which, in turn, leads to a varying set of supported CLK operations to be associated with each clock. Providing statically pre-defined CLK operations structs for all the possible combinations of allowed clock features is becoming cumbersome and error-prone. Allocate the per-clock operations descriptors dynamically and populate it with the strictly needed set of operations depending on the advertised clock properties: one descriptor is created for each distinct combination of clock operations, so minimizing the number of clk_ops structures to the strictly minimum needed. CC: Michael Turquette CC: Stephen Boyd CC: linux-clk@vger.kernel.org Signed-off-by: Cristian Marussi --- drivers/clk/clk-scmi.c | 163 ++++++++++++++++++++++++++++------------- 1 file changed, 114 insertions(+), 49 deletions(-) diff --git a/drivers/clk/clk-scmi.c b/drivers/clk/clk-scmi.c index 8cbe24789c24..d5d369b052bd 100644 --- a/drivers/clk/clk-scmi.c +++ b/drivers/clk/clk-scmi.c @@ -2,7 +2,7 @@ /* * System Control and Power Interface (SCMI) Protocol based clock driver * - * Copyright (C) 2018-2022 ARM Ltd. + * Copyright (C) 2018-2024 ARM Ltd. */ #include @@ -16,6 +16,14 @@ #define NOT_ATOMIC false #define ATOMIC true +enum scmi_clk_feats { + SCMI_CLK_ATOMIC_SUPPORTED, + SCMI_CLK_MAX_FEATS +}; + +#define SCMI_MAX_CLK_OPS (1 << SCMI_CLK_MAX_FEATS) + +static const struct clk_ops *clk_ops_db[SCMI_MAX_CLK_OPS]; static const struct scmi_clk_proto_ops *scmi_proto_clk_ops; struct scmi_clk { @@ -158,42 +166,6 @@ static int scmi_clk_atomic_is_enabled(struct clk_hw *hw) return !!enabled; } -/* - * We can provide enable/disable/is_enabled atomic callbacks only if the - * underlying SCMI transport for an SCMI instance is configured to handle - * SCMI commands in an atomic manner. - * - * When no SCMI atomic transport support is available we instead provide only - * the prepare/unprepare API, as allowed by the clock framework when atomic - * calls are not available. - * - * Two distinct sets of clk_ops are provided since we could have multiple SCMI - * instances with different underlying transport quality, so they cannot be - * shared. - */ -static const struct clk_ops scmi_clk_ops = { - .recalc_rate = scmi_clk_recalc_rate, - .round_rate = scmi_clk_round_rate, - .set_rate = scmi_clk_set_rate, - .prepare = scmi_clk_enable, - .unprepare = scmi_clk_disable, - .set_parent = scmi_clk_set_parent, - .get_parent = scmi_clk_get_parent, - .determine_rate = scmi_clk_determine_rate, -}; - -static const struct clk_ops scmi_atomic_clk_ops = { - .recalc_rate = scmi_clk_recalc_rate, - .round_rate = scmi_clk_round_rate, - .set_rate = scmi_clk_set_rate, - .enable = scmi_clk_atomic_enable, - .disable = scmi_clk_atomic_disable, - .is_enabled = scmi_clk_atomic_is_enabled, - .set_parent = scmi_clk_set_parent, - .get_parent = scmi_clk_get_parent, - .determine_rate = scmi_clk_determine_rate, -}; - static int scmi_clk_ops_init(struct device *dev, struct scmi_clk *sclk, const struct clk_ops *scmi_ops) { @@ -230,6 +202,106 @@ static int scmi_clk_ops_init(struct device *dev, struct scmi_clk *sclk, return ret; } +/** + * scmi_clk_ops_alloc() - Alloc and configure clock operations + * @dev: A device reference for devres + * @feats_key: A bitmap representing the desired clk_ops capabilities. + * + * Allocate and configure a proper set of clock operations depending on the + * specifically required SCMI clock features. + * + * Return: A pointer to the allocated and configured clk_ops on Success, + * or NULL on allocation failure. + */ +static const struct clk_ops * +scmi_clk_ops_alloc(struct device *dev, unsigned long feats_key) +{ + struct clk_ops *ops; + + ops = devm_kzalloc(dev, sizeof(*ops), GFP_KERNEL); + if (!ops) + return NULL; + /* + * We can provide enable/disable/is_enabled atomic callbacks only if the + * underlying SCMI transport for an SCMI instance is configured to + * handle SCMI commands in an atomic manner. + * + * When no SCMI atomic transport support is available we instead provide + * only the prepare/unprepare API, as allowed by the clock framework + * when atomic calls are not available. + */ + if (feats_key & BIT(SCMI_CLK_ATOMIC_SUPPORTED)) { + ops->enable = scmi_clk_atomic_enable; + ops->disable = scmi_clk_atomic_disable; + ops->is_enabled = scmi_clk_atomic_is_enabled; + } else { + ops->prepare = scmi_clk_enable; + ops->unprepare = scmi_clk_disable; + } + + /* Rate ops */ + ops->recalc_rate = scmi_clk_recalc_rate; + ops->round_rate = scmi_clk_round_rate; + ops->determine_rate = scmi_clk_determine_rate; + ops->set_rate = scmi_clk_set_rate; + + /* Parent ops */ + ops->get_parent = scmi_clk_get_parent; + ops->set_parent = scmi_clk_set_parent; + + return ops; +} + +/** + * scmi_clk_ops_select() - Select a proper set of clock operations + * @sclk: A reference to an SCMI clock descriptor + * @atomic_capable: A flag to indicate if atomic mode is supported by the + * transport + * @atomic_threshold: Platform atomic threshold value + * + * After having built a bitmap descriptor to represent the set of features + * needed by this SCMI clock, at first use it to lookup into the set of + * previously allocated clk_ops to check if a suitable combination of clock + * operations was already created; when no match is found allocate a brand new + * set of clk_ops satisfying the required combination of features and save it + * for future references. + * + * In this way only one set of clk_ops is ever created for each different + * combination that is effectively needed. + * + * Return: A pointer to the allocated and configured clk_ops on Success, or + * NULL otherwise. + */ +static const struct clk_ops * +scmi_clk_ops_select(struct scmi_clk *sclk, bool atomic_capable, + unsigned int atomic_threshold) +{ + const struct scmi_clock_info *ci = sclk->info; + unsigned int feats_key = 0; + const struct clk_ops *ops; + + /* + * Note that when transport is atomic but SCMI protocol did not + * specify (or support) an enable_latency associated with a + * clock, we default to use atomic operations mode. + */ + if (atomic_capable && ci->enable_latency <= atomic_threshold) + feats_key |= BIT(SCMI_CLK_ATOMIC_SUPPORTED); + + /* Lookup previously allocated ops */ + ops = clk_ops_db[feats_key]; + if (!ops) { + ops = scmi_clk_ops_alloc(sclk->dev, feats_key); + if (!ops) + return NULL; + + /* Store new ops combinations */ + clk_ops_db[feats_key] = ops; + } + + return ops; +} + static int scmi_clocks_probe(struct scmi_device *sdev) { int idx, count, err; @@ -285,16 +357,10 @@ static int scmi_clocks_probe(struct scmi_device *sdev) sclk->ph = ph; sclk->dev = dev; - /* - * Note that when transport is atomic but SCMI protocol did not - * specify (or support) an enable_latency associated with a - * clock, we default to use atomic operations mode. - */ - if (is_atomic && - sclk->info->enable_latency <= atomic_threshold) - scmi_ops = &scmi_atomic_clk_ops; - else - scmi_ops = &scmi_clk_ops; + scmi_ops = scmi_clk_ops_select(sclk, is_atomic, + atomic_threshold); + if (!scmi_ops) + return -ENOMEM; /* Initialize clock parent data. */ if (sclk->info->num_parents > 0) { @@ -318,8 +384,7 @@ static int scmi_clocks_probe(struct scmi_device *sdev) } else { dev_dbg(dev, "Registered clock:%s%s\n", sclk->info->name, - scmi_ops == &scmi_atomic_clk_ops ? - " (atomic ops)" : ""); + scmi_ops->enable ? " (atomic ops)" : ""); hws[idx] = &sclk->hw; } } From patchwork Tue Feb 27 19:48:09 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cristian Marussi X-Patchwork-Id: 13574375 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 828D9524D4; Tue, 27 Feb 2024 19:48:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709063338; cv=none; b=MUCR4YotOr6eaGd0HMVjCRq+tfX/ciA/ghKDCDafk0clgjGXc6Pl0gilLCMU1b+mOqLSMmhG1yQIdI3Mbev/PYjO/r42P0Y4ZHOYiC4dXXfqnnrOboGh9bReQAH5pKIywmkRpvsrsjeBz8VrUk4/HV0ksMqjjUIAtgPsGM5lYjw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709063338; c=relaxed/simple; bh=pPpQHx+/BF9P98i6UnoYDc/z7vaXUWnxRqGSBVYSXtM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=oepRge9IlZH89Co05ZxvhtQXHN0p8fSnvBKERjCzVRy1tg8TQRBvaHZwcyV09CWeK/PXcIcTv2AxuuN/Qjajgb2Fa+OM3tVScVWkd7FMYmfK+FOVoj3A0awB2IoTg1GDPFF/hpEEmP9GchCD32KlZqsKFsYxcTEPjXjnuFSwgXo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 8852A1476; Tue, 27 Feb 2024 11:49:34 -0800 (PST) Received: from pluto.. (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 7AF823F762; Tue, 27 Feb 2024 11:48:53 -0800 (PST) From: Cristian Marussi To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: sudeep.holla@arm.com, james.quinlan@broadcom.com, f.fainelli@gmail.com, vincent.guittot@linaro.org, peng.fan@oss.nxp.com, michal.simek@amd.com, quic_sibis@quicinc.com, quic_nkela@quicinc.com, mturquette@baylibre.com, sboyd@kernel.org, souvik.chakravarty@arm.com, Cristian Marussi , linux-clk@vger.kernel.org Subject: [PATCH 2/5] clk: scmi: Add support for state control restricted clocks Date: Tue, 27 Feb 2024 19:48:09 +0000 Message-ID: <20240227194812.1209532-3-cristian.marussi@arm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240227194812.1209532-1-cristian.marussi@arm.com> References: <20240227194812.1209532-1-cristian.marussi@arm.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Some exposed SCMI Clocks could be marked as non-supporting state changes. Configure a clk_ops descriptor which does not provide the state change callbacks for such clocks when registering with CLK framework. CC: Michael Turquette CC: Stephen Boyd CC: linux-clk@vger.kernel.org Signed-off-by: Cristian Marussi --- drivers/clk/clk-scmi.c | 22 +++++++++++++++------- 1 file changed, 15 insertions(+), 7 deletions(-) diff --git a/drivers/clk/clk-scmi.c b/drivers/clk/clk-scmi.c index d5d369b052bd..fc9603988d91 100644 --- a/drivers/clk/clk-scmi.c +++ b/drivers/clk/clk-scmi.c @@ -18,6 +18,7 @@ enum scmi_clk_feats { SCMI_CLK_ATOMIC_SUPPORTED, + SCMI_CLK_STATE_CTRL_FORBIDDEN, SCMI_CLK_MAX_FEATS }; @@ -230,15 +231,19 @@ scmi_clk_ops_alloc(struct device *dev, unsigned long feats_key) * only the prepare/unprepare API, as allowed by the clock framework * when atomic calls are not available. */ - if (feats_key & BIT(SCMI_CLK_ATOMIC_SUPPORTED)) { - ops->enable = scmi_clk_atomic_enable; - ops->disable = scmi_clk_atomic_disable; - ops->is_enabled = scmi_clk_atomic_is_enabled; - } else { - ops->prepare = scmi_clk_enable; - ops->unprepare = scmi_clk_disable; + if (!(feats_key & BIT(SCMI_CLK_STATE_CTRL_FORBIDDEN))) { + if (feats_key & BIT(SCMI_CLK_ATOMIC_SUPPORTED)) { + ops->enable = scmi_clk_atomic_enable; + ops->disable = scmi_clk_atomic_disable; + } else { + ops->prepare = scmi_clk_enable; + ops->unprepare = scmi_clk_disable; + } } + if (feats_key & BIT(SCMI_CLK_ATOMIC_SUPPORTED)) + ops->is_enabled = scmi_clk_atomic_is_enabled; + /* Rate ops */ ops->recalc_rate = scmi_clk_recalc_rate; ops->round_rate = scmi_clk_round_rate; @@ -288,6 +293,9 @@ scmi_clk_ops_select(struct scmi_clk *sclk, bool atomic_capable, if (atomic_capable && ci->enable_latency <= atomic_threshold) feats_key |= BIT(SCMI_CLK_ATOMIC_SUPPORTED); + if (ci->state_ctrl_forbidden) + feats_key |= BIT(SCMI_CLK_STATE_CTRL_FORBIDDEN); + /* Lookup previously allocated ops */ ops = clk_ops_db[feats_key]; if (!ops) { From patchwork Tue Feb 27 19:48:10 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cristian Marussi X-Patchwork-Id: 13574377 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 7D9EF149DE1; Tue, 27 Feb 2024 19:48:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709063341; cv=none; b=iP7VcJS9REdJSgGW9FF8a+A9mWoTEDPiT2eWe/sagTxurVu8M1pfBvNvVZ2d/GH6WAhhB/1vSEmJgzdk5fEjbtZb/SVoreT4afcoU3QygryYxSZaS8HjmSisdvHcbtKRXRZGuD4R3KGMJGmxVA+9YZ0incStcUh6aTEBTSlB4wY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709063341; c=relaxed/simple; bh=wAQ5DpWIMEk/AKt1aTsBb2sccdq8gkiwLmigUoYGSt8=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=qHqJ3Q+lVG9bIIY6+hQuQifVcNFyvFsWy8CzexVTa6JxpD7ZB0srCl3jMm5sMRpAufN093Rxg59plX0nXkktJmOREOl1IIniAEeo/RLgK94MUXqabCsquSj+kqDztfanj5RfnNH8AiZ6y5IYzuyuhmpg/VPkgoLvQS0mz+pppSE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 6CDC8DA7; Tue, 27 Feb 2024 11:49:37 -0800 (PST) Received: from pluto.. (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 490503F762; Tue, 27 Feb 2024 11:48:56 -0800 (PST) From: Cristian Marussi To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: sudeep.holla@arm.com, james.quinlan@broadcom.com, f.fainelli@gmail.com, vincent.guittot@linaro.org, peng.fan@oss.nxp.com, michal.simek@amd.com, quic_sibis@quicinc.com, quic_nkela@quicinc.com, mturquette@baylibre.com, sboyd@kernel.org, souvik.chakravarty@arm.com, Cristian Marussi , linux-clk@vger.kernel.org Subject: [PATCH 3/5] clk: scmi: Add support for rate change restricted clocks Date: Tue, 27 Feb 2024 19:48:10 +0000 Message-ID: <20240227194812.1209532-4-cristian.marussi@arm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240227194812.1209532-1-cristian.marussi@arm.com> References: <20240227194812.1209532-1-cristian.marussi@arm.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Some exposed SCMI Clocks could be marked as non-supporting rate changes. Configure a clk_ops descriptors which does not provide the rate change callbacks for such clocks when registering with CLK framework. CC: Michael Turquette CC: Stephen Boyd CC: linux-clk@vger.kernel.org Signed-off-by: Cristian Marussi --- drivers/clk/clk-scmi.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/clk/clk-scmi.c b/drivers/clk/clk-scmi.c index fc9603988d91..d20dcc60f9d1 100644 --- a/drivers/clk/clk-scmi.c +++ b/drivers/clk/clk-scmi.c @@ -19,6 +19,7 @@ enum scmi_clk_feats { SCMI_CLK_ATOMIC_SUPPORTED, SCMI_CLK_STATE_CTRL_FORBIDDEN, + SCMI_CLK_RATE_CTRL_FORBIDDEN, SCMI_CLK_MAX_FEATS }; @@ -248,7 +249,8 @@ scmi_clk_ops_alloc(struct device *dev, unsigned long feats_key) ops->recalc_rate = scmi_clk_recalc_rate; ops->round_rate = scmi_clk_round_rate; ops->determine_rate = scmi_clk_determine_rate; - ops->set_rate = scmi_clk_set_rate; + if (!(feats_key & BIT(SCMI_CLK_RATE_CTRL_FORBIDDEN))) + ops->set_rate = scmi_clk_set_rate; /* Parent ops */ ops->get_parent = scmi_clk_get_parent; @@ -296,6 +298,9 @@ scmi_clk_ops_select(struct scmi_clk *sclk, bool atomic_capable, if (ci->state_ctrl_forbidden) feats_key |= BIT(SCMI_CLK_STATE_CTRL_FORBIDDEN); + if (ci->rate_ctrl_forbidden) + feats_key |= BIT(SCMI_CLK_RATE_CTRL_FORBIDDEN); + /* Lookup previously allocated ops */ ops = clk_ops_db[feats_key]; if (!ops) { From patchwork Tue Feb 27 19:48:11 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cristian Marussi X-Patchwork-Id: 13574378 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 257DA14CAD1; Tue, 27 Feb 2024 19:49:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709063343; cv=none; b=UhyY6m1CwdPaRJGV+XDWXNP9sWLYh+xgJpnz1hx7g96Smw+HP+sdNeYnpVWipZT2CMdLhc8DwBIGWAGlmmSLZ+oDTIG1HmACAsYld1U0Ha8UnBtvI9m/5B0oxsvVcy1Z2xVruFa3+8GQ93HUOiIXl9WJfKtTkTai8yhsTlGHj3U= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709063343; c=relaxed/simple; bh=kyoC3QjAGJnw2ltWGrVe82yoB+HRlUgN+egixJlg/3A=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=ndg+KjvDPijxfFcYc4B48ziB14cyyfyGmVWwLug/eOQpMumtDqH7FumP2o6aulEeSmdI9SU41d6yuYVuhLSWw+Mz7aQLKDxPD8GSNOXwsaPQBS1pJM16JEwkMOQNnqElwJMVXbQ0PfFc1AWM3v4H13hX0h3+5K8pwPI2j0t4jGQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 2B87CFEC; Tue, 27 Feb 2024 11:49:40 -0800 (PST) Received: from pluto.. (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 2CE243F762; Tue, 27 Feb 2024 11:48:59 -0800 (PST) From: Cristian Marussi To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: sudeep.holla@arm.com, james.quinlan@broadcom.com, f.fainelli@gmail.com, vincent.guittot@linaro.org, peng.fan@oss.nxp.com, michal.simek@amd.com, quic_sibis@quicinc.com, quic_nkela@quicinc.com, mturquette@baylibre.com, sboyd@kernel.org, souvik.chakravarty@arm.com, Cristian Marussi , linux-clk@vger.kernel.org Subject: [PATCH 4/5] clk: scmi: Add support for re-parenting restricted clocks Date: Tue, 27 Feb 2024 19:48:11 +0000 Message-ID: <20240227194812.1209532-5-cristian.marussi@arm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240227194812.1209532-1-cristian.marussi@arm.com> References: <20240227194812.1209532-1-cristian.marussi@arm.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Some exposed SCMI Clocks could be marked as non-supporting re-parenting changes. Configure a clk_ops descriptor which does not provide the re-parenting callbacks for such clocks when registering with CLK framework. CC: Michael Turquette CC: Stephen Boyd CC: linux-clk@vger.kernel.org Signed-off-by: Cristian Marussi --- drivers/clk/clk-scmi.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/clk/clk-scmi.c b/drivers/clk/clk-scmi.c index d20dcc60f9d1..87e968b6c095 100644 --- a/drivers/clk/clk-scmi.c +++ b/drivers/clk/clk-scmi.c @@ -20,6 +20,7 @@ enum scmi_clk_feats { SCMI_CLK_ATOMIC_SUPPORTED, SCMI_CLK_STATE_CTRL_FORBIDDEN, SCMI_CLK_RATE_CTRL_FORBIDDEN, + SCMI_CLK_PARENT_CTRL_FORBIDDEN, SCMI_CLK_MAX_FEATS }; @@ -254,7 +255,8 @@ scmi_clk_ops_alloc(struct device *dev, unsigned long feats_key) /* Parent ops */ ops->get_parent = scmi_clk_get_parent; - ops->set_parent = scmi_clk_set_parent; + if (!(feats_key & BIT(SCMI_CLK_PARENT_CTRL_FORBIDDEN))) + ops->set_parent = scmi_clk_set_parent; return ops; } @@ -301,6 +303,9 @@ scmi_clk_ops_select(struct scmi_clk *sclk, bool atomic_capable, if (ci->rate_ctrl_forbidden) feats_key |= BIT(SCMI_CLK_RATE_CTRL_FORBIDDEN); + if (ci->parent_ctrl_forbidden) + feats_key |= BIT(SCMI_CLK_PARENT_CTRL_FORBIDDEN); + /* Lookup previously allocated ops */ ops = clk_ops_db[feats_key]; if (!ops) { From patchwork Tue Feb 27 19:48:12 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cristian Marussi X-Patchwork-Id: 13574379 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id E481714DFF4; Tue, 27 Feb 2024 19:49:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709063346; cv=none; b=KqJFQR8R69YR7gjnFiV9Xu86HSz+j6kmW3LpBLswx0n4+r6gE+XAaVxFgaYoz2pPwLXRu779TWcFa0P1XORrPjhVc6wCi2KY4Ss1bTxPTVggHzr5DZspDZINFPem4RZodqVApa0oZeEe66ds/kzBt35Rf7yYlvn40/mR9LSBEcc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709063346; c=relaxed/simple; bh=H4n1v0imyYH87DK6eE+niRDrOat3zcjgMIz1xRaJW0c=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=KbcKlgblp87sxQGDELEm+TeEk6CcV+xeNRApuIiiCWFs8Hpf8sfIbUZHYdftFF43FRdB7jNbwUvhgsNCzUq+OD7q2DzjvwsMTB6Xko5thx9qADTSoXx0qVHa5aYEsugPnBxaeYY+0oAeRVoXWfAgXAL1hjgqT2yF6Ob1Q0DuuuM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 02F52DA7; Tue, 27 Feb 2024 11:49:43 -0800 (PST) Received: from pluto.. (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id E06773F762; Tue, 27 Feb 2024 11:49:01 -0800 (PST) From: Cristian Marussi To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: sudeep.holla@arm.com, james.quinlan@broadcom.com, f.fainelli@gmail.com, vincent.guittot@linaro.org, peng.fan@oss.nxp.com, michal.simek@amd.com, quic_sibis@quicinc.com, quic_nkela@quicinc.com, mturquette@baylibre.com, sboyd@kernel.org, souvik.chakravarty@arm.com, Cristian Marussi , linux-clk@vger.kernel.org Subject: [PATCH 5/5] clk: scmi: Add support for get/set duty_cycle operations Date: Tue, 27 Feb 2024 19:48:12 +0000 Message-ID: <20240227194812.1209532-6-cristian.marussi@arm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240227194812.1209532-1-cristian.marussi@arm.com> References: <20240227194812.1209532-1-cristian.marussi@arm.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Provide the CLK framework callbacks related to get/set clock duty cycle if the related SCMI clock supports OEM extended configurations. CC: Michael Turquette CC: Stephen Boyd CC: linux-clk@vger.kernel.org Signed-off-by: Cristian Marussi --- drivers/clk/clk-scmi.c | 49 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 49 insertions(+) diff --git a/drivers/clk/clk-scmi.c b/drivers/clk/clk-scmi.c index 87e968b6c095..86ef7c553ddd 100644 --- a/drivers/clk/clk-scmi.c +++ b/drivers/clk/clk-scmi.c @@ -21,6 +21,7 @@ enum scmi_clk_feats { SCMI_CLK_STATE_CTRL_FORBIDDEN, SCMI_CLK_RATE_CTRL_FORBIDDEN, SCMI_CLK_PARENT_CTRL_FORBIDDEN, + SCMI_CLK_DUTY_CYCLE_SUPPORTED, SCMI_CLK_MAX_FEATS }; @@ -169,6 +170,45 @@ static int scmi_clk_atomic_is_enabled(struct clk_hw *hw) return !!enabled; } +static int scmi_clk_get_duty_cycle(struct clk_hw *hw, struct clk_duty *duty) +{ + int ret; + u32 val; + struct scmi_clk *clk = to_scmi_clk(hw); + + ret = scmi_proto_clk_ops->config_oem_get(clk->ph, clk->id, + SCMI_CLOCK_CFG_DUTY_CYCLE, + &val, NULL, false); + if (!ret) { + duty->num = val; + duty->den = 100; + } else { + dev_warn(clk->dev, + "Failed to get duty cycle for clock ID %d\n", clk->id); + } + + return ret; +} + +static int scmi_clk_set_duty_cycle(struct clk_hw *hw, struct clk_duty *duty) +{ + int ret; + u32 val; + struct scmi_clk *clk = to_scmi_clk(hw); + + /* SCMI OEM Duty Cycle is expressed as a percentage */ + val = (duty->num * 100) / duty->den; + ret = scmi_proto_clk_ops->config_oem_set(clk->ph, clk->id, + SCMI_CLOCK_CFG_DUTY_CYCLE, + val, false); + if (ret) + dev_warn(clk->dev, + "Failed to set duty cycle(%u/%u) for clock ID %d\n", + duty->num, duty->den, clk->id); + + return ret; +} + static int scmi_clk_ops_init(struct device *dev, struct scmi_clk *sclk, const struct clk_ops *scmi_ops) { @@ -258,6 +298,12 @@ scmi_clk_ops_alloc(struct device *dev, unsigned long feats_key) if (!(feats_key & BIT(SCMI_CLK_PARENT_CTRL_FORBIDDEN))) ops->set_parent = scmi_clk_set_parent; + /* Duty cycle */ + if (feats_key & BIT(SCMI_CLK_DUTY_CYCLE_SUPPORTED)) { + ops->get_duty_cycle = scmi_clk_get_duty_cycle; + ops->set_duty_cycle = scmi_clk_set_duty_cycle; + } + return ops; } @@ -306,6 +352,9 @@ scmi_clk_ops_select(struct scmi_clk *sclk, bool atomic_capable, if (ci->parent_ctrl_forbidden) feats_key |= BIT(SCMI_CLK_PARENT_CTRL_FORBIDDEN); + if (ci->extended_config) + feats_key |= BIT(SCMI_CLK_DUTY_CYCLE_SUPPORTED); + /* Lookup previously allocated ops */ ops = clk_ops_db[feats_key]; if (!ops) {