From patchwork Wed Feb 28 12:26:14 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alisa-Dariana Roman X-Patchwork-Id: 13575416 Received: from mail-ej1-f51.google.com (mail-ej1-f51.google.com [209.85.218.51]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 153673BBF7; Wed, 28 Feb 2024 12:26:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.218.51 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709123215; cv=none; b=FwWHBcquo0CTjV97ZRXT2ETRnaK2vbDbbHD3OnWfb0Mt7TwKBtghD8s5ybxxyjuGR4B+CmF2GMm4R3e/NVSEhD5xZzOdOVjb14gU3jJk2SO320kMCod7bnJtHq3WhwF6crpUP7QBONdMhen9dEFlA6twxTRmBw1eeW+6h1JJhwQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709123215; c=relaxed/simple; bh=9LRp6pyZzKOPMwdJmb0cgyOrxZ2yUXGdwFoFFeN5y3Q=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=F/n7Ni+okfXpTXiCYoW6EC4S2pRCEsyM/LJ3KTSjaWxHKZs/vuoatbes9UyjLv8pBJxYbyIV2ZGSJp8kjd8MwGfTH0kBCQVSb/XZTn6BOIpD8ifX+dMAbP2+B7ou5ZkuXEhxHMS65FVp/cAymoxeMFVDT2ZplhGhs89zv08vsRs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=iiTq2hI+; arc=none smtp.client-ip=209.85.218.51 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="iiTq2hI+" Received: by mail-ej1-f51.google.com with SMTP id a640c23a62f3a-a4419683a6bso33637866b.1; Wed, 28 Feb 2024 04:26:53 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1709123212; x=1709728012; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=yfu1NXdJaxRIuGk1AGGi0w8J7Vn0Rmrv+AxI/bKxIZU=; b=iiTq2hI+KN3cQ50pZgxmicOeV4QEKNbNFiPWs5jf8/G7n6QxDt1i9u9UHagOh8UxHZ 5sXiB+te0snFQVFECmW1QMFade5kC+uwIHnCQdoHy9Gpvvl6WeCphbcsjTC60j4MXud0 gZY+IOWnYyNreJFTLf69j1vcDpbKj9QKojZ9w4wNzQNI6FksiA+4nmAhHFxCpDN4wXk4 Lv8m0jLqDc7b6Jih1MQy8wvURf7COZ0e4RdpxESjRb8056zK5IWOVUbYvxBDT2mwC02O uop4SbzQ7pj5h4zMJAr/ZT8NyiGO9jehNpZQGZZuSxVU9U1Q0zB8c60E2ic7v8l5Bjnj zRng== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1709123212; x=1709728012; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=yfu1NXdJaxRIuGk1AGGi0w8J7Vn0Rmrv+AxI/bKxIZU=; b=Dvc2pzpcwMqakzwU40eXN7byq0/1q5cOaRBZkFlY6KTmEB8cnoJTTZA0pcX8TfLxda dbgPbu+ZOhnieQ4FMaBIJamWObVCwkFr7R+AoySkObh/YMcFVCSJqigeaE026oHNcoUv 1eyIgpKFA7Chz9a3j0of7qNon/9u56jVS3XCwuljXu4cQaJMAL9f7z3URdjyuaez/2J0 GwtNLhmvd9XMvYLqc2aqY3c2tg+OQpR4bNOouwxJl+0mrF14PjpPIpb5g0ErrCDJ9kZN HZEl8O002HThjCRiJxKP+1OP36GiCRAW8wmgCWADHb4OfecF23V7tB1ktG39PFnMs14c D4Fw== X-Forwarded-Encrypted: i=1; AJvYcCXhjFyMiK5XA6Brt5UAhplj8tZZdg4kvHuZEfJlYqwH0steef6jU2jx5RvexcOu8QgfaIBcx6qlUGl8XI0VWzfcTrEDi6FsXFJZDt0xzZJu7bSmZ3w6fgpAndpWF/Z1lwTj1x1Dpm0al3rDXF3zG2KsQF9mLi0kei/bb45LAgSrOC/sUQ== X-Gm-Message-State: AOJu0YxK2IYdE47oGXuVMadhYZTU4IDfEEWXXLE9O8sdbvWRHIGzPajY xCS+jZMngWR1+i38PKEmU0n2rAd5jGWcWm9w+OEey2SU2tzy0XWX X-Google-Smtp-Source: AGHT+IE1NiJeYEubifaFA/hUzo6Udj5vWz5f5UUWJg5PzMbVijkXKbPCZQlLp/Qh0IFejTdtP4OcSA== X-Received: by 2002:a17:906:c40c:b0:a3f:d2f3:d226 with SMTP id u12-20020a170906c40c00b00a3fd2f3d226mr8362653ejz.17.1709123212058; Wed, 28 Feb 2024 04:26:52 -0800 (PST) Received: from spiri.. ([5.2.194.157]) by smtp.gmail.com with ESMTPSA id f3-20020a170906c08300b00a3d1c0a3d5dsm1800417ejz.63.2024.02.28.04.26.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 28 Feb 2024 04:26:51 -0800 (PST) From: Alisa-Dariana Roman X-Google-Original-From: Alisa-Dariana Roman To: michael.hennerich@analog.com, linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: lars@metafoo.de, Michael.Hennerich@analog.com, jic23@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, andriy.shevchenko@linux.intel.com, nuno.sa@analog.com, alisa.roman@analog.com, dlechner@baylibre.com Subject: [PATCH v4 1/4] iio: adc: ad7192: Pass state directly Date: Wed, 28 Feb 2024 14:26:14 +0200 Message-Id: <20240228122617.185814-2-alisa.roman@analog.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240228122617.185814-1-alisa.roman@analog.com> References: <20240228122617.185814-1-alisa.roman@analog.com> Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Pass only the ad7192_state structure. There is no need to pass the iio_dev structure. Signed-off-by: Alisa-Dariana Roman Signed-off-by: romandariana --- drivers/iio/adc/ad7192.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/iio/adc/ad7192.c b/drivers/iio/adc/ad7192.c index 7bcc7e2aa2a2..72de9cc6716e 100644 --- a/drivers/iio/adc/ad7192.c +++ b/drivers/iio/adc/ad7192.c @@ -387,9 +387,9 @@ static int ad7192_clock_select(struct ad7192_state *st) return clock_sel; } -static int ad7192_setup(struct iio_dev *indio_dev, struct device *dev) +static int ad7192_setup(struct ad7192_state *st) { - struct ad7192_state *st = iio_priv(indio_dev); + struct device *dev = &st->sd.spi->dev; bool rej60_en, refin2_en; bool buf_en, bipolar, burnout_curr_en; unsigned long long scale_uv; @@ -460,7 +460,7 @@ static int ad7192_setup(struct iio_dev *indio_dev, struct device *dev) /* Populate available ADC input ranges */ for (i = 0; i < ARRAY_SIZE(st->scale_avail); i++) { scale_uv = ((u64)st->int_vref_mv * 100000000) - >> (indio_dev->channels[0].scan_type.realbits - + >> (st->chip_info->channels[0].scan_type.realbits - !FIELD_GET(AD7192_CONF_UNIPOLAR, st->conf)); scale_uv >>= i; @@ -1152,7 +1152,7 @@ static int ad7192_probe(struct spi_device *spi) } } - ret = ad7192_setup(indio_dev, &spi->dev); + ret = ad7192_setup(st); if (ret) return ret; From patchwork Wed Feb 28 12:26:15 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alisa-Dariana Roman X-Patchwork-Id: 13575417 Received: from mail-ed1-f54.google.com (mail-ed1-f54.google.com [209.85.208.54]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 707546CDC6; Wed, 28 Feb 2024 12:26:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.54 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709123218; cv=none; b=YzUeZ3ZYOX/2mbhlqo+5UZLcY3ZxkNh9oRms2Xove/zJOteZKB0fd88ytmyhBmb/YpuRwsSj2q0KnmnyxWIGO7W7bQGVZt5Zx4aFu1yiuvP7cQtSEfNNhN2Wahcz59REuu7ysHAL5Y3fllxc9xN5jtdvlkpha2qwi2kNzln1/Vk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709123218; c=relaxed/simple; bh=BBWiHnJ/r7xpKFZE4Kz1164OVbYXkJ/2croGM6AzAsg=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=KJYzeDQJPBUYoW4Gg5TpcU7+ARz6FgfTd1Hm7VvAgWHaN9ig6E6ocZSs55gH3okZD+L0iAm96hISd8Tk3Je79e+U/RxTR7Fxeg+lAhAsUXXl8LDNpZ9t5U0InCUAuOCN5ubr50FNRWOWZMn3RdB5Wrfhcictid7w72zaheujQI0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=dPKAdDyf; arc=none smtp.client-ip=209.85.208.54 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="dPKAdDyf" Received: by mail-ed1-f54.google.com with SMTP id 4fb4d7f45d1cf-5656e5754ccso6728279a12.0; Wed, 28 Feb 2024 04:26:56 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1709123215; x=1709728015; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=g/Xp0WhuiHGrQ1r2Hb53CPJ6S7Yc2qjybrALOzmpRZg=; b=dPKAdDyfruEb4Tc5nSruUz3hUBy09D626NHt8008P1TQBO9rVn/opkNX9kbUNcee4y L81PBZvwMuGgqDuYnAX4vvolJsxw+W7oUGBI5zO10EZqCFnPQxT0yJK65eplnDHIwsXE 5QaI91+4epmftu37mygAwpihWeaTTjBnGptujgvhk+GgOGJWbtRSU1kibUpO2/VJfN8I XEEyUjmFWuHYy01k/tgregB0Z7cfhLD+0lZI2C9E0aLj/2haIYn+hHDI3mXiC4zPatjk I8l23DBVz1Sc98SGqTuAMzPhHIHbhKb1DdvMtx3bRYWgci4fzt0oIJnVTonb8c5m0hhN g+XQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1709123215; x=1709728015; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=g/Xp0WhuiHGrQ1r2Hb53CPJ6S7Yc2qjybrALOzmpRZg=; b=U9fZNp1OnE1JtDsNWud4B2wqtjZ93ELT7pTX9M8Tx+O2CNs+tX7paPAd97pKhKVgDC ZbHkUe7/zjweGylESU1pmYttDA05ND04v+CynZItZARuso/+jVj8wRw0ZNPdVF98XSVU ze+ZQWE6Yd1uBKOTgZ6jA1xxuSasvCUmk6NHbt/HC3iQLoVyWv3dKaxUZ3qXZMCdfa0x MSpqBf0dfvTUWXZ5zyq00wD+k1K/gWNRhVfKgG19olLTX1UBhT59VTSgdM7O3BErfE+4 FDrXyCUDYNg8lyFNt5R//n8T1LXPg6O65kULIA5q+OZSIbeQD+/r2tC02gXoSYI/8VNu xr7A== X-Forwarded-Encrypted: i=1; AJvYcCXo5JHinz0MG2Vvm211DxSs8023PY2qJ/ej6ne0KkEUESMDJAQ39I1ssN0CyKqQvJlPecXMAdW/e7GrkzY/b2fRD5MbnIP5bkLR19WgdbSAYmcpbOdMpLFxVyeHm3eBZE+PbuamKCE7h6sZ0ZFVCkY7yoBEyixq5kwP1zthtr02HR4RNQ== X-Gm-Message-State: AOJu0YwrFTBQkXPyy5Xl1yOzOalL2GokpAGvVkdSGv/4PSq8dGQcJz5D YZ/ava+Le8jrh+2nLf0tFCBEuCGGAyslBKcshkp2w7inBjt1CoY1 X-Google-Smtp-Source: AGHT+IFCDMwvCCnJzvoLdQvqmjtCmFeXcmSPfal9yrIEj5kVJoG4sKvUOCLwj3kof+F9Is21thLELQ== X-Received: by 2002:a17:906:139b:b0:a43:e4b4:b8cc with SMTP id f27-20020a170906139b00b00a43e4b4b8ccmr1993155ejc.38.1709123214430; Wed, 28 Feb 2024 04:26:54 -0800 (PST) Received: from spiri.. ([5.2.194.157]) by smtp.gmail.com with ESMTPSA id f3-20020a170906c08300b00a3d1c0a3d5dsm1800417ejz.63.2024.02.28.04.26.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 28 Feb 2024 04:26:54 -0800 (PST) From: Alisa-Dariana Roman X-Google-Original-From: Alisa-Dariana Roman To: michael.hennerich@analog.com, linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: lars@metafoo.de, Michael.Hennerich@analog.com, jic23@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, andriy.shevchenko@linux.intel.com, nuno.sa@analog.com, alisa.roman@analog.com, dlechner@baylibre.com Subject: [PATCH v4 2/4] iio: adc: ad7192: Use standard attribute Date: Wed, 28 Feb 2024 14:26:15 +0200 Message-Id: <20240228122617.185814-3-alisa.roman@analog.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240228122617.185814-1-alisa.roman@analog.com> References: <20240228122617.185814-1-alisa.roman@analog.com> Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Replace custom attribute filter_low_pass_3db_frequency_available with standard attribute. Store the available values in ad7192_state struct. The function that used to compute those values replaced by ad7192_update_filter_freq_avail(). Function ad7192_show_filter_avail() is no longer needed. Note that the initial available values are hardcoded. Signed-off-by: Alisa-Dariana Roman Signed-off-by: romandariana --- drivers/iio/adc/ad7192.c | 67 ++++++++++++++++++---------------------- 1 file changed, 30 insertions(+), 37 deletions(-) diff --git a/drivers/iio/adc/ad7192.c b/drivers/iio/adc/ad7192.c index 72de9cc6716e..e0f1c9eaf9ae 100644 --- a/drivers/iio/adc/ad7192.c +++ b/drivers/iio/adc/ad7192.c @@ -190,6 +190,7 @@ struct ad7192_state { u32 mode; u32 conf; u32 scale_avail[8][2]; + u32 filter_freq_avail[4][2]; u32 oversampling_ratio_avail[4]; u8 gpocon; u8 clock_sel; @@ -473,6 +474,16 @@ static int ad7192_setup(struct ad7192_state *st) st->oversampling_ratio_avail[2] = 8; st->oversampling_ratio_avail[3] = 16; + st->filter_freq_avail[0][0] = 600; + st->filter_freq_avail[1][0] = 800; + st->filter_freq_avail[2][0] = 2300; + st->filter_freq_avail[3][0] = 2720; + + st->filter_freq_avail[0][1] = 1000; + st->filter_freq_avail[1][1] = 1000; + st->filter_freq_avail[2][1] = 1000; + st->filter_freq_avail[3][1] = 1000; + return 0; } @@ -586,48 +597,24 @@ static int ad7192_get_f_adc(struct ad7192_state *st) f_order * FIELD_GET(AD7192_MODE_RATE_MASK, st->mode)); } -static void ad7192_get_available_filter_freq(struct ad7192_state *st, - int *freq) +static void ad7192_update_filter_freq_avail(struct ad7192_state *st) { unsigned int fadc; /* Formulas for filter at page 25 of the datasheet */ fadc = ad7192_compute_f_adc(st, false, true); - freq[0] = DIV_ROUND_CLOSEST(fadc * 240, 1024); + st->filter_freq_avail[0][0] = DIV_ROUND_CLOSEST(fadc * 240, 1024); fadc = ad7192_compute_f_adc(st, true, true); - freq[1] = DIV_ROUND_CLOSEST(fadc * 240, 1024); + st->filter_freq_avail[1][0] = DIV_ROUND_CLOSEST(fadc * 240, 1024); fadc = ad7192_compute_f_adc(st, false, false); - freq[2] = DIV_ROUND_CLOSEST(fadc * 230, 1024); + st->filter_freq_avail[2][0] = DIV_ROUND_CLOSEST(fadc * 230, 1024); fadc = ad7192_compute_f_adc(st, true, false); - freq[3] = DIV_ROUND_CLOSEST(fadc * 272, 1024); + st->filter_freq_avail[3][0] = DIV_ROUND_CLOSEST(fadc * 272, 1024); } -static ssize_t ad7192_show_filter_avail(struct device *dev, - struct device_attribute *attr, - char *buf) -{ - struct iio_dev *indio_dev = dev_to_iio_dev(dev); - struct ad7192_state *st = iio_priv(indio_dev); - unsigned int freq_avail[4], i; - size_t len = 0; - - ad7192_get_available_filter_freq(st, freq_avail); - - for (i = 0; i < ARRAY_SIZE(freq_avail); i++) - len += sysfs_emit_at(buf, len, "%d.%03d ", freq_avail[i] / 1000, - freq_avail[i] % 1000); - - buf[len - 1] = '\n'; - - return len; -} - -static IIO_DEVICE_ATTR(filter_low_pass_3db_frequency_available, - 0444, ad7192_show_filter_avail, NULL, 0); - static IIO_DEVICE_ATTR(bridge_switch_en, 0644, ad7192_show_bridge_switch, ad7192_set, AD7192_REG_GPOCON); @@ -637,7 +624,6 @@ static IIO_DEVICE_ATTR(ac_excitation_en, 0644, AD7192_REG_CONF); static struct attribute *ad7192_attributes[] = { - &iio_dev_attr_filter_low_pass_3db_frequency_available.dev_attr.attr, &iio_dev_attr_bridge_switch_en.dev_attr.attr, NULL }; @@ -647,7 +633,6 @@ static const struct attribute_group ad7192_attribute_group = { }; static struct attribute *ad7195_attributes[] = { - &iio_dev_attr_filter_low_pass_3db_frequency_available.dev_attr.attr, &iio_dev_attr_bridge_switch_en.dev_attr.attr, &iio_dev_attr_ac_excitation_en.dev_attr.attr, NULL @@ -665,17 +650,15 @@ static unsigned int ad7192_get_temp_scale(bool unipolar) static int ad7192_set_3db_filter_freq(struct ad7192_state *st, int val, int val2) { - int freq_avail[4], i, ret, freq; + int i, ret, freq; unsigned int diff_new, diff_old; int idx = 0; diff_old = U32_MAX; freq = val * 1000 + val2; - ad7192_get_available_filter_freq(st, freq_avail); - - for (i = 0; i < ARRAY_SIZE(freq_avail); i++) { - diff_new = abs(freq - freq_avail[i]); + for (i = 0; i < ARRAY_SIZE(st->filter_freq_avail); i++) { + diff_new = abs(freq - st->filter_freq_avail[i][0]); if (diff_new < diff_old) { diff_old = diff_new; idx = i; @@ -826,6 +809,7 @@ static int ad7192_write_raw(struct iio_dev *indio_dev, st->mode &= ~AD7192_MODE_RATE_MASK; st->mode |= FIELD_PREP(AD7192_MODE_RATE_MASK, div); ad_sd_write_reg(&st->sd, AD7192_REG_MODE, 3, st->mode); + ad7192_update_filter_freq_avail(st); break; case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY: ret = ad7192_set_3db_filter_freq(st, val, val2 / 1000); @@ -846,6 +830,7 @@ static int ad7192_write_raw(struct iio_dev *indio_dev, break; } mutex_unlock(&st->lock); + ad7192_update_filter_freq_avail(st); break; default: ret = -EINVAL; @@ -888,6 +873,12 @@ static int ad7192_read_avail(struct iio_dev *indio_dev, /* Values are stored in a 2D matrix */ *length = ARRAY_SIZE(st->scale_avail) * 2; + return IIO_AVAIL_LIST; + case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY: + *vals = (int *)st->filter_freq_avail; + *type = IIO_VAL_FRACTIONAL; + *length = ARRAY_SIZE(st->filter_freq_avail) * 2; + return IIO_AVAIL_LIST; case IIO_CHAN_INFO_OVERSAMPLING_RATIO: *vals = (int *)st->oversampling_ratio_avail; @@ -956,7 +947,9 @@ static const struct iio_info ad7195_info = { BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY) | \ (_mask_all), \ .info_mask_shared_by_type_available = (_mask_type_av), \ - .info_mask_shared_by_all_available = (_mask_all_av), \ + .info_mask_shared_by_all_available = \ + BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY) | \ + (_mask_all_av), \ .ext_info = (_ext_info), \ .scan_index = (_si), \ .scan_type = { \ From patchwork Wed Feb 28 12:26:16 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alisa-Dariana Roman X-Patchwork-Id: 13575418 Received: from mail-ej1-f50.google.com (mail-ej1-f50.google.com [209.85.218.50]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1F2CF3BBFD; Wed, 28 Feb 2024 12:26:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.218.50 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709123219; cv=none; b=VnLDjGA+ij4KHtlzVLMjchkgOfVpAMx1H5zKC3EGukbJfBQ/G3tpquh/2/YabbnzHbNbiVuOREFR69qHs0GAvAu6YlYdOfXorfN8FoEMmokKuEOGOQhTuQAckq8puRe9ZJpqlNzwejIUYgqSWsm1o9JY0p0MbtOvAwgC0Lkk1IE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709123219; c=relaxed/simple; bh=FND/JS4mKdDTpHs2/1Zg6IwC+sbA0VPhdHTLkhMI1R4=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=BISy1WuADPDxcM7nqIokV2vkRI5j/kLFJWhekv35kfDRgAbTsiUa5yRpk/N3KUQxnUSgybq6sG+SMRMkgOErdH4CTAgSqWKJZqRv3idHJxJYCB9aQXEEld2Ahg4fhluaYXKoJvBUrkWKTmxIDuCj/bYBD7spbCw0ou96hwa4G6k= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=lzdCtDGW; arc=none smtp.client-ip=209.85.218.50 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="lzdCtDGW" Received: by mail-ej1-f50.google.com with SMTP id a640c23a62f3a-a43dba50bb7so148139266b.0; Wed, 28 Feb 2024 04:26:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1709123216; x=1709728016; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ncTqrMpj0Gd+aXnyQBraEqljHukvPzkzJwUIgSZJAWI=; b=lzdCtDGWAD5ovOASUAxoBv7mALujMk+dl3ZSNtN2Nl7wYiIbwPWzNYmdXO4oeceJkp JZhNEF1/hGs/tXeuQoCE/chRbeGI04qHo7xa3dHmaWqAxdsimFcSfYyOzeTWmtwUXpYS /QckwvmTmg0jbB6BnqC8qcpk0JXWJWyfEHZS0036RRl7+qhj+98/30dpua/T1ZTEwBX7 gdwqiviMSQTvvh7J/PwmSzCHI3UJuFxsHzXfob4f+dwJ9vKByPjU4Mdjh84eMsNLnl/c XrzrRzBl6gnEPM3RzCBF9Ue5n9Me08E5od55+lp3mlBbdqpFuYVljVin6yeaxKhM7ZiV qhjg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1709123216; x=1709728016; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ncTqrMpj0Gd+aXnyQBraEqljHukvPzkzJwUIgSZJAWI=; b=OM7N93O/yGZ/IEYc6MxLrJblBmVgf1fGHMi99/p+BbqiHCm12WKI4AprKNVvdkpxGm pG10vq5aE01Fgm3yQwqE85AFazKSTo8qqs/lbgZREpsRsA845RojumGETCXr3nh6eNlu LMz+2PEaHVFFjPLzrp1Q4xU0L5JSXYyYRh0IeZ3cCfPeZnTbOz2iCwe28NoVv+0+GcZq BPkWrnk0KzRrzCHYPiu6aQZ8LzjuGMVQqcMuInUkkPrZRke6PcpxMJ0HKvZAg/2w1/Yd MkDrl3GNk2Gnld1i85jP3TLO3BkDqgh+vzRa/ezWrIFIvkv0e3ruirScUHkzW8HVkP9J gdIg== X-Forwarded-Encrypted: i=1; AJvYcCUgQLo23iCM9FHpicGdjvy0EsGf6GOYYrlXATG2J7V63fa8BkxoubQFoxGM7YCTOAhbAe6x98JazfWEFHg8jLlNKvuUSD7uXh/8GdUqHrtZ3j1l/92GKuXWGQab/t4uW4tYsPCidFT8BnxzmCuVRZ6ym+tE6bmBtgA5fzKFHZzzRgulRw== X-Gm-Message-State: AOJu0YznJfIrprplmNcL3PdmTLX9YiHI8w3+/IEb4vkoQb25hpUqAlJ5 MtuThvBezCgms5dCS6i7WLSJhVa7MA+64PvnqFbWnK+B3Il69pfc X-Google-Smtp-Source: AGHT+IFmXBvuEoBBwLsaX+Yp5xFmu9/i/MA1GpKhpjng4AxQ8wFqADfTwcjIdvAZ06MY8C0EIEm1ew== X-Received: by 2002:a17:906:28db:b0:a3f:816:1e29 with SMTP id p27-20020a17090628db00b00a3f08161e29mr8600151ejd.39.1709123216443; Wed, 28 Feb 2024 04:26:56 -0800 (PST) Received: from spiri.. ([5.2.194.157]) by smtp.gmail.com with ESMTPSA id f3-20020a170906c08300b00a3d1c0a3d5dsm1800417ejz.63.2024.02.28.04.26.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 28 Feb 2024 04:26:56 -0800 (PST) From: Alisa-Dariana Roman X-Google-Original-From: Alisa-Dariana Roman To: michael.hennerich@analog.com, linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: lars@metafoo.de, Michael.Hennerich@analog.com, jic23@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, andriy.shevchenko@linux.intel.com, nuno.sa@analog.com, alisa.roman@analog.com, dlechner@baylibre.com Subject: [PATCH v4 3/4] dt-bindings: iio: adc: ad7192: Add AD7194 support Date: Wed, 28 Feb 2024 14:26:16 +0200 Message-Id: <20240228122617.185814-4-alisa.roman@analog.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240228122617.185814-1-alisa.roman@analog.com> References: <20240228122617.185814-1-alisa.roman@analog.com> Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Unlike the other AD719Xs, AD7194 has configurable differential channels. The default configuration for these channels can be changed from the devicetree. Also add an example for AD7194 devicetree. Signed-off-by: Alisa-Dariana Roman Signed-off-by: romandariana --- .../bindings/iio/adc/adi,ad7192.yaml | 75 +++++++++++++++++++ 1 file changed, 75 insertions(+) diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7192.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7192.yaml index 16def2985ab4..c62862760311 100644 --- a/Documentation/devicetree/bindings/iio/adc/adi,ad7192.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7192.yaml @@ -21,8 +21,15 @@ properties: - adi,ad7190 - adi,ad7192 - adi,ad7193 + - adi,ad7194 - adi,ad7195 + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + reg: maxItems: 1 @@ -96,8 +103,44 @@ required: - spi-cpol - spi-cpha +patternProperties: + "^channel@([0-9]+)$": + type: object + $ref: adc.yaml + unevaluatedProperties: false + + properties: + reg: + description: The channel index. + minimum: 1 + maximum: 16 + + diff-channels: + description: | + Both inputs can be connected to pins AIN1 to AIN16 by choosing the + appropriate value from 1 to 16. The negative input can also be + connected to AINCOM by choosing 0. + items: + minimum: 0 + maximum: 16 + + required: + - reg + - diff-channels + allOf: - $ref: /schemas/spi/spi-peripheral-props.yaml# + - if: + properties: + compatible: + enum: + - adi,ad7190 + - adi,ad7192 + - adi,ad7193 + - adi,ad7195 + then: + patternProperties: + "^channel@([0-9]+)$": false unevaluatedProperties: false @@ -127,3 +170,35 @@ examples: adi,burnout-currents-enable; }; }; + - | + spi { + #address-cells = <1>; + #size-cells = <0>; + + adc@0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "adi,ad7194"; + reg = <0>; + spi-max-frequency = <1000000>; + spi-cpol; + spi-cpha; + clocks = <&ad7192_mclk>; + clock-names = "mclk"; + interrupts = <25 0x2>; + interrupt-parent = <&gpio>; + dvdd-supply = <&dvdd>; + avdd-supply = <&avdd>; + vref-supply = <&vref>; + + channel@1 { + reg = <1>; + diff-channels = <1 6>; + }; + + channel@16 { + reg = <16>; + diff-channels = <16 5>; + }; + }; + }; From patchwork Wed Feb 28 12:26:17 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alisa-Dariana Roman X-Patchwork-Id: 13575419 Received: from mail-ed1-f44.google.com (mail-ed1-f44.google.com [209.85.208.44]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BA94070CBF; Wed, 28 Feb 2024 12:27:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.44 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709123222; cv=none; b=heVOLmW4NC1soxllMRBsNkp8zX5auT+QNBluxnJtG0RG8m3gT3SIFVNHnOOvt9ChUyzNDkn7GO0GLXZfaCf8gwnFQPL9NwdfbpyRVlMhxVLsD7rM0Cl9kSEMtRJECLz+5ViiJstzOBjvihp+K+FXwrAptqDWBo1eHo6FurosOhA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709123222; c=relaxed/simple; bh=4vjVPSbQRueHialpwEubrD6PO9J/x/oRHPgEpMYoY9M=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=DBvG1BmShf7bkyiale1Gy19icIbQZKZU9TO9uZmnqrw9b07Wj8JSwehK0lQ+tblJUUOshYJUD3gSLw/ccFwgpK25PfmbgaHJZsNMyhsZfepycWeJGAy+TOkJQlYEhYQLtQC5aNWHLppDh/ZwbOablkioQqi6PGgQXoteh+3epgQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=TK9obehP; arc=none smtp.client-ip=209.85.208.44 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="TK9obehP" Received: by mail-ed1-f44.google.com with SMTP id 4fb4d7f45d1cf-56648955ac5so1820168a12.3; Wed, 28 Feb 2024 04:27:00 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1709123219; x=1709728019; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=yXEIb8x+lTkSaotXd6kZaJQ7rsEXDwK0LNJdeI+qvBI=; b=TK9obehPh58ajWdezyPaioAntT/Sd2vBLxAPsOE/Gps5FaKcHxi0N9aBID3BUJCbul hgQtDyyNVUgkY3OJSj4sCXs8w+MOIQnrmNJh/kTnNTUOKk3Ono+WnxLg0KHRBVV7w2Wz 1GpiVs/sZcfvQHiZSdiLfcZKk8cNi9DNzRaISU9c6jYlgbE4RCbAWhX3oOdZ1XU67GNH lHPvfc08iH1Fc1bBJWyzjPCUhm9wgWE4ZKO3iRKKA4Ufwy2+QL2eHrW2Rjs9T+pC6j39 jxI9OEnv9wFLQQAa3vVYw9xJ/BLG1dXtz140sA9GMWjm/6Slge0R2QCaph7HvS7bqr1l Oswg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1709123219; x=1709728019; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=yXEIb8x+lTkSaotXd6kZaJQ7rsEXDwK0LNJdeI+qvBI=; b=ah1b2Jmr5SQWyvxJ5iqU974SoN2P9KNJp/Ekb9iMdklcLC2jpeF56k/BGSnZl35mh0 d6Vpd2p6NSGGUB5O+Baru9XFO17jemwk828G57ax7w+5S/CQJaylZeVLFH4QQ1JMdD2A U9E9xOZq8P/cAJKSnxN0rbVFjHsAQadcKB+5lnY43EDpG2oQUsZxgQb3KDRo3xkWdl90 +ik4GrXRHwKRt4iylWVPAnV0H3vICf61j0y14jdhWE3caFxnYXkaY5VTIjBYKrUPLS4z Z6kiMlWn5yyQXUdUci1lACb9TrqBrcUC/2+E2+QKlMo2r44/jU41kR6VknFYnqdr+KL/ d6zQ== X-Forwarded-Encrypted: i=1; AJvYcCWzQWfI39aiXM3R/iMIFq75CN76ZscdoL8HS5EKmmPhSm/fKyCokLlF2SrV2NNSc61KA/syX48qa2t4MtRwKNj9pBVyBB5vUC6+NIL2U1HDj36lCIciGEQG2g+BemDzOzN+nt0y0ysX+Xnl8F0Q/ShQBxJfBm1rM3iK2cqrylgAH3geAQ== X-Gm-Message-State: AOJu0Yw8ctNF28wKZHMxdPX0yFXyPn7sAazaWUliKtpFJySbtPJ0lEKK uZhSXlr5ubuYw4om1+nKdHFw+896LOyHaQ4GoJHbriKvtyPHLuTuKiek1YOkxew= X-Google-Smtp-Source: AGHT+IFGYENJob99u16qaJNdZQw8s6fSzJRnKSY/XsZ02Fx1+SFGSyVUzrgQ5sXGiyT0I+5nj4iqwQ== X-Received: by 2002:a17:906:119a:b0:a43:5dbc:4bfc with SMTP id n26-20020a170906119a00b00a435dbc4bfcmr5673652eja.1.1709123219031; Wed, 28 Feb 2024 04:26:59 -0800 (PST) Received: from spiri.. ([5.2.194.157]) by smtp.gmail.com with ESMTPSA id f3-20020a170906c08300b00a3d1c0a3d5dsm1800417ejz.63.2024.02.28.04.26.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 28 Feb 2024 04:26:58 -0800 (PST) From: Alisa-Dariana Roman X-Google-Original-From: Alisa-Dariana Roman To: michael.hennerich@analog.com, linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: lars@metafoo.de, Michael.Hennerich@analog.com, jic23@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, andriy.shevchenko@linux.intel.com, nuno.sa@analog.com, alisa.roman@analog.com, dlechner@baylibre.com Subject: [PATCH v4 4/4] iio: adc: ad7192: Add AD7194 support Date: Wed, 28 Feb 2024 14:26:17 +0200 Message-Id: <20240228122617.185814-5-alisa.roman@analog.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240228122617.185814-1-alisa.roman@analog.com> References: <20240228122617.185814-1-alisa.roman@analog.com> Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Unlike the other AD719Xs, AD7194 has configurable differential channels. The configuration for the 16 differential channels can be changed in the devicetree. The default configuration includes 16 differential channels corresponding to the voltage difference between each AINx input and AINCOM input. Also modify config AD7192 description for better scaling. Moved ad7192_chip_info struct definition to allow use of callback function parse_channels(). Signed-off-by: Alisa-Dariana Roman Reviewed-by: Nuno Sa Signed-off-by: romandariana --- drivers/iio/adc/Kconfig | 11 ++- drivers/iio/adc/ad7192.c | 143 ++++++++++++++++++++++++++++++++++++--- 2 files changed, 141 insertions(+), 13 deletions(-) diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig index 0d9282fa67f5..6d8202d9f501 100644 --- a/drivers/iio/adc/Kconfig +++ b/drivers/iio/adc/Kconfig @@ -71,12 +71,17 @@ config AD7124 called ad7124. config AD7192 - tristate "Analog Devices AD7190 AD7192 AD7193 AD7195 ADC driver" + tristate "Analog Devices AD7192 and similar ADC driver" depends on SPI select AD_SIGMA_DELTA help - Say yes here to build support for Analog Devices AD7190, - AD7192, AD7193 or AD7195 SPI analog to digital converters (ADC). + Say yes here to build support for Analog Devices SPI analog to digital + converters (ADC): + - AD7190 + - AD7192 + - AD7193 + - AD7194 + - AD7195 If unsure, say N (but it's safe to say "Y"). To compile this driver as a module, choose M here: the diff --git a/drivers/iio/adc/ad7192.c b/drivers/iio/adc/ad7192.c index e0f1c9eaf9ae..f8ba724bc143 100644 --- a/drivers/iio/adc/ad7192.c +++ b/drivers/iio/adc/ad7192.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* - * AD7190 AD7192 AD7193 AD7195 SPI ADC driver + * AD7192 and similar SPI ADC driver * * Copyright 2011-2015 Analog Devices Inc. */ @@ -128,10 +128,39 @@ #define AD7193_CH_AIN8 0x480 /* AIN7 - AINCOM */ #define AD7193_CH_AINCOM 0x600 /* AINCOM - AINCOM */ +#define AD7194_CH_POS(x) (((x) - 1) << 4) +#define AD7194_CH_NEG(x) ((x) - 1) +#define AD7194_CH_DIFF(pos, neg) \ + (((neg) == 0 ? BIT(10) : AD7194_CH_NEG(neg)) | AD7194_CH_POS(pos)) +#define AD7194_CH_AIN1 AD7194_CH_DIFF(1, 0) /* AIN1 - AINCOM */ +#define AD7194_CH_AIN2 AD7194_CH_DIFF(2, 0) /* AIN2 - AINCOM */ +#define AD7194_CH_AIN3 AD7194_CH_DIFF(3, 0) /* AIN3 - AINCOM */ +#define AD7194_CH_AIN4 AD7194_CH_DIFF(4, 0) /* AIN4 - AINCOM */ +#define AD7194_CH_AIN5 AD7194_CH_DIFF(5, 0) /* AIN5 - AINCOM */ +#define AD7194_CH_AIN6 AD7194_CH_DIFF(6, 0) /* AIN6 - AINCOM */ +#define AD7194_CH_AIN7 AD7194_CH_DIFF(7, 0) /* AIN7 - AINCOM */ +#define AD7194_CH_AIN8 AD7194_CH_DIFF(8, 0) /* AIN8 - AINCOM */ +#define AD7194_CH_AIN9 AD7194_CH_DIFF(9, 0) /* AIN9 - AINCOM */ +#define AD7194_CH_AIN10 AD7194_CH_DIFF(10, 0) /* AIN10 - AINCOM */ +#define AD7194_CH_AIN11 AD7194_CH_DIFF(11, 0) /* AIN11 - AINCOM */ +#define AD7194_CH_AIN12 AD7194_CH_DIFF(12, 0) /* AIN12 - AINCOM */ +#define AD7194_CH_AIN13 AD7194_CH_DIFF(13, 0) /* AIN13 - AINCOM */ +#define AD7194_CH_AIN14 AD7194_CH_DIFF(14, 0) /* AIN14 - AINCOM */ +#define AD7194_CH_AIN15 AD7194_CH_DIFF(15, 0) /* AIN15 - AINCOM */ +#define AD7194_CH_AIN16 AD7194_CH_DIFF(16, 0) /* AIN16 - AINCOM */ +#define AD7194_CH_TEMP 0x100 /* Temp sensor */ +#define AD7194_CH_DIFF_START 1 +#define AD7194_CH_DIFF_NR 16 +#define AD7194_CH_AIN0_START 1 +#define AD7194_CH_AIN0_NR 16 +#define AD7194_CH_AIN1_START 0 +#define AD7194_CH_AIN1_NR 17 + /* ID Register Bit Designations (AD7192_REG_ID) */ #define CHIPID_AD7190 0x4 #define CHIPID_AD7192 0x0 #define CHIPID_AD7193 0x2 +#define CHIPID_AD7194 0x3 #define CHIPID_AD7195 0x6 #define AD7192_ID_MASK GENMASK(3, 0) @@ -169,17 +198,10 @@ enum { ID_AD7190, ID_AD7192, ID_AD7193, + ID_AD7194, ID_AD7195, }; -struct ad7192_chip_info { - unsigned int chip_id; - const char *name; - const struct iio_chan_spec *channels; - u8 num_channels; - const struct iio_info *info; -}; - struct ad7192_state { const struct ad7192_chip_info *chip_info; struct regulator *avdd; @@ -200,6 +222,15 @@ struct ad7192_state { struct ad_sigma_delta sd; }; +struct ad7192_chip_info { + unsigned int chip_id; + const char *name; + const struct iio_chan_spec *channels; + u8 num_channels; + const struct iio_info *info; + int (*parse_channels)(struct ad7192_state *st); +}; + static const char * const ad7192_syscalib_modes[] = { [AD7192_SYSCALIB_ZERO_SCALE] = "zero_scale", [AD7192_SYSCALIB_FULL_SCALE] = "full_scale", @@ -921,6 +952,15 @@ static const struct iio_info ad7192_info = { .update_scan_mode = ad7192_update_scan_mode, }; +static const struct iio_info ad7194_info = { + .read_raw = ad7192_read_raw, + .write_raw = ad7192_write_raw, + .write_raw_get_fmt = ad7192_write_raw_get_fmt, + .read_avail = ad7192_read_avail, + .validate_trigger = ad_sd_validate_trigger, + .update_scan_mode = ad7192_update_scan_mode, +}; + static const struct iio_info ad7195_info = { .read_raw = ad7192_read_raw, .write_raw = ad7192_write_raw, @@ -1012,6 +1052,73 @@ static const struct iio_chan_spec ad7193_channels[] = { IIO_CHAN_SOFT_TIMESTAMP(14), }; +static struct iio_chan_spec ad7194_channels[] = { + AD7193_DIFF_CHANNEL(0, 1, 0, AD7194_CH_AIN1), + AD7193_DIFF_CHANNEL(1, 2, 0, AD7194_CH_AIN2), + AD7193_DIFF_CHANNEL(2, 3, 0, AD7194_CH_AIN3), + AD7193_DIFF_CHANNEL(3, 4, 0, AD7194_CH_AIN4), + AD7193_DIFF_CHANNEL(4, 5, 0, AD7194_CH_AIN5), + AD7193_DIFF_CHANNEL(5, 6, 0, AD7194_CH_AIN6), + AD7193_DIFF_CHANNEL(6, 7, 0, AD7194_CH_AIN7), + AD7193_DIFF_CHANNEL(7, 8, 0, AD7194_CH_AIN8), + AD7193_DIFF_CHANNEL(8, 9, 0, AD7194_CH_AIN9), + AD7193_DIFF_CHANNEL(9, 10, 0, AD7194_CH_AIN10), + AD7193_DIFF_CHANNEL(10, 11, 0, AD7194_CH_AIN11), + AD7193_DIFF_CHANNEL(11, 12, 0, AD7194_CH_AIN12), + AD7193_DIFF_CHANNEL(12, 13, 0, AD7194_CH_AIN13), + AD7193_DIFF_CHANNEL(13, 14, 0, AD7194_CH_AIN14), + AD7193_DIFF_CHANNEL(14, 15, 0, AD7194_CH_AIN15), + AD7193_DIFF_CHANNEL(15, 16, 0, AD7194_CH_AIN16), + AD719x_TEMP_CHANNEL(16, AD7194_CH_TEMP), + IIO_CHAN_SOFT_TIMESTAMP(17), +}; + +static int ad7192_parse_channel(struct fwnode_handle *child) +{ + u32 reg, ain[2]; + int ret; + + ret = fwnode_property_read_u32(child, "reg", ®); + if (ret) + return ret; + + if (!in_range(reg, AD7194_CH_DIFF_START, AD7194_CH_DIFF_NR)) + return -EINVAL; + + ret = fwnode_property_read_u32_array(child, "diff-channels", ain, + ARRAY_SIZE(ain)); + if (ret) + return ret; + + if (!in_range(ain[0], AD7194_CH_AIN0_START, AD7194_CH_AIN0_NR) || + !in_range(ain[1], AD7194_CH_AIN1_START, AD7194_CH_AIN1_NR)) + return -EINVAL; + + reg--; + ad7194_channels[reg].channel = ain[0]; + ad7194_channels[reg].channel2 = ain[1]; + ad7194_channels[reg].address = AD7194_CH_DIFF(ain[0], ain[1]); + + return 0; +} + +static int ad7192_parse_channels(struct ad7192_state *st) +{ + struct device *dev = &st->sd.spi->dev; + struct fwnode_handle *child; + int ret; + + device_for_each_child_node(dev, child) { + ret = ad7192_parse_channel(child); + if (ret) { + fwnode_handle_put(child); + return ret; + } + } + + return 0; +} + static const struct ad7192_chip_info ad7192_chip_info_tbl[] = { [ID_AD7190] = { .chip_id = CHIPID_AD7190, @@ -1034,6 +1141,14 @@ static const struct ad7192_chip_info ad7192_chip_info_tbl[] = { .num_channels = ARRAY_SIZE(ad7193_channels), .info = &ad7192_info, }, + [ID_AD7194] = { + .chip_id = CHIPID_AD7194, + .name = "ad7194", + .channels = ad7194_channels, + .num_channels = ARRAY_SIZE(ad7194_channels), + .info = &ad7194_info, + .parse_channels = ad7192_parse_channels, + }, [ID_AD7195] = { .chip_id = CHIPID_AD7195, .name = "ad7195", @@ -1145,6 +1260,12 @@ static int ad7192_probe(struct spi_device *spi) } } + if (st->chip_info->parse_channels) { + ret = st->chip_info->parse_channels(st); + if (ret) + return ret; + } + ret = ad7192_setup(st); if (ret) return ret; @@ -1156,6 +1277,7 @@ static const struct of_device_id ad7192_of_match[] = { { .compatible = "adi,ad7190", .data = &ad7192_chip_info_tbl[ID_AD7190] }, { .compatible = "adi,ad7192", .data = &ad7192_chip_info_tbl[ID_AD7192] }, { .compatible = "adi,ad7193", .data = &ad7192_chip_info_tbl[ID_AD7193] }, + { .compatible = "adi,ad7194", .data = &ad7192_chip_info_tbl[ID_AD7194] }, { .compatible = "adi,ad7195", .data = &ad7192_chip_info_tbl[ID_AD7195] }, {} }; @@ -1165,6 +1287,7 @@ static const struct spi_device_id ad7192_ids[] = { { "ad7190", (kernel_ulong_t)&ad7192_chip_info_tbl[ID_AD7190] }, { "ad7192", (kernel_ulong_t)&ad7192_chip_info_tbl[ID_AD7192] }, { "ad7193", (kernel_ulong_t)&ad7192_chip_info_tbl[ID_AD7193] }, + { "ad7194", (kernel_ulong_t)&ad7192_chip_info_tbl[ID_AD7194] }, { "ad7195", (kernel_ulong_t)&ad7192_chip_info_tbl[ID_AD7195] }, {} }; @@ -1181,6 +1304,6 @@ static struct spi_driver ad7192_driver = { module_spi_driver(ad7192_driver); MODULE_AUTHOR("Michael Hennerich "); -MODULE_DESCRIPTION("Analog Devices AD7190, AD7192, AD7193, AD7195 ADC"); +MODULE_DESCRIPTION("Analog Devices AD7192 and similar ADC"); MODULE_LICENSE("GPL v2"); MODULE_IMPORT_NS(IIO_AD_SIGMA_DELTA);