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[109.60.83.139]) by smtp.googlemail.com with ESMTPSA id ts7-20020a170907c5c700b00a43f4722eaesm926910ejc.103.2024.02.28.09.24.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 28 Feb 2024 09:24:57 -0800 (PST) From: Robert Marko To: andersson@kernel.org, konrad.dybcio@linaro.org, andrew@lunn.ch, hkallweit1@gmail.com, linux@armlinux.org.uk, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, linux-arm-msm@vger.kernel.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Robert Marko Subject: [PATCH net-next v2 1/2] net: phy: qcom: qca808x: add helper for checking for 1G only model Date: Wed, 28 Feb 2024 18:24:09 +0100 Message-ID: <20240228172452.2456842-2-robimarko@gmail.com> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20240228172452.2456842-1-robimarko@gmail.com> References: <20240228172452.2456842-1-robimarko@gmail.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 There are 2 versions of QCA808x, one 2.5G capable and one 1G capable. Currently, this matter only in the .get_features call however, it will be required for filling supported interface modes so lets add a helper that can be reused. Signed-off-by: Robert Marko --- Changes in v2: * Get rid of the if/else by Russels suggestion drivers/net/phy/qcom/qca808x.c | 17 ++++++++++++----- 1 file changed, 12 insertions(+), 5 deletions(-) diff --git a/drivers/net/phy/qcom/qca808x.c b/drivers/net/phy/qcom/qca808x.c index 2acf852fb4de..a4c61a8e07c3 100644 --- a/drivers/net/phy/qcom/qca808x.c +++ b/drivers/net/phy/qcom/qca808x.c @@ -156,6 +156,17 @@ static bool qca808x_has_fast_retrain_or_slave_seed(struct phy_device *phydev) return linkmode_test_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, phydev->supported); } +static bool qca808x_is_1g_only(struct phy_device *phydev) +{ + int ret; + + ret = phy_read_mmd(phydev, MDIO_MMD_AN, QCA808X_PHY_MMD7_CHIP_TYPE); + if (ret < 0) + return true; + + return !!(QCA808X_PHY_CHIP_TYPE_1G & ret); +} + static int qca808x_probe(struct phy_device *phydev) { struct device *dev = &phydev->mdio.dev; @@ -350,11 +361,7 @@ static int qca808x_get_features(struct phy_device *phydev) * existed in the bit0 of MMD1.21, we need to remove it manually if * it is the qca8081 1G chip according to the bit0 of MMD7.0x901d. */ - ret = phy_read_mmd(phydev, MDIO_MMD_AN, QCA808X_PHY_MMD7_CHIP_TYPE); - if (ret < 0) - return ret; - - if (QCA808X_PHY_CHIP_TYPE_1G & ret) + if (qca808x_is_1g_only(phydev)) linkmode_clear_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, phydev->supported); return 0; From patchwork Wed Feb 28 17:24:10 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robert Marko X-Patchwork-Id: 13575786 Received: from mail-ej1-f44.google.com (mail-ej1-f44.google.com [209.85.218.44]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id ED73B15D5B7; Wed, 28 Feb 2024 17:25:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.218.44 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709141103; cv=none; b=cpNaA5XJl2yuFni1jFjKCxEDJQhAur0DBrhIeLR3rS4SSDVa0pkCbqvOhXycRF1khuEbEdN+oP13jPeXc6U5rR9qX1l8cTL98BpJkgjW2JEml+ONYZOlnwMCGw4KeF3qEXfCTGPvEaamTJ0RYC5o8i4Q3FiGQ5SqD0nlw1hAYg4= ARC-Message-Signature: i=1; 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[109.60.83.139]) by smtp.googlemail.com with ESMTPSA id ts7-20020a170907c5c700b00a43f4722eaesm926910ejc.103.2024.02.28.09.24.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 28 Feb 2024 09:24:59 -0800 (PST) From: Robert Marko To: andersson@kernel.org, konrad.dybcio@linaro.org, andrew@lunn.ch, hkallweit1@gmail.com, linux@armlinux.org.uk, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, linux-arm-msm@vger.kernel.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Robert Marko Subject: [PATCH net-next v2 2/2] net: phy: qcom: qca808x: fill in possible_interfaces Date: Wed, 28 Feb 2024 18:24:10 +0100 Message-ID: <20240228172452.2456842-3-robimarko@gmail.com> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20240228172452.2456842-1-robimarko@gmail.com> References: <20240228172452.2456842-1-robimarko@gmail.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Currently QCA808x driver does not fill the possible_interfaces. 2.5G QCA808x support SGMII and 2500Base-X while 1G model only supports SGMII, so fill the possible_interfaces accordingly. Signed-off-by: Robert Marko Reviewed-by: Russell King (Oracle) --- drivers/net/phy/qcom/qca808x.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/net/phy/qcom/qca808x.c b/drivers/net/phy/qcom/qca808x.c index a4c61a8e07c3..5048304ccc9e 100644 --- a/drivers/net/phy/qcom/qca808x.c +++ b/drivers/net/phy/qcom/qca808x.c @@ -167,6 +167,16 @@ static bool qca808x_is_1g_only(struct phy_device *phydev) return !!(QCA808X_PHY_CHIP_TYPE_1G & ret); } +static void qca808x_fill_possible_interfaces(struct phy_device *phydev) +{ + unsigned long *possible = phydev->possible_interfaces; + + __set_bit(PHY_INTERFACE_MODE_SGMII, possible); + + if (!qca808x_is_1g_only(phydev)) + __set_bit(PHY_INTERFACE_MODE_2500BASEX, possible); +} + static int qca808x_probe(struct phy_device *phydev) { struct device *dev = &phydev->mdio.dev; @@ -231,6 +241,8 @@ static int qca808x_config_init(struct phy_device *phydev) } } + qca808x_fill_possible_interfaces(phydev); + /* Configure adc threshold as 100mv for the link 10M */ return at803x_debug_reg_mask(phydev, QCA808X_PHY_DEBUG_ADC_THRESHOLD, QCA808X_ADC_THRESHOLD_MASK,