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Wed, 28 Feb 2024 18:50:16 GMT Received: from [169.254.0.1] (10.49.16.6) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Wed, 28 Feb 2024 10:50:13 -0800 From: Unnathi Chalicheemala Date: Wed, 28 Feb 2024 10:49:59 -0800 Subject: [PATCH 1/3] firmware: qcom-scm: Initialize waitq before setting global __scm Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <20240228-multi_waitq-v1-1-ccb096419af0@quicinc.com> References: <20240228-multi_waitq-v1-0-ccb096419af0@quicinc.com> In-Reply-To: <20240228-multi_waitq-v1-0-ccb096419af0@quicinc.com> To: Bjorn Andersson , Konrad Dybcio , Sibi Sankar CC: , , , Prasad Sodagudi , "Murali Nalajala" , Satya Durga Srinivasu Prabhala , Unnathi Chalicheemala X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=ed25519-sha256; t=1709146213; l=1041; i=quic_uchalich@quicinc.com; s=20240202; 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It calls into SCM and triggers WAITQ sleep but waitq completion structure may not be initialized yet. Fix this by moving initialization of waitq before setting global __scm. Fixes: 6bf325992236 ("firmware: qcom: scm: Add wait-queue handling logic") Signed-off-by: Unnathi Chalicheemala --- drivers/firmware/qcom/qcom_scm.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/firmware/qcom/qcom_scm.c b/drivers/firmware/qcom/qcom_scm.c index 520de9b5633a..c1be8270ead1 100644 --- a/drivers/firmware/qcom/qcom_scm.c +++ b/drivers/firmware/qcom/qcom_scm.c @@ -1854,11 +1854,11 @@ static int qcom_scm_probe(struct platform_device *pdev) if (ret) return ret; + init_completion(&scm->waitq_comp); + __scm = scm; __scm->dev = &pdev->dev; - init_completion(&__scm->waitq_comp); - irq = platform_get_irq_optional(pdev, 0); if (irq < 0) { if (irq != -ENXIO) From patchwork Wed Feb 28 18:50:00 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Unnathi Chalicheemala X-Patchwork-Id: 13575831 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 61DF271EB3; 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Wed, 28 Feb 2024 18:50:18 +0000 (GMT) Received: from nalasex01c.na.qualcomm.com (nalasex01c.na.qualcomm.com [10.47.97.35]) by NALASPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 41SIoG6k008661 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 28 Feb 2024 18:50:16 GMT Received: from [169.254.0.1] (10.49.16.6) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Wed, 28 Feb 2024 10:50:13 -0800 From: Unnathi Chalicheemala Date: Wed, 28 Feb 2024 10:50:00 -0800 Subject: [PATCH 2/3] firmware: qcom-scm: Support multiple waitq contexts Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <20240228-multi_waitq-v1-2-ccb096419af0@quicinc.com> References: <20240228-multi_waitq-v1-0-ccb096419af0@quicinc.com> In-Reply-To: <20240228-multi_waitq-v1-0-ccb096419af0@quicinc.com> To: Bjorn Andersson , Konrad Dybcio , Sibi Sankar CC: , , , Prasad Sodagudi , "Murali Nalajala" , Satya Durga Srinivasu Prabhala , Unnathi Chalicheemala X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; 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SM8650 firmware now supports multiple waitqueue contexts, so add support to dynamically create and support as many unique waitqueue contexts as firmware returns to the driver. Unique waitqueue contexts are supported using xarray to create a hash table for associating a unique wq_ctx with a struct completion variable for easy lookup. The waitqueue ids can be >=0 as now we have more than one waitqueue context. Signed-off-by: Unnathi Chalicheemala --- drivers/firmware/qcom/qcom_scm-smc.c | 7 +++- drivers/firmware/qcom/qcom_scm.c | 77 ++++++++++++++++++++++++++---------- drivers/firmware/qcom/qcom_scm.h | 3 +- 3 files changed, 64 insertions(+), 23 deletions(-) diff --git a/drivers/firmware/qcom/qcom_scm-smc.c b/drivers/firmware/qcom/qcom_scm-smc.c index 16cf88acfa8e..80083e3615b1 100644 --- a/drivers/firmware/qcom/qcom_scm-smc.c +++ b/drivers/firmware/qcom/qcom_scm-smc.c @@ -103,7 +103,12 @@ static int __scm_smc_do_quirk_handle_waitq(struct device *dev, struct arm_smccc_ wq_ctx = res->a1; smc_call_ctx = res->a2; - ret = qcom_scm_wait_for_wq_completion(wq_ctx); + if (!dev) { + /* Protect the dev_get_drvdata() call that follows */ + return -EPROBE_DEFER; + } + + ret = qcom_scm_wait_for_wq_completion(dev_get_drvdata(dev), wq_ctx); if (ret) return ret; diff --git a/drivers/firmware/qcom/qcom_scm.c b/drivers/firmware/qcom/qcom_scm.c index c1be8270ead1..4606c49ef155 100644 --- a/drivers/firmware/qcom/qcom_scm.c +++ b/drivers/firmware/qcom/qcom_scm.c @@ -21,6 +21,7 @@ #include #include #include +#include #include "qcom_scm.h" @@ -33,7 +34,7 @@ struct qcom_scm { struct clk *iface_clk; struct clk *bus_clk; struct icc_path *path; - struct completion waitq_comp; + struct xarray waitq; struct reset_controller_dev reset; /* control access to the interconnect path */ @@ -1742,42 +1743,74 @@ bool qcom_scm_is_available(void) } EXPORT_SYMBOL_GPL(qcom_scm_is_available); -static int qcom_scm_assert_valid_wq_ctx(u32 wq_ctx) +static struct completion *qcom_scm_get_completion(struct qcom_scm *scm, u32 wq_ctx) { - /* FW currently only supports a single wq_ctx (zero). - * TODO: Update this logic to include dynamic allocation and lookup of - * completion structs when FW supports more wq_ctx values. + struct completion *wq; + struct completion *old; + int err; + + wq = xa_load(&scm->waitq, wq_ctx); + if (wq) { + /* + * Valid struct completion *wq found corresponding to + * given wq_ctx. We're done here. + */ + goto out; + } + + /* + * If a struct completion *wq does not exist for wq_ctx, create it. FW + * only uses a finite number of wq_ctx values, so we will be reaching + * here only a few times right at the beginning of the device's uptime + * and then early-exit from idr_find() above subsequently. */ - if (wq_ctx != 0) { - dev_err(__scm->dev, "Firmware unexpectedly passed non-zero wq_ctx\n"); - return -EINVAL; + wq = kzalloc(sizeof(*wq), GFP_ATOMIC); + if (!wq) { + wq = ERR_PTR(-ENOMEM); + goto out; } - return 0; + init_completion(wq); + + old = xa_store(&scm->waitq, wq_ctx, wq, GFP_ATOMIC); + err = xa_err(old); + if (err) { + kfree(wq); + wq = ERR_PTR(err); + } + +out: + return wq; } -int qcom_scm_wait_for_wq_completion(u32 wq_ctx) +int qcom_scm_wait_for_wq_completion(struct qcom_scm *scm, u32 wq_ctx) { - int ret; + struct completion *wq; - ret = qcom_scm_assert_valid_wq_ctx(wq_ctx); - if (ret) - return ret; + wq = qcom_scm_get_completion(scm, wq_ctx); + if (IS_ERR(wq)) { + pr_err("Unable to wait on invalid waitqueue for wq_ctx %d: %ld\n", + wq_ctx, PTR_ERR(wq)); + return PTR_ERR(wq); + } - wait_for_completion(&__scm->waitq_comp); + wait_for_completion(wq); return 0; } static int qcom_scm_waitq_wakeup(struct qcom_scm *scm, unsigned int wq_ctx) { - int ret; + struct completion *wq; - ret = qcom_scm_assert_valid_wq_ctx(wq_ctx); - if (ret) - return ret; + wq = qcom_scm_get_completion(scm, wq_ctx); + if (IS_ERR(wq)) { + pr_err("Unable to wake up invalid waitqueue for wq_ctx %d: %ld\n", + wq_ctx, PTR_ERR(wq)); + return PTR_ERR(wq); + } - complete(&__scm->waitq_comp); + complete(wq); return 0; } @@ -1854,7 +1887,9 @@ static int qcom_scm_probe(struct platform_device *pdev) if (ret) return ret; - init_completion(&scm->waitq_comp); + platform_set_drvdata(pdev, scm); + + xa_init(&scm->waitq); __scm = scm; __scm->dev = &pdev->dev; diff --git a/drivers/firmware/qcom/qcom_scm.h b/drivers/firmware/qcom/qcom_scm.h index 4532907e8489..d54df5a2b690 100644 --- a/drivers/firmware/qcom/qcom_scm.h +++ b/drivers/firmware/qcom/qcom_scm.h @@ -62,7 +62,8 @@ struct qcom_scm_res { u64 result[MAX_QCOM_SCM_RETS]; }; -int qcom_scm_wait_for_wq_completion(u32 wq_ctx); +struct qcom_scm; +int qcom_scm_wait_for_wq_completion(struct qcom_scm *scm, u32 wq_ctx); int scm_get_wq_ctx(u32 *wq_ctx, u32 *flags, u32 *more_pending); #define SCM_SMC_FNID(s, c) ((((s) & 0xFF) << 8) | ((c) & 0xFF)) From patchwork Wed Feb 28 18:50:01 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Unnathi Chalicheemala X-Patchwork-Id: 13575833 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EC58E71EB3; Wed, 28 Feb 2024 18:50:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709146232; cv=none; b=BV8Q+tOq1aqZPXZYK7WnppS7Xw/KLXZyxzN7VV7QANAp7yaKI6GTlFTYXZB9Xt9Xv9BnIsGnEBjN2dLgGQbq0fv3Bnn0WVMqUG9eezN8yJxpsJrtBhyqlPqyDIzkZeDdcKLBGibirEWcyzHtVkGnl8nSxrNf7YDEtBOh6eiOSP0= ARC-Message-Signature: i=1; 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Signed-off-by: Unnathi Chalicheemala --- drivers/firmware/qcom/qcom_scm.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/firmware/qcom/qcom_scm.c b/drivers/firmware/qcom/qcom_scm.c index 4606c49ef155..2657372f210f 100644 --- a/drivers/firmware/qcom/qcom_scm.c +++ b/drivers/firmware/qcom/qcom_scm.c @@ -113,7 +113,6 @@ static const u8 qcom_scm_cpu_warm_bits[QCOM_SCM_BOOT_MAX_CPUS] = { }; #define QCOM_SMC_WAITQ_FLAG_WAKE_ONE BIT(0) -#define QCOM_SMC_WAITQ_FLAG_WAKE_ALL BIT(1) static const char * const qcom_scm_convention_names[] = { [SMC_CONVENTION_UNKNOWN] = "unknown", @@ -1828,9 +1827,8 @@ static irqreturn_t qcom_scm_irq_handler(int irq, void *data) goto out; } - if (flags != QCOM_SMC_WAITQ_FLAG_WAKE_ONE && - flags != QCOM_SMC_WAITQ_FLAG_WAKE_ALL) { - dev_err(scm->dev, "Invalid flags found for wq_ctx: %u\n", flags); + if (flags != QCOM_SMC_WAITQ_FLAG_WAKE_ONE) { + dev_err(scm->dev, "Invalid flags received for wq_ctx: %u\n", flags); goto out; }