From patchwork Fri Mar 1 14:43:59 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Jason-JH.Lin" X-Patchwork-Id: 13578559 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7DEB2C54E49 for ; Fri, 1 Mar 2024 14:44:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type:MIME-Version: References:In-Reply-To:Message-ID:Date:Subject:CC:To:From:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=iVlDUuKVmuA7JnvVmCn0d4WsSJI5tUjOae/sjyXi08c=; b=ul3hVVXSeWvYWOlFideW8gjnde CRhdFvm9VhQYk4m2u7NKCY1LFniDVFrGath2xLzeddMQhlOm6INLtmw63cZsZERLP0IcpD5jyxVmi D+Ti/xD2HiRRkNveqHftDRj0vUMDg6jxaZOoUqSZPLMaLCW8axJ4DbTw6BpsskkHBrfhUo28LbPOy wpH2Y+Bb3hOzK7fr+bqr/me05YaRyXWO+tL1k579iXdoiqexaAjZJuHXWMlokgUJlYZ4n27Pj7+v5 5k4jNCh+kjtv/RK9n05xa+niev7IXy/xQ/2sS7bf6Vdo4JtHxTT1se4g0No8+fDMN8Q6b4GIxd/Z8 PAjomo/A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rg47e-00000000lG2-0QQG; Fri, 01 Mar 2024 14:44:26 +0000 Received: from mailgw02.mediatek.com ([216.200.240.185]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rg47X-00000000l7p-1ZyK; Fri, 01 Mar 2024 14:44:22 +0000 X-UUID: 287a137ad7da11eeb5c2bb47f3c01139-20240301 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=iVlDUuKVmuA7JnvVmCn0d4WsSJI5tUjOae/sjyXi08c=; b=soIjvjJ66bjrsLIo9EriHpWPsAoonwwvPafWH09/xpPWB0Dy6r6sXmG7vTGsbVtZgogrQtBVwqT7gNZGmBrMkjrj4e96TyWJTCkIWkKUd6B811NrSgWEsd5S7IyVqv5+vm/fQ9zjN2BP14uKKqMiXCswf83NVfshhkgBsGnTaRY=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.37,REQID:541eddda-4366-49ea-9b62-753f1a4fe628,IP:0,U RL:0,TC:0,Content:-5,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION :release,TS:-5 X-CID-META: VersionHash:6f543d0,CLOUDID:3544e88f-e2c0-40b0-a8fe-7c7e47299109,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,RT:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0,LES:1, SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0 X-CID-BVR: 0,NGT X-CID-BAS: 0,NGT,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-UUID: 287a137ad7da11eeb5c2bb47f3c01139-20240301 Received: from mtkmbs13n1.mediatek.inc [(172.21.101.193)] by mailgw02.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1215814251; Fri, 01 Mar 2024 07:44:07 -0700 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by mtkmbs11n1.mediatek.inc (172.21.101.185) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Fri, 1 Mar 2024 22:44:04 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Fri, 1 Mar 2024 22:44:04 +0800 From: Jason-JH.Lin To: Jassi Brar , Chun-Kuang Hu , Matthias Brugger CC: AngeloGioacchino Del Regno , Jason-ch Chen , "Jason-JH . Lin" , Singo Chang , Nancy Lin , Shawn Sung , , , , Subject: [RESEND, PATCH 1/5] soc: mediatek: mtk-cmdq: Add specific purpose register definitions for GCE Date: Fri, 1 Mar 2024 22:43:59 +0800 Message-ID: <20240301144403.2977-2-jason-jh.lin@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20240301144403.2977-1-jason-jh.lin@mediatek.com> References: <20240301144403.2977-1-jason-jh.lin@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240301_064419_584819_6DF5BBD1 X-CRM114-Status: UNSURE ( 8.93 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org Add specific purpose register definitions for GCE, so CMDQ users can use them as a buffer to store data. Signed-off-by: Jason-JH.Lin --- include/linux/soc/mediatek/mtk-cmdq.h | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/include/linux/soc/mediatek/mtk-cmdq.h b/include/linux/soc/mediatek/mtk-cmdq.h index 649955d2cf5c..1dae80185f9f 100644 --- a/include/linux/soc/mediatek/mtk-cmdq.h +++ b/include/linux/soc/mediatek/mtk-cmdq.h @@ -14,6 +14,15 @@ #define CMDQ_ADDR_HIGH(addr) ((u32)(((addr) >> 16) & GENMASK(31, 0))) #define CMDQ_ADDR_LOW(addr) ((u16)(addr) | BIT(1)) +/* + * Every cmdq thread has its own SPRs (Specific Purpose Registers), + * so there are 4 * N (threads) SPRs in GCE that shares the same indexes below. + */ +#define CMDQ_THR_SPR_IDX0 (0) +#define CMDQ_THR_SPR_IDX1 (1) +#define CMDQ_THR_SPR_IDX2 (2) +#define CMDQ_THR_SPR_IDX3 (3) + struct cmdq_pkt; struct cmdq_client_reg { From patchwork Fri Mar 1 14:44:00 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Jason-JH.Lin" X-Patchwork-Id: 13578561 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 21FDDC5478C for ; Fri, 1 Mar 2024 14:44:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type:MIME-Version: References:In-Reply-To:Message-ID:Date:Subject:CC:To:From:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=b2jtfBQ99XTwNQWIlhNqeShiovjYiw2SHuwp+NS8xzo=; b=fuqXRvC3I1uIvCE0U0uBiUjNy1 EOdAnodNXDjJwhihMqUTG7LLeIVlMQdaNaIETwrSZ/lF60h4gcztyTqU4rBO6ygadqPYNb+fgLFG2 o9/fgy5ubHgkvdFdOn9A//cNlhD8TbKqNBKi+aZZCrikmIVE6neRdN6ZXbsg/7OKy24pvNb/FrZYP xlDHI+8mdS0SHrZs2HG2ERZYUSmxnYUR8I9Z2kwyGt0gqS12E8vt2FBY+WARi12YbPY6/nMQSKpIk 8a0FMjj6/dB5VbPU5RhwW44QWFeJTuCzbtL9P1vCbQvpsXiPyniq6pHiX/PkIMJHQoATal7eCuXzm /8VVkBdA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rg47l-00000000lNA-29sC; Fri, 01 Mar 2024 14:44:33 +0000 Received: from mailgw01.mediatek.com ([216.200.240.184]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rg47X-00000000l89-1aNY; Fri, 01 Mar 2024 14:44:23 +0000 X-UUID: 2894f14ad7da11eea40fa5ac21cdad35-20240301 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=b2jtfBQ99XTwNQWIlhNqeShiovjYiw2SHuwp+NS8xzo=; b=rfp3hl9iawLTDiftCT5bJCtp/CPmY6z9TDO+Sk0/Zgih5bvYS2Iacijqfvg/vGFJVr5QdmSf877IZGCxJPlQzcWPFKM2Z0VwJlXybb3C3/BTL++eFZsghgJcNh1eGsic7uQT67kfQxXazTFGeA2G8Nvnwl+lyLAvZ5JROcPCesg=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.37,REQID:c942cd8f-1a0b-4304-8d38-0ebb1ebe1c58,IP:0,U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION: release,TS:0 X-CID-META: VersionHash:6f543d0,CLOUDID:3a44e88f-e2c0-40b0-a8fe-7c7e47299109,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,RT:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0,LES:1, SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0 X-CID-BVR: 0,NGT X-CID-BAS: 0,NGT,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-UUID: 2894f14ad7da11eea40fa5ac21cdad35-20240301 Received: from mtkmbs13n2.mediatek.inc [(172.21.101.108)] by mailgw01.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1255078596; Fri, 01 Mar 2024 07:44:07 -0700 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by mtkmbs11n2.mediatek.inc (172.21.101.187) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Fri, 1 Mar 2024 22:44:05 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Fri, 1 Mar 2024 22:44:04 +0800 From: Jason-JH.Lin To: Jassi Brar , Chun-Kuang Hu , Matthias Brugger CC: AngeloGioacchino Del Regno , Jason-ch Chen , "Jason-JH . Lin" , Singo Chang , Nancy Lin , Shawn Sung , , , , Subject: [RESEND, PATCH 2/5] soc: mediatek: mtk-cmdq: Add cmdq_pkt_mem_move() function Date: Fri, 1 Mar 2024 22:44:00 +0800 Message-ID: <20240301144403.2977-3-jason-jh.lin@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20240301144403.2977-1-jason-jh.lin@mediatek.com> References: <20240301144403.2977-1-jason-jh.lin@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240301_064419_624815_91ED0F05 X-CRM114-Status: GOOD ( 12.43 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org Add cmdq_pkt_mem_move() function to support CMDQ user making an instruction for moving a value from a source address to a destination address. Signed-off-by: Jason-JH.Lin --- drivers/soc/mediatek/mtk-cmdq-helper.c | 26 ++++++++++++++++++++++++++ include/linux/soc/mediatek/mtk-cmdq.h | 10 ++++++++++ 2 files changed, 36 insertions(+) diff --git a/drivers/soc/mediatek/mtk-cmdq-helper.c b/drivers/soc/mediatek/mtk-cmdq-helper.c index b0cd071c4719..3a1e47ad8a41 100644 --- a/drivers/soc/mediatek/mtk-cmdq-helper.c +++ b/drivers/soc/mediatek/mtk-cmdq-helper.c @@ -299,6 +299,32 @@ int cmdq_pkt_write_s_mask_value(struct cmdq_pkt *pkt, u8 high_addr_reg_idx, } EXPORT_SYMBOL(cmdq_pkt_write_s_mask_value); +s32 cmdq_pkt_mem_move(struct cmdq_pkt *pkt, dma_addr_t src_addr, dma_addr_t dst_addr) +{ + s32 err; + const u16 tmp_reg_idx = CMDQ_THR_SPR_IDX0; + const u16 swap_reg_idx = CMDQ_THR_SPR_IDX1; + + /* read the value of src_addr into swap_reg_idx */ + err = cmdq_pkt_assign(pkt, tmp_reg_idx, CMDQ_ADDR_HIGH(src_addr)); + if (err < 0) + return err; + err = cmdq_pkt_read_s(pkt, tmp_reg_idx, CMDQ_ADDR_LOW(src_addr), swap_reg_idx); + if (err < 0) + return err; + + /* write the value of swap_reg_idx into dst_addr */ + err = cmdq_pkt_assign(pkt, tmp_reg_idx, CMDQ_ADDR_HIGH(dst_addr)); + if (err < 0) + return err; + err = cmdq_pkt_write_s(pkt, tmp_reg_idx, CMDQ_ADDR_LOW(dst_addr), swap_reg_idx); + if (err < 0) + return err; + + return err; +} +EXPORT_SYMBOL(cmdq_pkt_mem_move); + int cmdq_pkt_wfe(struct cmdq_pkt *pkt, u16 event, bool clear) { struct cmdq_instruction inst = { {0} }; diff --git a/include/linux/soc/mediatek/mtk-cmdq.h b/include/linux/soc/mediatek/mtk-cmdq.h index 1dae80185f9f..b6dbe2d8f16a 100644 --- a/include/linux/soc/mediatek/mtk-cmdq.h +++ b/include/linux/soc/mediatek/mtk-cmdq.h @@ -182,6 +182,16 @@ int cmdq_pkt_write_s_value(struct cmdq_pkt *pkt, u8 high_addr_reg_idx, int cmdq_pkt_write_s_mask_value(struct cmdq_pkt *pkt, u8 high_addr_reg_idx, u16 addr_low, u32 value, u32 mask); +/** + * cmdq_pkt_mem_move() - append memory move command to the CMDQ packet + * @pkt: the CMDQ packet + * @src_addr: source address + * @dma_addr_t: destination address + * + * Return: 0 for success; else the error code is returned + */ +int cmdq_pkt_mem_move(struct cmdq_pkt *pkt, dma_addr_t src_addr, dma_addr_t dst_addr); + /** * cmdq_pkt_wfe() - append wait for event command to the CMDQ packet * @pkt: the CMDQ packet From patchwork Fri Mar 1 14:44:01 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Jason-JH.Lin" X-Patchwork-Id: 13578562 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 20E78C5475B for ; Fri, 1 Mar 2024 14:44:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type:MIME-Version: References:In-Reply-To:Message-ID:Date:Subject:CC:To:From:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; 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Fri, 1 Mar 2024 22:44:05 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Fri, 1 Mar 2024 22:44:05 +0800 From: Jason-JH.Lin To: Jassi Brar , Chun-Kuang Hu , Matthias Brugger CC: AngeloGioacchino Del Regno , Jason-ch Chen , "Jason-JH . Lin" , Singo Chang , Nancy Lin , Shawn Sung , , , , Subject: [RESEND, PATCH 3/5] soc: mediatek: mtk-cmdq: Add cmdq_pkt_poll_addr() function Date: Fri, 1 Mar 2024 22:44:01 +0800 Message-ID: <20240301144403.2977-4-jason-jh.lin@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20240301144403.2977-1-jason-jh.lin@mediatek.com> References: <20240301144403.2977-1-jason-jh.lin@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240301_064419_640670_55FCB8D3 X-CRM114-Status: GOOD ( 17.31 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org Add cmdq_pkt_poll_addr function to support CMDQ user making an instruction for polling a specific address of hardware rigster to check the value with or without mask. POLL is an old operation in GCE, so it does not support SPR and CMDQ_CODE_LOGIC. CMDQ users need to use GPR and CMDQ_CODE_MASK to move polling register address to GPR to make an instruction. This will be done in cmdq_pkt_poll_addr(). Signed-off-by: Jason-JH.Lin --- drivers/soc/mediatek/mtk-cmdq-helper.c | 38 ++++++++++++++++++++++++++ include/linux/soc/mediatek/mtk-cmdq.h | 16 +++++++++++ 2 files changed, 54 insertions(+) diff --git a/drivers/soc/mediatek/mtk-cmdq-helper.c b/drivers/soc/mediatek/mtk-cmdq-helper.c index 3a1e47ad8a41..2e9fc9bb1183 100644 --- a/drivers/soc/mediatek/mtk-cmdq-helper.c +++ b/drivers/soc/mediatek/mtk-cmdq-helper.c @@ -12,6 +12,7 @@ #define CMDQ_WRITE_ENABLE_MASK BIT(0) #define CMDQ_POLL_ENABLE_MASK BIT(0) +#define CMDQ_POLL_HIGH_ADDR_GPR (14) #define CMDQ_EOC_IRQ_EN BIT(0) #define CMDQ_REG_TYPE 1 #define CMDQ_JUMP_RELATIVE 1 @@ -406,6 +407,43 @@ int cmdq_pkt_poll_mask(struct cmdq_pkt *pkt, u8 subsys, } EXPORT_SYMBOL(cmdq_pkt_poll_mask); +int cmdq_pkt_poll_addr(struct cmdq_pkt *pkt, dma_addr_t addr, u32 value, u32 mask) +{ + struct cmdq_instruction inst = { {0} }; + int err; + u8 use_mask = 0; + + if (mask != U32_MAX) { + inst.op = CMDQ_CODE_MASK; + inst.mask = ~mask; + err = cmdq_pkt_append_command(pkt, inst); + if (err != 0) + return err; + use_mask = CMDQ_POLL_ENABLE_MASK; + } + + /* + * POLL is an old operation in GCE and it does not support SPR and CMDQ_CODE_LOGIC, + * so it can not use cmdq_pkt_assign to keep polling register address to SPR. + * It needs to use GPR and CMDQ_CODE_MASK to move polling register address to GPR. + */ + inst.op = CMDQ_CODE_MASK; + inst.dst_t = CMDQ_REG_TYPE; + inst.sop = CMDQ_POLL_HIGH_ADDR_GPR; + inst.mask = addr; + err = cmdq_pkt_append_command(pkt, inst); + if (err < 0) + return err; + + inst.op = CMDQ_CODE_POLL; + inst.dst_t = CMDQ_REG_TYPE; + inst.sop = CMDQ_POLL_HIGH_ADDR_GPR; + inst.offset = use_mask; + inst.value = value; + return cmdq_pkt_append_command(pkt, inst); +} +EXPORT_SYMBOL(cmdq_pkt_poll_addr); + int cmdq_pkt_assign(struct cmdq_pkt *pkt, u16 reg_idx, u32 value) { struct cmdq_instruction inst = {}; diff --git a/include/linux/soc/mediatek/mtk-cmdq.h b/include/linux/soc/mediatek/mtk-cmdq.h index b6dbe2d8f16a..2fe9be240fbc 100644 --- a/include/linux/soc/mediatek/mtk-cmdq.h +++ b/include/linux/soc/mediatek/mtk-cmdq.h @@ -253,6 +253,22 @@ int cmdq_pkt_poll(struct cmdq_pkt *pkt, u8 subsys, int cmdq_pkt_poll_mask(struct cmdq_pkt *pkt, u8 subsys, u16 offset, u32 value, u32 mask); +/** + * cmdq_pkt_poll_addr() - Append polling command to the CMDQ packet, ask GCE to + * execute an instruction that wait for a specified + * address of hardware register to check for the value + * w/ or w/o mask. + * All GCE hardware threads will be blocked by this + * instruction. + * @pkt: the CMDQ packet + * @addr: the hardware register address + * @value: the specified target register value + * @mask: the specified target register mask + * + * Return: 0 for success; else the error code is returned + */ +int cmdq_pkt_poll_addr(struct cmdq_pkt *pkt, dma_addr_t addr, u32 value, u32 mask); + /** * cmdq_pkt_assign() - Append logic assign command to the CMDQ packet, ask GCE * to execute an instruction that set a constant value into From patchwork Fri Mar 1 14:44:02 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Jason-JH.Lin" X-Patchwork-Id: 13578547 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B745EC5475B for ; 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Fri, 01 Mar 2024 07:44:08 -0700 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by mtkmbs11n1.mediatek.inc (172.21.101.185) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Fri, 1 Mar 2024 22:44:05 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Fri, 1 Mar 2024 22:44:05 +0800 From: Jason-JH.Lin To: Jassi Brar , Chun-Kuang Hu , Matthias Brugger CC: AngeloGioacchino Del Regno , Jason-ch Chen , "Jason-JH . Lin" , Singo Chang , Nancy Lin , Shawn Sung , , , , Subject: [RESEND, PATCH 4/5] soc: mediatek: mtk-cmdq: Add cmdq_pkt_acquire_event() function Date: Fri, 1 Mar 2024 22:44:02 +0800 Message-ID: <20240301144403.2977-5-jason-jh.lin@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20240301144403.2977-1-jason-jh.lin@mediatek.com> References: <20240301144403.2977-1-jason-jh.lin@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240301_064419_511641_AA918DEC X-CRM114-Status: GOOD ( 11.83 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org Add cmdq_pkt_acquire_event() function to support CMDQ user making an instruction for acquiring event. CMDQ users can use cmdq_pkt_acquire_event() and cmdq_pkt_clear_event() to acquire GCE event and release GCE event and achieve the MUTEX_LOCK protection between GCE threads. Signed-off-by: Jason-JH.Lin --- drivers/soc/mediatek/mtk-cmdq-helper.c | 15 +++++++++++++++ include/linux/soc/mediatek/mtk-cmdq.h | 9 +++++++++ 2 files changed, 24 insertions(+) diff --git a/drivers/soc/mediatek/mtk-cmdq-helper.c b/drivers/soc/mediatek/mtk-cmdq-helper.c index 2e9fc9bb1183..0183b40a0eff 100644 --- a/drivers/soc/mediatek/mtk-cmdq-helper.c +++ b/drivers/soc/mediatek/mtk-cmdq-helper.c @@ -342,6 +342,21 @@ int cmdq_pkt_wfe(struct cmdq_pkt *pkt, u16 event, bool clear) } EXPORT_SYMBOL(cmdq_pkt_wfe); +int cmdq_pkt_acquire_event(struct cmdq_pkt *pkt, u16 event) +{ + struct cmdq_instruction inst = {}; + + if (event >= CMDQ_MAX_EVENT) + return -EINVAL; + + inst.op = CMDQ_CODE_WFE; + inst.value = CMDQ_WFE_UPDATE | CMDQ_WFE_UPDATE_VALUE | CMDQ_WFE_WAIT; + inst.event = event; + + return cmdq_pkt_append_command(pkt, inst); +} +EXPORT_SYMBOL(cmdq_pkt_acquire_event); + int cmdq_pkt_clear_event(struct cmdq_pkt *pkt, u16 event) { struct cmdq_instruction inst = { {0} }; diff --git a/include/linux/soc/mediatek/mtk-cmdq.h b/include/linux/soc/mediatek/mtk-cmdq.h index 2fe9be240fbc..de93c0a8e8a9 100644 --- a/include/linux/soc/mediatek/mtk-cmdq.h +++ b/include/linux/soc/mediatek/mtk-cmdq.h @@ -202,6 +202,15 @@ int cmdq_pkt_mem_move(struct cmdq_pkt *pkt, dma_addr_t src_addr, dma_addr_t dst_ */ int cmdq_pkt_wfe(struct cmdq_pkt *pkt, u16 event, bool clear); +/** + * cmdq_pkt_acquire_event() - append acquire event command to the CMDQ packet + * @pkt: the CMDQ packet + * @event: the desired event to be acquired + * + * Return: 0 for success; else the error code is returned + */ +int cmdq_pkt_acquire_event(struct cmdq_pkt *pkt, u16 event); + /** * cmdq_pkt_clear_event() - append clear event command to the CMDQ packet * @pkt: the CMDQ packet From patchwork Fri Mar 1 14:44:03 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Jason-JH.Lin" X-Patchwork-Id: 13578560 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E242FC54E55 for ; Fri, 1 Mar 2024 14:44:26 +0000 (UTC) DKIM-Signature: v=1; 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Fri, 01 Mar 2024 07:44:08 -0700 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by mtkmbs11n2.mediatek.inc (172.21.101.187) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Fri, 1 Mar 2024 22:44:05 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Fri, 1 Mar 2024 22:44:05 +0800 From: Jason-JH.Lin To: Jassi Brar , Chun-Kuang Hu , Matthias Brugger CC: AngeloGioacchino Del Regno , Jason-ch Chen , "Jason-JH . Lin" , Singo Chang , Nancy Lin , Shawn Sung , , , , Subject: [RESEND, PATCH 5/5] mailbox: mtk-cmdq: Add support runtime get and set GCE event Date: Fri, 1 Mar 2024 22:44:03 +0800 Message-ID: <20240301144403.2977-6-jason-jh.lin@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20240301144403.2977-1-jason-jh.lin@mediatek.com> References: <20240301144403.2977-1-jason-jh.lin@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240301_064419_608924_92F6CED9 X-CRM114-Status: GOOD ( 13.11 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org ISP drivers need to get and set GCE event in their runtime contorl flow. So add these functions to support get and set GCE by CPU. Signed-off-by: Jason-JH.Lin --- drivers/mailbox/mtk-cmdq-mailbox.c | 37 ++++++++++++++++++++++++ include/linux/mailbox/mtk-cmdq-mailbox.h | 2 ++ 2 files changed, 39 insertions(+) diff --git a/drivers/mailbox/mtk-cmdq-mailbox.c b/drivers/mailbox/mtk-cmdq-mailbox.c index ead2200f39ba..d7c08249c898 100644 --- a/drivers/mailbox/mtk-cmdq-mailbox.c +++ b/drivers/mailbox/mtk-cmdq-mailbox.c @@ -25,7 +25,11 @@ #define CMDQ_GCE_NUM_MAX (2) #define CMDQ_CURR_IRQ_STATUS 0x10 +#define CMDQ_SYNC_TOKEN_ID 0x60 +#define CMDQ_SYNC_TOKEN_VALUE 0x64 +#define CMDQ_TOKEN_ID_MASK GENMASK(9, 0) #define CMDQ_SYNC_TOKEN_UPDATE 0x68 +#define CMDQ_TOKEN_UPDATE_VALUE BIT(16) #define CMDQ_THR_SLOT_CYCLES 0x30 #define CMDQ_THR_BASE 0x100 #define CMDQ_THR_SIZE 0x80 @@ -83,6 +87,7 @@ struct cmdq { struct cmdq_thread *thread; struct clk_bulk_data clocks[CMDQ_GCE_NUM_MAX]; bool suspended; + spinlock_t event_lock; /* lock for gce event */ }; struct gce_plat { @@ -113,6 +118,38 @@ u8 cmdq_get_shift_pa(struct mbox_chan *chan) } EXPORT_SYMBOL(cmdq_get_shift_pa); +void cmdq_set_event(void *chan, u16 event_id) +{ + struct cmdq *cmdq = container_of(((struct mbox_chan *)chan)->mbox, + typeof(*cmdq), mbox); + unsigned long flags; + + spin_lock_irqsave(&cmdq->event_lock, flags); + + writel(CMDQ_TOKEN_UPDATE_VALUE | event_id, cmdq->base + CMDQ_SYNC_TOKEN_UPDATE); + + spin_unlock_irqrestore(&cmdq->event_lock, flags); +} +EXPORT_SYMBOL(cmdq_set_event); + +u32 cmdq_get_event(void *chan, u16 event_id) +{ + struct cmdq *cmdq = container_of(((struct mbox_chan *)chan)->mbox, + typeof(*cmdq), mbox); + unsigned long flags; + u32 value = 0; + + spin_lock_irqsave(&cmdq->event_lock, flags); + + writel(CMDQ_TOKEN_ID_MASK & event_id, cmdq->base + CMDQ_SYNC_TOKEN_ID); + value = readl(cmdq->base + CMDQ_SYNC_TOKEN_VALUE); + + spin_unlock_irqrestore(&cmdq->event_lock, flags); + + return value; +} +EXPORT_SYMBOL(cmdq_get_event); + static int cmdq_thread_suspend(struct cmdq *cmdq, struct cmdq_thread *thread) { u32 status; diff --git a/include/linux/mailbox/mtk-cmdq-mailbox.h b/include/linux/mailbox/mtk-cmdq-mailbox.h index a8f0070c7aa9..f05cabd230da 100644 --- a/include/linux/mailbox/mtk-cmdq-mailbox.h +++ b/include/linux/mailbox/mtk-cmdq-mailbox.h @@ -79,5 +79,7 @@ struct cmdq_pkt { }; u8 cmdq_get_shift_pa(struct mbox_chan *chan); +void cmdq_set_event(void *chan, u16 event_id); +u32 cmdq_get_event(void *chan, u16 event_id); #endif /* __MTK_CMDQ_MAILBOX_H__ */