From patchwork Mon Mar 4 07:29:17 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Oltmanns X-Patchwork-Id: 13580137 Received: from mout-p-202.mailbox.org (mout-p-202.mailbox.org [80.241.56.172]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8E20B13FF1; Mon, 4 Mar 2024 07:30:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=80.241.56.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709537417; cv=none; b=pUs4ooyoOF9t83+6Ux79XKYP8yVX0CTxQUGXuPd3YU43uQcOAuFX5ygottgaucQ9jGGVS15m1c6ECDE7Wj1ci6pMqybfjjQePGgSRagWbiINyd+yaczjfmycZD5iheK0BJUglCnoyYiexpse8G11YtvPz+3LKpteVnnGlQWr8hU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709537417; c=relaxed/simple; bh=IgKKqgNhp4KB//qmzijjif4cj92H3twV7OcBpE9KPnQ=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; 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Mon, 4 Mar 2024 08:30:06 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oltmanns.dev; s=MBO0001; t=1709537406; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=mnGPlwQbxgYzC8CJbOlihTimeXPqyx+4nw1QX4Qc3a4=; b=YeMV72adDA3ovCNfkGgcelTnSDFkmPEFqbbyQEx8XPg9qoNpmoAdcLxRlii7IVxjbPCbYR AaVv5ibjU3FKZf5zo4YCEw5S/W37qluQZpo29E/i4ncIWE3p12RzACQerHb+MzHiyY/dGn 6GV2LZQ0jj/V6TmnYrShwjTcZ4BQ28K10YDdl5G+Etd5U/+1LLLtRLP2nL5y4dlF/9SrzZ Y7PfuwrQCgOGc+a+xNqonkactQB7kcwl9J7zil+D8vzA3AlsXj5xsRw/KxklkTA+3pbF44 XVv3bD1Ru//306dp12fS+qHv2KShsbrm7vW7pVmMu7o4RcX1uc5MklGRUNDlyA== From: Frank Oltmanns Date: Mon, 04 Mar 2024 08:29:17 +0100 Subject: [PATCH v3 1/5] clk: sunxi-ng: common: Support minimum and maximum rate Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240304-pinephone-pll-fixes-v3-1-94ab828f269a@oltmanns.dev> References: <20240304-pinephone-pll-fixes-v3-0-94ab828f269a@oltmanns.dev> In-Reply-To: <20240304-pinephone-pll-fixes-v3-0-94ab828f269a@oltmanns.dev> To: Michael Turquette , Stephen Boyd , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , =?utf-8?q?Guido_G=C3=BCnther?= , Purism Kernel Team , Ondrej Jirman , Neil Armstrong , Jessica Zhang , Sam Ravnborg , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, Frank Oltmanns , stable@vger.kernel.org X-Developer-Signature: v=1; a=openpgp-sha256; l=2460; i=frank@oltmanns.dev; h=from:subject:message-id; bh=IgKKqgNhp4KB//qmzijjif4cj92H3twV7OcBpE9KPnQ=; b=owEB7QES/pANAwAIAZppogiUStPHAcsmYgBl5XhwllXkjTz+CPi39L+nSvOMTVguM6U40A16z a6r/JmMQyiJAbMEAAEIAB0WIQQC/SV7f5DmuaVET5aaaaIIlErTxwUCZeV4cAAKCRCaaaIIlErT x+6VC/wKGTYAgaNwasNsccW5LE4ekOaeCHb2E2E6k6v84qe1/t/Vgg6L2c1n30zckB4Vftb7RuA Bae3m6mB70PtKIgWPaujYgLN85otFzOKe5lYrkiF4EDPaqLlRHLz/NmkzLM7wQLEtlC+Febu8yF QjrW9TlhvxBQvlc71zbzrk97gsxMpnWN47eu4O5pW1BNbCKrWeytELPymhVUhp6VxwDMUywXFqR TRf5Irleb8KdyEKiwQv2VtF59tu0QDjjiiwsnsPzcPsNHzfiLEmiXEb2ToD5gnegCcbxG0/HEjh 3if/2LS8QQ+vJuSIJBLhB4Ey3UnvHNz1syeRFYTwOD/muEUZsqtG+cEqy3zLjoGxkLCFQZ+EX4n /ToemlOq0q9cqL9Fgz5KEwfXuiN8jpjBCLnZVmyU8RTuxWKbOImC+Xskxvcu1ZsD+yLABXTSutv cHjqb0RXfA0eIgTBtkp16EVP/WTk9DmBC3nz8OhtbYK1KaxCsnVEDGV2PFYiPecpn7dm0= X-Developer-Key: i=frank@oltmanns.dev; a=openpgp; fpr=02FD257B7F90E6B9A5444F969A69A208944AD3C7 X-Rspamd-Queue-Id: 4Tp9ML5Yrfz9t2n The Allwinner SoC's typically have an upper and lower limit for their clocks' rates. Up until now, support for that has been implemented separately for each clock type. Implement that functionality in the sunxi-ng's common part making use of the CCF rate liming capabilities, so that it is available for all clock types. Suggested-by: Maxime Ripard Signed-off-by: Frank Oltmanns Cc: stable@vger.kernel.org --- drivers/clk/sunxi-ng/ccu_common.c | 15 +++++++++++++++ drivers/clk/sunxi-ng/ccu_common.h | 3 +++ 2 files changed, 18 insertions(+) diff --git a/drivers/clk/sunxi-ng/ccu_common.c b/drivers/clk/sunxi-ng/ccu_common.c index 8babce55302f..2152063eee16 100644 --- a/drivers/clk/sunxi-ng/ccu_common.c +++ b/drivers/clk/sunxi-ng/ccu_common.c @@ -44,6 +44,12 @@ bool ccu_is_better_rate(struct ccu_common *common, unsigned long current_rate, unsigned long best_rate) { + if (common->max_rate && current_rate > common->max_rate) + return false; + + if (common->min_rate && current_rate < common->min_rate) + return false; + if (common->features & CCU_FEATURE_CLOSEST_RATE) return abs(current_rate - target_rate) < abs(best_rate - target_rate); @@ -122,7 +128,10 @@ static int sunxi_ccu_probe(struct sunxi_ccu *ccu, struct device *dev, for (i = 0; i < desc->hw_clks->num ; i++) { struct clk_hw *hw = desc->hw_clks->hws[i]; + struct ccu_common *common = hw_to_ccu_common(hw); const char *name; + unsigned long min_rate = 0; + unsigned long max_rate = ULONG_MAX; if (!hw) continue; @@ -136,6 +145,12 @@ static int sunxi_ccu_probe(struct sunxi_ccu *ccu, struct device *dev, pr_err("Couldn't register clock %d - %s\n", i, name); goto err_clk_unreg; } + + if (common->min_rate) + min_rate = common->min_rate; + if (common->max_rate) + max_rate = common->max_rate; + clk_hw_set_rate_range(hw, min_rate, max_rate); } ret = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, diff --git a/drivers/clk/sunxi-ng/ccu_common.h b/drivers/clk/sunxi-ng/ccu_common.h index 942a72c09437..329734f8cf42 100644 --- a/drivers/clk/sunxi-ng/ccu_common.h +++ b/drivers/clk/sunxi-ng/ccu_common.h @@ -31,6 +31,9 @@ struct ccu_common { u16 lock_reg; u32 prediv; + unsigned long min_rate; + unsigned long max_rate; + unsigned long features; spinlock_t *lock; struct clk_hw hw; From patchwork Mon Mar 4 07:29:18 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Oltmanns X-Patchwork-Id: 13580138 Received: from mout-p-201.mailbox.org (mout-p-201.mailbox.org [80.241.56.171]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7FE6D14013; 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bh=UgpgzV2Q/GbIWREFNI+aQD05ef1VFT6JlXRe9heDTVQ=; b=l8NQhouHHw02zPiTPi8CTZt2BeXjrl2oCRomvK5kD34eSkkb7kG1pZQzb6XkyYNJfWrQDg 4eBe0rijvramhPIZKQXWJZxYusiy2oGxBjEtRySfBvmXvlrb03fhZtY6h+MQSxM2M9c4RB fo2eGErHtXOpSXtV9NQauTzBIkQPezQrbzQqac43IjSENN9kSbyw5zRSO5+H7uSZ/rvNDN DdLMpSG1q8i8bKprRsfAJHwDvVpBLiUTFK37W+fGR8KjomsoOA1iNbn3lL6fN2ID8LeyP7 toYasuIckywR9/yEi91m/ikvhHwSuaavJ9XjgKKPxzLU9y+CFyw7bm9r0iW3+w== From: Frank Oltmanns Date: Mon, 04 Mar 2024 08:29:18 +0100 Subject: [PATCH v3 2/5] clk: sunxi-ng: a64: Set minimum and maximum rate for PLL-MIPI Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240304-pinephone-pll-fixes-v3-2-94ab828f269a@oltmanns.dev> References: <20240304-pinephone-pll-fixes-v3-0-94ab828f269a@oltmanns.dev> In-Reply-To: <20240304-pinephone-pll-fixes-v3-0-94ab828f269a@oltmanns.dev> To: Michael Turquette , Stephen Boyd , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , =?utf-8?q?Guido_G=C3=BCnther?= , Purism Kernel Team , Ondrej Jirman , Neil Armstrong , Jessica Zhang , Sam Ravnborg , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, Frank Oltmanns , Diego Roversi , stable@vger.kernel.org X-Developer-Signature: v=1; a=openpgp-sha256; l=1471; i=frank@oltmanns.dev; h=from:subject:message-id; bh=kDpws4iby8ib+0jukh7K9mXcEL8OMyePEolpMUL5c7o=; b=owEB7QES/pANAwAIAZppogiUStPHAcsmYgBl5XhwgX3a4/s+n5hG05HBi6whjKEoqn9VxH3hT kU0ltspgoWJAbMEAAEIAB0WIQQC/SV7f5DmuaVET5aaaaIIlErTxwUCZeV4cAAKCRCaaaIIlErT x4QCC/9XbbJOFIoX2zdz6xo2rY0S6JXjrsQNk3zEBcedF7tVA3C9NOEGeThCxeRGBwyEM0G1Jm/ 6b9GqpMRi0NcAEpIiaVMK71o59Z/S0DXxbkPTa9oYkpkq1KzehEcGS0K7dNtE5LfwRYFPUVYjyi gDEGQkO+ncjBo9uXbdpFNHeLg/j0Hah4k8lFJfSoQwK3m4/Dz7nZ3tC1Ul/iDHluuchD/3F0Fu8 q/4Due10vh8EHiDO7K0lZpbE6a2oL4EZXSL/YWlJo3EPufvOQzVNmX0dEsEbf/0Cv3bdDylPsPT m2Rw0gzhMjLvudqz96hBz30qgVA+bmUyx2ENM9ME7jhu0wmgwqww2PCFJwTUtaYyq5v+R5LbxzC 6dMobEI5ahAEJZypeV5yc+kZGa+uok8d6f0qGs7ZVOlWfjeob8vzEgv1GqLkRkA6Fn5W17vOuya 8rKnEmKvmA1XVqI1XacEtkXDFpLjYF1+Ab4b51STuQCNx+POYQWvRTh4dCrS7C9hdLoQU= X-Developer-Key: i=frank@oltmanns.dev; a=openpgp; fpr=02FD257B7F90E6B9A5444F969A69A208944AD3C7 When the Allwinner A64's TCON0 searches the ideal rate for the connected panel, it may happen that it requests a rate from its parent PLL-MIPI which PLL-MIPI does not support. This happens for example on the Olimex TERES-I laptop where TCON0 requests PLL-MIPI to change to a rate of several GHz which causes the panel to stay blank. It also happens on the pinephone where a rate of less than 500 MHz is requested which causes instabilities on some phones. Set the minimum and maximum rate of Allwinner A64's PLL-MIPI according to the Allwinner User Manual. Fixes: ca1170b69968 ("clk: sunxi-ng: a64: force select PLL_MIPI in TCON0 mux") Reported-by: Diego Roversi Closes: https://groups.google.com/g/linux-sunxi/c/Rh-Uqqa66bw Signed-off-by: Frank Oltmanns Tested-by: Diego Roversi Cc: stable@vger.kernel.org Reviewed-by: Maxime Ripard --- drivers/clk/sunxi-ng/ccu-sun50i-a64.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-a64.c b/drivers/clk/sunxi-ng/ccu-sun50i-a64.c index 8951ffc14ff5..6a4b2b9ef30a 100644 --- a/drivers/clk/sunxi-ng/ccu-sun50i-a64.c +++ b/drivers/clk/sunxi-ng/ccu-sun50i-a64.c @@ -182,6 +182,8 @@ static struct ccu_nkm pll_mipi_clk = { &ccu_nkm_ops, CLK_SET_RATE_UNGATE | CLK_SET_RATE_PARENT), .features = CCU_FEATURE_CLOSEST_RATE, + .min_rate = 500000000, + .max_rate = 1400000000, }, }; From patchwork Mon Mar 4 07:29:19 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Oltmanns X-Patchwork-Id: 13580139 Received: from mout-p-201.mailbox.org (mout-p-201.mailbox.org [80.241.56.171]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F22AD171CC; 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bh=ugKhzTVt1AcqmTVj4/zhKrifJsgXqt3bG4BPHQ/PtEk=; b=rfl0fOroTEroDocPQFaoCLIp8MH7SRryewSU2SeoF5LuO+v0uGb2oGTqGN7JU+4LqXvKaM qS8fQapsw+tvDZ+JmF07+E8GVba2zWho71dbSmuQTfgIPxKJpj1N7jImLKRxgDOrJ2G8ah UOPBQ3lpleNEmtQ01Xg25znZbNwkuKOzwSEDOGf6VftJrL5I6s2HVwlps+6dEcQOwL3uCl zOZrZO35uB4xtgU6CjGtq9oeGmP4ZA4UrJmqpzw7j7mS51qbwrlPgvLyLirULK4CvyDPHl Exf2aIQ/OAwyZElxkUegJ1Og8+XiI1loRvnPEzxW+SDA2muexUtZPjN5kfieig== From: Frank Oltmanns Date: Mon, 04 Mar 2024 08:29:19 +0100 Subject: [PATCH v3 3/5] clk: sunxi-ng: nkm: Support constraints on m/n ratio and parent rate Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240304-pinephone-pll-fixes-v3-3-94ab828f269a@oltmanns.dev> References: <20240304-pinephone-pll-fixes-v3-0-94ab828f269a@oltmanns.dev> In-Reply-To: <20240304-pinephone-pll-fixes-v3-0-94ab828f269a@oltmanns.dev> To: Michael Turquette , Stephen Boyd , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , =?utf-8?q?Guido_G=C3=BCnther?= , Purism Kernel Team , Ondrej Jirman , Neil Armstrong , Jessica Zhang , Sam Ravnborg , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, Frank Oltmanns X-Developer-Signature: v=1; a=openpgp-sha256; l=2581; i=frank@oltmanns.dev; h=from:subject:message-id; bh=sz8/RCE/mblTN6+mQB7r6nXbctInrDxt2wSc2tr+a2Q=; b=owEB7QES/pANAwAIAZppogiUStPHAcsmYgBl5XhwI0bCeru/1nlBW/G5cBW5Fv1lAQqsQfso4 Eq7T4NnpsCJAbMEAAEIAB0WIQQC/SV7f5DmuaVET5aaaaIIlErTxwUCZeV4cAAKCRCaaaIIlErT x+2jC/9GmU2LB9KQ8+Ht1upHBN6188WAGWTUcOUKTsaQRR0jAXDy1+eE7AoHXJTJAciU+uI4/B4 p6ie9RlS1UXiIAKWMqgSbZ7XMXnPhdz2ZB0T9mSjNQYi5PMlaHzoSwHeMUrtuYyIZvxobCiGITZ W3Io+7L18WdBOFEq9iIAtQkWWg4yNRRUlxYUxvkkOOlfdxTHmV+7ZYfPC57KRcDoU2WUVcr/whn 5AeLbd5LLQvfvv7RQCuKAkCNwAy3afi4HEXFTTCanfuj36s9TXrY4cHuW/DDAR37YcGFMcWZYId HFF7vz/QzwUvDnZlOAvxDOQR1jfmzLv/9k9Qs9z0S9xItTcDAN2fhRwuDRkz7FwpcUhnpkc9Npq G1m4k9K21huu4tLx9NbIBskqIfbd0GWOo/w6XYbd/ByAC3TWWu7htdthvMQFCsTSjwJ1FMKRj8Z iVuzy1SNN2EUTAFsfMTGnfOetrzOjt+HUZVuSh7HtcRtZKJlRtNLIiazpcoW/HTB/GNsE= X-Developer-Key: i=frank@oltmanns.dev; a=openpgp; fpr=02FD257B7F90E6B9A5444F969A69A208944AD3C7 The Allwinner A64 manual lists the following constraints for the PLL-MIPI clock: - M/N <= 3 - (PLL_VIDEO0)/M >= 24MHz The PLL-MIPI clock is implemented as ccu_nkm. Therefore, add support for these constraints. Reviewed-by: Jernej Skrabec Signed-off-by: Frank Oltmanns --- drivers/clk/sunxi-ng/ccu_nkm.c | 21 +++++++++++++++++++++ drivers/clk/sunxi-ng/ccu_nkm.h | 2 ++ 2 files changed, 23 insertions(+) diff --git a/drivers/clk/sunxi-ng/ccu_nkm.c b/drivers/clk/sunxi-ng/ccu_nkm.c index 853f84398e2b..1168d894d636 100644 --- a/drivers/clk/sunxi-ng/ccu_nkm.c +++ b/drivers/clk/sunxi-ng/ccu_nkm.c @@ -16,6 +16,20 @@ struct _ccu_nkm { unsigned long m, min_m, max_m; }; +static bool ccu_nkm_is_valid_rate(struct ccu_common *common, unsigned long parent, + unsigned long n, unsigned long m) +{ + struct ccu_nkm *nkm = container_of(common, struct ccu_nkm, common); + + if (nkm->max_m_n_ratio && (m > nkm->max_m_n_ratio * n)) + return false; + + if (nkm->min_parent_m_ratio && (parent < nkm->min_parent_m_ratio * m)) + return false; + + return true; +} + static unsigned long ccu_nkm_find_best_with_parent_adj(struct ccu_common *common, struct clk_hw *parent_hw, unsigned long *parent, unsigned long rate, @@ -31,6 +45,10 @@ static unsigned long ccu_nkm_find_best_with_parent_adj(struct ccu_common *common unsigned long tmp_rate, tmp_parent; tmp_parent = clk_hw_round_rate(parent_hw, rate * _m / (_n * _k)); + + if (!ccu_nkm_is_valid_rate(common, tmp_parent, _n, _m)) + continue; + tmp_rate = tmp_parent * _n * _k / _m; if (ccu_is_better_rate(common, rate, tmp_rate, best_rate) || @@ -64,6 +82,9 @@ static unsigned long ccu_nkm_find_best(unsigned long parent, unsigned long rate, for (_k = nkm->min_k; _k <= nkm->max_k; _k++) { for (_n = nkm->min_n; _n <= nkm->max_n; _n++) { for (_m = nkm->min_m; _m <= nkm->max_m; _m++) { + if (!ccu_nkm_is_valid_rate(common, parent, _n, _m)) + continue; + unsigned long tmp_rate; tmp_rate = parent * _n * _k / _m; diff --git a/drivers/clk/sunxi-ng/ccu_nkm.h b/drivers/clk/sunxi-ng/ccu_nkm.h index 6601defb3f38..c409212ee40e 100644 --- a/drivers/clk/sunxi-ng/ccu_nkm.h +++ b/drivers/clk/sunxi-ng/ccu_nkm.h @@ -27,6 +27,8 @@ struct ccu_nkm { struct ccu_mux_internal mux; unsigned int fixed_post_div; + unsigned long max_m_n_ratio; + unsigned long min_parent_m_ratio; struct ccu_common common; }; From patchwork Mon Mar 4 07:29:20 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Oltmanns X-Patchwork-Id: 13580140 Received: from mout-p-201.mailbox.org (mout-p-201.mailbox.org [80.241.56.171]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0015A17998; Mon, 4 Mar 2024 07:30:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=80.241.56.171 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709537427; cv=none; b=Br0PxxK1F3q3MkuaX53d3gYgtGYEMj2epR3Js7gCgM3uHdjLc284sWrOs5sDm5/O8FnkgAwUs1SN+aXkWDP43rc2tO4e07D+uLJdYegpJ0FCDo8+Nu7Ff2ia8ttTJG6zcfzYgUTZLgLKqFrdJh9TUBMkd8HcwO7W+mI30Kt2DsA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709537427; c=relaxed/simple; bh=ZV5lBxre/6M2MuCOOKXnH1cRS8cfBKGM9w8C16rRn4M=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; 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Mon, 4 Mar 2024 08:30:22 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oltmanns.dev; s=MBO0001; t=1709537422; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=mSwEbrk7HLbiVNg/S8Upg2syVPjC3LO4YtPCBym8jns=; b=hnMUE94eFTk7/3meSA3lPUDhcANmAyf2OUzRmyopRvTRkekdefVX8wzpnGkQp1sv9KhyBv IfbW+QDMSmLZ3+GtT9bmG4vV/JFVhhYTeoq9Mh8yIdUAyuByhivftGfdQqgPN4s5S5nUbA DS+vI8hhRGsWZfOzlxJMRvjySh/6xytKadDJO0ys2VPduDKes1pyEC0rP5OgR2X1Dh2ts4 k+ZJN3+DZ5cNgL5pS+Y+MhPiUKLIWKmZV26ne42vy2RRb3RcFqTb+dgzIzKZLaDeDg3OP9 vR9tjS7btxDq9J1M1P0j2ZZQ9cJejnD5SEUkW+c99b9SdaN8TJMPhX3KBkjGxQ== From: Frank Oltmanns Date: Mon, 04 Mar 2024 08:29:20 +0100 Subject: [PATCH v3 4/5] clk: sunxi-ng: a64: Add constraints on PLL-MIPI's n/m ratio and parent rate Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240304-pinephone-pll-fixes-v3-4-94ab828f269a@oltmanns.dev> References: <20240304-pinephone-pll-fixes-v3-0-94ab828f269a@oltmanns.dev> In-Reply-To: <20240304-pinephone-pll-fixes-v3-0-94ab828f269a@oltmanns.dev> To: Michael Turquette , Stephen Boyd , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , =?utf-8?q?Guido_G=C3=BCnther?= , Purism Kernel Team , Ondrej Jirman , Neil Armstrong , Jessica Zhang , Sam Ravnborg , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, Frank Oltmanns X-Developer-Signature: v=1; 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Reviewed-by: Jernej Skrabec Signed-off-by: Frank Oltmanns --- drivers/clk/sunxi-ng/ccu-sun50i-a64.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-a64.c b/drivers/clk/sunxi-ng/ccu-sun50i-a64.c index 6a4b2b9ef30a..07796c79a23e 100644 --- a/drivers/clk/sunxi-ng/ccu-sun50i-a64.c +++ b/drivers/clk/sunxi-ng/ccu-sun50i-a64.c @@ -171,11 +171,13 @@ static struct ccu_nkm pll_mipi_clk = { * user manual, and by experiments the PLL doesn't work without * these bits toggled. */ - .enable = BIT(31) | BIT(23) | BIT(22), - .lock = BIT(28), - .n = _SUNXI_CCU_MULT(8, 4), - .k = _SUNXI_CCU_MULT_MIN(4, 2, 2), - .m = _SUNXI_CCU_DIV(0, 4), + .enable = BIT(31) | BIT(23) | BIT(22), + .lock = BIT(28), + .n = _SUNXI_CCU_MULT(8, 4), + .k = _SUNXI_CCU_MULT_MIN(4, 2, 2), + .m = _SUNXI_CCU_DIV(0, 4), + .max_m_n_ratio = 3, + .min_parent_m_ratio = 24000000, .common = { .reg = 0x040, .hw.init = CLK_HW_INIT("pll-mipi", "pll-video0", From patchwork Mon Mar 4 07:29:21 2024 Content-Type: text/plain; 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Mon, 4 Mar 2024 08:30:28 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oltmanns.dev; s=MBO0001; t=1709537428; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=HPqo6ggfchf8Eo8IzHB61o1N1czixDrkgbYRsxezN8c=; b=WETvWYy8KnRKnpbEBwTCtY8rSUlT4nt1jNvhqkNc7xjfoZzwJPVQHAgNrO8QQCCfC2Ywf4 DFAprV6WH9qCU0kujsvsYd8/nRlBCUw2OwJNmuGm+QqSOENyuQ8amvQ1dhtH6x3Kg1Gl4X I2m5dRMkohZwACsniickAn39G80NZIJp/c9VBFlA5X00F+c4LUK2A1ppjrVeIb8PK7nDmg mfFNbnARLoF0iWW8pvNzbACozuHmMbXE73vyAoZeVoYyg6cf7qFuLkdjJsMPCUdkOul1uW YNzJLqC29oEqXFppvJxiup0jTTbUGYilnYIO7sh0Cn4BHpcOviVrmqqIBkAryw== From: Frank Oltmanns Date: Mon, 04 Mar 2024 08:29:21 +0100 Subject: [PATCH v3 5/5] arm64: dts: allwinner: a64: Run GPU at 432 MHz Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240304-pinephone-pll-fixes-v3-5-94ab828f269a@oltmanns.dev> References: <20240304-pinephone-pll-fixes-v3-0-94ab828f269a@oltmanns.dev> In-Reply-To: <20240304-pinephone-pll-fixes-v3-0-94ab828f269a@oltmanns.dev> To: Michael Turquette , Stephen Boyd , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , =?utf-8?q?Guido_G=C3=BCnther?= , Purism Kernel Team , Ondrej Jirman , Neil Armstrong , Jessica Zhang , Sam Ravnborg , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, Frank Oltmanns X-Developer-Signature: v=1; a=openpgp-sha256; l=1210; i=frank@oltmanns.dev; h=from:subject:message-id; bh=465cP31JRMr94nU0gRhI1fk1wJXGTQoV5XYegVLKIvk=; b=owEB7QES/pANAwAIAZppogiUStPHAcsmYgBl5Xhx9BxlpyXsETgIPW4+KIkZfwF26bL53VDWZ sb0uVOWRt+JAbMEAAEIAB0WIQQC/SV7f5DmuaVET5aaaaIIlErTxwUCZeV4cQAKCRCaaaIIlErT x0iXC/9kAUvpZfp08Fa9Etq3guQAB/WTkntp+YOU5esogHDIPMLVL9s8J3BmVymEMsrwcZGWYf6 /Fg40Ek4gdlb7ubQx+uwcRrSmoQlnM7iALQdSnV0PVDLR9BGdfyegX+5OkVcOVxe0eodfmqylN4 oQ/6hL7exkBjTiHjeZjtrt3nfyl5DGK8cyXLjjo+Xz1oV6C5BXsb4NMN1otFkAlhud8aV80lQgE WcQo7zr1B6odwuTnMTZVNAZMfeUdu2uc3WHI7AM4djqvj8EdkJk8Xtwm2mRehBL4gk7ezigkrDi mk+GFzrdamKg9XQEZ8STQdRlG6xq7XmefS+Vyl5hB6WnjdFZ8iW3rTYcvsBWn6UxVtXAtDNEXUn B2F6Z5ZT6oJlKqw78J0U2SkrNpUMd+7oChTyDKWGXGk7Y/yxW48gCU1r1jXw6eVkf/K7Rb3Vyor VPpbsDlGiGPIEdOUugWl5YknQ41mKlMtr1azRyBGMTeM7sW4CcVJajx2QDdwhnQMvG2cI= X-Developer-Key: i=frank@oltmanns.dev; a=openpgp; fpr=02FD257B7F90E6B9A5444F969A69A208944AD3C7 The Allwinner A64's GPU has currently three operating points. However, the BSP runs the GPU fixed at 432 MHz. In addition, at least one of the devices using that SoC - the pinephone - shows unstabilities (see link) that can be circumvented by running the GPU at a fixed rate. Therefore, remove the other two operating points from the GPU OPP table, so that the GPU runs at a fixed rate of 432 MHz. Link: https://gitlab.com/postmarketOS/pmaports/-/issues/805 Signed-off-by: Frank Oltmanns Acked-by: Erico Nunes --- arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 8 -------- 1 file changed, 8 deletions(-) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi index 57ac18738c99..c810380aab6d 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi @@ -107,14 +107,6 @@ de: display-engine { gpu_opp_table: opp-table-gpu { compatible = "operating-points-v2"; - opp-120000000 { - opp-hz = /bits/ 64 <120000000>; - }; - - opp-312000000 { - opp-hz = /bits/ 64 <312000000>; - }; - opp-432000000 { opp-hz = /bits/ 64 <432000000>; };