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Suggested-by: Sudeep Holla Signed-off-by: Sibi Sankar Reviewed-by: Sudeep Holla --- drivers/firmware/arm_scmi/perf.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/firmware/arm_scmi/perf.c b/drivers/firmware/arm_scmi/perf.c index 8e832d1ad825..64d9a90bf443 100644 --- a/drivers/firmware/arm_scmi/perf.c +++ b/drivers/firmware/arm_scmi/perf.c @@ -857,7 +857,7 @@ static int scmi_dvfs_device_opps_add(const struct scmi_protocol_handle *ph, struct device *dev, u32 domain) { int idx, ret; - unsigned long freq; + unsigned long freq, sustained_freq; struct dev_pm_opp_data data = {}; struct perf_dom_info *dom; @@ -865,12 +865,18 @@ static int scmi_dvfs_device_opps_add(const struct scmi_protocol_handle *ph, if (IS_ERR(dom)) return PTR_ERR(dom); + sustained_freq = dom->sustained_freq_khz * 1000UL; + for (idx = 0; idx < dom->opp_count; idx++) { if (!dom->level_indexing_mode) freq = dom->opp[idx].perf * dom->mult_factor; else freq = dom->opp[idx].indicative_freq * dom->mult_factor; + /* All opps above the sustained level/frequency are treated as boost */ + if (freq > sustained_freq) + data.turbo = true; + data.level = dom->opp[idx].perf; data.freq = freq; From patchwork Fri Mar 8 10:44:10 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sibi Sankar X-Patchwork-Id: 13586652 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C76FE55C18; Fri, 8 Mar 2024 10:44:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709894692; cv=none; b=F300FwnywXKsSqbRG6bl2d7OCQgStcoxLjfG865w7KYDbIhgKMRu7bpsgH37kS5DWyoMhMB/08Ia7NCOXsrX8cQjiI/Zos51X//y6Hx7IzIocvotBnQZ0AExMoZ7eeskHuUA+SLrdVskvU0gS6oRSLSxaS8muRRULJ6Ueh+BDt8= ARC-Message-Signature: i=1; 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Fri, 8 Mar 2024 10:44:38 GMT Received: from hu-sibis-blr.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Fri, 8 Mar 2024 02:44:33 -0800 From: Sibi Sankar To: , , , , , , , CC: , , , , , , Sibi Sankar Subject: [PATCH V3 2/2] cpufreq: scmi: Enable boost support Date: Fri, 8 Mar 2024 16:14:10 +0530 Message-ID: <20240308104410.385631-3-quic_sibis@quicinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240308104410.385631-1-quic_sibis@quicinc.com> References: <20240308104410.385631-1-quic_sibis@quicinc.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: z5IqSlU8GBXzu3i9Asa1x7JbYnmalQTy X-Proofpoint-ORIG-GUID: z5IqSlU8GBXzu3i9Asa1x7JbYnmalQTy X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-03-08_08,2024-03-06_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 spamscore=0 malwarescore=0 mlxscore=0 lowpriorityscore=0 mlxlogscore=999 priorityscore=1501 suspectscore=0 bulkscore=0 adultscore=0 clxscore=1015 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2402120000 definitions=main-2403080085 The X1E80100 SoC hosts a number of cpu boost frequencies, so let's enable boost support if the freq_table has any opps marked as turbo in it. Signed-off-by: Sibi Sankar Reviewed-by: --- v3: * Don't set per-policy boost flags from the cpufreq driver. [Viresh] drivers/cpufreq/scmi-cpufreq.c | 20 +++++++++++++++++++- 1 file changed, 19 insertions(+), 1 deletion(-) diff --git a/drivers/cpufreq/scmi-cpufreq.c b/drivers/cpufreq/scmi-cpufreq.c index 0b483bd0d3ca..3b4f6bfb2f4c 100644 --- a/drivers/cpufreq/scmi-cpufreq.c +++ b/drivers/cpufreq/scmi-cpufreq.c @@ -30,6 +30,7 @@ struct scmi_data { static struct scmi_protocol_handle *ph; static const struct scmi_perf_proto_ops *perf_ops; +static struct cpufreq_driver scmi_cpufreq_driver; static unsigned int scmi_cpufreq_get_rate(unsigned int cpu) { @@ -167,6 +168,12 @@ scmi_get_rate_limit(u32 domain, bool has_fast_switch) return rate_limit; } +static struct freq_attr *scmi_cpufreq_hw_attr[] = { + &cpufreq_freq_attr_scaling_available_freqs, + NULL, + NULL, +}; + static int scmi_cpufreq_init(struct cpufreq_policy *policy) { int ret, nr_opp, domain; @@ -276,6 +283,17 @@ static int scmi_cpufreq_init(struct cpufreq_policy *policy) policy->transition_delay_us = scmi_get_rate_limit(domain, policy->fast_switch_possible); + if (policy_has_boost_freq(policy)) { + ret = cpufreq_enable_boost_support(); + if (ret) { + dev_warn(cpu_dev, "failed to enable boost: %d\n", ret); + goto out_free_opp; + } else { + scmi_cpufreq_hw_attr[1] = &cpufreq_freq_attr_scaling_boost_freqs; + scmi_cpufreq_driver.boost_enabled = true; + } + } + return 0; out_free_opp: @@ -334,7 +352,7 @@ static struct cpufreq_driver scmi_cpufreq_driver = { CPUFREQ_NEED_INITIAL_FREQ_CHECK | CPUFREQ_IS_COOLING_DEV, .verify = cpufreq_generic_frequency_table_verify, - .attr = cpufreq_generic_attr, + .attr = scmi_cpufreq_hw_attr, .target_index = scmi_cpufreq_set_target, .fast_switch = scmi_cpufreq_fast_switch, .get = scmi_cpufreq_get_rate,