From patchwork Thu Mar 14 15:23:40 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 13592533 Received: from mail-pf1-f175.google.com (mail-pf1-f175.google.com [209.85.210.175]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 91D0B71B5E for ; Thu, 14 Mar 2024 15:24:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.210.175 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1710429853; cv=none; b=eCny3oDH9owu2nldDQfaw9LNzghe+naJKVaD8BlWY2g6EJh29l7Xq2FOwG0SV79jpGDmo+NfBmlEh0phq++DO7zK5XAuwHSFC/YAssfRQXeUOUhhVHywtrODE1eDDoNbRCR++XM5f0DrzZeAnvD54SVmOcC/iJix3ywXIQcHBWE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1710429853; c=relaxed/simple; bh=JRZLwKxhEM0x8HfB67G9+Fzppqg8xFqlyA8aRxI9XHM=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=KMKJs0NYfgl9vD5dh509jFg5sucNOdMBBuCRzLEZRyx9vpcXm13TwZST5j5jIdNfLXadviuvv+J2M5jHEsAki54B95PKcxAfA7+2CE4v0geAP7xRNp05mQdKV1wR2wVmie2AeoMqthba8ZDyBFsMiT0HBkJQ48csJbXoWFE1qng= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=LK7PBwQM; arc=none smtp.client-ip=209.85.210.175 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="LK7PBwQM" Received: by mail-pf1-f175.google.com with SMTP id d2e1a72fcca58-6e6ee9e3cffso340948b3a.1 for ; Thu, 14 Mar 2024 08:24:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1710429851; x=1711034651; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=/IrOa9F9FCptyyElLcaGG4pDepSH3LTIYhrJfnXA2HI=; b=LK7PBwQMYWbLkvRxwvWy/ZjWPoXZwFihG1FkCi0AIudAoVAB1eS0H7bH/s3Oy6y6jk AF0rYbkid5IvNxMpChhQrDoMdEmVgp1vo/3+y8qmMI/rAnubePompPYvVzReDulzX1uo znWPI8C7hQ7CbQ94rPH/OCmc45KtaRYsRcckWj1zLLNAGwTiyhlLs+PNUWLdtLOAZPZc K7ufHM2XenZaIthORJ3vX0Ob+vOVNVNLsI8SJKRhetdnZ5+O/rdViopv6cbqRCxlyHK5 s+/zYojZ32by9TLWxXMr9KYeZrHjwcYNalAIn9PuYIuBYNmGAPeXBvJuXZ+hZzkr0WGT lF1w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1710429851; x=1711034651; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=/IrOa9F9FCptyyElLcaGG4pDepSH3LTIYhrJfnXA2HI=; b=TpY62iYXsobrH7nbpYtex3RD+WihUw0z1ZjruKkvDcw5Ort2AECiiBS9sxJmRoD6Zb pXxwNulGtdvg1ezFeExoxXlMjiAgXFYmpOLyEyvRXx3SA7Uf7ZoSbbx+VvjBitrzKcyN zVZap7ZT7JMOQXeeaW/uDwxfxFhtHR8VgR3E1wnnl57XhYJpOJCB28mvDNtGj4mjdMZ6 KMtnenAjPm4Qc/dqRHjX+gsnqpbbYQ2E+zh99DCzAphO4agJ/JkqFOrA4xXE95OdN7Hb nf/x8hsWzuMhAIyqfzG6NTlDstiALAiE4xa8B81BqBcTYjrtcRB4YOnyA+nq9M8+naXO NKWA== X-Forwarded-Encrypted: i=1; AJvYcCVDHu6yCD5d009OTrXPfLBusBEJ7TH/udYwKkhV5AK5oGC5luKpWlbDk0nw6/k4LhdPgCu8ThYPPeHRWY6XhiJ8yETN00vpGCQBok4Izg== X-Gm-Message-State: AOJu0Yzwm6xKCwuzR6WBmOhqETiFOb7izfSJ+tDS4njt4YIPNdyCin4m VPnOVkACoqMXvev4uAI/yx4ETTOQBtpcUPGC8urktHK5GW6U/1SE7jubo4/3yw== X-Google-Smtp-Source: AGHT+IG7jwbZIclHbE1GnAK6Rj5Bq8CoICWzMlScgrOOGIyJU6eaD/H0E/Up5FStL4M0GtXAcOvRKg== X-Received: by 2002:a05:6a20:3941:b0:1a1:e41:3edb with SMTP id r1-20020a056a20394100b001a10e413edbmr3110511pzg.11.1710429850762; Thu, 14 Mar 2024 08:24:10 -0700 (PDT) Received: from [127.0.1.1] ([117.207.30.211]) by smtp.gmail.com with ESMTPSA id m4-20020a63ed44000000b005e438ea2a5asm824021pgk.53.2024.03.14.08.24.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 14 Mar 2024 08:24:10 -0700 (PDT) From: Manivannan Sadhasivam Date: Thu, 14 Mar 2024 20:53:40 +0530 Subject: [PATCH 01/11] PCI: qcom-ep: Disable resources unconditionally during PERST# assert Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240314-pci-epf-rework-v1-1-6134e6c1d491@linaro.org> References: <20240314-pci-epf-rework-v1-0-6134e6c1d491@linaro.org> In-Reply-To: <20240314-pci-epf-rework-v1-0-6134e6c1d491@linaro.org> To: Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Rob Herring , Bjorn Helgaas , Kishon Vijay Abraham I , Thierry Reding , Jonathan Hunter , Jingoo Han , Gustavo Pimentel Cc: linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, mhi@lists.linux.dev, linux-tegra@vger.kernel.org, Manivannan Sadhasivam X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=1341; i=manivannan.sadhasivam@linaro.org; h=from:subject:message-id; bh=JRZLwKxhEM0x8HfB67G9+Fzppqg8xFqlyA8aRxI9XHM=; b=owEBbQGS/pANAwAKAVWfEeb+kc71AcsmYgBl8xaOLrQOPVb1HVr/175Bwj4SLK9E64perYmGL IBSuWUMVHGJATMEAAEKAB0WIQRnpUMqgUjL2KRYJ5dVnxHm/pHO9QUCZfMWjgAKCRBVnxHm/pHO 9ROLCACSxVDvqf0sTonqAB4efCgXpbE8NA//bIFdXLvO2DxsLrdraqYdwvMEiH+CAtxrSHwW3cE FCGe61CdFCnn3hhtoh05WnTStcOoxu7X2p8Lah7zUn7BBg7dScjvASClkPt0iqwsQjNhi0LmwHW xSofd+6XrLFHrATDGnodX1uVN2PcZZSXJdHw5oINOdggFxeHD1m9exuzvl6s5gY5SJ3lgg4q8Nw SZ86dARIy67pxK4Tkui+6vLp8YpJuby4gtksND4QVksT3VGTatVl30dDQE+e86Ntl1YgSKaJost K6XAXGDFLhZf0jQo8+mwwqh3P5s4NtOxeKumlgu2yg6kSQ4B X-Developer-Key: i=manivannan.sadhasivam@linaro.org; a=openpgp; fpr=C668AEC3C3188E4C611465E7488550E901166008 All EP specific resources are enabled during PERST# deassert. As a counter operation, all resources should be disabled during PERST# assert. There is no point in skipping that if the link was not enabled. This will also result in enablement of the resources twice if PERST# got deasserted again. So remove the check from qcom_pcie_perst_assert() and disable all the resources unconditionally. Fixes: f55fee56a631 ("PCI: qcom-ep: Add Qualcomm PCIe Endpoint controller driver") Signed-off-by: Manivannan Sadhasivam Reviewed-by: Niklas Cassel --- drivers/pci/controller/dwc/pcie-qcom-ep.c | 6 ------ 1 file changed, 6 deletions(-) diff --git a/drivers/pci/controller/dwc/pcie-qcom-ep.c b/drivers/pci/controller/dwc/pcie-qcom-ep.c index 2fb8c15e7a91..50b1635e3cbb 100644 --- a/drivers/pci/controller/dwc/pcie-qcom-ep.c +++ b/drivers/pci/controller/dwc/pcie-qcom-ep.c @@ -500,12 +500,6 @@ static int qcom_pcie_perst_deassert(struct dw_pcie *pci) static void qcom_pcie_perst_assert(struct dw_pcie *pci) { struct qcom_pcie_ep *pcie_ep = to_pcie_ep(pci); - struct device *dev = pci->dev; - - if (pcie_ep->link_status == QCOM_PCIE_EP_LINK_DISABLED) { - dev_dbg(dev, "Link is already disabled\n"); - return; - } dw_pcie_ep_cleanup(&pci->ep); qcom_pcie_disable_resources(pcie_ep); From patchwork Thu Mar 14 15:23:41 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 13592534 Received: from mail-oo1-f48.google.com (mail-oo1-f48.google.com [209.85.161.48]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9F7E273186 for ; Thu, 14 Mar 2024 15:24:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.161.48 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1710429859; cv=none; b=Gz674qJZ2LNYztpXmihHlhDZpo310U6CS52H18cENqx+urWZ1dICzHmeSweZEEcTpfss1jF/82qvMgwMo12GtjKfdhr+rd72z35afNoMJwgz4GZAGq48EuJMi++gQ4mMIEy0MMrRtDbj3tt/g/d+ZmOCwDxcy4kMHMkLUr5wkn8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1710429859; c=relaxed/simple; bh=9R/4BRcR5YWjVx8HSWtHp3tea3KFcjiGJn6zOJW2sDQ=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=NeLtTJZ53uc/WyVe+vys3jD5pouPWuQ93HHV5FosajynOzD6KyW/W+0fNY4EduqTREYPP8uNNmOTjQZ0g/SWoZCV3SDcV44OSfrVLcoO0eVRB1+0C46xfIAYFqbw9DODtDXfHTtmZxQHZu6JC/ToLakYKSdzk4ylO5XuZBZ6dVA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=SSWncbYd; arc=none smtp.client-ip=209.85.161.48 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="SSWncbYd" Received: by mail-oo1-f48.google.com with SMTP id 006d021491bc7-5a43329565cso322416eaf.3 for ; Thu, 14 Mar 2024 08:24:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1710429856; x=1711034656; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=xEWUsK3WjK6B5cd6Lu/XIj57FaZ2PiCBZt++wpc0fHs=; b=SSWncbYdzjdBHF22ewVSvs8847+tk94jHWIC08SXJVlzz9HifGytuMWCGlKO0VcClN b5JOqzfsq6Fms80/l/Xae1ukTWFdMOadmcbvZVuon9tm6sDAU3vKavG918gs+10z5j1g HmkWZ/ppxEFZF4v/PiJ5CY79q+sdw6PY56m6BZ5R66JWTehE+UdVCiFN9AIBqWPMPvJW zKw5qfXSQh4D61xbn3UunRw8JPDGlaWIPonPNNp02bHYjbGnRHP3ASHug88WkNK+3dj1 eFyHsQm/gaMDNY3dX5M5ldf7B5gqNJXMeTamu5PiF4x+079VAhKg7+a6rfGy4Fvm1Z1f ACsw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1710429856; x=1711034656; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=xEWUsK3WjK6B5cd6Lu/XIj57FaZ2PiCBZt++wpc0fHs=; b=OQ5qqgMm0trF9C8+m2dnqWZkfjOB8aLi7rHtoGnLQzMT9IEXZtT/BtpgYAE6aco57F kl+x0Dsia0alK3bXX6YSsaWTPHCld9Tl9TXggi3w06+LofRPQDXSDvzJy3YI4m5raLXG Kw4RTGnEPdDowgf1mwIIcN32AUstVshOrwcpN7KaKepS4ygHgxlooNoW+/HqdizjHCJD ZMdid+7QR4L6TxXFE7VCoYpg2NNysElxoAsVslhkmGFPHw4hSE9uxrDOE7rdlPSi+H0P CwStnmZoePoMk30ljoJh6Q4rnB24gVdEhKNbXVn00R/qSBL4SAaGO98WvL4IbXKw0GLV UhQw== X-Forwarded-Encrypted: i=1; AJvYcCXRKOiQDbvBs35ceV6JctMhCCZRQvOkk1Xga0mmYupGGqGyP29UiDyXwWwXgAkEQ9DBVN9ZfEIqTE0B2THqbOMnfr1rht5DJnEC73MlqQ== X-Gm-Message-State: AOJu0YyjpbGoFtj6NU0wdivDgecZBPnmcrlb0ON74/txZs4+eBQ/JhxH HqDOPL3P4rVkQfA+F6y7k8r5RCMaGfAE4uMOkLAjxPwV3QD2dhhWI7x++N5Qkg== X-Google-Smtp-Source: AGHT+IHP8NMJaf/7kaBlz1m3NjEaEUbyEINYKTdtRwykSNpv+uyLAP+YGybVOzt6HovdxEZEpbwkDA== X-Received: by 2002:a05:6358:5304:b0:17b:f2ae:e561 with SMTP id n4-20020a056358530400b0017bf2aee561mr1971178rwf.30.1710429855405; Thu, 14 Mar 2024 08:24:15 -0700 (PDT) Received: from [127.0.1.1] ([117.207.30.211]) by smtp.gmail.com with ESMTPSA id m4-20020a63ed44000000b005e438ea2a5asm824021pgk.53.2024.03.14.08.24.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 14 Mar 2024 08:24:14 -0700 (PDT) From: Manivannan Sadhasivam Date: Thu, 14 Mar 2024 20:53:41 +0530 Subject: [PATCH 02/11] PCI: endpoint: Decouple EPC and PCIe bus specific events Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240314-pci-epf-rework-v1-2-6134e6c1d491@linaro.org> References: <20240314-pci-epf-rework-v1-0-6134e6c1d491@linaro.org> In-Reply-To: <20240314-pci-epf-rework-v1-0-6134e6c1d491@linaro.org> To: Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Rob Herring , Bjorn Helgaas , Kishon Vijay Abraham I , Thierry Reding , Jonathan Hunter , Jingoo Han , Gustavo Pimentel Cc: linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, mhi@lists.linux.dev, linux-tegra@vger.kernel.org, Manivannan Sadhasivam X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=7165; i=manivannan.sadhasivam@linaro.org; h=from:subject:message-id; bh=9R/4BRcR5YWjVx8HSWtHp3tea3KFcjiGJn6zOJW2sDQ=; b=owEBbQGS/pANAwAKAVWfEeb+kc71AcsmYgBl8xaOuI/id1EPmdXTpkB5hTosPO+3YkDwNzT9O 1dki8CaNoSJATMEAAEKAB0WIQRnpUMqgUjL2KRYJ5dVnxHm/pHO9QUCZfMWjgAKCRBVnxHm/pHO 9fsmB/93d2Eg2EacntW52OJYEoBdX0WLgtZNSEzX1D0kPl5iX16uh0+yADrvlrovh25+G7nAacY fqlS6Fv2Dki5ph34J/GVCyP+LrBCAN0mmq7jiGkdWdGN+k0Y6r4rzoA9iol7838nAVqpCT3Sk36 IuM5OpXw0a6uZT1s7D9AtjlQtiW9+UQwV8jTtfmnTQdXxOOQxZHyYF0BY8oNqocbn9t0x60FYkH /7gUOUj4q2xtrLPulTU7VeC/yFoxBtA8jUBj0peqvHrPt+3rNKS37mcA4Pl0w2n0KZYxFznRKOg DCEoLrM8hFzLkBiSpuiI/U3nCEDt1slSRYcCmFyl2IbUZf7K X-Developer-Key: i=manivannan.sadhasivam@linaro.org; a=openpgp; fpr=C668AEC3C3188E4C611465E7488550E901166008 Currently, 'struct pci_epc_event_ops' has a bunch of events that are sent from the EPC driver to EPF driver. But those events are a mix of EPC specific events like core_init and PCIe bus specific events like LINK_UP, LINK_DOWN, BME etc... Let's decouple them to respective structs (pci_epc_event_ops, pci_epc_bus_event_ops) to make the separation clear. Signed-off-by: Manivannan Sadhasivam --- drivers/pci/endpoint/functions/pci-epf-mhi.c | 8 ++++++-- drivers/pci/endpoint/functions/pci-epf-test.c | 8 ++++++-- drivers/pci/endpoint/pci-epc-core.c | 20 ++++++++++---------- include/linux/pci-epf.h | 23 ++++++++++++++++------- 4 files changed, 38 insertions(+), 21 deletions(-) diff --git a/drivers/pci/endpoint/functions/pci-epf-mhi.c b/drivers/pci/endpoint/functions/pci-epf-mhi.c index 1c3e4ea76bd2..e5d67aec7574 100644 --- a/drivers/pci/endpoint/functions/pci-epf-mhi.c +++ b/drivers/pci/endpoint/functions/pci-epf-mhi.c @@ -880,8 +880,11 @@ static void pci_epf_mhi_unbind(struct pci_epf *epf) pci_epc_clear_bar(epc, epf->func_no, epf->vfunc_no, epf_bar); } -static const struct pci_epc_event_ops pci_epf_mhi_event_ops = { +static const struct pci_epc_event_ops pci_epf_mhi_epc_event_ops = { .core_init = pci_epf_mhi_core_init, +}; + +static const struct pci_epc_bus_event_ops pci_epf_mhi_bus_event_ops = { .link_up = pci_epf_mhi_link_up, .link_down = pci_epf_mhi_link_down, .bme = pci_epf_mhi_bme, @@ -903,7 +906,8 @@ static int pci_epf_mhi_probe(struct pci_epf *epf, epf_mhi->info = info; epf_mhi->epf = epf; - epf->event_ops = &pci_epf_mhi_event_ops; + epf->epc_event_ops = &pci_epf_mhi_epc_event_ops; + epf->bus_event_ops = &pci_epf_mhi_bus_event_ops; mutex_init(&epf_mhi->lock); diff --git a/drivers/pci/endpoint/functions/pci-epf-test.c b/drivers/pci/endpoint/functions/pci-epf-test.c index fc0282b0d626..751dab5799d5 100644 --- a/drivers/pci/endpoint/functions/pci-epf-test.c +++ b/drivers/pci/endpoint/functions/pci-epf-test.c @@ -813,8 +813,11 @@ static int pci_epf_test_link_up(struct pci_epf *epf) return 0; } -static const struct pci_epc_event_ops pci_epf_test_event_ops = { +static const struct pci_epc_event_ops pci_epf_test_epc_event_ops = { .core_init = pci_epf_test_core_init, +}; + +static const struct pci_epc_bus_event_ops pci_epf_test_bus_event_ops = { .link_up = pci_epf_test_link_up, }; @@ -959,7 +962,8 @@ static int pci_epf_test_probe(struct pci_epf *epf, INIT_DELAYED_WORK(&epf_test->cmd_handler, pci_epf_test_cmd_handler); - epf->event_ops = &pci_epf_test_event_ops; + epf->epc_event_ops = &pci_epf_test_epc_event_ops; + epf->bus_event_ops = &pci_epf_test_bus_event_ops; epf_set_drvdata(epf, epf_test); return 0; diff --git a/drivers/pci/endpoint/pci-epc-core.c b/drivers/pci/endpoint/pci-epc-core.c index ba2ff037dfa6..f602f08a11a2 100644 --- a/drivers/pci/endpoint/pci-epc-core.c +++ b/drivers/pci/endpoint/pci-epc-core.c @@ -697,8 +697,8 @@ void pci_epc_linkup(struct pci_epc *epc) mutex_lock(&epc->list_lock); list_for_each_entry(epf, &epc->pci_epf, list) { mutex_lock(&epf->lock); - if (epf->event_ops && epf->event_ops->link_up) - epf->event_ops->link_up(epf); + if (epf->bus_event_ops && epf->bus_event_ops->link_up) + epf->bus_event_ops->link_up(epf); mutex_unlock(&epf->lock); } mutex_unlock(&epc->list_lock); @@ -723,8 +723,8 @@ void pci_epc_linkdown(struct pci_epc *epc) mutex_lock(&epc->list_lock); list_for_each_entry(epf, &epc->pci_epf, list) { mutex_lock(&epf->lock); - if (epf->event_ops && epf->event_ops->link_down) - epf->event_ops->link_down(epf); + if (epf->bus_event_ops && epf->bus_event_ops->link_down) + epf->bus_event_ops->link_down(epf); mutex_unlock(&epf->lock); } mutex_unlock(&epc->list_lock); @@ -749,8 +749,8 @@ void pci_epc_init_notify(struct pci_epc *epc) mutex_lock(&epc->list_lock); list_for_each_entry(epf, &epc->pci_epf, list) { mutex_lock(&epf->lock); - if (epf->event_ops && epf->event_ops->core_init) - epf->event_ops->core_init(epf); + if (epf->epc_event_ops && epf->epc_event_ops->core_init) + epf->epc_event_ops->core_init(epf); mutex_unlock(&epf->lock); } epc->init_complete = true; @@ -772,8 +772,8 @@ void pci_epc_notify_pending_init(struct pci_epc *epc, struct pci_epf *epf) { if (epc->init_complete) { mutex_lock(&epf->lock); - if (epf->event_ops && epf->event_ops->core_init) - epf->event_ops->core_init(epf); + if (epf->epc_event_ops && epf->epc_event_ops->core_init) + epf->epc_event_ops->core_init(epf); mutex_unlock(&epf->lock); } } @@ -797,8 +797,8 @@ void pci_epc_bme_notify(struct pci_epc *epc) mutex_lock(&epc->list_lock); list_for_each_entry(epf, &epc->pci_epf, list) { mutex_lock(&epf->lock); - if (epf->event_ops && epf->event_ops->bme) - epf->event_ops->bme(epf); + if (epf->bus_event_ops && epf->bus_event_ops->bme) + epf->bus_event_ops->bme(epf); mutex_unlock(&epf->lock); } mutex_unlock(&epc->list_lock); diff --git a/include/linux/pci-epf.h b/include/linux/pci-epf.h index 77b146e0f672..1271e1e00bbd 100644 --- a/include/linux/pci-epf.h +++ b/include/linux/pci-epf.h @@ -68,14 +68,21 @@ struct pci_epf_ops { }; /** - * struct pci_epc_event_ops - Callbacks for capturing the EPC events - * @core_init: Callback for the EPC initialization complete event - * @link_up: Callback for the EPC link up event - * @link_down: Callback for the EPC link down event - * @bme: Callback for the EPC BME (Bus Master Enable) event + * struct pci_epc_event_ops - Callbacks for capturing the EPC specific events + * @core_init: Callback for the EPC initialization event */ struct pci_epc_event_ops { int (*core_init)(struct pci_epf *epf); +}; + +/** + * struct pci_epc_bus_event_ops - Callbacks for capturing the PCIe bus specific + * events + * @link_up: Callback for the PCIe bus link up event + * @link_down: Callback for the PCIe bus link down event + * @bme: Callback for the PCIe bus BME (Bus Master Enable) event + */ +struct pci_epc_bus_event_ops { int (*link_up)(struct pci_epf *epf); int (*link_down)(struct pci_epf *epf); int (*bme)(struct pci_epf *epf); @@ -149,7 +156,8 @@ struct pci_epf_bar { * @is_vf: true - virtual function, false - physical function * @vfunction_num_map: bitmap to manage virtual function number * @pci_vepf: list of virtual endpoint functions associated with this function - * @event_ops: Callbacks for capturing the EPC events + * @epc_event_ops: Callbacks for capturing the EPC events + * @bus_event_ops: Callbacks for capturing the PCIe bus events */ struct pci_epf { struct device dev; @@ -179,7 +187,8 @@ struct pci_epf { unsigned int is_vf; unsigned long vfunction_num_map; struct list_head pci_vepf; - const struct pci_epc_event_ops *event_ops; + const struct pci_epc_event_ops *epc_event_ops; + const struct pci_epc_bus_event_ops *bus_event_ops; }; /** From patchwork Thu Mar 14 15:23:42 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 13592535 Received: from mail-oo1-f49.google.com (mail-oo1-f49.google.com [209.85.161.49]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EB8F073521 for ; Thu, 14 Mar 2024 15:24:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.161.49 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1710429862; cv=none; b=Zzqjnbd9Ekf/SKrh5PwqaBEnbHj60Qn92gCN7ieGUoVRx8dFz7T5Dvfu5LdBZgENJLNgkdMovw/Tc3ALSbdag7t12ukS/BgiVHtTyHrUtgkxGlc0RfDtxSHhjTzOc8TgRkMwuN18DTq5HS37Vp5ii8k7vs+RzJ0tR+fG6mQBmME= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1710429862; c=relaxed/simple; bh=lGCqTGsH0mm9VdgV3rimMB23vCvTqdQtyUoVRgnqHFc=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=cT1LhhRRL6DGcsxL2g4hZ0GuJSrjUhf7lBBE3LFUZv7cMNSXom0a201eOmTOOoZTBFQj+nbud7XtCDZT9hmqFAezpowJbWhfeFkxUynYpYbElKjOFCc4jLxHaKJ7FEyGLngZXI4yf7oRFinlOLm3ugc+bZoDejnppF9lUVHMFu4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=TwvgUoOM; arc=none smtp.client-ip=209.85.161.49 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="TwvgUoOM" Received: by mail-oo1-f49.google.com with SMTP id 006d021491bc7-5a1ca29db62so587027eaf.0 for ; Thu, 14 Mar 2024 08:24:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1710429860; x=1711034660; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=Hmo5GkrWgq85dG1VyL0i72o0ju0TcnLWL9PRQB4CpVU=; b=TwvgUoOM8oOAnHz6tpkyidljFowISqwbmuko43QW2SMLh20SMKzeFzLBvITBBx8MAV dfdKHELuBFSkMxXroUBULVHuXna/LFUA+OaMRQGxJ1IqZS7ruCi1xIR3TQ7QiTvm2UbT /pIyaUoIYqfP7efbEaNDeosBCZOvyTNxVEh7TKPeL9H2RMt8Q9ealIRGhn3Ohnpjc4cP USdohdd2f1rGEqeA23dMZcFQnHHq0tyuYn3I29Lp9BR0fagyskD4gOX3kQHQZoNFgP/R s+St7CnrvLyXZm+vJzrIzk/q7r3B8g3j4vbQcM6P1IBbV9noXuQUb/D2rr7BwGYaUoAZ FN7A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1710429860; x=1711034660; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Hmo5GkrWgq85dG1VyL0i72o0ju0TcnLWL9PRQB4CpVU=; b=a+2skMwmkMXBmEsMokUCqm7OX3eUVHYgjpC+QqZ4ljx+hsUd8lGpsUMwoz2hB1eeL/ Zd/l0Y/PSx4nl4olA+7wSXwWLupT0M0elZmIR5oZSU7d37wSl5PPdD902wF4TBBSQ7i0 11fBT/9WpLCQfiSXIlB6/fwbKtiYAqHYecpif5neix5rfNvItP5mZC+vGk8Wr/vWcPPs s8Mc7N7TqXg56PgOO77vC797ASn2fxgPoIBWRspTQxvSLSwlhTbyLmNXVwZuGU0IQIXu hFvi3U9QsCbiEde7WIK194XGwXzGHCe59MLcrvqicC8BiJtk3o9QYCG56uPvknxiNBp7 xjuA== X-Forwarded-Encrypted: i=1; AJvYcCWc/HnUh4I8lUyFn3SHpEDDp1azk8S9NMYLjzb3kocSpfk5WmT9DamIESqIWSeoEPMwKIWvmO1EUygOHoTfkb4aAskryDHIkOYEZeDE6Q== X-Gm-Message-State: AOJu0Yzcbd+riuEw2onsjx7b0BOZEI2W5TFdpTvJuco0pNRlo1FS5uv+ C0Zc7yA7apJfS5dATHLkAeW4tmuxav8mrPMHfSDLAHMVjTtH64AY3XeUI53otg== X-Google-Smtp-Source: AGHT+IH735h0wRO4p3EDFKpXdMk7lf50Krmo5ygqFNlixEaKdjPh2gApyS1k774c2ix2b6oWQqeniQ== X-Received: by 2002:a05:6358:248b:b0:17b:f3f9:117d with SMTP id m11-20020a056358248b00b0017bf3f9117dmr2735196rwc.16.1710429859818; Thu, 14 Mar 2024 08:24:19 -0700 (PDT) Received: from [127.0.1.1] ([117.207.30.211]) by smtp.gmail.com with ESMTPSA id m4-20020a63ed44000000b005e438ea2a5asm824021pgk.53.2024.03.14.08.24.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 14 Mar 2024 08:24:19 -0700 (PDT) From: Manivannan Sadhasivam Date: Thu, 14 Mar 2024 20:53:42 +0530 Subject: [PATCH 03/11] PCI: endpoint: Rename core_init() callback in 'struct pci_epc_event_ops' to init() Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240314-pci-epf-rework-v1-3-6134e6c1d491@linaro.org> References: <20240314-pci-epf-rework-v1-0-6134e6c1d491@linaro.org> In-Reply-To: <20240314-pci-epf-rework-v1-0-6134e6c1d491@linaro.org> To: Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Rob Herring , Bjorn Helgaas , Kishon Vijay Abraham I , Thierry Reding , Jonathan Hunter , Jingoo Han , Gustavo Pimentel Cc: linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, mhi@lists.linux.dev, linux-tegra@vger.kernel.org, Manivannan Sadhasivam X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=5286; i=manivannan.sadhasivam@linaro.org; h=from:subject:message-id; bh=lGCqTGsH0mm9VdgV3rimMB23vCvTqdQtyUoVRgnqHFc=; b=owEBbQGS/pANAwAKAVWfEeb+kc71AcsmYgBl8xaO/kPngWfy5i/yfKtWNyWLtszgSAOX80+JM Zd7R8DLC/uJATMEAAEKAB0WIQRnpUMqgUjL2KRYJ5dVnxHm/pHO9QUCZfMWjgAKCRBVnxHm/pHO 9Y9yB/9p0lkMoFe7sB5zCrNwSgPCUSxbb7RwZelaxXlhS5eru2NoWPc6nervrB3VSZYrItAebyU ENZddDyZY5pFAm3l4/aoJ8DhJd+fCrNgsqUV3JPXRZdsrinTxCbfbDlS0TIHH+255uiy0osRMxo VjNcNfiRxylOi1NVeVsr3Q0gDo90lI0WHkPhpzx8wsjo69OzykBfV+f8p/KN590C7z71yRAh6GO oONX3nSRm2ziR/9KETgAyunWypnI9tO6dNsl+H6VkfCWrbVJ4mrFr85ZEVRHjqr6UnIN1+qAPHV KLpSYYEuzF8JGp925cOz6vuAc1zwUghqPzrTaoKeAgr8dwR2 X-Developer-Key: i=manivannan.sadhasivam@linaro.org; a=openpgp; fpr=C668AEC3C3188E4C611465E7488550E901166008 core_init() callback is used to notify the EPC initialization event to the EPF drivers. The 'core' prefix was used indicate that the controller IP core has completed initialization. But it serves no purpose as the EPF driver will only care about the EPC initialization as a whole and there is no real benefit to distinguish the IP core part. So let's rename the core_init() callback in 'struct pci_epc_event_ops' to just init() to make it more clear. Signed-off-by: Manivannan Sadhasivam --- drivers/pci/endpoint/functions/pci-epf-mhi.c | 4 ++-- drivers/pci/endpoint/functions/pci-epf-test.c | 4 ++-- drivers/pci/endpoint/pci-epc-core.c | 16 ++++++++-------- include/linux/pci-epf.h | 4 ++-- 4 files changed, 14 insertions(+), 14 deletions(-) diff --git a/drivers/pci/endpoint/functions/pci-epf-mhi.c b/drivers/pci/endpoint/functions/pci-epf-mhi.c index e5d67aec7574..da894a9a447e 100644 --- a/drivers/pci/endpoint/functions/pci-epf-mhi.c +++ b/drivers/pci/endpoint/functions/pci-epf-mhi.c @@ -700,7 +700,7 @@ static void pci_epf_mhi_dma_deinit(struct pci_epf_mhi *epf_mhi) epf_mhi->dma_chan_rx = NULL; } -static int pci_epf_mhi_core_init(struct pci_epf *epf) +static int pci_epf_mhi_epc_init(struct pci_epf *epf) { struct pci_epf_mhi *epf_mhi = epf_get_drvdata(epf); const struct pci_epf_mhi_ep_info *info = epf_mhi->info; @@ -881,7 +881,7 @@ static void pci_epf_mhi_unbind(struct pci_epf *epf) } static const struct pci_epc_event_ops pci_epf_mhi_epc_event_ops = { - .core_init = pci_epf_mhi_core_init, + .init = pci_epf_mhi_epc_init, }; static const struct pci_epc_bus_event_ops pci_epf_mhi_bus_event_ops = { diff --git a/drivers/pci/endpoint/functions/pci-epf-test.c b/drivers/pci/endpoint/functions/pci-epf-test.c index 751dab5799d5..1dae0fce8fc4 100644 --- a/drivers/pci/endpoint/functions/pci-epf-test.c +++ b/drivers/pci/endpoint/functions/pci-epf-test.c @@ -746,7 +746,7 @@ static int pci_epf_test_set_bar(struct pci_epf *epf) return 0; } -static int pci_epf_test_core_init(struct pci_epf *epf) +static int pci_epf_test_epc_init(struct pci_epf *epf) { struct pci_epf_test *epf_test = epf_get_drvdata(epf); struct pci_epf_header *header = epf->header; @@ -814,7 +814,7 @@ static int pci_epf_test_link_up(struct pci_epf *epf) } static const struct pci_epc_event_ops pci_epf_test_epc_event_ops = { - .core_init = pci_epf_test_core_init, + .init = pci_epf_test_epc_init, }; static const struct pci_epc_bus_event_ops pci_epf_test_bus_event_ops = { diff --git a/drivers/pci/endpoint/pci-epc-core.c b/drivers/pci/endpoint/pci-epc-core.c index f602f08a11a2..5a522b2842e2 100644 --- a/drivers/pci/endpoint/pci-epc-core.c +++ b/drivers/pci/endpoint/pci-epc-core.c @@ -732,9 +732,9 @@ void pci_epc_linkdown(struct pci_epc *epc) EXPORT_SYMBOL_GPL(pci_epc_linkdown); /** - * pci_epc_init_notify() - Notify the EPF device that EPC device's core - * initialization is completed. - * @epc: the EPC device whose core initialization is completed + * pci_epc_init_notify() - Notify the EPF device that EPC device initialization + * is completed. + * @epc: the EPC device whose initialization is completed * * Invoke to Notify the EPF device that the EPC device's initialization * is completed. @@ -749,8 +749,8 @@ void pci_epc_init_notify(struct pci_epc *epc) mutex_lock(&epc->list_lock); list_for_each_entry(epf, &epc->pci_epf, list) { mutex_lock(&epf->lock); - if (epf->epc_event_ops && epf->epc_event_ops->core_init) - epf->epc_event_ops->core_init(epf); + if (epf->epc_event_ops && epf->epc_event_ops->init) + epf->epc_event_ops->init(epf); mutex_unlock(&epf->lock); } epc->init_complete = true; @@ -761,7 +761,7 @@ EXPORT_SYMBOL_GPL(pci_epc_init_notify); /** * pci_epc_notify_pending_init() - Notify the pending EPC device initialization * complete to the EPF device - * @epc: the EPC device whose core initialization is pending to be notified + * @epc: the EPC device whose initialization is pending to be notified * @epf: the EPF device to be notified * * Invoke to notify the pending EPC device initialization complete to the EPF @@ -772,8 +772,8 @@ void pci_epc_notify_pending_init(struct pci_epc *epc, struct pci_epf *epf) { if (epc->init_complete) { mutex_lock(&epf->lock); - if (epf->epc_event_ops && epf->epc_event_ops->core_init) - epf->epc_event_ops->core_init(epf); + if (epf->epc_event_ops && epf->epc_event_ops->init) + epf->epc_event_ops->init(epf); mutex_unlock(&epf->lock); } } diff --git a/include/linux/pci-epf.h b/include/linux/pci-epf.h index 1271e1e00bbd..ff8304e72f8e 100644 --- a/include/linux/pci-epf.h +++ b/include/linux/pci-epf.h @@ -69,10 +69,10 @@ struct pci_epf_ops { /** * struct pci_epc_event_ops - Callbacks for capturing the EPC specific events - * @core_init: Callback for the EPC initialization event + * @init: Callback for the EPC initialization event */ struct pci_epc_event_ops { - int (*core_init)(struct pci_epf *epf); + int (*init)(struct pci_epf *epf); }; /** From patchwork Thu Mar 14 15:23:43 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 13592536 Received: from mail-oo1-f46.google.com (mail-oo1-f46.google.com [209.85.161.46]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 804D474401 for ; Thu, 14 Mar 2024 15:24:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.161.46 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1710429867; cv=none; b=UrTPEv0Kjc0Y6vIhrZNtPoH62BK/3imlFbZlfABlhKLpP6S0zRaJeQNRD5sOmZTM7WtNaEUpJIbdKfQrfdC3eaBxnNXcWhD5xUbRrHTpls3srjodwndgNkICKIugUzqfkFa6ZiZ/OUYH9DIWqgM5e2Ib0B2/i0voLV3jnhREwjU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1710429867; c=relaxed/simple; bh=DtlRqv5F0Ytl0/lk4U3qf6wbQNKU/3llSWJh3kC84BI=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Yal9T1K5SlXu5MUCxe/NMGOlNkQmabALZsl5D/VsthASm2l5f8jsrmqCA1Wn+rs8zaAmj9auYGQgUAIoaStl2hrUH37AJhG20lgEh5bB6mpbdgtNpPDMvoj5kuOzsLOOeJK/JAyowXKCTKTBGjLnqAVH2Vuh/12jFMyN/sB5XEs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=TlpE4MTu; arc=none smtp.client-ip=209.85.161.46 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="TlpE4MTu" Received: by mail-oo1-f46.google.com with SMTP id 006d021491bc7-5a1cf769452so556566eaf.1 for ; Thu, 14 Mar 2024 08:24:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1710429864; x=1711034664; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=UC/JTb5/el0zq5fPOBPWkuJ8boNZcgw6JdBjsjQkQVo=; b=TlpE4MTuTiq7VE4XDnBBxCBLW38T3bkwCc74Wi8eEvgnv2A7sj4lLtG2UmyMMoTWsI uo5QsMOmWIY2bPNrOxA9xs0j5wGnaCfizzwL8ygXJnCX9J95dg3pTgH45Gq/y06XP5yZ V8lq6gdno3B8qIs9ldMvEXWkylaYYuZm67ruJ1XtpNFBTpSNDwMorgkzYDY7AJBNG8Od 54qxw7w/XhT4iMx8mp5+FoxOnMjzvCS4yjut+8augQuyp3fOh7wkoS3y6dWQXiQg2STl PMFTLrD0ZSyvOEXX6w9Q+y0WPigrbhtW1yuGA+bTW1nraQYYC3D74fEgKVL9bVh1Ijqf eWuA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1710429864; x=1711034664; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=UC/JTb5/el0zq5fPOBPWkuJ8boNZcgw6JdBjsjQkQVo=; b=lwqgXD1XlpTimIlFSkzYhsASnpuNdR9V0Ka57TJk1vM0U2mTC3jZ7b3GC/qucOAFFi 3QRVrQ5pCXrteYyhDWvEsfOLMsVUmo5xUANv/oUkMD7VyOjTctcJAuCw396PBTSoTiuu aMxT1iyfeB2F2IV5ck4RMgC2MnaxQozgl+gv5XmdiqlWD06A69fUAGHtnxA2PxYs0zOk XsyJkp6M3GcaCDH8WrJSOhI7lRGGU9RDT/zl9ys9X9rfffeCJVClkHRc6Nek7A+MwGPD lLfDNkpyc/Fj01d/d+K8wYztocEQyqxESqq3eR6ZAJ8vWPlUbVCtQIB4GWY6XMWbrAo2 YFMA== X-Forwarded-Encrypted: i=1; AJvYcCWfuGW69RFYU8HIWaVAVtUFGkbs3ILk0napvCiKkDsWvB8Ou/+bMFbP1JMeIk/sW4LFJvAQYW4nWVQU+4C4fy0Ey2GntkFgzraEtrUoGQ== X-Gm-Message-State: AOJu0YzidUDRDN11qGs32K32KZv5tRkrRxSEi1cpsl9rYetjkfPsSSY0 hYnmFSZmTm01YDfMJSnMLHeCkQcoScAvrSlSikVOCIGDw8Z3mzIx9ybVfwlbjQ== X-Google-Smtp-Source: AGHT+IEvaMb+kq/9lTqNU5RsDY6HF44EQNDk3hWuMaLlsYMMXmYN4cL3/H6gm79wueLO7Uah/GddRw== X-Received: by 2002:a05:6359:4595:b0:17b:f721:4565 with SMTP id no21-20020a056359459500b0017bf7214565mr2583482rwb.9.1710429864237; Thu, 14 Mar 2024 08:24:24 -0700 (PDT) Received: from [127.0.1.1] ([117.207.30.211]) by smtp.gmail.com with ESMTPSA id m4-20020a63ed44000000b005e438ea2a5asm824021pgk.53.2024.03.14.08.24.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 14 Mar 2024 08:24:23 -0700 (PDT) From: Manivannan Sadhasivam Date: Thu, 14 Mar 2024 20:53:43 +0530 Subject: [PATCH 04/11] PCI: epf-test: Refactor pci_epf_test_unbind() function Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240314-pci-epf-rework-v1-4-6134e6c1d491@linaro.org> References: <20240314-pci-epf-rework-v1-0-6134e6c1d491@linaro.org> In-Reply-To: <20240314-pci-epf-rework-v1-0-6134e6c1d491@linaro.org> To: Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Rob Herring , Bjorn Helgaas , Kishon Vijay Abraham I , Thierry Reding , Jonathan Hunter , Jingoo Han , Gustavo Pimentel Cc: linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, mhi@lists.linux.dev, linux-tegra@vger.kernel.org, Manivannan Sadhasivam X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=3251; i=manivannan.sadhasivam@linaro.org; h=from:subject:message-id; bh=DtlRqv5F0Ytl0/lk4U3qf6wbQNKU/3llSWJh3kC84BI=; b=owEBbQGS/pANAwAKAVWfEeb+kc71AcsmYgBl8xaPAyz+988uZe7rmcr+FE4mObQJvWgDMjtPA pAtrbNOuvGJATMEAAEKAB0WIQRnpUMqgUjL2KRYJ5dVnxHm/pHO9QUCZfMWjwAKCRBVnxHm/pHO 9eAoCACI5/CJ9PWdvD+VU8d2Gn0KeJ6lsXgzuOnuu7+hCl2uaapddhtT3FSiPt8UOBMPW32QezH voUagEwTlRqpJMy0UkgnEoq1kMK6xbhDLeY6hIGR6RnSxfEm1gRiD3gLtV0rNnktVnLxUdRPmJM zdTyuxOgUqqzpQ6MNumI/x1yw0WQfuKiw+upojxa1/FiXJ7M/sel6J9BNXwlAhajWItXWqbTXgR Bkh3Uxczc4c3Tzhsw2aMUMYM6nV88U3neL+jQQirLKOI3T/vE/WJwgdtlZla9fhFgM0Qj4iJ7JP YnzT7vSyoFTjsesiBTM7ZgqPwTUSfCATX++DwyKM1V80BZSB X-Developer-Key: i=manivannan.sadhasivam@linaro.org; a=openpgp; fpr=C668AEC3C3188E4C611465E7488550E901166008 Move the pci_epc_clear_bar() and pci_epf_free_space() code to respective helper functions. This allows reusing the helpers in future commits. This also requires moving the pci_epf_test_unbind() definition below pci_epf_test_bind() to avoid forward declaration of the above helpers. No functional change. Signed-off-by: Manivannan Sadhasivam Reviewed-by: Niklas Cassel --- drivers/pci/endpoint/functions/pci-epf-test.c | 63 ++++++++++++++++++--------- 1 file changed, 42 insertions(+), 21 deletions(-) diff --git a/drivers/pci/endpoint/functions/pci-epf-test.c b/drivers/pci/endpoint/functions/pci-epf-test.c index 1dae0fce8fc4..2fac36553633 100644 --- a/drivers/pci/endpoint/functions/pci-epf-test.c +++ b/drivers/pci/endpoint/functions/pci-epf-test.c @@ -686,27 +686,6 @@ static void pci_epf_test_cmd_handler(struct work_struct *work) msecs_to_jiffies(1)); } -static void pci_epf_test_unbind(struct pci_epf *epf) -{ - struct pci_epf_test *epf_test = epf_get_drvdata(epf); - struct pci_epc *epc = epf->epc; - struct pci_epf_bar *epf_bar; - int bar; - - cancel_delayed_work(&epf_test->cmd_handler); - pci_epf_test_clean_dma_chan(epf_test); - for (bar = 0; bar < PCI_STD_NUM_BARS; bar++) { - epf_bar = &epf->bar[bar]; - - if (epf_test->reg[bar]) { - pci_epc_clear_bar(epc, epf->func_no, epf->vfunc_no, - epf_bar); - pci_epf_free_space(epf, epf_test->reg[bar], bar, - PRIMARY_INTERFACE); - } - } -} - static int pci_epf_test_set_bar(struct pci_epf *epf) { int bar, add; @@ -746,6 +725,22 @@ static int pci_epf_test_set_bar(struct pci_epf *epf) return 0; } +static void pci_epf_test_clear_bar(struct pci_epf *epf) +{ + struct pci_epf_test *epf_test = epf_get_drvdata(epf); + struct pci_epc *epc = epf->epc; + struct pci_epf_bar *epf_bar; + int bar; + + for (bar = 0; bar < PCI_STD_NUM_BARS; bar++) { + epf_bar = &epf->bar[bar]; + + if (epf_test->reg[bar]) + pci_epc_clear_bar(epc, epf->func_no, epf->vfunc_no, + epf_bar); + } +} + static int pci_epf_test_epc_init(struct pci_epf *epf) { struct pci_epf_test *epf_test = epf_get_drvdata(epf); @@ -885,6 +880,22 @@ static int pci_epf_test_alloc_space(struct pci_epf *epf) return 0; } +static void pci_epf_test_free_space(struct pci_epf *epf) +{ + struct pci_epf_test *epf_test = epf_get_drvdata(epf); + struct pci_epf_bar *epf_bar; + int bar; + + for (bar = 0; bar < PCI_STD_NUM_BARS; bar++) { + epf_bar = &epf->bar[bar]; + + if (epf_test->reg[bar]) { + pci_epf_free_space(epf, epf_test->reg[bar], bar, + PRIMARY_INTERFACE); + } + } +} + static void pci_epf_configure_bar(struct pci_epf *epf, const struct pci_epc_features *epc_features) { @@ -940,6 +951,16 @@ static int pci_epf_test_bind(struct pci_epf *epf) return 0; } +static void pci_epf_test_unbind(struct pci_epf *epf) +{ + struct pci_epf_test *epf_test = epf_get_drvdata(epf); + + cancel_delayed_work(&epf_test->cmd_handler); + pci_epf_test_clean_dma_chan(epf_test); + pci_epf_test_clear_bar(epf); + pci_epf_test_free_space(epf); +} + static const struct pci_epf_device_id pci_epf_test_ids[] = { { .name = "pci_epf_test", From patchwork Thu Mar 14 15:23:44 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 13592537 Received: from mail-pf1-f179.google.com (mail-pf1-f179.google.com [209.85.210.179]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8BC457441C for ; Thu, 14 Mar 2024 15:24:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.210.179 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1710429871; cv=none; b=qPs7iBQeMZnbWNBSyH9WNZn8Wy4nwPwpV3WuCmCE5Fx91lHIpPiSe8wvd5RaDOt2n1Xus76aw0op9SDutxAoa0gHjvht/4Pb8XI3T4Qr10FOsdWRiIMWZtAVjNTkiq0Yei9G0NMPDyrTcgG9qkES2ns0ERxH6pguYP3QtNFm7lk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1710429871; c=relaxed/simple; bh=CBpicfl2jZnCC76RyM7G2pppIecHVAKp449ulgCHbMc=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=HZjyetyA0CYqirtib6auiiXG6FBqwse/6gjut5eSvMAFsuwO/hQj/vTwGNY54c/vQpHi4LG0cPeAACB+Mnji6W8bkPBZi9h20RO6Sni7Fp9VuymaTchGVZsK64foEG8B7X/FjninazZBLCG9XtpOvTYfTsNJfVuqEpButTQi93Q= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=zPVX3J8h; arc=none smtp.client-ip=209.85.210.179 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="zPVX3J8h" Received: by mail-pf1-f179.google.com with SMTP id d2e1a72fcca58-6e6ca3fc613so931950b3a.3 for ; Thu, 14 Mar 2024 08:24:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1710429869; x=1711034669; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=8ZKNFv7W+z0Jmquv6Bh6TAujvuXFvLOzGspkZq/gQ/k=; b=zPVX3J8h6vPKSRPl40agelBQeWxJ1a8pQr4C7zcM0XmyOo9cWCxS4Osw8cYKGPB5g3 Q/gWt0z1aBTPzpSjLmgHKUhlpqFvdKT2r19q5QTu/uHl78DiIVI3mOPdtSyNXCques6u QoGuslG4fKkQHjq2vCnFwLQMM1v1hLbPaE2yqRVLUrxuMJcl85dvRTTp3Eq55KMmQqcp RyAgfjqfMaraygeWfCFg+jALHiL2qNyN0EBkbHoQdA0BlFSd7k3eOukhOE1L3TBbgalV P+1yNeloa3HYfouNP+VPgZy3u1yJnO6jHN/D77jw4Hnqq2eKxUHny1JuEIqL45n6ccIF YyGw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1710429869; x=1711034669; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=8ZKNFv7W+z0Jmquv6Bh6TAujvuXFvLOzGspkZq/gQ/k=; b=GIQ+tgliwCSuQ0eE1HDJndHWhXQMI9Xs4JgSLCqoReyj3Jf+assFPqGFXwgqgCOIAT L3hhP7nRqPZS2iX1ekMDR54HQPByMC4tpONNnV79GnDKWYc7JVMsQr4KD7cPltPLBrnz zSRjL6vZpFbaY1BFul7QGVHMvCPKJRc0g06nGgQgcJ/d7F/GMfa+iol3gCZeYOADKMJw 8ROdgUfwaDx/E+Y7YK0CwN+SfN5FzKvluZmh0136RePT28YdADiJlSnzZ4QDeFrCbeiU p06adoVyY/ChSQJoMbT9k9d1zjpVo5JXv35JdMlqR+Iuz6lUMTL6YGHOu2XLxWriLs31 zm9Q== X-Forwarded-Encrypted: i=1; AJvYcCW9U3nM4pq5/X3dZ7absx7zqYUFISgmREEUV9IrGA8icRAiYDs/4/NEH8uMHqcdcDxJxiFfG+pTEtb7nfTxvyf7NxqXhXrEg7S+EHt3cw== X-Gm-Message-State: AOJu0YwEIydF7IY1d1y5WWicLJStxI1fkXz8Apr1wQp3r5s3xrK77daZ sVjTD+3E9ZtNIK/SNdHdTyDtLlzFLF9nvuGnGuEbkg0pQMrkTxhYnSsBZUp2fw== X-Google-Smtp-Source: AGHT+IF66n5aH76Dwfjq/9Zk53tqHbvE+/63K2G3MyytOYMIznHuwCihGVuqIpBwIw1J3oOM+HPzWg== X-Received: by 2002:a05:6a20:12d5:b0:1a1:8c2f:39d7 with SMTP id v21-20020a056a2012d500b001a18c2f39d7mr465209pzg.34.1710429868800; Thu, 14 Mar 2024 08:24:28 -0700 (PDT) Received: from [127.0.1.1] ([117.207.30.211]) by smtp.gmail.com with ESMTPSA id m4-20020a63ed44000000b005e438ea2a5asm824021pgk.53.2024.03.14.08.24.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 14 Mar 2024 08:24:28 -0700 (PDT) From: Manivannan Sadhasivam Date: Thu, 14 Mar 2024 20:53:44 +0530 Subject: [PATCH 05/11] PCI: epf-{mhi/test}: Move DMA initialization to EPC init callback Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240314-pci-epf-rework-v1-5-6134e6c1d491@linaro.org> References: <20240314-pci-epf-rework-v1-0-6134e6c1d491@linaro.org> In-Reply-To: <20240314-pci-epf-rework-v1-0-6134e6c1d491@linaro.org> To: Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Rob Herring , Bjorn Helgaas , Kishon Vijay Abraham I , Thierry Reding , Jonathan Hunter , Jingoo Han , Gustavo Pimentel Cc: linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, mhi@lists.linux.dev, linux-tegra@vger.kernel.org, Manivannan Sadhasivam X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=2468; i=manivannan.sadhasivam@linaro.org; h=from:subject:message-id; bh=CBpicfl2jZnCC76RyM7G2pppIecHVAKp449ulgCHbMc=; b=owEBbQGS/pANAwAKAVWfEeb+kc71AcsmYgBl8xaP+o8zfBr0UizIqcxCHqrxTSXAATyIlsJwT F6IqVxYZHeJATMEAAEKAB0WIQRnpUMqgUjL2KRYJ5dVnxHm/pHO9QUCZfMWjwAKCRBVnxHm/pHO 9TJPB/9+jDVZAzNzQ64Fun9kiNXglbqEvRtb92z/JqLw9+ncYlfS3fJEf98CKNoFgGr6bDjyT9C kK6apBbEDwcNZ2WIi5QGuvdXuU7aVl/pP3+qkOlNSvWdBuxMvfcJZieT794IBIpvrUwVcf6/l/5 KvFbJlU8lNGlsVsX93cr/vWPtE0f3zNv+C0tIdesuuPz/6jynH7Ib78QbuagPs7sHzLxB33uIC9 ZeJ0qDsORVdgZOUqroJ8nqIsepuYBIKq3c5gkyGj+jHDZlrREvJT+YQDuxCAoUCasTmtFmMTesO 7GU9Rn5mXuGwvyVlF6EaE+/8SWzr/xb/wGWDiS6lZIoZy5N0 X-Developer-Key: i=manivannan.sadhasivam@linaro.org; a=openpgp; fpr=C668AEC3C3188E4C611465E7488550E901166008 To maintain uniformity across EPF drivers, let's move the DMA initialization to EPC init callback. This will also allow us to deinit DMA during PERST# assert in the further commits. For EPC drivers without PERST#, DMA deinit will only happen during driver unbind. Signed-off-by: Manivannan Sadhasivam Reviewed-by: Niklas Cassel --- drivers/pci/endpoint/functions/pci-epf-mhi.c | 16 ++++++++-------- drivers/pci/endpoint/functions/pci-epf-test.c | 12 ++++++------ 2 files changed, 14 insertions(+), 14 deletions(-) diff --git a/drivers/pci/endpoint/functions/pci-epf-mhi.c b/drivers/pci/endpoint/functions/pci-epf-mhi.c index da894a9a447e..4e4300efd9d7 100644 --- a/drivers/pci/endpoint/functions/pci-epf-mhi.c +++ b/drivers/pci/endpoint/functions/pci-epf-mhi.c @@ -737,6 +737,14 @@ static int pci_epf_mhi_epc_init(struct pci_epf *epf) if (!epf_mhi->epc_features) return -ENODATA; + if (info->flags & MHI_EPF_USE_DMA) { + ret = pci_epf_mhi_dma_init(epf_mhi); + if (ret) { + dev_err(dev, "Failed to initialize DMA: %d\n", ret); + return ret; + } + } + return 0; } @@ -749,14 +757,6 @@ static int pci_epf_mhi_link_up(struct pci_epf *epf) struct device *dev = &epf->dev; int ret; - if (info->flags & MHI_EPF_USE_DMA) { - ret = pci_epf_mhi_dma_init(epf_mhi); - if (ret) { - dev_err(dev, "Failed to initialize DMA: %d\n", ret); - return ret; - } - } - mhi_cntrl->mmio = epf_mhi->mmio; mhi_cntrl->irq = epf_mhi->irq; mhi_cntrl->mru = info->mru; diff --git a/drivers/pci/endpoint/functions/pci-epf-test.c b/drivers/pci/endpoint/functions/pci-epf-test.c index 2fac36553633..8f1e0cb08814 100644 --- a/drivers/pci/endpoint/functions/pci-epf-test.c +++ b/drivers/pci/endpoint/functions/pci-epf-test.c @@ -753,6 +753,12 @@ static int pci_epf_test_epc_init(struct pci_epf *epf) bool msi_capable = true; int ret; + epf_test->dma_supported = true; + + ret = pci_epf_test_init_dma_chan(epf_test); + if (ret) + epf_test->dma_supported = false; + epc_features = pci_epc_get_features(epc, epf->func_no, epf->vfunc_no); if (epc_features) { msix_capable = epc_features->msix_capable; @@ -942,12 +948,6 @@ static int pci_epf_test_bind(struct pci_epf *epf) if (ret) return ret; - epf_test->dma_supported = true; - - ret = pci_epf_test_init_dma_chan(epf_test); - if (ret) - epf_test->dma_supported = false; - return 0; } From patchwork Thu Mar 14 15:23:45 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 13592538 Received: from mail-pf1-f177.google.com (mail-pf1-f177.google.com [209.85.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3604C74434 for ; Thu, 14 Mar 2024 15:24:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.210.177 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1710429877; cv=none; b=edAWWJECDuR3mfoDjkRabXfAhSy7ByY8RIoYPgPdetUNiq7SjUyrlKS8D7arRyIErzGgR14RhTMqirhf7LzjaZmF5qWHI8FuaBmsg2cv5o+9hDXD/oZr3tlrS/OF0PfkfLlSzpLz6Pi3K6xCjXo+d3Xt+/VF24A1u+fyqDOLjig= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1710429877; c=relaxed/simple; bh=jPWxbt2riSZi/maNAnphcN1RYR8qq0h5e3Zov+Lvc4c=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=c5Hpu4E0MZHoakI/I86nOhwj39zycHK9wfmMN/TmJJFT23KJmVB01zJqek2BR5wJIzuv63GYTev2aSgHoC6+ylsxcD0+UK1je8yaKlKxxwtTJNMpwLT64ACq4Y2tBzQX9n4eT3Ej+oxe2qN+9j6+Vl2qkg38OGFesdmajdwB9Wg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=j+RXbK/E; arc=none smtp.client-ip=209.85.210.177 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="j+RXbK/E" Received: by mail-pf1-f177.google.com with SMTP id d2e1a72fcca58-6e6c8b1ccd7so908762b3a.0 for ; Thu, 14 Mar 2024 08:24:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1710429874; x=1711034674; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=IB98vAalShqJmV5WrujsdZwwSuhli1Awn07UHR7DaIg=; b=j+RXbK/EXLjEiIUrjnIYhLVDu5CKIXzlas81nYptC+Puqi6FU38pLUBkYa8Nja0i/U 9sKcVKdH96DS6CsD8LUf2WPhY9ncf1gbn/xwC4aQP7ZVZla4QzVMFjVkFF6Uhv4LjKK+ EeVYWl0X6q86cDR8s8xUSZxp0YKwLi3u2hZ4RA3ohGt4V6aDzng+VtbNqcZGscHCckZW H5Mm/ADRUdl/07+OZoWkW1JaRWYl4mo17A3SdCvkuZko/voQ5MzGXPndeRpS4e9STv0z IihdcSSCS2wb2bwSEPq1kPXD2w+ZlzGFMDR00oGTFmSIgBnYrDIpCjKWkb8Oc/0XX/i8 xL6g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1710429874; x=1711034674; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=IB98vAalShqJmV5WrujsdZwwSuhli1Awn07UHR7DaIg=; b=IMqIbOnq0hYCkDw6SPQHFFjRs8CuPs/1dINaNts2T7eUvGMHBUmFxrg45doAzIcDKe RVguedGNtOGLrQ9P8XqFNXaODhJkEn2VVP5NESVs0GBegenKNhXzXsDI3YDx16zSIk9A ioW54CPjRUwqrFO5Bot1aDRrbtlVVu9oXsh07Bv/YbuV5+ELq1/UydibZSSkXfd650i4 wCh481qoMdUE8BHF4x+SOJgv7351TJb3LE2CvGIu+DDy36/qrBgahuD1LBJps/AjILOY 2NjiInkrPWp9tSTX8/XrtUDt+Wv02AWdofcesOrfQFD6GonDjMP5AtHnk10xQSPapXnZ N0PQ== X-Forwarded-Encrypted: i=1; AJvYcCV3E2sCHtj2MWhy+m9LnkT+rOKUIwgkQyXeG1uvfPK/yrj1d7/QPf9VfeN+VSgQqXNoKABqAATVZt7hohhxdCgMrDapnsjrovPPXA/6Fg== X-Gm-Message-State: AOJu0YyDGtkZJcJp0V+hi6BHy0WPuYk+ZvE32SoPGgZVlwywv0sYyQ8F JwTc47Yn8Wn4hpnXpN8VOP7mjqiO9C9lkdptUaYHMKc0WG7V0Siv33ionwsl1A== X-Google-Smtp-Source: AGHT+IFLvyvRjqJy6MhH7It5vtHW587K1JS6nFI9paLdFKRoNb2Tbu2X7sMT/Eiq1P2IPfI7veImaw== X-Received: by 2002:a05:6a00:1489:b0:6e4:cf7c:6c28 with SMTP id v9-20020a056a00148900b006e4cf7c6c28mr544980pfu.22.1710429873143; Thu, 14 Mar 2024 08:24:33 -0700 (PDT) Received: from [127.0.1.1] ([117.207.30.211]) by smtp.gmail.com with ESMTPSA id m4-20020a63ed44000000b005e438ea2a5asm824021pgk.53.2024.03.14.08.24.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 14 Mar 2024 08:24:32 -0700 (PDT) From: Manivannan Sadhasivam Date: Thu, 14 Mar 2024 20:53:45 +0530 Subject: [PATCH 06/11] PCI: endpoint: Introduce EPC 'deinit' event and notify the EPF drivers Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240314-pci-epf-rework-v1-6-6134e6c1d491@linaro.org> References: <20240314-pci-epf-rework-v1-0-6134e6c1d491@linaro.org> In-Reply-To: <20240314-pci-epf-rework-v1-0-6134e6c1d491@linaro.org> To: Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Rob Herring , Bjorn Helgaas , Kishon Vijay Abraham I , Thierry Reding , Jonathan Hunter , Jingoo Han , Gustavo Pimentel Cc: linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, mhi@lists.linux.dev, linux-tegra@vger.kernel.org, Manivannan Sadhasivam X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=7829; i=manivannan.sadhasivam@linaro.org; h=from:subject:message-id; bh=jPWxbt2riSZi/maNAnphcN1RYR8qq0h5e3Zov+Lvc4c=; b=owEBbQGS/pANAwAKAVWfEeb+kc71AcsmYgBl8xaP/ckGOJIy8V7WIDvqEwd3+feRz3R2gye47 WRDQmlp476JATMEAAEKAB0WIQRnpUMqgUjL2KRYJ5dVnxHm/pHO9QUCZfMWjwAKCRBVnxHm/pHO 9UKGB/9nju5m6oFvoV1OrjsN0LzD+q0w87oLvJPxvWMupLaxgAofU7VBZLLp1Hf5bFwQa+rUPss weEl454L4h+sFLOc+BR3WRYVY5dJ8g55CQoPzpLY4wsTb69U11jO7dscLhssC/D3EDy9o3o61w9 3icSgiuy/ZiGwVsovTud36jvLnKe/moXnJvsvUokMP63553MNlDTkmSe5xdX4Yq7LbxwzFwJ606 8YnnwoAU/heHoo9o4RAyyTtTb0sm0eGiun8wYS+dHlnnWGS6dYgFIEbUX7qaND8jj+QByHquz82 USNDs12u9yaTA0fyqVXqRjOHSnBmmdSTCyEinPHVZ5qD8jIv X-Developer-Key: i=manivannan.sadhasivam@linaro.org; a=openpgp; fpr=C668AEC3C3188E4C611465E7488550E901166008 As like the EPC 'init' event, that is used to signal the EPF drivers about the EPC initialization, let's introduce 'deinit' event that is used to signal EPC deinitialization. The EPC deinitialization applies only when any sort of fundamental reset is supported by the endpoint controller as per the PCIe spec. Reference: PCIe Base spec v5.0, sections 4.2.4.9.1 and 6.6.1. Currently, some EPC drivers like pcie-qcom-ep and pcie-tegra194 support PERST# as the fundamental reset. So the 'deinit' event will be notified to the EPF drivers when PERST# assert happens in the above mentioned EPC drivers. The EPF drivers, on receiving the event through the deinit() callback should reset the EPF state machine and also cleanup any configuration that got affected by the fundamental reset like BAR, DMA etc... This change also warrants skipping the cleanups in unbind() if already done in deinit(). Signed-off-by: Manivannan Sadhasivam Reviewed-by: Niklas Cassel --- drivers/pci/controller/dwc/pcie-qcom-ep.c | 1 + drivers/pci/controller/dwc/pcie-tegra194.c | 1 + drivers/pci/endpoint/functions/pci-epf-mhi.c | 19 +++++++++++++++++++ drivers/pci/endpoint/functions/pci-epf-test.c | 17 +++++++++++++++-- drivers/pci/endpoint/pci-epc-core.c | 25 +++++++++++++++++++++++++ include/linux/pci-epc.h | 1 + include/linux/pci-epf.h | 2 ++ 7 files changed, 64 insertions(+), 2 deletions(-) diff --git a/drivers/pci/controller/dwc/pcie-qcom-ep.c b/drivers/pci/controller/dwc/pcie-qcom-ep.c index 50b1635e3cbb..e4b742355d57 100644 --- a/drivers/pci/controller/dwc/pcie-qcom-ep.c +++ b/drivers/pci/controller/dwc/pcie-qcom-ep.c @@ -501,6 +501,7 @@ static void qcom_pcie_perst_assert(struct dw_pcie *pci) { struct qcom_pcie_ep *pcie_ep = to_pcie_ep(pci); + pci_epc_deinit_notify(pci->ep.epc); dw_pcie_ep_cleanup(&pci->ep); qcom_pcie_disable_resources(pcie_ep); pcie_ep->link_status = QCOM_PCIE_EP_LINK_DISABLED; diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c index e02deb31a72d..3e6e08b321fb 100644 --- a/drivers/pci/controller/dwc/pcie-tegra194.c +++ b/drivers/pci/controller/dwc/pcie-tegra194.c @@ -1715,6 +1715,7 @@ static void pex_ep_event_pex_rst_assert(struct tegra_pcie_dw *pcie) if (ret) dev_err(pcie->dev, "Failed to go Detect state: %d\n", ret); + pci_epc_deinit_notify(pcie->pci.ep.epc); dw_pcie_ep_cleanup(&pcie->pci.ep); reset_control_assert(pcie->core_rst); diff --git a/drivers/pci/endpoint/functions/pci-epf-mhi.c b/drivers/pci/endpoint/functions/pci-epf-mhi.c index 4e4300efd9d7..83de96119718 100644 --- a/drivers/pci/endpoint/functions/pci-epf-mhi.c +++ b/drivers/pci/endpoint/functions/pci-epf-mhi.c @@ -748,6 +748,24 @@ static int pci_epf_mhi_epc_init(struct pci_epf *epf) return 0; } +static void pci_epf_mhi_epc_deinit(struct pci_epf *epf) +{ + struct pci_epf_mhi *epf_mhi = epf_get_drvdata(epf); + const struct pci_epf_mhi_ep_info *info = epf_mhi->info; + struct pci_epf_bar *epf_bar = &epf->bar[info->bar_num]; + struct mhi_ep_cntrl *mhi_cntrl = &epf_mhi->mhi_cntrl; + struct pci_epc *epc = epf->epc; + + if (mhi_cntrl->mhi_dev) { + mhi_ep_power_down(mhi_cntrl); + if (info->flags & MHI_EPF_USE_DMA) + pci_epf_mhi_dma_deinit(epf_mhi); + mhi_ep_unregister_controller(mhi_cntrl); + } + + pci_epc_clear_bar(epc, epf->func_no, epf->vfunc_no, epf_bar); +} + static int pci_epf_mhi_link_up(struct pci_epf *epf) { struct pci_epf_mhi *epf_mhi = epf_get_drvdata(epf); @@ -882,6 +900,7 @@ static void pci_epf_mhi_unbind(struct pci_epf *epf) static const struct pci_epc_event_ops pci_epf_mhi_epc_event_ops = { .init = pci_epf_mhi_epc_init, + .deinit = pci_epf_mhi_epc_deinit, }; static const struct pci_epc_bus_event_ops pci_epf_mhi_bus_event_ops = { diff --git a/drivers/pci/endpoint/functions/pci-epf-test.c b/drivers/pci/endpoint/functions/pci-epf-test.c index 8f1e0cb08814..84cd47ebac22 100644 --- a/drivers/pci/endpoint/functions/pci-epf-test.c +++ b/drivers/pci/endpoint/functions/pci-epf-test.c @@ -804,6 +804,15 @@ static int pci_epf_test_epc_init(struct pci_epf *epf) return 0; } +static void pci_epf_test_epc_deinit(struct pci_epf *epf) +{ + struct pci_epf_test *epf_test = epf_get_drvdata(epf); + + cancel_delayed_work(&epf_test->cmd_handler); + pci_epf_test_clean_dma_chan(epf_test); + pci_epf_test_clear_bar(epf); +} + static int pci_epf_test_link_up(struct pci_epf *epf) { struct pci_epf_test *epf_test = epf_get_drvdata(epf); @@ -816,6 +825,7 @@ static int pci_epf_test_link_up(struct pci_epf *epf) static const struct pci_epc_event_ops pci_epf_test_epc_event_ops = { .init = pci_epf_test_epc_init, + .deinit = pci_epf_test_epc_deinit, }; static const struct pci_epc_bus_event_ops pci_epf_test_bus_event_ops = { @@ -954,10 +964,13 @@ static int pci_epf_test_bind(struct pci_epf *epf) static void pci_epf_test_unbind(struct pci_epf *epf) { struct pci_epf_test *epf_test = epf_get_drvdata(epf); + struct pci_epc *epc = epf->epc; cancel_delayed_work(&epf_test->cmd_handler); - pci_epf_test_clean_dma_chan(epf_test); - pci_epf_test_clear_bar(epf); + if (epc->init_complete) { + pci_epf_test_clean_dma_chan(epf_test); + pci_epf_test_clear_bar(epf); + } pci_epf_test_free_space(epf); } diff --git a/drivers/pci/endpoint/pci-epc-core.c b/drivers/pci/endpoint/pci-epc-core.c index 5a522b2842e2..26378a9a56a7 100644 --- a/drivers/pci/endpoint/pci-epc-core.c +++ b/drivers/pci/endpoint/pci-epc-core.c @@ -779,6 +779,31 @@ void pci_epc_notify_pending_init(struct pci_epc *epc, struct pci_epf *epf) } EXPORT_SYMBOL_GPL(pci_epc_notify_pending_init); +/** + * pci_epc_deinit_notify() - Notify the EPF device about EPC deinitialization + * @epc: the EPC device whose deinitialization is completed + * + * Invoke to notify the EPF device that the EPC deinitialization is completed. + */ +void pci_epc_deinit_notify(struct pci_epc *epc) +{ + struct pci_epf *epf; + + if (IS_ERR_OR_NULL(epc)) + return; + + mutex_lock(&epc->list_lock); + list_for_each_entry(epf, &epc->pci_epf, list) { + mutex_lock(&epf->lock); + if (epf->epc_event_ops && epf->epc_event_ops->deinit) + epf->epc_event_ops->deinit(epf); + mutex_unlock(&epf->lock); + } + epc->init_complete = false; + mutex_unlock(&epc->list_lock); +} +EXPORT_SYMBOL_GPL(pci_epc_deinit_notify); + /** * pci_epc_bme_notify() - Notify the EPF device that the EPC device has received * the BME event from the Root complex diff --git a/include/linux/pci-epc.h b/include/linux/pci-epc.h index adee6dbe4e45..976b2212e872 100644 --- a/include/linux/pci-epc.h +++ b/include/linux/pci-epc.h @@ -199,6 +199,7 @@ void pci_epc_linkup(struct pci_epc *epc); void pci_epc_linkdown(struct pci_epc *epc); void pci_epc_init_notify(struct pci_epc *epc); void pci_epc_notify_pending_init(struct pci_epc *epc, struct pci_epf *epf); +void pci_epc_deinit_notify(struct pci_epc *epc); void pci_epc_bme_notify(struct pci_epc *epc); void pci_epc_remove_epf(struct pci_epc *epc, struct pci_epf *epf, enum pci_epc_interface_type type); diff --git a/include/linux/pci-epf.h b/include/linux/pci-epf.h index ff8304e72f8e..52f69eaf505d 100644 --- a/include/linux/pci-epf.h +++ b/include/linux/pci-epf.h @@ -70,9 +70,11 @@ struct pci_epf_ops { /** * struct pci_epc_event_ops - Callbacks for capturing the EPC specific events * @init: Callback for the EPC initialization event + * @deinit: Callback for the EPC deinitialization event */ struct pci_epc_event_ops { int (*init)(struct pci_epf *epf); + void (*deinit)(struct pci_epf *epf); }; /** From patchwork Thu Mar 14 15:23:46 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 13592539 Received: from mail-pf1-f182.google.com (mail-pf1-f182.google.com [209.85.210.182]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6962E745DC for ; Thu, 14 Mar 2024 15:24:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.210.182 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1710429881; cv=none; b=VS15gFezF3zxBiwhLTLSrFE2AXcs6xFUsI4iEsORpSO5Rn2uqv5fDpxuwCqHPsdjmTAINLrgpKv+2jn5aWI9WgGgwqX03gD0EcLaSYGBqRBdr87mrbFjXk32yVy8B6Cnyvvyjw9tEILbGhKHypd9HpCgDitEY5ZAvsdDtb6J5/o= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1710429881; c=relaxed/simple; bh=VIhM1SwpvHKiQIt6fbXoqrPwWzSD6KDDn6A+YzkG9es=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=XV4X96qJExdIQ75gFKTZpgMhM05+OPKdy26Rb+qAChQrduI4xERXi7KiZLhaCxIrG5hk4njL/G3K9waQR+r1Utj/cwBEfS/QvyWvrHtEPKLnSF6Be0rEnEaHgtal1Rv0OlX96xLAOxzpODZJtgmjyU539IUZhfkv6lgLci6WyfI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=mEzzEoCa; arc=none smtp.client-ip=209.85.210.182 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="mEzzEoCa" Received: by mail-pf1-f182.google.com with SMTP id d2e1a72fcca58-6e6a9fafacdso949541b3a.2 for ; Thu, 14 Mar 2024 08:24:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1710429878; x=1711034678; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=i+1EDsXsf+K7qsHNtt8lSB5yG8fUoLJEBKbvpIYhu80=; b=mEzzEoCa5d4RajdpZCnLrF5z/CA3bzH+ykZtHy3Dj7kb77DOZepWne37NCOvIzteVR 72OFznE98gRZCH7WaHBHRdiHsSixi2j/Hzey9AQ/bx6o3K1dls9Ap45K5F09trApuXcm JZPm1u8CFLLcoM0//ejut4dgPU8VQnOqu/53BHDZdrNpOLUDrc3XdLrh1Giml9iGfdz1 mp4ZDslWkEJYbHbWS38SzzUbP+FB0o/wUVHLhBvw+J3HszJxA5rTddXL4jwSYSbqswvD LSz+hqxYgMfQO7AOxLFpL50+YdsAXxokMLC74uhcr7hALNFq0RLn9UCrubRlCx1GXKRI fzQg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1710429878; x=1711034678; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=i+1EDsXsf+K7qsHNtt8lSB5yG8fUoLJEBKbvpIYhu80=; b=GtisGps3JzSm7OQW1f8wInPhqgBmEthgwVZZYfWEwJtfI0Hr6MURc+BF23lkC8A6x2 RXbRCWLryUztOlxq+/MzClmbHPbE/oGke7UZA7K4NbB8R02Ial065Z20BA079ac54bKL J2EVsJKx7RB4YdqB16pszprj9ROYvT9E501bNJzK6H0xP+ae7X15bEldekUzl6akW3YU 8GJSuoNoOG293YWKdXLFF0AT/YWmMhh2FWXYzkOB5l7GsQVTGgQsmUsuDHoV5ytpUgtm PGDD8aNP8RDIkxQHRF4AQnKY2rgSQuyTv+1NN3hrP7PQFVkbAZFkktv0N89FBvYw6nTb v6ZQ== X-Forwarded-Encrypted: i=1; AJvYcCVSWIBkkFDJZf5V+9FARwsFf081I94mSPQ6BBnTi+hmb7h7wPmbaaZEQ9CKqNDJ1Ap+UJuWXO1Ep9K43OIg/VF4rBXn7iJVQgj8N4CeHA== X-Gm-Message-State: AOJu0Yx7h75K6Vk/tRA+r9sjzjAu9oSQmJ7P1vlJzDjFInhOXm3a/YMM TwjkC9Fm2cA/trs/gq/mQBfGJN4DugIUPrP3dC8cL1rCDbM7A6t8BfU6l2yFyjJ2bdXELW1UGkE = X-Google-Smtp-Source: AGHT+IHoLB0wNaD/TQQxaVTbwCg0im3uKyRHP4gFVLzEzVwpoWWp9ZBksYQVG4r0KJYAhdjPsuz3iQ== X-Received: by 2002:a05:6a20:bb05:b0:1a1:876a:9cce with SMTP id fc5-20020a056a20bb0500b001a1876a9ccemr341455pzb.42.1710429877636; Thu, 14 Mar 2024 08:24:37 -0700 (PDT) Received: from [127.0.1.1] ([117.207.30.211]) by smtp.gmail.com with ESMTPSA id m4-20020a63ed44000000b005e438ea2a5asm824021pgk.53.2024.03.14.08.24.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 14 Mar 2024 08:24:37 -0700 (PDT) From: Manivannan Sadhasivam Date: Thu, 14 Mar 2024 20:53:46 +0530 Subject: [PATCH 07/11] PCI: dwc: ep: Add a generic dw_pcie_ep_linkdown() API to handle Link Down event Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240314-pci-epf-rework-v1-7-6134e6c1d491@linaro.org> References: <20240314-pci-epf-rework-v1-0-6134e6c1d491@linaro.org> In-Reply-To: <20240314-pci-epf-rework-v1-0-6134e6c1d491@linaro.org> To: Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Rob Herring , Bjorn Helgaas , Kishon Vijay Abraham I , Thierry Reding , Jonathan Hunter , Jingoo Han , Gustavo Pimentel Cc: linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, mhi@lists.linux.dev, linux-tegra@vger.kernel.org, Manivannan Sadhasivam X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=6439; i=manivannan.sadhasivam@linaro.org; h=from:subject:message-id; bh=VIhM1SwpvHKiQIt6fbXoqrPwWzSD6KDDn6A+YzkG9es=; b=owEBbQGS/pANAwAKAVWfEeb+kc71AcsmYgBl8xaPzHacr4f2+bSYz1iL9JkmwfhQE2tur5A5R UUhqYpqWROJATMEAAEKAB0WIQRnpUMqgUjL2KRYJ5dVnxHm/pHO9QUCZfMWjwAKCRBVnxHm/pHO 9cbqB/4uJjTB1Y9VeeO4iRKw9T0+L5QipjpUasXox+jAgRVSksZgHw4m5hB6RIctDazj1umuHw0 N0EtreEhcvM1Y4A8cu928KFVnpOchFKgtXyalC4FAdGD/rg1I2WVRvMuRLbBu80CIhL98/ZswFA BvjPX7y/JTuTam1d1P4uH80/6y7bGk2ieImSJweyJQuE0P/Qkb/1by8q+RKbEjpChqwL6CVSI7V t4Z4V92Xpg1Vt2IHuA9ImY0yTtzaYIKcdJW0AyEq7UQK9ixPe1TBjnPPc5kVJ7DNZmNiHxJnMHz eROokTARv2SJO75nSQwWKI2EU9BjGVV+qdijIVOiTD8YqhWC X-Developer-Key: i=manivannan.sadhasivam@linaro.org; a=openpgp; fpr=C668AEC3C3188E4C611465E7488550E901166008 As per the PCIe base spec r5.0, section 5.2, Link Down event can happen under any of the following circumstances: 1. Fundamental/Hot reset 2. Link disable transmission by upstream component 3. Moving from L2/L3 to L0 In those cases, Link Down causes some non-sticky DWC registers to loose the state (like REBAR, etc...). So the drivers need to reinitialize them to function properly once the link comes back again. This is not a problem for drivers supporting PERST# IRQ, since they can reinitialize the registers in the PERST# IRQ callback. But for the drivers not supporting PERST#, there is no way they can reinitialize the registers other than relying on Link Down IRQ received when the link goes down. So let's add a DWC generic API dw_pcie_ep_linkdown() that reinitializes the non-sticky registers and also notifies the EPF drivers about link going down. This API can also be used by the drivers supporting PERST# to handle the scenario (2) mentioned above. NOTE: For the sake of code organization, move the dw_pcie_ep_linkup() definition just above dw_pcie_ep_linkdown(). Signed-off-by: Manivannan Sadhasivam Reviewed-by: Niklas Cassel --- drivers/pci/controller/dwc/pcie-designware-ep.c | 93 ++++++++++++++++--------- drivers/pci/controller/dwc/pcie-designware.h | 5 ++ 2 files changed, 67 insertions(+), 31 deletions(-) diff --git a/drivers/pci/controller/dwc/pcie-designware-ep.c b/drivers/pci/controller/dwc/pcie-designware-ep.c index 3893a8c1a11c..5451057ca74b 100644 --- a/drivers/pci/controller/dwc/pcie-designware-ep.c +++ b/drivers/pci/controller/dwc/pcie-designware-ep.c @@ -14,18 +14,6 @@ #include #include -/** - * dw_pcie_ep_linkup - Notify EPF drivers about link up event - * @ep: DWC EP device - */ -void dw_pcie_ep_linkup(struct dw_pcie_ep *ep) -{ - struct pci_epc *epc = ep->epc; - - pci_epc_linkup(epc); -} -EXPORT_SYMBOL_GPL(dw_pcie_ep_linkup); - /** * dw_pcie_ep_init_notify - Notify EPF drivers about EPC initialization * complete @@ -672,6 +660,29 @@ static unsigned int dw_pcie_ep_find_ext_capability(struct dw_pcie *pci, int cap) return 0; } +static void dw_pcie_ep_init_non_sticky_registers(struct dw_pcie *pci) +{ + unsigned int offset; + unsigned int nbars; + u32 reg, i; + + offset = dw_pcie_ep_find_ext_capability(pci, PCI_EXT_CAP_ID_REBAR); + + dw_pcie_dbi_ro_wr_en(pci); + + if (offset) { + reg = dw_pcie_readl_dbi(pci, offset + PCI_REBAR_CTRL); + nbars = (reg & PCI_REBAR_CTRL_NBAR_MASK) >> + PCI_REBAR_CTRL_NBAR_SHIFT; + + for (i = 0; i < nbars; i++, offset += PCI_REBAR_CTRL) + dw_pcie_writel_dbi(pci, offset + PCI_REBAR_CAP, 0x0); + } + + dw_pcie_setup(pci); + dw_pcie_dbi_ro_wr_dis(pci); +} + /** * dw_pcie_ep_init_registers - Initialize DWC EP specific registers * @ep: DWC EP device @@ -686,13 +697,11 @@ int dw_pcie_ep_init_registers(struct dw_pcie_ep *ep) struct dw_pcie_ep_func *ep_func; struct device *dev = pci->dev; struct pci_epc *epc = ep->epc; - unsigned int offset, ptm_cap_base; - unsigned int nbars; + u32 ptm_cap_base, reg; u8 hdr_type; u8 func_no; - int i, ret; void *addr; - u32 reg; + int ret; hdr_type = dw_pcie_readb_dbi(pci, PCI_HEADER_TYPE) & PCI_HEADER_TYPE_MASK; @@ -755,20 +764,8 @@ int dw_pcie_ep_init_registers(struct dw_pcie_ep *ep) if (ep->ops->init) ep->ops->init(ep); - offset = dw_pcie_ep_find_ext_capability(pci, PCI_EXT_CAP_ID_REBAR); ptm_cap_base = dw_pcie_ep_find_ext_capability(pci, PCI_EXT_CAP_ID_PTM); - dw_pcie_dbi_ro_wr_en(pci); - - if (offset) { - reg = dw_pcie_readl_dbi(pci, offset + PCI_REBAR_CTRL); - nbars = (reg & PCI_REBAR_CTRL_NBAR_MASK) >> - PCI_REBAR_CTRL_NBAR_SHIFT; - - for (i = 0; i < nbars; i++, offset += PCI_REBAR_CTRL) - dw_pcie_writel_dbi(pci, offset + PCI_REBAR_CAP, 0x0); - } - /* * PTM responder capability can be disabled only after disabling * PTM root capability. @@ -785,9 +782,6 @@ int dw_pcie_ep_init_registers(struct dw_pcie_ep *ep) dw_pcie_dbi_ro_wr_dis(pci); } - dw_pcie_setup(pci); - dw_pcie_dbi_ro_wr_dis(pci); - return 0; err_remove_edma: @@ -797,6 +791,43 @@ int dw_pcie_ep_init_registers(struct dw_pcie_ep *ep) } EXPORT_SYMBOL_GPL(dw_pcie_ep_init_registers); +/** + * dw_pcie_ep_linkup - Notify EPF drivers about Link Up event + * @ep: DWC EP device + */ +void dw_pcie_ep_linkup(struct dw_pcie_ep *ep) +{ + struct pci_epc *epc = ep->epc; + + pci_epc_linkup(epc); +} +EXPORT_SYMBOL_GPL(dw_pcie_ep_linkup); + +/** + * dw_pcie_ep_linkdown - Notify EPF drivers about Link Down event + * @ep: DWC EP device + * + * Non-sticky registers are also initialized before sending the notification to + * the EPF drivers. This is needed since the registers need to be initialized + * before the link comes back again. + */ +void dw_pcie_ep_linkdown(struct dw_pcie_ep *ep) +{ + struct dw_pcie *pci = to_dw_pcie_from_ep(ep); + struct pci_epc *epc = ep->epc; + + /* + * Initialize the non-sticky DWC registers as they would've reset post + * Link Down. This is specifically needed for drivers not supporting + * PERST# as they have no way to reinitialize the registers before the + * link comes back again. + */ + dw_pcie_ep_init_non_sticky_registers(pci); + + pci_epc_linkdown(epc); +} +EXPORT_SYMBOL_GPL(dw_pcie_ep_linkdown); + /** * dw_pcie_ep_init - Initialize the endpoint device * @ep: DWC EP device diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h index f8e5431a207b..152969545b0a 100644 --- a/drivers/pci/controller/dwc/pcie-designware.h +++ b/drivers/pci/controller/dwc/pcie-designware.h @@ -668,6 +668,7 @@ static inline void __iomem *dw_pcie_own_conf_map_bus(struct pci_bus *bus, #ifdef CONFIG_PCIE_DW_EP void dw_pcie_ep_linkup(struct dw_pcie_ep *ep); +void dw_pcie_ep_linkdown(struct dw_pcie_ep *ep); int dw_pcie_ep_init(struct dw_pcie_ep *ep); int dw_pcie_ep_init_registers(struct dw_pcie_ep *ep); void dw_pcie_ep_init_notify(struct dw_pcie_ep *ep); @@ -688,6 +689,10 @@ static inline void dw_pcie_ep_linkup(struct dw_pcie_ep *ep) { } +static inline void dw_pcie_ep_linkdown(struct dw_pcie_ep *ep) +{ +} + static inline int dw_pcie_ep_init(struct dw_pcie_ep *ep) { return 0; From patchwork Thu Mar 14 15:23:47 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 13592540 Received: from mail-pf1-f176.google.com (mail-pf1-f176.google.com [209.85.210.176]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D8D2571B37 for ; Thu, 14 Mar 2024 15:24:42 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.210.176 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1710429885; cv=none; b=dsXvahGT8Uwd0r7MpyYgd9bbzNqp2+cbzXleyctKAjbhwQj6S9o9jGXl4hmMmBpu38Rk4RNtx3cKzuHRMeIdzWDlhPgYC3DrGjCRkEDHV2ffjDAPpbQCdymxo3y7ZVVPj9HCfZjRn290Jf+9kR27DC6dAIKDCVqtb8BobLTsUIY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1710429885; c=relaxed/simple; bh=8yY6jCOZX7OXEAdw+SEiYpcVr/6cp2rpK2Wx/LrayPc=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=rMAl3Bjreui3swYvFIdGPXIUHX5B5DSIpCUzuV7hZFwUm0WQT08rwOs6SQzgOZLED68brRwGlJW75tkRo0CR2u4pilr/naJWlTSuI6wtKo8bTxRDAa1xMpMNQRHuqCdmTXM4vXYoZpelylHB6Tp4UJMDV0GhcficR6JQWp1q+Cg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=iPPOqZaY; arc=none smtp.client-ip=209.85.210.176 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="iPPOqZaY" Received: by mail-pf1-f176.google.com with SMTP id d2e1a72fcca58-6e6b5aa0b52so982492b3a.3 for ; Thu, 14 Mar 2024 08:24:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1710429882; x=1711034682; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=3jszqw6C2qSlbopOLyelwWx4NbFpqH3DEAKuVgxD1es=; b=iPPOqZaYGZ/QnWF/hP3zF19D7K49yfrGK3lhBbLF5V2CBe1oBAPwmnOeX0msBovt4F 9+T5Bta0wrNal95pUx6Ci8Iwr/S3Vo6rw/QKTACJ6q7ZJ3nkdDMoa3NZg2uUDwXTOAy+ VbtN1rSqs0gzHxI4QxRLwkGoi2anwRNwUmPwr8FiIZyzzvFxMZu21ouDF9Tz7e8EaYC2 XNr6/73iSLYK/BsKMUHlKZGLLZYtAqpI4N3jSMKhp8E4E6GMGPHDz1tmUC7hgGxCrGno pQ7+wOP6VUKtQvnDUkcp9O/BNKcmfJJCyDvFeDFu1TECk4M8bP9YZY7gJTN3AM59CIl8 ceEg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1710429882; x=1711034682; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=3jszqw6C2qSlbopOLyelwWx4NbFpqH3DEAKuVgxD1es=; b=qxm7YWbijaSehvFj8cVGqEO1teYOO2NyBRb5TmJu4GFYbeB+k9w8/xDBfD5gDnyTFz pAta4XYG8jwSgo04BSjfO09dnHf1+fCKA99RAGImbzlTjYOiBYU/LxhT6KkQySlGII3M i4N7qv0p2HaFylIkFKyWQxmku1CsoGLCEo322hTSYcc5DbSwGzI/9sT+/bVaMopaE1tU vowN0x6cbkokfVuvRLJt7831ivd8O8w/m/8Q5bv5G39MlXsfF9Hr7ORS+7lpGE/8BerK 2kVWjQzv1qAOsjsdfwy/oX/wvvYV5qzoW8CWkDOKFtnw0TV8nDNQRdf3gjCN/jGf8k4I MSnQ== X-Forwarded-Encrypted: i=1; AJvYcCUeuxulCuqd2ACAVxAsFVxgEDfLHScivxznSEn4wJgqSbVldROFmDF/kPrg80tNNrzOXTonglRmwVPfv5yjdIW7ufeWehMR6dwRm0X2WQ== X-Gm-Message-State: AOJu0YzyOz+7Iv3MVUlYePO6kXrGnZ7EPZSHCDiX5mquDs+sVOZKit1o 2p+boo/4VbaBLf7yQuLbyVoMvTxAMzDcSCTHIzK7s8U4u3E//y2RXCxWNZYyuQ== X-Google-Smtp-Source: AGHT+IFqt+sRuuR59l5UBgyhSralt2fMPJ++RVgtbXM6AaZBZz2N5SktxvMJHu8zPfBFuuvsgJOfJA== X-Received: by 2002:a05:6a21:33a0:b0:1a1:7874:624b with SMTP id yy32-20020a056a2133a000b001a17874624bmr2551859pzb.44.1710429882287; Thu, 14 Mar 2024 08:24:42 -0700 (PDT) Received: from [127.0.1.1] ([117.207.30.211]) by smtp.gmail.com with ESMTPSA id m4-20020a63ed44000000b005e438ea2a5asm824021pgk.53.2024.03.14.08.24.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 14 Mar 2024 08:24:41 -0700 (PDT) From: Manivannan Sadhasivam Date: Thu, 14 Mar 2024 20:53:47 +0530 Subject: [PATCH 08/11] PCI: qcom-ep: Use the generic dw_pcie_ep_linkdown() API to handle Link Down event Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240314-pci-epf-rework-v1-8-6134e6c1d491@linaro.org> References: <20240314-pci-epf-rework-v1-0-6134e6c1d491@linaro.org> In-Reply-To: <20240314-pci-epf-rework-v1-0-6134e6c1d491@linaro.org> To: Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Rob Herring , Bjorn Helgaas , Kishon Vijay Abraham I , Thierry Reding , Jonathan Hunter , Jingoo Han , Gustavo Pimentel Cc: linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, mhi@lists.linux.dev, linux-tegra@vger.kernel.org, Manivannan Sadhasivam , Niklas Cassel X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=1139; i=manivannan.sadhasivam@linaro.org; h=from:subject:message-id; bh=8yY6jCOZX7OXEAdw+SEiYpcVr/6cp2rpK2Wx/LrayPc=; b=owEBbQGS/pANAwAKAVWfEeb+kc71AcsmYgBl8xaQCNKJOlWwe8RodKKLofvIgtsPM+QC0KzEr d5ct1FtCx+JATMEAAEKAB0WIQRnpUMqgUjL2KRYJ5dVnxHm/pHO9QUCZfMWkAAKCRBVnxHm/pHO 9eJ1B/9obhN4c98iqWSryFP+O4cuxzfB1o+fXJW4sZEpv8w0oh6h9Wf9PG+f1rjoJtqAuESwROF JSA5SrqUqJa29tP/aMMFO/R8e92mVb3R8sDDpTWfnjmD8ql5RTf0XU5P9+03DKLwLq/s6AOqOhl 50CgS9WazeW+ndicHA4XRprAzzqJObaw7zhB4gQoiLXQ3ZWczj6SoGdiCWouISxXC7ATrCIlENb CLNOCyl3oo7LJRhPie1IQdMmZ2DuOngH/Xv3sgqn6t44aDMX8XuHW+YT8e8mlB0axBpuZzVZAXO 7Fq33HYFqb/gn1/aD44BtactsmW0vQmNvJZ8pHKLcKgwkNzo X-Developer-Key: i=manivannan.sadhasivam@linaro.org; a=openpgp; fpr=C668AEC3C3188E4C611465E7488550E901166008 Now that the API is available, let's make use of it. It also handles the reinitialization of DWC non-sticky registers in addition to sending the notification to EPF drivers. Reviewed-by: Niklas Cassel Signed-off-by: Manivannan Sadhasivam --- drivers/pci/controller/dwc/pcie-qcom-ep.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pci/controller/dwc/pcie-qcom-ep.c b/drivers/pci/controller/dwc/pcie-qcom-ep.c index e4b742355d57..811f250e967a 100644 --- a/drivers/pci/controller/dwc/pcie-qcom-ep.c +++ b/drivers/pci/controller/dwc/pcie-qcom-ep.c @@ -635,7 +635,7 @@ static irqreturn_t qcom_pcie_ep_global_irq_thread(int irq, void *data) if (FIELD_GET(PARF_INT_ALL_LINK_DOWN, status)) { dev_dbg(dev, "Received Linkdown event\n"); pcie_ep->link_status = QCOM_PCIE_EP_LINK_DOWN; - pci_epc_linkdown(pci->ep.epc); + dw_pcie_ep_linkdown(&pci->ep); } else if (FIELD_GET(PARF_INT_ALL_BME, status)) { dev_dbg(dev, "Received BME event. Link is enabled!\n"); pcie_ep->link_status = QCOM_PCIE_EP_LINK_ENABLED; From patchwork Thu Mar 14 15:23:48 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 13592541 Received: from mail-pf1-f177.google.com (mail-pf1-f177.google.com [209.85.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5AD2174C0B for ; Thu, 14 Mar 2024 15:24:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.210.177 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1710429889; cv=none; b=c0ByDcMkQ3l+7EDSO9V1g9+ddwHt50LMEJJ8zeoJRsae/1vvj9mwvMhG73wlLS6cs7xI+hyBmxGogFoiFGtoK3fBCk4Ug1wlvI1ETAAlRudvwh95tEDA6cydAikla4ZmorvDJIbc9PBji1cl5ji3fG/QFVLPjHWas+AAH9p47RA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1710429889; c=relaxed/simple; bh=u+T142/W4OHi4TrqZYDBdEbmgdn1PJvXBdMP9ceIo3U=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=FgOdrfIk6oa2UMbi+W688sh9APuzEaqbsKGnVeKjpI+ZofawDM9GwJXJ4MaEKrW+6nauTQr+AS+VzGVvwf0rLvAWJgPIBU2AQQyQXjeclgffSM0cnEhCq3Rkb5bwocOc0+pc2rIsW09Te717rLDfUB2LEybhgy3f5drQfsGLpKk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=W4qgswV0; arc=none smtp.client-ip=209.85.210.177 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="W4qgswV0" Received: by mail-pf1-f177.google.com with SMTP id d2e1a72fcca58-6e6adc557b6so1047430b3a.2 for ; Thu, 14 Mar 2024 08:24:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1710429887; x=1711034687; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=UesLzv/s5weNz/WtSlaUPJ3gprn2+do0z55ESIdTIKs=; b=W4qgswV0m46zQ0JIFzAw7ojNW1QPG9H0DAU/QWiQjzZEH4r+NwaGK2kJUfIwoty0Ot NIvQ/c5B994zsP+8knTyVcRdYN/jsSOAaTd4PmmuvB5svkI5usXh+UeoZx1iRuSrsJqv W/y5VfJgQ/AimlvTxOQBu5k7/6tTZ9+7IuegVAPioNeLU1hgteo/9TXl80ys1LkQw0kx ZORoVdH3ddQLaCE1KmpfCgfYzekdFeVIKjkBeV/rOWJdUlTKD/FzGiT7E5QPzO1xZQRw D9Pwkp0EQsUS7jKsDSA03BUY/ZLmuKO3bciwE5/bpzldv1oRCo5vFQeoFuZTwh8cuxeV M5pA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1710429887; x=1711034687; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=UesLzv/s5weNz/WtSlaUPJ3gprn2+do0z55ESIdTIKs=; b=oNf/mlQxiaPymURNk2D6PHojNBr0FQ2wws8io+bl//ry13uORTHSBXntirC1IDg6mD kTWaNnDm3T+tvGvBxubwYp4xNqHwJL/49A29cxMvfHRtnm0ZSluju3yMsvtLFzrd3R6T wZxTzeQI+P34LdNRN1CZVX5RqB0Tn6ZOKGdpyhEoCrwkvqqHxyeAQSO4eIX/FtL8IYG8 geEbrWuuqWvFxHBWrYF23+NwMsWNQOax5YzwGuoYYyt0WseqMEhEXRnrJup+WrQlVeFe Fpco6Uas73oYRZEInLIXs+yTZJM2VSK0vmCApw1aOaRc2ir5+jPJaWXYX6zEM8r3Vx9B TM4g== X-Forwarded-Encrypted: i=1; AJvYcCW3C3tWfI7eIiD6Yv/15ryzsnZGTR5wA2f3kzvp7/D1a0byYf694xcWKYN2IFWG6HaFaMkdf5EDR4YD52D7C3Au3dejIElVAxThmY/ueg== X-Gm-Message-State: AOJu0YwZcBt+mdseQ/ieFiKAT2kQphxP63UfKGbEtR3h3C1TEINjM5I8 DDmS6rDDDlCXM+2zt7PzjUU6b6+GdjNxNrpS3R6G5KcA4jhZrTIOmrO4Jbnqkw== X-Google-Smtp-Source: AGHT+IHQG5KLhzzNsvAOkfN5kVkEw1s96R6Mf6b+5IIQ0GHj3IiEjO1mYEkAkdOoQ49n+BrtdM4wyQ== X-Received: by 2002:a05:6a20:12c6:b0:1a2:b33b:d6e0 with SMTP id v6-20020a056a2012c600b001a2b33bd6e0mr2571998pzg.59.1710429886716; Thu, 14 Mar 2024 08:24:46 -0700 (PDT) Received: from [127.0.1.1] ([117.207.30.211]) by smtp.gmail.com with ESMTPSA id m4-20020a63ed44000000b005e438ea2a5asm824021pgk.53.2024.03.14.08.24.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 14 Mar 2024 08:24:46 -0700 (PDT) From: Manivannan Sadhasivam Date: Thu, 14 Mar 2024 20:53:48 +0530 Subject: [PATCH 09/11] PCI: epf-test: Handle Link Down event Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240314-pci-epf-rework-v1-9-6134e6c1d491@linaro.org> References: <20240314-pci-epf-rework-v1-0-6134e6c1d491@linaro.org> In-Reply-To: <20240314-pci-epf-rework-v1-0-6134e6c1d491@linaro.org> To: Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Rob Herring , Bjorn Helgaas , Kishon Vijay Abraham I , Thierry Reding , Jonathan Hunter , Jingoo Han , Gustavo Pimentel Cc: linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, mhi@lists.linux.dev, linux-tegra@vger.kernel.org, Manivannan Sadhasivam X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=1993; i=manivannan.sadhasivam@linaro.org; h=from:subject:message-id; bh=u+T142/W4OHi4TrqZYDBdEbmgdn1PJvXBdMP9ceIo3U=; b=owEBbQGS/pANAwAKAVWfEeb+kc71AcsmYgBl8xaQb8VpKIpIa5FQmaHW85so3xvUG3jdu7yO8 MV8jLLZotiJATMEAAEKAB0WIQRnpUMqgUjL2KRYJ5dVnxHm/pHO9QUCZfMWkAAKCRBVnxHm/pHO 9TcBB/wKPBWo7Z51yH6ZMP9ARLDl+xRfSnVueOjzfuJQU0rRD2off8VJhbSCOcELFIW+cCMat90 Cnnu+PXjUtf0C/vXmThEaxNslVw045iRcOydgzgWH6cp8O3ZjC0PLUqbb2LcKyKxVnpTz9pe0Ib HykZ0yCgCQ7SSSzadoqKAqObqh2npoW0NeGs2Aj6PmGyNFeftCYzZ28PWINMmpL6AOH+WvkmD9/ EdA79wTgjUDtsP5CG6WTf7l1G2oHngiWl9h7VcklbivUtoDbIoNqyy2uGelrkaW9NqhLpJfEEwX sZ8utoKYhryD+T0QQ1XEqVWTpIxdQm/kbSsabKO99Vos92Li X-Developer-Key: i=manivannan.sadhasivam@linaro.org; a=openpgp; fpr=C668AEC3C3188E4C611465E7488550E901166008 As per the PCIe base spec r5.0, section 5.2, Link Down event can happen under any of the following circumstances: 1. Fundamental/Hot reset 2. Link disable transmission by upstream component 3. Moving from L2/L3 to L0 When the event happens, the EPC driver capable of detecting it may pass the notification to the EPF driver through link_down() callback in 'struct pci_epc_bus_event_ops'. While the PCIe spec has not defined the actual behavior of the endpoint when the Link Down event happens, we may assume that atleast the ongoing transactions need to be stopped as the link won't be active. So let's cancel the command handler work in the callback implementation pci_epf_test_link_down(). The work will be started again in pci_epf_test_link_up() once the link comes back again. Signed-off-by: Manivannan Sadhasivam Reviewed-by: Niklas Cassel --- drivers/pci/endpoint/functions/pci-epf-test.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/pci/endpoint/functions/pci-epf-test.c b/drivers/pci/endpoint/functions/pci-epf-test.c index 84cd47ebac22..97245228c9eb 100644 --- a/drivers/pci/endpoint/functions/pci-epf-test.c +++ b/drivers/pci/endpoint/functions/pci-epf-test.c @@ -823,6 +823,15 @@ static int pci_epf_test_link_up(struct pci_epf *epf) return 0; } +static int pci_epf_test_link_down(struct pci_epf *epf) +{ + struct pci_epf_test *epf_test = epf_get_drvdata(epf); + + cancel_delayed_work(&epf_test->cmd_handler); + + return 0; +} + static const struct pci_epc_event_ops pci_epf_test_epc_event_ops = { .init = pci_epf_test_epc_init, .deinit = pci_epf_test_epc_deinit, @@ -830,6 +839,7 @@ static const struct pci_epc_event_ops pci_epf_test_epc_event_ops = { static const struct pci_epc_bus_event_ops pci_epf_test_bus_event_ops = { .link_up = pci_epf_test_link_up, + .link_down = pci_epf_test_link_down, }; static int pci_epf_test_alloc_space(struct pci_epf *epf) From patchwork Thu Mar 14 15:23:49 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 13592542 Received: from mail-oa1-f45.google.com (mail-oa1-f45.google.com [209.85.160.45]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 26BAD74C1A for ; Thu, 14 Mar 2024 15:24:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.160.45 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1710429893; cv=none; b=dj/vPsFsYkwtWzG4xQtYEYumKtoMcZv0r7ILfjV9XWUjHoWDJN8e9FhdZpyBQU4FydViPbED75lKBuHMPDJL5gYkVlimZtwQoLQdH/z9+Kk3getJpdF4A5LVSqjd6cspej4Wht3nADOXupou/cSfnv7SRQzIe281/qcrJWGo8uY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1710429893; c=relaxed/simple; bh=hHeQESdb2n2JfoPbQGhczuNq7aes0p4VCwzYiQEpxZY=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=MGMGif9DEvwGzYbmdsQ0wXG0VE8i57RuTsxPZoKjFbY9bUYVBn2FR7oCM6Vx2yN3o/gencLrK3bMPcxvY5FYlTNLJGaQLrVDppCm5j+DOYRFGb+wYh5o/ZFvCcKuilTO1c8SBe1ULjgHYlbPJ8Axq0FcBFnFksy5PrwKTgn8n7g= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=pSTQvwDE; arc=none smtp.client-ip=209.85.160.45 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="pSTQvwDE" Received: by mail-oa1-f45.google.com with SMTP id 586e51a60fabf-221830f6643so653437fac.2 for ; Thu, 14 Mar 2024 08:24:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1710429891; x=1711034691; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=eAPCqDad3eib+irwWdn4c3jB6WrUBpvIqANM1/Xo8ds=; b=pSTQvwDESdYVRTDMINy4anraTmpdArHxuraiOMTwiou3GEuFPUjbxgW/aCG65vQks6 0X4kmqu9kMHL9Eo1Do77T9HRG7tbtc1v1x50zK26302MFxnRGSZjdjyo6lk3awCp/hs7 Ej/K/CRmyblvPuKOdyILgVbcyiTLbe0GU+UC9ukRZz0YTNMcrEpRsgQLiUVIng2EsdfW xFr/zQG0CXjciJ62oXIdUJjtNux6dc4RxhWoWpwdfP5sIuHoPRFv/D6pmX6wFE16AE7S KhJ38Nu7m2Zkg9SPz45se66uHytNP94fFwSR/yG7dGY/Md6vdeSqvu+mXAzDfhF+jPdc ck8Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1710429891; x=1711034691; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=eAPCqDad3eib+irwWdn4c3jB6WrUBpvIqANM1/Xo8ds=; b=rJuNpfSdUIVB+aPsWYPHRcl0dewxXdHGmpPs20X4UYmHTGBEiWOnyiZ4g0ucCOuDPw dQMG0K9yEoLv1ULExATZv/iQQo2lNefr0G7Rjt9bclHGkITASLloWoGa1dM+I4Ikp/fp mafAr2aJpIJLMwaj5YMH5DaTFWhQWDbCaJA5Cy2spUQ+Dw1YAHxkEm3X9CpxvGtLyAF5 e49FLiPjCmyS77k1yZx9D7GQ+sMkxgJTU/r7txaD5KVoVUQBrrY0FqarcF3QBC7h6I4i te0bVkwG+y0G2ZwxLmi+cb5DrHHBBE6GgB4Z7WSSZYORrVqZgZ3wLoqggtaePc9F4VjR G3tQ== X-Forwarded-Encrypted: i=1; AJvYcCWX7Glh7dfw9EtbMW0DYm4Bt1RFrBga3/1Hu6F+++xDgN150Ed+ImCYahsHDW1QV5r58FzTTMKlIVR+r2AUI195FTZeiZ9wx/KBAZFlVg== X-Gm-Message-State: AOJu0YxsAR78iTt68tC80OnWoqPKpZ5IkAqcHBXpm2eCi60z7CZkzlsT kVdkJPjRCJtWAga2CG6I55hIrPlZy91kD+bdmM32oPW/ulA4NWlTPM/0GbAKAg== X-Google-Smtp-Source: AGHT+IE64oFvYSc5N18qT9eho49uPQW+36wypqNmg2HTtOjDLk47z73mf9gPacmb4/W/bBMA5EydJQ== X-Received: by 2002:a05:6870:64a5:b0:21f:d173:4f19 with SMTP id cz37-20020a05687064a500b0021fd1734f19mr2087318oab.40.1710429891056; Thu, 14 Mar 2024 08:24:51 -0700 (PDT) Received: from [127.0.1.1] ([117.207.30.211]) by smtp.gmail.com with ESMTPSA id m4-20020a63ed44000000b005e438ea2a5asm824021pgk.53.2024.03.14.08.24.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 14 Mar 2024 08:24:50 -0700 (PDT) From: Manivannan Sadhasivam Date: Thu, 14 Mar 2024 20:53:49 +0530 Subject: [PATCH 10/11] PCI: qcom-ep: Rework {start/stop}_link() callbacks implementation Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240314-pci-epf-rework-v1-10-6134e6c1d491@linaro.org> References: <20240314-pci-epf-rework-v1-0-6134e6c1d491@linaro.org> In-Reply-To: <20240314-pci-epf-rework-v1-0-6134e6c1d491@linaro.org> To: Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Rob Herring , Bjorn Helgaas , Kishon Vijay Abraham I , Thierry Reding , Jonathan Hunter , Jingoo Han , Gustavo Pimentel Cc: linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, mhi@lists.linux.dev, linux-tegra@vger.kernel.org, Manivannan Sadhasivam X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=2908; i=manivannan.sadhasivam@linaro.org; h=from:subject:message-id; bh=hHeQESdb2n2JfoPbQGhczuNq7aes0p4VCwzYiQEpxZY=; b=owEBbQGS/pANAwAKAVWfEeb+kc71AcsmYgBl8xaQfg97viBuOIgmUL62KebaBZQIQNgdeCdUj aCgxk36waWJATMEAAEKAB0WIQRnpUMqgUjL2KRYJ5dVnxHm/pHO9QUCZfMWkAAKCRBVnxHm/pHO 9dH/B/93GdKJANpOSa22x4XiYazPXmYMSF7FXM0F0/rb0MhOjtc62toq2EEl6mi3yPtj3T/Gz5j ea1MwxgLD8daifKkQZmj1ZyR6luJ4Xar+fQFq3jcSvB+S2TDdgPmHA/dMtCYUBnO415ZZlEgxyi kn5bs1s2wkckx37TU65QJHX+Hffu/kuodZSw+zYUvnLwSEfkbw4xXUjuySbTnVVoR1pa6TuQT4M eLFMtcYj4maR+1bcv7bSGm9KXeJWHl3j7igzlknj4moBwRwE4UBQlVAxbhSIlsh9ObXdfhE12c0 tZAkWrM06kPRlEbBYazKyTQ6wbkB+Vfid8ikgvuzgVrcUsdR X-Developer-Key: i=manivannan.sadhasivam@linaro.org; a=openpgp; fpr=C668AEC3C3188E4C611465E7488550E901166008 DWC specific start_link() and stop_link() callbacks are supposed to start and stop the link training of the PCIe bus. But the current implementation of this driver enables/disables the PERST# IRQ. Even though this is not causing any issues, this creates inconsistency among the controller drivers. So for the sake of consistency, let's just start/stop the link training in these callbacks. Also, PERST# IRQ is now enabled from the start itself, thus allowing the controller driver to initialize the registers when PERST# gets deasserted without waiting for the user intervention though configfs. Signed-off-by: Manivannan Sadhasivam Reviewed-by: Niklas Cassel --- drivers/pci/controller/dwc/pcie-qcom-ep.c | 21 +++++++++++++-------- 1 file changed, 13 insertions(+), 8 deletions(-) diff --git a/drivers/pci/controller/dwc/pcie-qcom-ep.c b/drivers/pci/controller/dwc/pcie-qcom-ep.c index 811f250e967a..653e4ace0a07 100644 --- a/drivers/pci/controller/dwc/pcie-qcom-ep.c +++ b/drivers/pci/controller/dwc/pcie-qcom-ep.c @@ -122,6 +122,9 @@ /* PARF_CFG_BITS register fields */ #define PARF_CFG_BITS_REQ_EXIT_L1SS_MSI_LTR_EN BIT(1) +/* PARF_LTSSM register fields */ +#define LTSSM_EN BIT(8) + /* ELBI registers */ #define ELBI_SYS_STTS 0x08 #define ELBI_CS2_ENABLE 0xa4 @@ -250,8 +253,12 @@ static int qcom_pcie_dw_link_up(struct dw_pcie *pci) static int qcom_pcie_dw_start_link(struct dw_pcie *pci) { struct qcom_pcie_ep *pcie_ep = to_pcie_ep(pci); + u32 val; - enable_irq(pcie_ep->perst_irq); + /* Enable LTSSM */ + val = readl_relaxed(pcie_ep->parf + PARF_LTSSM); + val |= LTSSM_EN; + writel_relaxed(val, pcie_ep->parf + PARF_LTSSM); return 0; } @@ -259,8 +266,12 @@ static int qcom_pcie_dw_start_link(struct dw_pcie *pci) static void qcom_pcie_dw_stop_link(struct dw_pcie *pci) { struct qcom_pcie_ep *pcie_ep = to_pcie_ep(pci); + u32 val; - disable_irq(pcie_ep->perst_irq); + /* Disable LTSSM */ + val = readl_relaxed(pcie_ep->parf + PARF_LTSSM); + val &= ~LTSSM_EN; + writel_relaxed(val, pcie_ep->parf + PARF_LTSSM); } static void qcom_pcie_dw_write_dbi2(struct dw_pcie *pci, void __iomem *base, @@ -484,11 +495,6 @@ static int qcom_pcie_perst_deassert(struct dw_pcie *pci) dw_pcie_ep_init_notify(&pcie_ep->pci.ep); - /* Enable LTSSM */ - val = readl_relaxed(pcie_ep->parf + PARF_LTSSM); - val |= BIT(8); - writel_relaxed(val, pcie_ep->parf + PARF_LTSSM); - return 0; err_disable_resources: @@ -707,7 +713,6 @@ static int qcom_pcie_ep_enable_irq_resources(struct platform_device *pdev, } pcie_ep->perst_irq = gpiod_to_irq(pcie_ep->reset); - irq_set_status_flags(pcie_ep->perst_irq, IRQ_NOAUTOEN); ret = devm_request_threaded_irq(&pdev->dev, pcie_ep->perst_irq, NULL, qcom_pcie_ep_perst_irq_thread, IRQF_TRIGGER_HIGH | IRQF_ONESHOT, From patchwork Thu Mar 14 15:23:50 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 13592543 Received: from mail-pf1-f171.google.com (mail-pf1-f171.google.com [209.85.210.171]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4CB9B74E05 for ; Thu, 14 Mar 2024 15:24:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.210.171 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1710429898; cv=none; b=hQJrMYAynaJ7WF0a9eCjz2CcYBEx8nC7bZMHCNclBBC6cJ300KpnIqPxxh5KLkSyCVv4C3kLQYy5Dkx85tnSXCCVegEk7xqeHEQM4zCiNgBSUNzHqPCKmStWC4GRGrqiMwMadWWe47V2DI3Ew1sN0dQCRMXtBaJVmInLx5hO3RQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1710429898; c=relaxed/simple; bh=vvIRN7ZBKQkTFnoIHX/YU42aYhGdx8c3NJ1/9vK0fxY=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=HV4tuwsDM7IqQV2hnyINUAIQWEUyi+4fOCZY6/lE4pMOw0yIvFfE0fJUJ5onz3Sx/H125QHY/CM6ZwteiA2nUbWPNYj23QuQuLe65Af2mdG8QcYMgg6dEF1dG6VV8vcnkScMHbMNLbLG62SFtOrZEX/XmuqhiWKhjfS+Sdx09PQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=ne+eCzQ7; arc=none smtp.client-ip=209.85.210.171 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="ne+eCzQ7" Received: by mail-pf1-f171.google.com with SMTP id d2e1a72fcca58-6e5760eeb7aso676101b3a.1 for ; Thu, 14 Mar 2024 08:24:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1710429896; x=1711034696; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=MmIxA+VBny71iA9Jy1KHGto+GTLx5DDrGCoZw8mb/UA=; b=ne+eCzQ7vkkF5J50mCBp4N13U7QvYi7TuwxCXkVqJbMJEcX1Wgw+Id+qHeDPEh470S nqAbOFCX84aL/sWK/xqSb942NHYzhIUAPi0AvGSl5MGWwWj80HWbGeCzDxwCNFKEVB31 bttgf8ArbmTzFWHF2Zr6GOIuXkUCnltDTFOjuz5u+wUsc9iT4Cx0nC9c0/HcNRglFXYk SbJbnlxG0I7othxM50ueFayf6eQss5qQ6e3nnIjxF15RDLdHzFlWfashF+rjNrksEM5g oJuyE6xpBTDvtVeF5G5U7jvFlyEsYirsPOdZRMAZFTkoJijlauAPL9p+097DuHsyPqwu KgNA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1710429896; x=1711034696; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=MmIxA+VBny71iA9Jy1KHGto+GTLx5DDrGCoZw8mb/UA=; b=ctOtl4Us9bQpwmkLNCCqFc9ECmd+A2sA98KEaXo3t7RHQkVWdYmmktqjbzdUOTaj/h PJs7YXjVrYuwEGDzunKKUUli5gA+w9seIWrAwE7gY051U64P8gyaPJ292h2Ol6lcFc7z Bw+ZwyoiytsrgaRc9rcHaWUfORPu29gSB0BPD8fqHHCF524VNspb7CWMmK81YP5Txsoa ycc3HzScxjiSwK3TIHRRj4zGadFtufdd51QAt8uVdaFS8hEQKgIS3yKwlroO9VRndY2k L6wVypaTUWmbN9ERh2q03uRFXDR5eaQxcip7zFYS48cW50XbWFJGUBZ6bQjHlTdxiZoZ h/Yg== X-Forwarded-Encrypted: i=1; AJvYcCVsTFpZMCYSDhHDg1L2L8bs82YF/dsjXVbcqLpAd2V83tgL5dh/njWSqyP5kDfCI4OjThlMVvfNhG4HA9/NXxq+XzCQ776VHTZmujgvLw== X-Gm-Message-State: AOJu0YxlRNa4S9xwWP5u97NqlDjTnxwfH+/zvFL1TXDa9FQiSWSRkYat 0UTsFjLUgwcRAV4ySLUlGodCTLXDAlieE5zMiQCAVnkPm6llkHWSMblm0oy4aA== X-Google-Smtp-Source: AGHT+IG2peiit6xwcjpcw9vql2fJguzg+I2xNUy/9EetKehF958tqEIaolzuG1KSOVbZPjbZAJd13g== X-Received: by 2002:a05:6a20:2d2b:b0:1a3:3ab7:d736 with SMTP id g43-20020a056a202d2b00b001a33ab7d736mr2249535pzl.43.1710429895604; Thu, 14 Mar 2024 08:24:55 -0700 (PDT) Received: from [127.0.1.1] ([117.207.30.211]) by smtp.gmail.com with ESMTPSA id m4-20020a63ed44000000b005e438ea2a5asm824021pgk.53.2024.03.14.08.24.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 14 Mar 2024 08:24:55 -0700 (PDT) From: Manivannan Sadhasivam Date: Thu, 14 Mar 2024 20:53:50 +0530 Subject: [PATCH 11/11] PCI: tegra194: Rework {start/stop}_link() callbacks implementation Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240314-pci-epf-rework-v1-11-6134e6c1d491@linaro.org> References: <20240314-pci-epf-rework-v1-0-6134e6c1d491@linaro.org> In-Reply-To: <20240314-pci-epf-rework-v1-0-6134e6c1d491@linaro.org> To: Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Rob Herring , Bjorn Helgaas , Kishon Vijay Abraham I , Thierry Reding , Jonathan Hunter , Jingoo Han , Gustavo Pimentel Cc: linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, mhi@lists.linux.dev, linux-tegra@vger.kernel.org, Manivannan Sadhasivam , Vidya Sagar X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=2999; i=manivannan.sadhasivam@linaro.org; h=from:subject:message-id; bh=vvIRN7ZBKQkTFnoIHX/YU42aYhGdx8c3NJ1/9vK0fxY=; b=owEBbQGS/pANAwAKAVWfEeb+kc71AcsmYgBl8xaQGEjDj7V9nOkxQFG9KkzYhi7NMZ5fNY+WX /IyNnSDeqKJATMEAAEKAB0WIQRnpUMqgUjL2KRYJ5dVnxHm/pHO9QUCZfMWkAAKCRBVnxHm/pHO 9SzzB/0arBeoE0MTmN+C/QkksG5pbqe/k/wuAGkk2EO/pFuNZ20j163lecjuj4DJmfj5tmd3nQ1 sAaCxZ9VlIvHRrPnsmX/3tFhHtVqyxOKzTOuhfn5I81q5drJ/txgjtjvFbhRwQINFlCTKg/5/wU HyMA4ky1/DL4Qm9TiHqzEXMp5dgKj0vDTJ/mu1zOoZKcyyQl7eXfFxkLrS6tc1RzIk/k+bFJBdl S9R94h+EwTv/Ug+F3LeXIqmMfV2zi0wTgZiGX6RfxVWHy9E5V+uiRUk87DcZwAfnti60B6mP36m LGER5WQ8R6URgGjyDvuAN+Txnfrra4uwGHRL0AKboqnPQ40S X-Developer-Key: i=manivannan.sadhasivam@linaro.org; a=openpgp; fpr=C668AEC3C3188E4C611465E7488550E901166008 DWC specific start_link() and stop_link() callbacks are supposed to start and stop the link training of the PCIe bus. But the current endpoint implementation of this driver enables/disables the PERST# IRQ. Even though this is not causing any issues, this creates inconsistency among the EP controller drivers. So for the sake of consistency, let's just start/stop the link training in these callbacks. Also, PERST# IRQ is now enabled from the start itself, thus allowing the controller driver to initialize the registers when PERST# gets deasserted without waiting for the user intervention though configfs. Cc: Vidya Sagar Signed-off-by: Manivannan Sadhasivam Reviewed-by: Niklas Cassel --- drivers/pci/controller/dwc/pcie-tegra194.c | 24 ++++++++++-------------- 1 file changed, 10 insertions(+), 14 deletions(-) diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c index 3e6e08b321fb..03d6f248bc6f 100644 --- a/drivers/pci/controller/dwc/pcie-tegra194.c +++ b/drivers/pci/controller/dwc/pcie-tegra194.c @@ -964,7 +964,11 @@ static int tegra_pcie_dw_start_link(struct dw_pcie *pci) bool retry = true; if (pcie->of_data->mode == DW_PCIE_EP_TYPE) { - enable_irq(pcie->pex_rst_irq); + /* Enable LTSSM */ + val = appl_readl(pcie, APPL_CTRL); + val |= APPL_CTRL_LTSSM_EN; + appl_writel(pcie, val, APPL_CTRL); + return 0; } @@ -1049,8 +1053,12 @@ static int tegra_pcie_dw_link_up(struct dw_pcie *pci) static void tegra_pcie_dw_stop_link(struct dw_pcie *pci) { struct tegra_pcie_dw *pcie = to_tegra_pcie(pci); + u32 val; - disable_irq(pcie->pex_rst_irq); + /* Disable LTSSM */ + val = appl_readl(pcie, APPL_CTRL); + val &= ~APPL_CTRL_LTSSM_EN; + appl_writel(pcie, val, APPL_CTRL); } static const struct dw_pcie_ops tegra_dw_pcie_ops = { @@ -1702,11 +1710,6 @@ static void pex_ep_event_pex_rst_assert(struct tegra_pcie_dw *pcie) if (pcie->ep_state == EP_STATE_DISABLED) return; - /* Disable LTSSM */ - val = appl_readl(pcie, APPL_CTRL); - val &= ~APPL_CTRL_LTSSM_EN; - appl_writel(pcie, val, APPL_CTRL); - ret = readl_poll_timeout(pcie->appl_base + APPL_DEBUG, val, ((val & APPL_DEBUG_LTSSM_STATE_MASK) >> APPL_DEBUG_LTSSM_STATE_SHIFT) == @@ -1913,11 +1916,6 @@ static void pex_ep_event_pex_rst_deassert(struct tegra_pcie_dw *pcie) appl_writel(pcie, val, APPL_LTR_MSG_2); } - /* Enable LTSSM */ - val = appl_readl(pcie, APPL_CTRL); - val |= APPL_CTRL_LTSSM_EN; - appl_writel(pcie, val, APPL_CTRL); - pcie->ep_state = EP_STATE_ENABLED; dev_dbg(dev, "Initialization of endpoint is completed\n"); @@ -2060,8 +2058,6 @@ static int tegra_pcie_config_ep(struct tegra_pcie_dw *pcie, return -ENOMEM; } - irq_set_status_flags(pcie->pex_rst_irq, IRQ_NOAUTOEN); - pcie->ep_state = EP_STATE_DISABLED; ret = devm_request_threaded_irq(dev, pcie->pex_rst_irq, NULL,