From patchwork Mon Mar 18 09:51:53 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 13595176 Received: from mail-wr1-f53.google.com (mail-wr1-f53.google.com [209.85.221.53]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 431843611D for ; Mon, 18 Mar 2024 09:51:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.53 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1710755520; cv=none; b=pYF0khLXEtfTdsXrzbK2eFi6nNXg9mVlq7FH41hC0/GCVXWuEnUVFOBnldEok9VHSNfjmSehlJhgCpCSq75eTwqxj8uP83cuEee61ZoaQ3j1TI+Achz1yab0pcMoubNnoXoc7LtioxHSJqXTuLaN/ax8oO51V1ONeskdhGezTFI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1710755520; c=relaxed/simple; bh=NAPTtSll1XieWucrBskp4oBsh6P7ZqjYmxSviubfVZI=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=rvobzHyWZFAb9STtTvJ+/LhNoyjjsOJ54++7CuF3fAc7Jf6yLhFYpqPSoiUuV/qUcJDnEdVRkQFtv31z/vTQc3NGqhtAKDfv6jlVgKYZGGninv+l0gUQdyj3q24zRDaTesZcIRt56z1Zmod9fmYuVYPwubBmzwQS/6ot1q9Bv+o= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=ukzXxSW2; arc=none smtp.client-ip=209.85.221.53 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="ukzXxSW2" Received: by mail-wr1-f53.google.com with SMTP id ffacd0b85a97d-33e162b1b71so3761925f8f.1 for ; Mon, 18 Mar 2024 02:51:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1710755518; x=1711360318; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=MIVs14OsD+VApo/vkETOeSbK6jpJSlhojNnxWWFG6FI=; b=ukzXxSW2nGAfAXmr5KffYfQrxjdseT/sP3uSDdL4T7iMqOGsyNQTDJ3wZb3Jqk617P 4eQx0DxZlrkMlY002ynMICVbZDibDYAZmhGFNZEmFKdbBkVgvvANmdyIlFuNyTElbbzV A/eZyxvpqjEuAqG9n7/8xv+hlE6JwxcYHdR2isipv4vXZYZ6TRdQX73rNCGyuxgg1ahf 7W1fRWpRV8KNEupSjpzvOzN/ytqoykl1bZ17NwZI19H+gjuZCJN7HaQjqsiEgOyxUIjx mCYdiWuFfP1RtmBh/+tlktKb1AJmkEXaAB40o1BbDXYvqO0RpGd0MEEP1T2Yr/xIJ+83 lGcQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1710755518; x=1711360318; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=MIVs14OsD+VApo/vkETOeSbK6jpJSlhojNnxWWFG6FI=; b=MOQo3lKUxo7jQnaZXjKM6odL7vlEEKZk2b/fKNWO0EKRAr/4j6f3DO/BvpXt7LXhQ8 l2SYdp6Au+4JCOdRFujEUEWyr9HEVnZ3cOK/jeTtn7BiiZT3JaYpsQvrg4KRVQYtN2IO WwY12Y/xK7RSaAbP+YOhlQY1GBkLmvb6hzOnMyuCP7Gi1AswL7y86jFTlkslDWDIVHp1 +3m1TS3XAnaMKWKKD+o6aHR7pLCKFf+cQCT62FfIyP+wp/onZxyzZkuiOaJTdHU2vusk M8mHFN/a2y45YKpoVN4BrDEddo6q2LXfqT4eeQ9zuSKnJyLTz8nC/BbI+SpKsrBhcotC 29+A== X-Gm-Message-State: AOJu0YxjW6IKVUqJxPaUzfZtTmP0tRhPAv1LL/yX8jObnLmLK3fQrEH/ DIRmxNcGAB972bHLMqobtHwXlmLcoQEouF4rPiG3iJVAtKIJOjRXkePPEcTMBH8= X-Google-Smtp-Source: AGHT+IEUIHayg1b/NUZxVVlMf+QFaS7enKE0wEdrmsvNgwVDL+1S3zosP8hOtVU8a5VA9afzX28WPQ== X-Received: by 2002:a05:6000:18a4:b0:341:73f6:2151 with SMTP id b4-20020a05600018a400b0034173f62151mr1643273wri.24.1710755517664; Mon, 18 Mar 2024 02:51:57 -0700 (PDT) Received: from arrakeen.starnux.net ([2a01:e0a:982:cbb0:8261:5fff:fe11:bdda]) by smtp.gmail.com with ESMTPSA id bq22-20020a5d5a16000000b0033ebf702e17sm7514974wrb.21.2024.03.18.02.51.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 18 Mar 2024 02:51:57 -0700 (PDT) From: Neil Armstrong Date: Mon, 18 Mar 2024 10:51:53 +0100 Subject: [PATCH v2 1/3] dt-bindings: arm: qcom: Document the HDK8650 board Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240318-topic-sm8650-upstream-hdk-v2-1-b63a5d45a784@linaro.org> References: <20240318-topic-sm8650-upstream-hdk-v2-0-b63a5d45a784@linaro.org> In-Reply-To: <20240318-topic-sm8650-upstream-hdk-v2-0-b63a5d45a784@linaro.org> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Neil Armstrong , Krzysztof Kozlowski X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=952; i=neil.armstrong@linaro.org; h=from:subject:message-id; bh=NAPTtSll1XieWucrBskp4oBsh6P7ZqjYmxSviubfVZI=; b=owEBbQKS/ZANAwAKAXfc29rIyEnRAcsmYgBl+A66jVe1fbx2NXb4v5O2cKtk3aWOgquyZprOZHb3 EEHvnQqJAjMEAAEKAB0WIQQ9U8YmyFYF/h30LIt33NvayMhJ0QUCZfgOugAKCRB33NvayMhJ0YK7D/ 4qfhrYm4rdNpH2bKDQYjT9PWINLe4LoGboKmVvnvpuT5SMHm5ZKL/LU6sdh/FiejfbgNhestazEHL4 JnW5Tk0nhU74g7CaYhTaWVlPxunAoqPZFwxUJ6NqqmMtRAmCBlrTZHDqpFKKXnAr6JKJ0jo61OFsC+ WAEcQtKUuQrx0R9cLidpor2cpoib3hsd/qKQvxAZafxkU1/hG25Ug6BoGrCiALefVscmedmoqYpjZQ Kw5tSiYfIFinX3xQ5PLaBVi/JhzNCdXGZyrMT+EANfzhXec4QL4r0dDIFVghte2dr15fNQhSnVfS3e ueWOMBlPrhGGa7x619qz18ekQhDCaube2rZwvkKsmT6yLmLZQqWW5o/4mJfKCi5H5TIoczCT51b0r8 69K4sXw/vLKrs/REBzvAnfMIGD3mPIgn5bS6/8/cTK+aIVchShlmFHBQL1SikLGY66vDCkJe1GzZUZ KFlUvj+ipeogDQYE4KAIJFnHFER5icFbK3jTJ+f25+XGKkogwBNrRUdfeVCtbHhRkKJbKawdPt+PHe yKDZGHL/C1ABanAEF++gABMZDN+hQbuxnwGIuHydPY+eT9nmPbbpXma3/e6ihjCdglh0LSWnzf0a2g Jt0fdnYbaogbaipeI4xJuGVKHL6UUvnvs+xXt2mrYscJOAgDctZHeqoKSJbg== X-Developer-Key: i=neil.armstrong@linaro.org; a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE Document the Qualcomm SM8650 based HDK (Hardware Development Kit) embedded development platform designed by Qualcomm and sold by Lantronix [1]. [1] https://www.lantronix.com/products/snapdragon-8-gen-3-mobile-hardware-development-kit/ Reviewed-by: Krzysztof Kozlowski Signed-off-by: Neil Armstrong --- Documentation/devicetree/bindings/arm/qcom.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index 66beaac60e1d..fc0649da74b9 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -1007,6 +1007,7 @@ properties: - items: - enum: + - qcom,sm8650-hdk - qcom,sm8650-mtp - qcom,sm8650-qrd - const: qcom,sm8650 From patchwork Mon Mar 18 09:51:54 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 13595178 Received: from mail-lf1-f45.google.com (mail-lf1-f45.google.com [209.85.167.45]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AA91D2D056 for ; Mon, 18 Mar 2024 09:52:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.167.45 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1710755523; cv=none; b=uZyCWR37u4szlIuq25usfO/viMthdqDS93qobS1SZEVlCq41cQBqK5rA2l8A2AJkApYNO9B1fzCtXn5yNAUgw0sqNZzyeJBHiZBG7sO2yYWZyfaNf2w7e5saIfa8YcUz0IZ1yMyuMWPl1O7B4ccfTC6cZr/CSMSf/EM+5dLN6WQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1710755523; c=relaxed/simple; bh=VnvBN06qsFnLPzrFSg+VJjRbwgqXpDHgP5NF42qXAIU=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=tPPMvdDxsMBj3l1ZQ2hOBJMcnDUH1B+RK/fuF79+yHvhqIfySeM6anb9K4RydkPotvq/Bbp5sXutoa8A2MLesD9FMTlbZ2CZBUVTDKWz4Pju2MBD1TVzjz6bt6HcvvTEFgdVNh6fxHa7htqtp0MhSP1nQFjT2xCpkWCjeYswjC4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=gFmZzckV; arc=none smtp.client-ip=209.85.167.45 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="gFmZzckV" Received: by mail-lf1-f45.google.com with SMTP id 2adb3069b0e04-51381021af1so5776032e87.0 for ; Mon, 18 Mar 2024 02:52:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1710755519; x=1711360319; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=07z5zG2MIPrdknawY1xB/VVaAx8qAuGw6XuGrB+47WA=; b=gFmZzckVSxZ/7VI10n+K3gVTN4rJjbYu9ynn9CvQZrlcZl87PJD3HZX1On5KTlTXb3 vCtAy5alOmAw15Ixo/H/pz1VD7ai3LAu1az3cD5+Hvme3cx+jfZ2wL/wfLB3vF1JiZTD pQ9wQvphNCrsuqsIGeIbcy2IzYhbvCQtk2psVk4+Qb7nuUagDqve7BLrj+rbkwYxaNBW Mgizq7vUGyMIGu4RSZtMq06mFYV6YW3g3UURSWBiIPr+A0pBSOgatgbYup5w8IqImmRU 9+7sgxvrNOOCxR4jYacHEauTTFQp9LIMKkPRGQT4PNaU0uwNSQh8ogRKH6OCkfkAnJoV kNPw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1710755519; x=1711360319; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=07z5zG2MIPrdknawY1xB/VVaAx8qAuGw6XuGrB+47WA=; b=JWRYT8JlKZ8NN/E9R8oA64SEH+IpfHdHKZc8zHD9lKwPxOPjbL0hu653N4GZ7eII0E AlfpeIfa4LgZ09t7WaCOxVfrCRuFEFmB9231VV+KAROzHv9ma6RptGq5MCbwIWtY426J zdP3wkdoLiYvEE0k88lUniZD1iiEP4maYs90W0YDERlSLIGdFH8zwUY6rLoF9tXU068c QIHeuzyxsftXWzsvgH/sawG1Gd3ZojAe5s5yNWOJVTCP2tj92vLvEAP7E7wmTNdkigH1 pjFkFSreWUnayRYWW2rlOOiDWvc/t1RNaDLN/DOSqwKQrRvkxdvRoNqPRQ2hPhHZA/pj w/xA== X-Gm-Message-State: AOJu0YwzwW+VacoZuhFC+JoeUOPmXd4KVJhytccicdVlm7qvIr+qPyB5 M+3lA/jiLbX0Wc/8bWW951feDkPd9/afQx4R7PmFkwcKpy0w98kqJZqxgaRMm5A= X-Google-Smtp-Source: AGHT+IEm9OmcW1EygQT7vEUDlbtlv4h2N1WvtfNQey/kIkNs3N+VueaLJj0ofNg610z6pmXX1nLOOQ== X-Received: by 2002:ac2:55b4:0:b0:513:e6db:5bee with SMTP id y20-20020ac255b4000000b00513e6db5beemr2562112lfg.64.1710755518589; Mon, 18 Mar 2024 02:51:58 -0700 (PDT) Received: from arrakeen.starnux.net ([2a01:e0a:982:cbb0:8261:5fff:fe11:bdda]) by smtp.gmail.com with ESMTPSA id bq22-20020a5d5a16000000b0033ebf702e17sm7514974wrb.21.2024.03.18.02.51.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 18 Mar 2024 02:51:58 -0700 (PDT) From: Neil Armstrong Date: Mon, 18 Mar 2024 10:51:54 +0100 Subject: [PATCH v2 2/3] arm64: dts: qcom: sm8650: add support for the SM8650-HDK board Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240318-topic-sm8650-upstream-hdk-v2-2-b63a5d45a784@linaro.org> References: <20240318-topic-sm8650-upstream-hdk-v2-0-b63a5d45a784@linaro.org> In-Reply-To: <20240318-topic-sm8650-upstream-hdk-v2-0-b63a5d45a784@linaro.org> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Neil Armstrong , Vladimir Zapolskiy X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=32970; i=neil.armstrong@linaro.org; h=from:subject:message-id; bh=VnvBN06qsFnLPzrFSg+VJjRbwgqXpDHgP5NF42qXAIU=; b=owEBbQKS/ZANAwAKAXfc29rIyEnRAcsmYgBl+A672oxWRlAiw7dMgbSQPhQ23BbaYJXojmUIllq2 oBbfj+GJAjMEAAEKAB0WIQQ9U8YmyFYF/h30LIt33NvayMhJ0QUCZfgOuwAKCRB33NvayMhJ0ZuND/ sEvvZNaZUA+JHOc3oTulAOSFtDTow9X6/Vn9LqTu1pC6uHBXbXvJxrlU0BkpqbCoMppc0tkzD4UQyc VlMKxxzhXU2V+8RfaFDmGUXTEnBLJskrBviuvzqCZV7HNAMb3TE/vVqCTZ1VUq4W0z1nj9gSLrFEOR oWexYbgYALG7wFdqAGn8z+thUC334sHeui0M33s1JBoS6OZYB1in515nLFMDdFap9CsPq7QL00DN76 NbpYkM6cAKIlezPR/Lm+BPJcCoL+HrqN2fdt5o4ft2VhdkiOyEyZfkjsa3p4bKvj0pTWfthlMs2JrU /NdtrZwNDZmG3QQcqzKMyubDNZASABaKFg5pyHFzHhJrfaa4VxMJVHq5Xbldg82fGJD37ZN6WwVn7a F/qYSUJ0dDyEkCdE9hdrI4LWQ4rNUVn4cQHeSlmikJ/IkqcE3AnUK5TUe315AqqOj1a1+w8a7cCNm2 cxxv71qyw3N0eRWXrGB+QBYqkuwoXyvZZmmePNpuYUajnVV6etjlAEnLcRNm979vN3pjgrn0vcXXz9 f97CJQTJWCqexKp3FFbjfwJ8PmnQkyoVEe8HAUYjLOV8WL12alSmE7NRG3z03Nmr/qcfQQXlJrYXPi tzRq+Llq67081m2hsVxxKcoy9kRrELU5R6wDum6yGHg9T2+fgWaGUL2uuVcg== X-Developer-Key: i=neil.armstrong@linaro.org; a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE The SM8650-HDK is an embedded development platforms for the Snapdragon 8 Gen 3 SoC aka SM8650, with the following features: - Qualcomm SM8650 SoC - 16GiB On-board LPDDR5 - On-board WiFi 7 + Bluetooth 5.3/BLE - On-board UFS4.0 - M.2 Key B+M Gen3x2 PCIe Slot - HDMI Output - USB-C Connector with DP Almode & Audio Accessory mode - Micro-SDCard Slot - Audio Jack with Playback and Microphone - 2 On-board Analog microphones - 2 On-board Speakers - 96Boards Compatible Low-Speed and High-Speed connectors [1] - For Camera, Sensors and external Display cards - Compatible with the Linaro Debug board [2] - SIM Slot for Modem - Debug connectors - 6x On-Board LEDs Product Page: [3] [1] https://www.96boards.org/specifications/ [2] https://git.codelinaro.org/linaro/qcomlt/debugboard [3] https://www.lantronix.com/products/snapdragon-8-gen-3-mobile-hardware-development-kit/ Reviewed-by: Konrad Dybcio Reviewed-by: Vladimir Zapolskiy Tested-by: Vladimir Zapolskiy Signed-off-by: Neil Armstrong --- arch/arm64/boot/dts/qcom/Makefile | 1 + arch/arm64/boot/dts/qcom/sm8650-hdk.dts | 1259 +++++++++++++++++++++++++++++++ 2 files changed, 1260 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile index 7d40ec5e7d21..4f48c98451de 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -241,6 +241,7 @@ dtb-$(CONFIG_ARCH_QCOM) += sm8450-sony-xperia-nagara-pdx224.dtb dtb-$(CONFIG_ARCH_QCOM) += sm8550-hdk.dtb dtb-$(CONFIG_ARCH_QCOM) += sm8550-mtp.dtb dtb-$(CONFIG_ARCH_QCOM) += sm8550-qrd.dtb +dtb-$(CONFIG_ARCH_QCOM) += sm8650-hdk.dtb dtb-$(CONFIG_ARCH_QCOM) += sm8650-mtp.dtb dtb-$(CONFIG_ARCH_QCOM) += sm8650-qrd.dtb dtb-$(CONFIG_ARCH_QCOM) += x1e80100-crd.dtb diff --git a/arch/arm64/boot/dts/qcom/sm8650-hdk.dts b/arch/arm64/boot/dts/qcom/sm8650-hdk.dts new file mode 100644 index 000000000000..cf317f4ead69 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sm8650-hdk.dts @@ -0,0 +1,1259 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024, Linaro Limited + */ + +/dts-v1/; + +#include +#include +#include "sm8650.dtsi" +#include "pm8010.dtsi" +#include "pm8550.dtsi" +#include "pm8550b.dtsi" +#define PMK8550VE_SID 8 +#include "pm8550ve.dtsi" +#include "pm8550vs.dtsi" +#include "pmk8550.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. SM8650 HDK"; + compatible = "qcom,sm8650-hdk", "qcom,sm8650"; + chassis-type = "embedded"; + + aliases { + serial0 = &uart15; + serial1 = &uart14; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + hdmi-out { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi_connector_out: endpoint { + remote-endpoint = <<9611_out>; + }; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + + pinctrl-0 = <&volume_up_n>; + pinctrl-names = "default"; + + key-volume-up { + label = "Volume Up"; + linux,code = ; + gpios = <&pm8550_gpios 6 GPIO_ACTIVE_LOW>; + debounce-interval = <15>; + linux,can-disable; + wakeup-source; + }; + }; + + leds { + compatible = "gpio-leds"; + + led-0 { + function = LED_FUNCTION_BLUETOOTH; + color = ; + gpios = <&pm8550_gpios 11 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "bluetooth-power"; + default-state = "off"; + }; + + led-1 { + function = LED_FUNCTION_INDICATOR; + color = ; + gpios = <&pm8550b_gpios 9 GPIO_ACTIVE_HIGH>; + default-state = "off"; + panic-indicator; + }; + + led-2 { + function = LED_FUNCTION_WLAN; + color = ; + gpios = <&pm8550b_gpios 10 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "phy0tx"; + default-state = "off"; + }; + }; + + pmic-glink { + compatible = "qcom,sm8650-pmic-glink", + "qcom,sm8550-pmic-glink", + "qcom,pmic-glink"; + #address-cells = <1>; + #size-cells = <0>; + orientation-gpios = <&tlmm 29 GPIO_ACTIVE_HIGH>; + + connector@0 { + compatible = "usb-c-connector"; + reg = <0>; + + power-role = "dual"; + data-role = "dual"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + pmic_glink_hs_in: endpoint { + remote-endpoint = <&usb_1_dwc3_hs>; + }; + }; + + port@1 { + reg = <1>; + + pmic_glink_ss_in: endpoint { + remote-endpoint = <&usb_dp_qmpphy_out>; + }; + }; + + port@2 { + reg = <2>; + + pmic_glink_sbu: endpoint { + remote-endpoint = <&wcd_usbss_sbu_mux>; + }; + }; + }; + }; + }; + + lt9611_1v2: regulator-lt9611-1v2 { + compatible = "regulator-fixed"; + + regulator-name = "LT9611_1V2"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + + vin-supply = <&vph_pwr>; + gpio = <&tlmm 79 GPIO_ACTIVE_HIGH>; + + enable-active-high; + }; + + lt9611_3v3: regulator-lt9611-3v3 { + compatible = "regulator-fixed"; + + regulator-name = "LT9611_3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + vin-supply = <&vreg_bob_3v3>; + gpio = <&tlmm 78 GPIO_ACTIVE_HIGH>; + + enable-active-high; + }; + + sound { + compatible = "qcom,sm8650-sndcard", "qcom,sm8450-sndcard"; + model = "SM8650-HDK"; + audio-routing = "SpkrLeft IN", "WSA_SPK1 OUT", + "SpkrRight IN", "WSA_SPK2 OUT", + "IN1_HPHL", "HPHL_OUT", + "IN2_HPHR", "HPHR_OUT", + "AMIC1", "MIC BIAS1", + "AMIC2", "MIC BIAS2", + "AMIC5", "MIC BIAS4", + "TX SWR_INPUT0", "ADC1_OUTPUT", + "TX SWR_INPUT1", "ADC2_OUTPUT", + "TX SWR_INPUT3", "ADC4_OUTPUT"; + + wcd-playback-dai-link { + link-name = "WCD Playback"; + + cpu { + sound-dai = <&q6apmbedai RX_CODEC_DMA_RX_0>; + }; + + codec { + sound-dai = <&wcd939x 0>, <&swr1 0>, <&lpass_rxmacro 0>; + }; + + platform { + sound-dai = <&q6apm>; + }; + }; + + wcd-capture-dai-link { + link-name = "WCD Capture"; + + cpu { + sound-dai = <&q6apmbedai TX_CODEC_DMA_TX_3>; + }; + + codec { + sound-dai = <&wcd939x 1>, <&swr2 0>, <&lpass_txmacro 0>; + }; + + platform { + sound-dai = <&q6apm>; + }; + }; + + wsa-dai-link { + link-name = "WSA Playback"; + + cpu { + sound-dai = <&q6apmbedai WSA_CODEC_DMA_RX_0>; + }; + + codec { + sound-dai = <&north_spkr>, <&south_spkr>, <&swr0 0>, <&lpass_wsamacro 0>; + }; + + platform { + sound-dai = <&q6apm>; + }; + }; + }; + + vph_pwr: vph-pwr-regulator { + compatible = "regulator-fixed"; + + regulator-name = "vph_pwr"; + regulator-min-microvolt = <3700000>; + regulator-max-microvolt = <3700000>; + + regulator-always-on; + regulator-boot-on; + }; + + vreg_bob_3v3: regulator-vreg-bob-3v3 { + compatible = "regulator-fixed"; + + regulator-name = "VREG_BOB_3P3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + vin-supply = <&vph_pwr>; + }; + + wcd939x: audio-codec { + compatible = "qcom,wcd9395-codec", "qcom,wcd9390-codec"; + + pinctrl-0 = <&wcd_default>; + pinctrl-names = "default"; + + qcom,micbias1-microvolt = <1800000>; + qcom,micbias2-microvolt = <1800000>; + qcom,micbias3-microvolt = <1800000>; + qcom,micbias4-microvolt = <1800000>; + qcom,mbhc-buttons-vthreshold-microvolt = <75000 150000 237000 500000 500000 500000 500000 500000>; + qcom,mbhc-headset-vthreshold-microvolt = <1700000>; + qcom,mbhc-headphone-vthreshold-microvolt = <50000>; + qcom,rx-device = <&wcd_rx>; + qcom,tx-device = <&wcd_tx>; + + reset-gpios = <&tlmm 107 GPIO_ACTIVE_LOW>; + + vdd-buck-supply = <&vreg_l15b_1p8>; + vdd-rxtx-supply = <&vreg_l15b_1p8>; + vdd-io-supply = <&vreg_l15b_1p8>; + vdd-mic-bias-supply = <&vreg_bob1>; + + #sound-dai-cells = <1>; + }; +}; + +&apps_rsc { + regulators-0 { + compatible = "qcom,pm8550-rpmh-regulators"; + + vdd-bob1-supply = <&vph_pwr>; + vdd-bob2-supply = <&vph_pwr>; + vdd-l2-l13-l14-supply = <&vreg_bob1>; + vdd-l3-supply = <&vreg_s1c_1p2>; + vdd-l5-l16-supply = <&vreg_bob1>; + vdd-l6-l7-supply = <&vreg_bob1>; + vdd-l8-l9-supply = <&vreg_bob1>; + vdd-l11-supply = <&vreg_s1c_1p2>; + vdd-l12-supply = <&vreg_s6c_1p8>; + vdd-l15-supply = <&vreg_s6c_1p8>; + vdd-l17-supply = <&vreg_bob2>; + + qcom,pmic-id = "b"; + + vreg_bob1: bob1 { + regulator-name = "vreg_bob1"; + regulator-min-microvolt = <3296000>; + regulator-max-microvolt = <3960000>; + regulator-initial-mode = ; + }; + + vreg_bob2: bob2 { + regulator-name = "vreg_bob2"; + regulator-min-microvolt = <2720000>; + regulator-max-microvolt = <3008000>; + regulator-initial-mode = ; + }; + + vreg_l2b_3p0: ldo2 { + regulator-name = "vreg_l2b_3p0"; + regulator-min-microvolt = <3008000>; + regulator-max-microvolt = <3008000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + + vreg_l5b_3p1: ldo5 { + regulator-name = "vreg_l5b_3p1"; + regulator-min-microvolt = <3104000>; + regulator-max-microvolt = <3104000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + + vreg_l6b_1p8: ldo6 { + regulator-name = "vreg_l6b_1p8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3008000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + + vreg_l7b_1p8: ldo7 { + regulator-name = "vreg_l7b_1p8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3008000>; + regulator-initial-mode = ; + }; + + vreg_l8b_1p8: ldo8 { + regulator-name = "vreg_l8b_1p8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3008000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + + vreg_l9b_2p9: ldo9 { + regulator-name = "vreg_l9b_2p9"; + regulator-min-microvolt = <2960000>; + regulator-max-microvolt = <3008000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + + vreg_l11b_1p2: ldo11 { + regulator-name = "vreg_l11b_1p2"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1504000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + + vreg_l12b_1p8: ldo12 { + regulator-name = "vreg_l12b_1p8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + + vreg_l13b_3p0: ldo13 { + regulator-name = "vreg_l13b_3p0"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + + vreg_l14b_3p2: ldo14 { + regulator-name = "vreg_l14b_3p2"; + regulator-min-microvolt = <3200000>; + regulator-max-microvolt = <3200000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + + vreg_l15b_1p8: ldo15 { + regulator-name = "vreg_l15b_1p8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + + vreg_l16b_2p8: ldo16 { + regulator-name = "vreg_l16b_2p8"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + + vreg_l17b_2p5: ldo17 { + regulator-name = "vreg_l17b_2p5"; + regulator-min-microvolt = <2504000>; + regulator-max-microvolt = <2504000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + }; + + regulators-1 { + compatible = "qcom,pm8550vs-rpmh-regulators"; + + vdd-l1-supply = <&vreg_s1c_1p2>; + vdd-l2-supply = <&vreg_s1c_1p2>; + vdd-l3-supply = <&vreg_s1c_1p2>; + vdd-s1-supply = <&vph_pwr>; + vdd-s2-supply = <&vph_pwr>; + vdd-s3-supply = <&vph_pwr>; + vdd-s4-supply = <&vph_pwr>; + vdd-s5-supply = <&vph_pwr>; + vdd-s6-supply = <&vph_pwr>; + + qcom,pmic-id = "c"; + + vreg_s1c_1p2: smps1 { + regulator-name = "vreg_s1c_1p2"; + regulator-min-microvolt = <1256000>; + regulator-max-microvolt = <1348000>; + regulator-initial-mode = ; + }; + + vreg_s2c_0p8: smps2 { + regulator-name = "vreg_s2c_0p8"; + regulator-min-microvolt = <852000>; + regulator-max-microvolt = <1036000>; + regulator-initial-mode = ; + }; + + vreg_s3c_0p9: smps3 { + regulator-name = "vreg_s3c_0p9"; + regulator-min-microvolt = <976000>; + regulator-max-microvolt = <1064000>; + regulator-initial-mode = ; + }; + + vreg_s4c_1p2: smps4 { + regulator-name = "vreg_s4c_1p2"; + regulator-min-microvolt = <1224000>; + regulator-max-microvolt = <1280000>; + regulator-initial-mode = ; + }; + + vreg_s5c_0p7: smps5 { + regulator-name = "vreg_s5c_0p7"; + regulator-min-microvolt = <752000>; + regulator-max-microvolt = <900000>; + regulator-initial-mode = ; + }; + + vreg_s6c_1p8: smps6 { + regulator-name = "vreg_s6c_1p8"; + regulator-min-microvolt = <1856000>; + regulator-max-microvolt = <2000000>; + regulator-initial-mode = ; + }; + + vreg_l1c_1p2: ldo1 { + regulator-name = "vreg_l1c_1p2"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + + vreg_l3c_1p2: ldo3 { + regulator-name = "vreg_l3c_1p2"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + }; + + regulators-2 { + compatible = "qcom,pm8550vs-rpmh-regulators"; + + vdd-l1-supply = <&vreg_s3c_0p9>; + + qcom,pmic-id = "d"; + + vreg_l1d_0p88: ldo1 { + regulator-name = "vreg_l1d_0p88"; + regulator-min-microvolt = <912000>; + regulator-max-microvolt = <920000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + }; + + regulators-3 { + compatible = "qcom,pm8550vs-rpmh-regulators"; + + vdd-l3-supply = <&vreg_s3c_0p9>; + + qcom,pmic-id = "e"; + + vreg_l3e_0p9: ldo3 { + regulator-name = "vreg_l3e_0p9"; + regulator-min-microvolt = <880000>; + regulator-max-microvolt = <920000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + }; + + regulators-4 { + compatible = "qcom,pm8550vs-rpmh-regulators"; + + vdd-l1-supply = <&vreg_s3c_0p9>; + vdd-l3-supply = <&vreg_s3c_0p9>; + + qcom,pmic-id = "g"; + + vreg_l1g_0p91: ldo1 { + regulator-name = "vreg_l1g_0p91"; + regulator-min-microvolt = <912000>; + regulator-max-microvolt = <920000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + + vreg_l3g_0p91: ldo3 { + regulator-name = "vreg_l3g_0p91"; + regulator-min-microvolt = <880000>; + regulator-max-microvolt = <912000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + }; + + regulators-5 { + compatible = "qcom,pm8550ve-rpmh-regulators"; + + vdd-l1-supply = <&vreg_s3c_0p9>; + vdd-l2-supply = <&vreg_s3c_0p9>; + vdd-l3-supply = <&vreg_s1c_1p2>; + vdd-s4-supply = <&vph_pwr>; + + qcom,pmic-id = "i"; + + vreg_s4i_0p85: smps4 { + regulator-name = "vreg_s4i_0p85"; + regulator-min-microvolt = <852000>; + regulator-max-microvolt = <1004000>; + regulator-initial-mode = ; + }; + + vreg_l1i_0p88: ldo1 { + regulator-name = "vreg_l1i_0p88"; + regulator-min-microvolt = <880000>; + regulator-max-microvolt = <912000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + + vreg_l2i_0p88: ldo2 { + regulator-name = "vreg_l2i_0p88"; + regulator-min-microvolt = <880000>; + regulator-max-microvolt = <912000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + + vreg_l3i_1p2: ldo3 { + regulator-name = "vreg_l3i_0p91"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + }; + + regulators-6 { + compatible = "qcom,pm8010-rpmh-regulators"; + qcom,pmic-id = "m"; + + vdd-l1-l2-supply = <&vreg_s1c_1p2>; + vdd-l3-l4-supply = <&vreg_bob2>; + vdd-l5-supply = <&vreg_s6c_1p8>; + vdd-l6-supply = <&vreg_bob1>; + vdd-l7-supply = <&vreg_bob1>; + + vreg_l1m_1p1: ldo1 { + regulator-name = "vreg_l1m_1p1"; + regulator-min-microvolt = <1104000>; + regulator-max-microvolt = <1104000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + + vreg_l2m_1p056: ldo2 { + regulator-name = "vreg_l2m_1p056"; + regulator-min-microvolt = <1056000>; + regulator-max-microvolt = <1056000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + + vreg_l3m_2p8: ldo3 { + regulator-name = "vreg_l3m_2p8"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-initial-mode = ; + }; + + vreg_l4m_2p8: ldo4 { + regulator-name = "vreg_l4m_2p8"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-initial-mode = ; + }; + + vreg_l5m_1p8: ldo5 { + regulator-name = "vreg_l5m_1p8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-initial-mode = ; + }; + + vreg_l6m_2p8: ldo6 { + regulator-name = "vreg_l6m_2p8"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-initial-mode = ; + }; + + vreg_l7m_2p96: ldo7 { + regulator-name = "vreg_l7m_2p96"; + regulator-min-microvolt = <2960000>; + regulator-max-microvolt = <2960000>; + regulator-initial-mode = ; + }; + }; + + regulators-7 { + compatible = "qcom,pm8010-rpmh-regulators"; + qcom,pmic-id = "n"; + + vdd-l1-l2-supply = <&vreg_s1c_1p2>; + vdd-l3-l4-supply = <&vreg_s6c_1p8>; + vdd-l5-supply = <&vreg_bob2>; + vdd-l6-supply = <&vreg_bob2>; + vdd-l7-supply = <&vreg_bob1>; + + vreg_l1n_1p1: ldo1 { + regulator-name = "vreg_l1n_1p1"; + regulator-min-microvolt = <1104000>; + regulator-max-microvolt = <1104000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + + vreg_l2n_1p056: ldo2 { + regulator-name = "vreg_l2n_1p056"; + regulator-min-microvolt = <1056000>; + regulator-max-microvolt = <1056000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + + vreg_l3n_1p8: ldo3 { + regulator-name = "vreg_l3n_1p8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-initial-mode = ; + }; + + vreg_l4n_1p8: ldo4 { + regulator-name = "vreg_l4n_1p8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-initial-mode = ; + }; + + vreg_l5n_2p8: ldo5 { + regulator-name = "vreg_l5n_2p8"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-initial-mode = ; + }; + + vreg_l6n_2p8: ldo6 { + regulator-name = "vreg_l6n_2p8"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-initial-mode = ; + }; + + vreg_l7n_3p3: ldo7 { + regulator-name = "vreg_l7n_3p3"; + regulator-min-microvolt = <3304000>; + regulator-max-microvolt = <3304000>; + regulator-initial-mode = ; + }; + }; +}; + +&dispcc { + status = "okay"; +}; + +&gpi_dma1 { + status = "okay"; +}; + +&i2c3 { + status = "okay"; + + wcd_usbss: typec-mux@e { + compatible = "qcom,wcd9395-usbss", "qcom,wcd9390-usbss"; + reg = <0xe>; + + vdd-supply = <&vreg_l15b_1p8>; + reset-gpios = <&tlmm 152 GPIO_ACTIVE_HIGH>; + + mode-switch; + orientation-switch; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + wcd_usbss_sbu_mux: endpoint { + remote-endpoint = <&pmic_glink_sbu>; + }; + }; + }; + }; +}; + +&i2c6 { + clock-frequency = <400000>; + status = "okay"; + + lt9611_codec: hdmi-bridge@2b { + compatible = "lontium,lt9611uxc"; + reg = <0x2b>; + + interrupts-extended = <&tlmm 85 IRQ_TYPE_EDGE_FALLING>; + + reset-gpios = <&tlmm 28 GPIO_ACTIVE_HIGH>; + + vdd-supply = <<9611_1v2>; + vcc-supply = <<9611_3v3>; + + pinctrl-0 = <<9611_irq_pin>, <<9611_rst_pin>; + pinctrl-names = "default"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + lt9611_a: endpoint { + remote-endpoint = <&mdss_dsi0_out>; + }; + }; + + port@2 { + reg = <2>; + + lt9611_out: endpoint { + remote-endpoint = <&hdmi_connector_out>; + }; + }; + }; + }; +}; + +&ipa { + qcom,gsi-loader = "self"; + memory-region = <&ipa_fw_mem>; + firmware-name = "qcom/sm8650/ipa_fws.mbn"; + status = "okay"; +}; + +&lpass_tlmm { + spkr_1_sd_n_active: spkr-1-sd-n-active-state { + pins = "gpio21"; + function = "gpio"; + drive-strength = <16>; + bias-disable; + output-low; + }; +}; + +&mdss { + status = "okay"; +}; + +&mdss_dsi0 { + vdda-supply = <&vreg_l3i_1p2>; + + status = "okay"; +}; + +&mdss_dsi0_out { + remote-endpoint = <<9611_a>; + data-lanes = <0 1 2 3>; +}; + +&mdss_dsi0_phy { + vdds-supply = <&vreg_l1i_0p88>; + + status = "okay"; +}; + +&mdss_dp0 { + status = "okay"; +}; + +&mdss_dp0_out { + data-lanes = <0 1>; + remote-endpoint = <&usb_dp_qmpphy_dp_in>; +}; + +&mdss_mdp { + status = "okay"; +}; + +&pcie0 { + wake-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>; + perst-gpios = <&tlmm 94 GPIO_ACTIVE_LOW>; + + pinctrl-0 = <&pcie0_default_state>; + pinctrl-names = "default"; + + status = "okay"; +}; + +&pcie0_phy { + vdda-phy-supply = <&vreg_l1i_0p88>; + vdda-pll-supply = <&vreg_l3i_1p2>; + + status = "okay"; +}; + +&pcie1 { + wake-gpios = <&tlmm 99 GPIO_ACTIVE_HIGH>; + perst-gpios = <&tlmm 97 GPIO_ACTIVE_LOW>; + + pinctrl-0 = <&pcie1_default_state>; + pinctrl-names = "default"; + + status = "okay"; +}; + +&pcie1_phy { + vdda-phy-supply = <&vreg_l3e_0p9>; + vdda-pll-supply = <&vreg_l3i_1p2>; + vdda-qref-supply = <&vreg_l1i_0p88>; + + status = "okay"; +}; + +&pcie_1_phy_aux_clk { + clock-frequency = <1000>; +}; + +&pm8550_gpios { + sdc2_card_det_n: sdc2-card-det-state { + pins = "gpio12"; + function = "normal"; + bias-pull-up; + input-enable; + output-disable; + power-source = <1>; /* 1.8 V */ + }; + + volume_up_n: volume-up-n-state { + pins = "gpio6"; + function = "normal"; + bias-pull-up; + input-enable; + power-source = <1>; + }; +}; + +/* The RGB signals are routed to 3 separate LEDs on the HDK8650 */ +&pm8550_pwm { + #address-cells = <1>; + #size-cells = <0>; + + status = "okay"; + + led@1 { + reg = <1>; + function = LED_FUNCTION_STATUS; + color = ; + default-state = "off"; + }; + + led@2 { + reg = <2>; + function = LED_FUNCTION_STATUS; + color = ; + default-state = "off"; + }; + + led@3 { + reg = <3>; + function = LED_FUNCTION_STATUS; + color = ; + default-state = "off"; + }; +}; + +&pm8550b_eusb2_repeater { + vdd18-supply = <&vreg_l15b_1p8>; + vdd3-supply = <&vreg_l5b_3p1>; +}; + +&pmk8550_rtc { + status = "okay"; +}; + +&pon_pwrkey { + status = "okay"; +}; + +&pon_resin { + linux,code = ; + + status = "okay"; +}; + +&qup_i2c3_data_clk { + /* Use internal I2C pull-up */ + bias-pull-up = <2200>; +}; + +&qupv3_id_0 { + status = "okay"; +}; + +&qupv3_id_1 { + status = "okay"; +}; + +&remoteproc_adsp { + firmware-name = "qcom/sm8650/adsp.mbn", + "qcom/sm8650/adsp_dtb.mbn"; + + status = "okay"; +}; + +&remoteproc_cdsp { + firmware-name = "qcom/sm8650/cdsp.mbn", + "qcom/sm8650/cdsp_dtb.mbn"; + + status = "okay"; +}; + +&remoteproc_mpss { + firmware-name = "qcom/sm8650/modem.mbn", + "qcom/sm8650/modem_dtb.mbn"; + + status = "okay"; +}; + +&sdhc_2 { + cd-gpios = <&pm8550_gpios 12 GPIO_ACTIVE_HIGH>; + + vmmc-supply = <&vreg_l9b_2p9>; + vqmmc-supply = <&vreg_l8b_1p8>; + bus-width = <4>; + no-sdio; + no-mmc; + + pinctrl-0 = <&sdc2_default>, <&sdc2_card_det_n>; + pinctrl-1 = <&sdc2_sleep>, <&sdc2_card_det_n>; + pinctrl-names = "default", "sleep"; + + status = "okay"; +}; + +&sleep_clk { + clock-frequency = <32000>; +}; + +&swr0 { + status = "okay"; + + /* WSA8845, Speaker North */ + north_spkr: speaker@0,0 { + compatible = "sdw20217020400"; + reg = <0 0>; + pinctrl-0 = <&spkr_1_sd_n_active>; + pinctrl-names = "default"; + powerdown-gpios = <&lpass_tlmm 21 GPIO_ACTIVE_LOW>; + #sound-dai-cells = <0>; + sound-name-prefix = "SpkrLeft"; + vdd-1p8-supply = <&vreg_l15b_1p8>; + vdd-io-supply = <&vreg_l3c_1p2>; + }; + + /* WSA8845, Speaker South */ + south_spkr: speaker@0,1 { + compatible = "sdw20217020400"; + reg = <0 1>; + pinctrl-0 = <&spkr_2_sd_n_active>; + pinctrl-names = "default"; + powerdown-gpios = <&tlmm 77 GPIO_ACTIVE_LOW>; + #sound-dai-cells = <0>; + sound-name-prefix = "SpkrRight"; + vdd-1p8-supply = <&vreg_l15b_1p8>; + vdd-io-supply = <&vreg_l3c_1p2>; + }; +}; + +&swr1 { + status = "okay"; + + /* WCD9395 RX */ + wcd_rx: codec@0,4 { + compatible = "sdw20217010e00"; + reg = <0 4>; + + /* + * WCD9395 RX Port 1 (HPH_L/R) <=> SWR1 Port 1 (HPH_L/R) + * WCD9395 RX Port 2 (CLSH) <=> SWR1 Port 2 (CLSH) + * WCD9395 RX Port 3 (COMP_L/R) <=> SWR1 Port 3 (COMP_L/R) + * WCD9395 RX Port 4 (LO) <=> SWR1 Port 4 (LO) + * WCD9395 RX Port 5 (DSD_L/R) <=> SWR1 Port 5 (DSD_L/R) + * WCD9395 RX Port 6 (HIFI_PCM_L/R) <=> SWR1 Port 9 (HIFI_PCM_L/R) + */ + qcom,rx-port-mapping = <1 2 3 4 5 9>; + }; +}; + +&swr2 { + status = "okay"; + + /* WCD9395 TX */ + wcd_tx: codec@0,3 { + compatible = "sdw20217010e00"; + reg = <0 3>; + + /* + * WCD9395 TX Port 1 (ADC1,2,3,4) <=> SWR2 Port 2 (TX SWR_INPUT 0,1,2,3) + * WCD9395 TX Port 2 (ADC3,4 & DMIC0,1) <=> SWR2 Port 2 (TX SWR_INPUT 0,1,2,3) + * WCD9395 TX Port 3 (DMIC0,1,2,3 & MBHC) <=> SWR2 Port 3 (TX SWR_INPUT 4,5,6,7) + * WCD9395 TX Port 4 (DMIC4,5,6,7) <=> SWR2 Port 4 (TX SWR_INPUT 8,9,10,11) + */ + qcom,tx-port-mapping = <2 2 3 4>; + }; +}; + +&tlmm { + /* Reserved I/Os for NFC */ + gpio-reserved-ranges = <32 8>, <74 1>; + + bt_default: bt-default-state { + bt-en-pins { + pins = "gpio17"; + function = "gpio"; + drive-strength = <16>; + bias-disable; + }; + + sw-ctrl-pins { + pins = "gpio18"; + function = "gpio"; + bias-pull-down; + }; + }; + + lt9611_irq_pin: lt9611-irq-state { + pins = "gpio85"; + function = "gpio"; + bias-disable; + }; + + lt9611_rst_pin: lt9611-rst-state { + pins = "gpio28"; + function = "gpio"; + output-high; + }; + + spkr_2_sd_n_active: spkr-2-sd-n-active-state { + pins = "gpio77"; + function = "gpio"; + drive-strength = <16>; + bias-disable; + output-low; + }; + + wcd_default: wcd-reset-n-active-state { + pins = "gpio107"; + function = "gpio"; + drive-strength = <16>; + bias-disable; + output-low; + }; +}; + +&uart14 { + status = "okay"; + + bluetooth { + compatible = "qcom,wcn7850-bt"; + + vddio-supply = <&vreg_l3c_1p2>; + vddaon-supply = <&vreg_l15b_1p8>; + vdddig-supply = <&vreg_s3c_0p9>; + vddrfa0p8-supply = <&vreg_s3c_0p9>; + vddrfa1p2-supply = <&vreg_s1c_1p2>; + vddrfa1p9-supply = <&vreg_s6c_1p8>; + + max-speed = <3200000>; + + enable-gpios = <&tlmm 17 GPIO_ACTIVE_HIGH>; + swctrl-gpios = <&tlmm 18 GPIO_ACTIVE_HIGH>; + + pinctrl-0 = <&bt_default>; + pinctrl-names = "default"; + }; +}; + +&uart15 { + status = "okay"; +}; + +&ufs_mem_hc { + reset-gpios = <&tlmm 210 GPIO_ACTIVE_LOW>; + + vcc-supply = <&vreg_l17b_2p5>; + vcc-max-microamp = <1300000>; + vccq-supply = <&vreg_l1c_1p2>; + vccq-max-microamp = <1200000>; + + status = "okay"; +}; + +&ufs_mem_phy { + vdda-phy-supply = <&vreg_l1d_0p88>; + vdda-pll-supply = <&vreg_l3i_1p2>; + + status = "okay"; +}; + +/* + * DPAUX -> WCD9395 -> USB_SBU -> USB-C + * eUSB2 DP/DM -> PM85550HS -> eUSB2 DP/DM -> WCD9395 -> USB-C + * USB SS -> USB-C + */ + +&usb_1 { + status = "okay"; +}; + +&usb_1_dwc3 { + dr_mode = "otg"; + usb-role-switch; +}; + +&usb_1_dwc3_hs { + remote-endpoint = <&pmic_glink_hs_in>; +}; + +&usb_1_dwc3_ss { + remote-endpoint = <&usb_dp_qmpphy_usb_ss_in>; +}; + +&usb_1_hsphy { + vdd-supply = <&vreg_l1i_0p88>; + vdda12-supply = <&vreg_l3i_1p2>; + + phys = <&pm8550b_eusb2_repeater>; + + status = "okay"; +}; + +&usb_dp_qmpphy { + vdda-phy-supply = <&vreg_l3i_1p2>; + vdda-pll-supply = <&vreg_l3g_0p91>; + + orientation-switch; + + status = "okay"; +}; + +&usb_dp_qmpphy_dp_in { + remote-endpoint = <&mdss_dp0_out>; +}; + +&usb_dp_qmpphy_out { + remote-endpoint = <&pmic_glink_ss_in>; +}; + +&usb_dp_qmpphy_usb_ss_in { + remote-endpoint = <&usb_1_dwc3_ss>; +}; + +&xo_board { + clock-frequency = <76800000>; +}; From patchwork Mon Mar 18 09:51:55 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 13595177 Received: from mail-wm1-f42.google.com (mail-wm1-f42.google.com [209.85.128.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 221D3360AE for ; Mon, 18 Mar 2024 09:52:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.42 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1710755523; cv=none; b=tjPu/gKHSrgfPEyTPqUWEMdI7slywAI0OAidHvFbu14AOxBtllffS+7nX3WOR3121310jKMLtSTK7f74In7bsrO/1jYmynekzukFoH+hq5dGiildGVQHqLTryrTdT6MzJ3Ha5mPuCn3xHl406GW38XXAEkAcSP3bW2JGgQ2r3SU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1710755523; c=relaxed/simple; bh=85uE+8Fjpwsh2LnNpzvvU1BMuhBy7A4cC4byHgOBI8E=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=QhCQAGcvYdpgfgmTuRy3PyqYcdYUNwSZOpmHP1Yhgt2WECx1FRfAK7ibITnnQrTTOrtgtQM3lb8eHOL2+q7PIDFyskr4vrdZ3Ad4E1RM3Oje281cxvaOIhiIk7I5gOGbHuLyC/N2W8U3oRM0oXAvH8JQKG9RmZToj2fFSAXRXMM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=zEwoP8QH; arc=none smtp.client-ip=209.85.128.42 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="zEwoP8QH" Received: by mail-wm1-f42.google.com with SMTP id 5b1f17b1804b1-41413f7b2dfso1995725e9.2 for ; Mon, 18 Mar 2024 02:52:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1710755519; x=1711360319; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=t6M3ghle38laAzVYOE7o4DnWpg3uW1ezRM+qkQnAMfs=; b=zEwoP8QHoSFF5ARRHt9ShuOigIKhdKHQNgZ3Pl8KmDUB2CQAbc2y5fM8ogl0egkGro RMZa0LeIxFdQdAp1GQNsnLpLNE3tt5UTXQ1p/ojbOY3GsIvnrR5AuJaJul2ig18XRQGT qeI2/M6XTNMRictAENaR6XVj1w6XDj9IRKd/h4bQZEs5kq34mWwnF83pNBgKvFTFpinw pIx2IgylQfTnUXzLvAWIPQtkrqSGUpHYyXG1IJdM7CwIQGoyKkdQ2r8vDhY2gcAMQikl O5Di1N9wfV9sje1bAGT2JK+hJFCpbSWHcJoksYq738quQYiMi1r7lDkW0H2xVZMBQJ+n 4rXA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1710755519; x=1711360319; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=t6M3ghle38laAzVYOE7o4DnWpg3uW1ezRM+qkQnAMfs=; b=RE5KGLlNUL6sp6ZUutXj8D8hM3098423WmMBb4/nsZdq3AV88RAboQ/Xrj+jCmXiub gDU5p5nKc0v02DSObArxWPL35z/QebWk7CyAllCScCVRHdcgfx1dNVNCd5V+3XJJGRMM 0l4OAyUXNpUDk3W2QsCRpZi6Ew29n0H6zUrwfBUXO9a73UawV63z8zmLqOqfY5RfXCMr uCObYsUxmDhsn3sN0sM/pxnQ/QCi3A6dyWzwYPPLcNbJiAmtuOpMHfKP8OZcrop4fwLS mfjmJ+8KUKGmsFz8E42Rr1ZFfqH4t2rTm3Xk8uzk+PqKfV/1FAA4CJmmJtvEfnCM8P3n PBbA== X-Gm-Message-State: AOJu0Yw9hDIE++nEvmN271vOn48doterOWzfiXpdWbUG2v2Ds2M21/R/ sJVCpO5ux4DL2y+lLV47wPZ7IIxjPI294Z7gChULQK0vl5QrF8GTn8if9t+tBoQ= X-Google-Smtp-Source: AGHT+IF2HI/BmNF35Zi08UFOkoo17dDCo4BOu3n3+i5NQ8yjI0vs6MLB+m7l/e0pkXjiCZzUoZo6Gw== X-Received: by 2002:a05:600c:1c84:b0:413:ff10:cee with SMTP id k4-20020a05600c1c8400b00413ff100ceemr7060485wms.13.1710755519463; Mon, 18 Mar 2024 02:51:59 -0700 (PDT) Received: from arrakeen.starnux.net ([2a01:e0a:982:cbb0:8261:5fff:fe11:bdda]) by smtp.gmail.com with ESMTPSA id bq22-20020a5d5a16000000b0033ebf702e17sm7514974wrb.21.2024.03.18.02.51.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 18 Mar 2024 02:51:59 -0700 (PDT) From: Neil Armstrong Date: Mon, 18 Mar 2024 10:51:55 +0100 Subject: [PATCH v2 3/3] arch: arm64: dts: sm8650-hdk: add support for the Display Card overlay Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240318-topic-sm8650-upstream-hdk-v2-3-b63a5d45a784@linaro.org> References: <20240318-topic-sm8650-upstream-hdk-v2-0-b63a5d45a784@linaro.org> In-Reply-To: <20240318-topic-sm8650-upstream-hdk-v2-0-b63a5d45a784@linaro.org> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Neil Armstrong , Vladimir Zapolskiy X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=4520; i=neil.armstrong@linaro.org; h=from:subject:message-id; bh=85uE+8Fjpwsh2LnNpzvvU1BMuhBy7A4cC4byHgOBI8E=; b=owEBbQKS/ZANAwAKAXfc29rIyEnRAcsmYgBl+A67Qvv0BipxV7Cdf1iVbpyb2Mx7NR7Mj3zB5Ucw wAeqx2iJAjMEAAEKAB0WIQQ9U8YmyFYF/h30LIt33NvayMhJ0QUCZfgOuwAKCRB33NvayMhJ0fH5EA CGi8RYv4ROo3RqL7N5IgqFCgSuVqYHWsRxC6frOyptndxIMwbO9egwHe5T36N9aV5uJPJs6W+ArGKk E7X7AA2TDGi7LrjSNa4xkzWYpV+1AR5vS2Xq+rnLyLEcS/RA5rN+tNBI4MhKRCRmRF/aRLCIjNJTHf EEaAOqPhUnfYmDMowiJITIby2AJ0sAr6f0pPnAZDQPCq6V/IuJ/G7NFC6lPbL1TkGh7XZFnGIPpLz/ 5LU5Ms/Iixkh0pThxrbTB8d/+QkQRZsDfxNxllxtdIfPWlcdPPezsNR5Otv0q/GtdUM3vAHGLcLpIX QoVPBzKwh5R58TLdx0FtRZH9FdOqMxuUySxP7j61gbg5QpU7u1w3yrWFPwpuYKoBRDWMhJOIg0QHqR ILDM+t9Zh08/Hd3CQJ83lLxueGQzUWUpAkx9R0pSntSJ4Mamt/bA1Xnjwj4p4aqPiXhdsACfPVKLwp uRGlmk2BemadYKzBbIY8/4h8hoRHtG/5rhwekcXEF1g3tJHlyGE6N1Ws/ah66fA2AnGlPJkAFS0M92 QsTuWZHpe0VmVag5RUH3M7fcsQfHI0Kv5oxvwndlyUGJvcbp+NU9iFExNrw1qZhsqQnXGjLD4BUd20 A8T4sLCQyJZK3hhqD7ofv+VgenGLLt6oPibumucQ5bKkNrb1iUjAVNunP2BA== X-Developer-Key: i=neil.armstrong@linaro.org; a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE With the SM8650-HDK, a Display Card kit can be connected to provide a VTDR6130 display with Goodix Berlin Touch controller. In order to route the DSI lanes to the connector for the Display Card kit, a switch must be changed on the board. The HDMI nodes are disabled since the DSI lanes are shared with the DSI to HDMI transceiver. Add support for this card as an overlay and apply it it at build-time to the sm8650-hdk dtb. Reviewed-by: Vladimir Zapolskiy Signed-off-by: Neil Armstrong Tested-by: Vladimir Zapolskiy --- arch/arm64/boot/dts/qcom/Makefile | 4 + .../boot/dts/qcom/sm8650-hdk-display-card.dtso | 144 +++++++++++++++++++++ 2 files changed, 148 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile index 4f48c98451de..566997db4b37 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -241,6 +241,10 @@ dtb-$(CONFIG_ARCH_QCOM) += sm8450-sony-xperia-nagara-pdx224.dtb dtb-$(CONFIG_ARCH_QCOM) += sm8550-hdk.dtb dtb-$(CONFIG_ARCH_QCOM) += sm8550-mtp.dtb dtb-$(CONFIG_ARCH_QCOM) += sm8550-qrd.dtb + +sm8650-hdk-display-card-dtbs := sm8650-hdk.dtb sm8650-hdk-display-card.dtbo + +dtb-$(CONFIG_ARCH_QCOM) += sm8650-hdk-display-card.dtb dtb-$(CONFIG_ARCH_QCOM) += sm8650-hdk.dtb dtb-$(CONFIG_ARCH_QCOM) += sm8650-mtp.dtb dtb-$(CONFIG_ARCH_QCOM) += sm8650-qrd.dtb diff --git a/arch/arm64/boot/dts/qcom/sm8650-hdk-display-card.dtso b/arch/arm64/boot/dts/qcom/sm8650-hdk-display-card.dtso new file mode 100644 index 000000000000..83f2338e5bf4 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sm8650-hdk-display-card.dtso @@ -0,0 +1,144 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024, Linaro Limited + */ + +/* + * Display Card kit overlay + * This requires S5702 Switch 7 to be turned to OFF to route DSI0 to the display panel + */ + +#include +#include + +/dts-v1/; +/plugin/; + +&i2c6 { + status = "disabled"; +}; + +<9611_1v2 { + status = "disabled"; +}; + +<9611_3v3 { + status = "disabled"; +}; + +&vreg_bob_3v3 { + status = "disabled"; +}; + +<9611_codec { + status = "disabled"; +}; + +&mdss_dsi0 { + #address-cells = <1>; + #size-cells = <0>; + + panel@0 { + compatible = "visionox,vtdr6130"; + reg = <0>; + + reset-gpios = <&tlmm 133 GPIO_ACTIVE_LOW>; + + vddio-supply = <&vreg_l12b_1p8>; + vci-supply = <&vreg_l13b_3p0>; + vdd-supply = <&vreg_l11b_1p2>; + + pinctrl-0 = <&disp0_reset_n_active>, <&mdp_vsync>; + pinctrl-1 = <&disp0_reset_n_suspend>, <&mdp_vsync>; + pinctrl-names = "default", "sleep"; + + port { + panel0_in: endpoint { + remote-endpoint = <&mdss_dsi0_out>; + }; + }; + }; + + /* + * DTC requires to have both endpoints when compiling the overlay + * and also requires the #address/size-cells + reg properties + */ + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@1 { + reg = <1>; + + mdss_dsi0_out: endpoint { + remote-endpoint = <&panel0_in>; + }; + }; + }; +}; + +&spi4 { + /* DTC requires the #address/size-cells to compile DTBO */ + #address-cells = <1>; + #size-cells = <0>; + + status = "okay"; + + touchscreen@0 { + compatible = "goodix,gt9916"; + reg = <0>; + + interrupt-parent = <&tlmm>; + interrupts = <162 IRQ_TYPE_LEVEL_LOW>; + + reset-gpios = <&tlmm 161 GPIO_ACTIVE_LOW>; + + avdd-supply = <&vreg_l14b_3p2>; + + spi-max-frequency = <1000000>; + + touchscreen-size-x = <1080>; + touchscreen-size-y = <2400>; + + pinctrl-0 = <&ts_irq>, <&ts_reset>; + pinctrl-names = "default"; + }; +}; + +&tlmm { + disp0_reset_n_active: disp0-reset-n-active-state { + pins = "gpio133"; + function = "gpio"; + drive-strength = <8>; + bias-disable; + }; + + disp0_reset_n_suspend: disp0-reset-n-suspend-state { + pins = "gpio133"; + function = "gpio"; + drive-strength = <2>; + bias-pull-down; + }; + + mdp_vsync: mdp-vsync-state { + pins = "gpio86"; + function = "mdp_vsync"; + drive-strength = <2>; + bias-pull-down; + }; + + ts_irq: ts-irq-state { + pins = "gpio161"; + function = "gpio"; + drive-strength = <8>; + bias-pull-up; + output-disable; + }; + + ts_reset: ts-reset-state { + pins = "gpio162"; + function = "gpio"; + drive-strength = <8>; + bias-pull-up; + }; +};