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Add the check for C908 ID. Fixes: 65e9fb081877 ("drivers/perf: riscv_pmu_sbi: add support for PMU variant on T-Head C9xx cores") Signed-off-by: Qingfang Deng --- v2: add C908 ID check arch/riscv/errata/thead/errata.c | 5 +++-- arch/riscv/include/asm/vendorid_list.h | 2 ++ drivers/perf/riscv_pmu_sbi.c | 6 ++++-- 3 files changed, 9 insertions(+), 4 deletions(-) diff --git a/arch/riscv/errata/thead/errata.c b/arch/riscv/errata/thead/errata.c index b1c410bbc1ae..da3b34866d8f 100644 --- a/arch/riscv/errata/thead/errata.c +++ b/arch/riscv/errata/thead/errata.c @@ -125,8 +125,9 @@ static bool errata_probe_pmu(unsigned int stage, if (!IS_ENABLED(CONFIG_ERRATA_THEAD_PMU)) return false; - /* target-c9xx cores report arch_id and impid as 0 */ - if (arch_id != 0 || impid != 0) + /* Early c9xx cores report arch_id and impid as 0 */ + if (!((arch_id == 0 && impid == 0) || + (arch_id == THEAD_C908_ARCH_ID && impid == THEAD_C908_IMP_ID))) return false; if (stage == RISCV_ALTERNATIVES_EARLY_BOOT) diff --git a/arch/riscv/include/asm/vendorid_list.h b/arch/riscv/include/asm/vendorid_list.h index 2f2bb0c84f9a..57b3de510d38 100644 --- a/arch/riscv/include/asm/vendorid_list.h +++ b/arch/riscv/include/asm/vendorid_list.h @@ -8,5 +8,7 @@ #define ANDES_VENDOR_ID 0x31e #define SIFIVE_VENDOR_ID 0x489 #define THEAD_VENDOR_ID 0x5b7 +#define THEAD_C908_ARCH_ID 0x8000000009140d00 +#define THEAD_C908_IMP_ID 0x8a000 #endif diff --git a/drivers/perf/riscv_pmu_sbi.c b/drivers/perf/riscv_pmu_sbi.c index bbd6fe021b3a..34d8689982de 100644 --- a/drivers/perf/riscv_pmu_sbi.c +++ b/drivers/perf/riscv_pmu_sbi.c @@ -833,8 +833,10 @@ static int pmu_sbi_setup_irqs(struct riscv_pmu *pmu, struct platform_device *pde riscv_pmu_use_irq = true; } else if (IS_ENABLED(CONFIG_ERRATA_THEAD_PMU) && riscv_cached_mvendorid(0) == THEAD_VENDOR_ID && - riscv_cached_marchid(0) == 0 && - riscv_cached_mimpid(0) == 0) { + ((riscv_cached_marchid(0) == 0 && + riscv_cached_mimpid(0) == 0) || + (riscv_cached_marchid(0) == THEAD_C908_ARCH_ID && + riscv_cached_mimpid(0) == THEAD_C908_IMP_ID))) { riscv_pmu_irq_num = THEAD_C9XX_RV_IRQ_PMU; riscv_pmu_use_irq = true; } else if (riscv_isa_extension_available(NULL, XANDESPMU) &&