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[2003:c9:3f07:9e00:cac8:7036:72d9:8936]) by smtp.gmail.com with ESMTPSA id ew5-20020a05622a514500b00430c8b87b46sm1832001qtb.6.2024.03.18.04.16.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 18 Mar 2024 04:16:42 -0700 (PDT) From: Sebastian Ott To: linux-arm-kernel@lists.infradead.org Cc: Marc Zyngier , Oliver Upton Subject: [PATCH 1/4] KVM: arm64: add emulation for CTR_EL0 register Date: Mon, 18 Mar 2024 12:16:33 +0100 Message-ID: <20240318111636.10613-2-sebott@redhat.com> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20240318111636.10613-1-sebott@redhat.com> References: <20240318111636.10613-1-sebott@redhat.com> MIME-Version: 1.0 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240318_041829_543995_7F7854FB X-CRM114-Status: GOOD ( 15.08 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org CTR_EL0 is currently handled as an invariant register, thus guests will be presented with the host value of that register. Add emulation for CTR_EL0 and maintain a per vcpu value. The only thing that is allowed to be changed compared to the host value is to switch off the DIC bit which describes Icache invalidation requirements. Signed-off-by: Sebastian Ott --- arch/arm64/kvm/sys_regs.c | 44 +++++++++++++++++++++++++++++++-------- 1 file changed, 35 insertions(+), 9 deletions(-) diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c index 30253bd19917..b2019faa9d73 100644 --- a/arch/arm64/kvm/sys_regs.c +++ b/arch/arm64/kvm/sys_regs.c @@ -1871,10 +1871,42 @@ static bool access_ctr(struct kvm_vcpu *vcpu, struct sys_reg_params *p, if (p->is_write) return write_to_read_only(vcpu, p, r); - p->regval = read_sanitised_ftr_reg(SYS_CTR_EL0); + p->regval = __vcpu_sys_reg(vcpu, r->reg); return true; } +static u64 reset_ctr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd) +{ + u64 val = read_sanitised_ftr_reg(SYS_CTR_EL0); + + __vcpu_sys_reg(vcpu, rd->reg) = val; + return __vcpu_sys_reg(vcpu, rd->reg); +} + +static int get_ctr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd, + u64 *val) +{ + *val = __vcpu_sys_reg(vcpu, rd->reg); + return 0; +} + +static int set_ctr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd, + u64 val) +{ + u64 ctr_el0 = read_sanitised_ftr_reg(SYS_CTR_EL0); + + if (kvm_vm_has_ran_once(vcpu->kvm) && + val != __vcpu_sys_reg(vcpu, rd->reg)) + return -EBUSY; + + if (((ctr_el0 & ~CTR_EL0_DIC_MASK) != (val & ~CTR_EL0_DIC_MASK)) || + ((ctr_el0 & CTR_EL0_DIC_MASK) < (val & CTR_EL0_DIC_MASK))) + return -EINVAL; + + __vcpu_sys_reg(vcpu, rd->reg) = val; + return 0; +} + static bool access_clidr(struct kvm_vcpu *vcpu, struct sys_reg_params *p, const struct sys_reg_desc *r) { @@ -2461,7 +2493,8 @@ static const struct sys_reg_desc sys_reg_descs[] = { { SYS_DESC(SYS_CCSIDR2_EL1), undef_access }, { SYS_DESC(SYS_SMIDR_EL1), undef_access }, { SYS_DESC(SYS_CSSELR_EL1), access_csselr, reset_unknown, CSSELR_EL1 }, - { SYS_DESC(SYS_CTR_EL0), access_ctr }, + { SYS_DESC(SYS_CTR_EL0), access_ctr, .reset = reset_ctr, + .get_user = get_ctr, .set_user = set_ctr}, { SYS_DESC(SYS_SVCR), undef_access }, { PMU_SYS_REG(PMCR_EL0), .access = access_pmcr, .reset = reset_pmcr, @@ -3578,18 +3611,11 @@ FUNCTION_INVARIANT(midr_el1) FUNCTION_INVARIANT(revidr_el1) FUNCTION_INVARIANT(aidr_el1) -static u64 get_ctr_el0(struct kvm_vcpu *v, const struct sys_reg_desc *r) -{ - ((struct sys_reg_desc *)r)->val = read_sanitised_ftr_reg(SYS_CTR_EL0); - return ((struct sys_reg_desc *)r)->val; -} - /* ->val is filled in by kvm_sys_reg_table_init() */ static struct sys_reg_desc invariant_sys_regs[] __ro_after_init = { { SYS_DESC(SYS_MIDR_EL1), NULL, get_midr_el1 }, { SYS_DESC(SYS_REVIDR_EL1), NULL, get_revidr_el1 }, { SYS_DESC(SYS_AIDR_EL1), NULL, get_aidr_el1 }, - { SYS_DESC(SYS_CTR_EL0), NULL, get_ctr_el0 }, }; static int get_invariant_sys_reg(u64 id, u64 __user *uaddr) From patchwork Mon Mar 18 11:16:34 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastian Ott X-Patchwork-Id: 13595281 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1E78DC54E58 for ; Mon, 18 Mar 2024 11:19:37 +0000 (UTC) DKIM-Signature: v=1; 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[2003:c9:3f07:9e00:cac8:7036:72d9:8936]) by smtp.gmail.com with ESMTPSA id ew5-20020a05622a514500b00430c8b87b46sm1832001qtb.6.2024.03.18.04.16.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 18 Mar 2024 04:16:44 -0700 (PDT) From: Sebastian Ott To: linux-arm-kernel@lists.infradead.org Cc: Marc Zyngier , Oliver Upton Subject: [PATCH 2/4] KVM: arm64: ensure guest access to CTR_EL0 is trapped Date: Mon, 18 Mar 2024 12:16:34 +0100 Message-ID: <20240318111636.10613-3-sebott@redhat.com> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20240318111636.10613-1-sebott@redhat.com> References: <20240318111636.10613-1-sebott@redhat.com> MIME-Version: 1.0 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240318_041841_028824_62CBD3C5 X-CRM114-Status: GOOD ( 10.07 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Ensure that guest access to the CTR_EL0 register is trapped independent of cpu errata. Signed-off-by: Sebastian Ott --- arch/arm64/include/asm/kvm_emulate.h | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-) diff --git a/arch/arm64/include/asm/kvm_emulate.h b/arch/arm64/include/asm/kvm_emulate.h index b804fe832184..daaaf7664219 100644 --- a/arch/arm64/include/asm/kvm_emulate.h +++ b/arch/arm64/include/asm/kvm_emulate.h @@ -91,12 +91,7 @@ static inline void vcpu_reset_hcr(struct kvm_vcpu *vcpu) vcpu->arch.hcr_el2 |= HCR_TVM; } - if (cpus_have_final_cap(ARM64_HAS_EVT) && - !cpus_have_final_cap(ARM64_MISMATCHED_CACHE_TYPE)) - vcpu->arch.hcr_el2 |= HCR_TID4; - else - vcpu->arch.hcr_el2 |= HCR_TID2; - + vcpu->arch.hcr_el2 |= HCR_TID2; if (vcpu_el1_is_32bit(vcpu)) vcpu->arch.hcr_el2 &= ~HCR_RW; From patchwork Mon Mar 18 11:16:35 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastian Ott X-Patchwork-Id: 13595278 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id EB73DC54E58 for ; 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[2003:c9:3f07:9e00:cac8:7036:72d9:8936]) by smtp.gmail.com with ESMTPSA id ew5-20020a05622a514500b00430c8b87b46sm1832001qtb.6.2024.03.18.04.16.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 18 Mar 2024 04:16:46 -0700 (PDT) From: Sebastian Ott To: linux-arm-kernel@lists.infradead.org Cc: Marc Zyngier , Oliver Upton Subject: [PATCH 3/4] KVM: arm64: show writable masks for feature registers Date: Mon, 18 Mar 2024 12:16:35 +0100 Message-ID: <20240318111636.10613-4-sebott@redhat.com> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20240318111636.10613-1-sebott@redhat.com> References: <20240318111636.10613-1-sebott@redhat.com> MIME-Version: 1.0 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240318_041829_535192_5F67AD48 X-CRM114-Status: GOOD ( 15.11 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Instead of using ~0UL provide the actual writable mask for non-id feature registers in the output of the KVM_ARM_GET_REG_WRITABLE_MASKS ioctl. This changes the mask for the CTR_EL0 register. Signed-off-by: Sebastian Ott --- arch/arm64/kvm/sys_regs.c | 21 ++++++--------------- 1 file changed, 6 insertions(+), 15 deletions(-) diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c index b2019faa9d73..0f8fe7790c35 100644 --- a/arch/arm64/kvm/sys_regs.c +++ b/arch/arm64/kvm/sys_regs.c @@ -2489,12 +2489,12 @@ static const struct sys_reg_desc sys_reg_descs[] = { { SYS_DESC(SYS_CCSIDR_EL1), access_ccsidr }, { SYS_DESC(SYS_CLIDR_EL1), access_clidr, reset_clidr, CLIDR_EL1, - .set_user = set_clidr }, + .set_user = set_clidr, .val = ~0UL }, { SYS_DESC(SYS_CCSIDR2_EL1), undef_access }, { SYS_DESC(SYS_SMIDR_EL1), undef_access }, { SYS_DESC(SYS_CSSELR_EL1), access_csselr, reset_unknown, CSSELR_EL1 }, { SYS_DESC(SYS_CTR_EL0), access_ctr, .reset = reset_ctr, - .get_user = get_ctr, .set_user = set_ctr}, + .get_user = get_ctr, .set_user = set_ctr, .val = CTR_EL0_DIC_MASK}, { SYS_DESC(SYS_SVCR), undef_access }, { PMU_SYS_REG(PMCR_EL0), .access = access_pmcr, .reset = reset_pmcr, @@ -3934,20 +3934,11 @@ int kvm_vm_ioctl_get_reg_writable_masks(struct kvm *kvm, struct reg_mask_range * if (!is_feature_id_reg(encoding) || !reg->set_user) continue; - /* - * For ID registers, we return the writable mask. Other feature - * registers return a full 64bit mask. That's not necessary - * compliant with a given revision of the architecture, but the - * RES0/RES1 definitions allow us to do that. - */ - if (is_id_reg(encoding)) { - if (!reg->val || - (is_aa32_id_reg(encoding) && !kvm_supports_32bit_el0())) - continue; - val = reg->val; - } else { - val = ~0UL; + if (!reg->val || + (is_aa32_id_reg(encoding) && !kvm_supports_32bit_el0())) { + continue; } + val = reg->val; if (put_user(val, (masks + KVM_ARM_FEATURE_ID_RANGE_INDEX(encoding)))) return -EFAULT; From patchwork Mon Mar 18 11:16:36 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastian Ott X-Patchwork-Id: 13595280 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E0E01C54E58 for ; Mon, 18 Mar 2024 11:18:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=VWVsCiOhlG+6ofY5xR3grzPbys/S3Ac8N83s2RZ6avM=; b=A283HdIEgFmd7i 4e/8LjbN7g6h7v6+Wgrm5z6kUWie15pmNblUDJwjQx3G84rZk/ehB4HMVUzS+/BaOx5f2hTCWWlTz jp6nk2XdVsymJTgrB+/dvTV/r7bjl/8sQLMoKZwu8/e2RmijIGrL9gUfthm+OM5JG6jDJ6rSsq1KC DSJnrpP48DOTzUmVuJuyS5DHgKpC5vpdEC+L6PvXMKd7uJUax6C7BpyHjIDhLID7eSUeHlX2Mbpz6 sapBZvBreHrrYX7Xy3sjKH9oPkQC/Af7Zbw1HsBsrKZ6PiBAZfmDxhNgM0LTnL80eJ7oHT8TRTimS +Rs+YYl2MtDVAT+PEwJw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rmB0u-00000008K4h-1GzB; Mon, 18 Mar 2024 11:18:44 +0000 Received: from us-smtp-delivery-124.mimecast.com ([170.10.133.124]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rmB0h-00000008JzE-0gdu for linux-arm-kernel@lists.infradead.org; Mon, 18 Mar 2024 11:18:41 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1710760710; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=oFMV+ULG5vSKT1Js/EXDoZnCR2FmJwDa5+ffzYEWI4Y=; b=OQgDz3hLYY5of3E+MnIEaLiYFNSlFrqb0BrgmeBFSGkFhF+s3DwsoQPeD5TQGo77Da2er3 4tn2DvF02gGmdPiJGItS7W/HirryDM1oD7q1uM8TFMDSJdoMdCyz3wV9s7hKhG65Go3Q2c pKzeJzdC1SeuzzQO0qQgZUjNNefqsJc= Received: from mail-qt1-f199.google.com (mail-qt1-f199.google.com [209.85.160.199]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-496-Yf1rloODMqqDixlLlLa01g-1; Mon, 18 Mar 2024 07:16:50 -0400 X-MC-Unique: Yf1rloODMqqDixlLlLa01g-1 Received: by mail-qt1-f199.google.com with SMTP id d75a77b69052e-430d78c050cso6600781cf.1 for ; Mon, 18 Mar 2024 04:16:50 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1710760609; x=1711365409; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=oFMV+ULG5vSKT1Js/EXDoZnCR2FmJwDa5+ffzYEWI4Y=; b=fgyyF3J7a2IP0ONFPbEn8SEeeE6jle3LTrueKS5zop+k5juxL8hWcI6K9HAf97O9q2 6HprOtGgs2STgZBL2FNYJl2Z8o95BZVHgSh/6Ok1cjCjIeZzzsRImx7Un692NpP3/gP8 pqfGzdWXMja2gs/3SIS8L8h1OTMLxX4Cq54xogIIVygQBxq+qpW52V73tdQGJt9SHFf9 6gyl6tzGL8Cvj3U4z+nNB97hFtv0z0vbIXukRsyLkFqPQL0ftNlAwnc9r7MUtSqvt2iE tA55/DT+Px4n3nTK5bpNaqFtOIMZBACdFelukoSwWPBvwDMrjMPPZkY6zloF4L+hD7Zt 9h8w== X-Gm-Message-State: AOJu0YzIAwe6pWtE58vgWSrV83WvfYrfmxpRuy5LEPYm6DkFqhX8BW91 Fac6encG1X62mzksbLusGjY9RGJrk5NhpqmUeF67U/QILptjv7IWMTepA/+FmVG9n5Z1ceiU12A B7umsy/Arf9nthIiBZSu5x/2xhAMXe9kH7koTR9JE9FWi0Y4PmLbrp3iF3KjJ65FpRxq34qX9dr G7e0qzKsBMus3dtyXVjA5G1xh+zxg3SdNabeilNqLOqGq73nbpxFUmyQ== X-Received: by 2002:a05:622a:40e:b0:42f:20b6:d597 with SMTP id n14-20020a05622a040e00b0042f20b6d597mr12978257qtx.49.1710760608972; Mon, 18 Mar 2024 04:16:48 -0700 (PDT) X-Google-Smtp-Source: AGHT+IFaldE5CEBBwq6cAIiJUJBvsWrrhakaq4MSHUPZusm1UWgYsDh6Md4WWGKb8BpX5KIO8qXObg== X-Received: by 2002:a05:622a:40e:b0:42f:20b6:d597 with SMTP id n14-20020a05622a040e00b0042f20b6d597mr12978237qtx.49.1710760608591; Mon, 18 Mar 2024 04:16:48 -0700 (PDT) Received: from rh.redhat.com (p200300c93f079e00cac8703672d98936.dip0.t-ipconnect.de. [2003:c9:3f07:9e00:cac8:7036:72d9:8936]) by smtp.gmail.com with ESMTPSA id ew5-20020a05622a514500b00430c8b87b46sm1832001qtb.6.2024.03.18.04.16.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 18 Mar 2024 04:16:47 -0700 (PDT) From: Sebastian Ott To: linux-arm-kernel@lists.infradead.org Cc: Marc Zyngier , Oliver Upton Subject: [PATCH 4/4] KVM: selftests: aarch64: add tool to dump registers Date: Mon, 18 Mar 2024 12:16:36 +0100 Message-ID: <20240318111636.10613-5-sebott@redhat.com> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20240318111636.10613-1-sebott@redhat.com> References: <20240318111636.10613-1-sebott@redhat.com> MIME-Version: 1.0 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240318_041831_674972_78F9F0E9 X-CRM114-Status: GOOD ( 16.16 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Iterate over registers obtained via KVM_GET_REG_LIST, dump their values and writable masks. Signed-off-by: Sebastian Ott --- tools/testing/selftests/kvm/Makefile | 1 + .../testing/selftests/kvm/aarch64/dump_regs.c | 72 +++++++++++++++++++ 2 files changed, 73 insertions(+) create mode 100644 tools/testing/selftests/kvm/aarch64/dump_regs.c diff --git a/tools/testing/selftests/kvm/Makefile b/tools/testing/selftests/kvm/Makefile index 492e937fab00..3bbb163abb1e 100644 --- a/tools/testing/selftests/kvm/Makefile +++ b/tools/testing/selftests/kvm/Makefile @@ -145,6 +145,7 @@ TEST_GEN_PROGS_EXTENDED_x86_64 += x86_64/nx_huge_pages_test TEST_GEN_PROGS_aarch64 += aarch64/aarch32_id_regs TEST_GEN_PROGS_aarch64 += aarch64/arch_timer TEST_GEN_PROGS_aarch64 += aarch64/debug-exceptions +TEST_GEN_PROGS_aarch64 += aarch64/dump_regs TEST_GEN_PROGS_aarch64 += aarch64/hypercalls TEST_GEN_PROGS_aarch64 += aarch64/page_fault_test TEST_GEN_PROGS_aarch64 += aarch64/psci_test diff --git a/tools/testing/selftests/kvm/aarch64/dump_regs.c b/tools/testing/selftests/kvm/aarch64/dump_regs.c new file mode 100644 index 000000000000..390b4629ca12 --- /dev/null +++ b/tools/testing/selftests/kvm/aarch64/dump_regs.c @@ -0,0 +1,72 @@ +#include +#include "kvm_util.h" +#include "processor.h" +#include "test_util.h" +#include + +static uint64_t masks[KVM_ARM_FEATURE_ID_RANGE_SIZE]; + +static void guest_code(void) +{ +} + +static void get_writable_masks(struct kvm_vm *vm) +{ + struct reg_mask_range range = { + .addr = (__u64)masks, + }; + + memset(range.reserved, 0, sizeof(range.reserved)); + vm_ioctl(vm, KVM_ARM_GET_REG_WRITABLE_MASKS, &range); +} + +#define kvm_sys_reg_Op0(id) (((id) & KVM_REG_ARM64_SYSREG_OP0_MASK) >> KVM_REG_ARM64_SYSREG_OP0_SHIFT) +#define kvm_sys_reg_Op1(id) (((id) & KVM_REG_ARM64_SYSREG_OP1_MASK) >> KVM_REG_ARM64_SYSREG_OP1_SHIFT) +#define kvm_sys_reg_CRn(id) (((id) & KVM_REG_ARM64_SYSREG_CRN_MASK) >> KVM_REG_ARM64_SYSREG_CRN_SHIFT) +#define kvm_sys_reg_CRm(id) (((id) & KVM_REG_ARM64_SYSREG_CRM_MASK) >> KVM_REG_ARM64_SYSREG_CRM_SHIFT) +#define kvm_sys_reg_Op2(id) (((id) & KVM_REG_ARM64_SYSREG_OP2_MASK) >> KVM_REG_ARM64_SYSREG_OP2_SHIFT) + +static bool reg_in_feature_id_range(uint64_t reg) +{ + return kvm_sys_reg_Op0(reg) == 3 && + kvm_sys_reg_Op1(reg) >= 0 && kvm_sys_reg_Op1(reg) <= 3 && + kvm_sys_reg_CRn(reg) == 0 && + kvm_sys_reg_CRm(reg) >= 0 && kvm_sys_reg_CRm(reg) <= 7 && + kvm_sys_reg_Op2(reg) >= 0 && kvm_sys_reg_Op2(reg) <= 7; +} + +static uint64_t reg_get_mask(uint64_t reg) +{ + int idx = KVM_ARM_FEATURE_ID_RANGE_IDX(kvm_sys_reg_Op0(reg), kvm_sys_reg_Op1(reg), + kvm_sys_reg_CRn(reg), kvm_sys_reg_CRm(reg), + kvm_sys_reg_Op2(reg)); + + return reg_in_feature_id_range(reg) ? masks[idx] : 0; +} + +static void dump_regs(struct kvm_vcpu *vcpu) +{ + struct kvm_reg_list *reg_list = vcpu_get_reg_list(vcpu); + uint64_t reg, val[8]; + int i, ret; + + for (i = 0; i < reg_list->n; i++) { + reg = reg_list->reg[i]; + ret = __vcpu_get_reg(vcpu, reg, val); + if (!ret) + pr_info("%lx : %16lx %lx\n", reg, val[0], reg_get_mask(reg)); + } + + free(reg_list); +} + +int main(void) +{ + struct kvm_vcpu *vcpu; + struct kvm_vm *vm; + + vm = vm_create_with_one_vcpu(&vcpu, guest_code); + get_writable_masks(vm); + dump_regs(vcpu); + kvm_vm_free(vm); +}