From patchwork Tue Mar 19 09:12:48 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Jani Nikula X-Patchwork-Id: 13596462 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 26EAFC54E5D for ; Tue, 19 Mar 2024 09:13:10 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8573010F8BF; Tue, 19 Mar 2024 09:13:07 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="MotpkK50"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.11]) by gabe.freedesktop.org (Postfix) with ESMTPS id AE4ED10F8BC; Tue, 19 Mar 2024 09:13:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1710839585; x=1742375585; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=oimg/3tJ3SUDn3YN9ahp7dpj5f9XoHvLgB9jzXRMP/I=; b=MotpkK50rHEQoHCKx0ZFFfWV7KU/yDah/sziK85ArVWa2o/uTaW+aZDE C+4l7adL6MxE2Xz5Wu/+4cu7FVPmNbHfHsW7zAZubL5JIrdaO6bmFmij8 GX5VCeflvQZdVkmh/Q6jhN1R4uprRwxkHnsTcjSdfQH5YUl8Vdm+Vt+S1 p1PBlSAfWD4B+bczaoXuvecdJP+3yjmGUsE9Aksa5y+ezAXpb5f9f8ssx tQ0Gd0vh/zW0QUkSkPOHk1YJ3etBvDaXcTmqE7LVWdiKrYYkcHah/E+Y/ hjj9vwfGVEmS0OqSyjbuPiRsA2xr8NY+2HlIPw/J7OwMxwVkWq4KuZjpZ A==; X-IronPort-AV: E=McAfee;i="6600,9927,11017"; a="16238027" X-IronPort-AV: E=Sophos;i="6.07,136,1708416000"; d="scan'208";a="16238027" Received: from orviesa009.jf.intel.com ([10.64.159.149]) by orvoesa103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Mar 2024 02:13:05 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,136,1708416000"; d="scan'208";a="13780632" Received: from rcritchl-mobl1.ger.corp.intel.com (HELO localhost) ([10.252.36.139]) by orviesa009-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Mar 2024 02:13:02 -0700 From: Jani Nikula To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Cc: jani.nikula@intel.com, ville.syrjala@linux.intel.com, Arun R Murthy , Karol Herbst , Lyude Paul , Danilo Krummrich Subject: [RESEND v3 1/6] drm/mst: read sideband messaging cap Date: Tue, 19 Mar 2024 11:12:48 +0200 Message-Id: X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Amend drm_dp_read_mst_cap() to return an enum, indicating "SST", "SST with sideband messaging", or "MST". Modify all call sites to take the new return value into account. v2: - Rename enumerators (Ville) Cc: Arun R Murthy Cc: Ville Syrjälä Cc: Karol Herbst Cc: Lyude Paul Cc: Danilo Krummrich Reviewed-by: Ville Syrjälä Signed-off-by: Jani Nikula Acked-by: Danilo Krummrich --- drivers/gpu/drm/display/drm_dp_mst_topology.c | 20 ++++++++++------ drivers/gpu/drm/i915/display/intel_dp.c | 4 ++-- drivers/gpu/drm/nouveau/nouveau_dp.c | 2 +- include/drm/display/drm_dp_mst_helper.h | 23 ++++++++++++++++++- 4 files changed, 38 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/display/drm_dp_mst_topology.c b/drivers/gpu/drm/display/drm_dp_mst_topology.c index 03d528209426..c193be3577f7 100644 --- a/drivers/gpu/drm/display/drm_dp_mst_topology.c +++ b/drivers/gpu/drm/display/drm_dp_mst_topology.c @@ -3608,24 +3608,30 @@ fixed20_12 drm_dp_get_vc_payload_bw(const struct drm_dp_mst_topology_mgr *mgr, EXPORT_SYMBOL(drm_dp_get_vc_payload_bw); /** - * drm_dp_read_mst_cap() - check whether or not a sink supports MST + * drm_dp_read_mst_cap() - Read the sink's MST mode capability * @aux: The DP AUX channel to use * @dpcd: A cached copy of the DPCD capabilities for this sink * - * Returns: %True if the sink supports MST, %false otherwise + * Returns: enum drm_dp_mst_mode to indicate MST mode capability */ -bool drm_dp_read_mst_cap(struct drm_dp_aux *aux, - const u8 dpcd[DP_RECEIVER_CAP_SIZE]) +enum drm_dp_mst_mode drm_dp_read_mst_cap(struct drm_dp_aux *aux, + const u8 dpcd[DP_RECEIVER_CAP_SIZE]) { u8 mstm_cap; if (dpcd[DP_DPCD_REV] < DP_DPCD_REV_12) - return false; + return DRM_DP_SST; if (drm_dp_dpcd_readb(aux, DP_MSTM_CAP, &mstm_cap) != 1) - return false; + return DRM_DP_SST; + + if (mstm_cap & DP_MST_CAP) + return DRM_DP_MST; + + if (mstm_cap & DP_SINGLE_STREAM_SIDEBAND_MSG) + return DRM_DP_SST_SIDEBAND_MSG; - return mstm_cap & DP_MST_CAP; + return DRM_DP_SST; } EXPORT_SYMBOL(drm_dp_read_mst_cap); diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index af7ca00e9bc0..91c42949ac7e 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -4046,7 +4046,7 @@ intel_dp_can_mst(struct intel_dp *intel_dp) return i915->display.params.enable_dp_mst && intel_dp_mst_source_support(intel_dp) && - drm_dp_read_mst_cap(&intel_dp->aux, intel_dp->dpcd); + drm_dp_read_mst_cap(&intel_dp->aux, intel_dp->dpcd) == DRM_DP_MST; } static void @@ -4055,7 +4055,7 @@ intel_dp_configure_mst(struct intel_dp *intel_dp) struct drm_i915_private *i915 = dp_to_i915(intel_dp); struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base; - bool sink_can_mst = drm_dp_read_mst_cap(&intel_dp->aux, intel_dp->dpcd); + bool sink_can_mst = drm_dp_read_mst_cap(&intel_dp->aux, intel_dp->dpcd) == DRM_DP_MST; drm_dbg_kms(&i915->drm, "[ENCODER:%d:%s] MST support: port: %s, sink: %s, modparam: %s\n", diff --git a/drivers/gpu/drm/nouveau/nouveau_dp.c b/drivers/gpu/drm/nouveau/nouveau_dp.c index 7de7707ec6a8..fb06ee17d9e5 100644 --- a/drivers/gpu/drm/nouveau/nouveau_dp.c +++ b/drivers/gpu/drm/nouveau/nouveau_dp.c @@ -181,7 +181,7 @@ nouveau_dp_probe_dpcd(struct nouveau_connector *nv_connector, if (nouveau_mst) { mstm = outp->dp.mstm; if (mstm) - mstm->can_mst = drm_dp_read_mst_cap(aux, dpcd); + mstm->can_mst = drm_dp_read_mst_cap(aux, dpcd) == DRM_DP_MST; } if (nouveau_dp_has_sink_count(connector, outp)) { diff --git a/include/drm/display/drm_dp_mst_helper.h b/include/drm/display/drm_dp_mst_helper.h index 3ae88a383a41..cbcb49cb6a46 100644 --- a/include/drm/display/drm_dp_mst_helper.h +++ b/include/drm/display/drm_dp_mst_helper.h @@ -817,7 +817,28 @@ int drm_dp_mst_topology_mgr_init(struct drm_dp_mst_topology_mgr *mgr, void drm_dp_mst_topology_mgr_destroy(struct drm_dp_mst_topology_mgr *mgr); -bool drm_dp_read_mst_cap(struct drm_dp_aux *aux, const u8 dpcd[DP_RECEIVER_CAP_SIZE]); +/** + * enum drm_dp_mst_mode - sink's MST mode capability + */ +enum drm_dp_mst_mode { + /** + * @DRM_DP_SST: The sink does not support MST nor single stream sideband + * messaging. + */ + DRM_DP_SST, + /** + * @DRM_DP_MST: Sink supports MST, more than one stream and single + * stream sideband messaging. + */ + DRM_DP_MST, + /** + * @DRM_DP_SST_SIDEBAND_MSG: Sink supports only one stream and single + * stream sideband messaging. + */ + DRM_DP_SST_SIDEBAND_MSG, +}; + +enum drm_dp_mst_mode drm_dp_read_mst_cap(struct drm_dp_aux *aux, const u8 dpcd[DP_RECEIVER_CAP_SIZE]); int drm_dp_mst_topology_mgr_set_mst(struct drm_dp_mst_topology_mgr *mgr, bool mst_state); int drm_dp_mst_hpd_irq_handle_event(struct drm_dp_mst_topology_mgr *mgr, From patchwork Tue Mar 19 09:12:49 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Jani Nikula X-Patchwork-Id: 13596463 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 67A79C54E60 for ; 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X-IronPort-AV: E=McAfee;i="6600,9927,11017"; a="16238036" X-IronPort-AV: E=Sophos;i="6.07,136,1708416000"; d="scan'208";a="16238036" Received: from orviesa009.jf.intel.com ([10.64.159.149]) by orvoesa103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Mar 2024 02:13:09 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,136,1708416000"; d="scan'208";a="13780661" Received: from rcritchl-mobl1.ger.corp.intel.com (HELO localhost) ([10.252.36.139]) by orviesa009-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Mar 2024 02:13:07 -0700 From: Jani Nikula To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Cc: jani.nikula@intel.com, ville.syrjala@linux.intel.com, Arun R Murthy Subject: [RESEND v3 2/6] drm/i915/mst: improve debug logging of DP MST mode detect Date: Tue, 19 Mar 2024 11:12:49 +0200 Message-Id: X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Rename intel_dp_can_mst() to intel_dp_mst_detect(), and move all DP MST detect debug logging there. Debug log the sink's MST capability, including single-stream sideband messaging support, and the decision whether to enable MST mode or not. Do this regardless of whether we're actually enabling MST or not. We need to detect MST in intel_dp_detect_dpcd() before the earlier returns, but try not to change the logic otherwise. v2: - Use "MST", "SST w/ sideband messaging", and "SST" for logging (Ville) - Return MST mode from intel_dp_mst_detect() - Do MST detect before early returns from intel_dp_detect_dpcd() Cc: Arun R Murthy Cc: Ville Syrjälä Reviewed-by: Ville Syrjälä Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/display/intel_dp.c | 52 ++++++++++++++++++------- 1 file changed, 37 insertions(+), 15 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 91c42949ac7e..9590c8c2c4f3 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -4039,31 +4039,50 @@ intel_dp_get_dpcd(struct intel_dp *intel_dp) intel_dp->downstream_ports) == 0; } -static bool -intel_dp_can_mst(struct intel_dp *intel_dp) +static const char *intel_dp_mst_mode_str(enum drm_dp_mst_mode mst_mode) +{ + if (mst_mode == DRM_DP_MST) + return "MST"; + else if (mst_mode == DRM_DP_SST_SIDEBAND_MSG) + return "SST w/ sideband messaging"; + else + return "SST"; +} + +static enum drm_dp_mst_mode +intel_dp_mst_detect(struct intel_dp *intel_dp) { struct drm_i915_private *i915 = dp_to_i915(intel_dp); + struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base; + enum drm_dp_mst_mode sink_mst_mode; + enum drm_dp_mst_mode mst_detect; + + sink_mst_mode = drm_dp_read_mst_cap(&intel_dp->aux, intel_dp->dpcd); + + if (i915->display.params.enable_dp_mst && + intel_dp_mst_source_support(intel_dp) && + sink_mst_mode == DRM_DP_MST) + mst_detect = DRM_DP_MST; + else + mst_detect = DRM_DP_SST; - return i915->display.params.enable_dp_mst && - intel_dp_mst_source_support(intel_dp) && - drm_dp_read_mst_cap(&intel_dp->aux, intel_dp->dpcd) == DRM_DP_MST; + drm_dbg_kms(&i915->drm, + "[ENCODER:%d:%s] MST support: port: %s, sink: %s, modparam: %s -> enable: %s\n", + encoder->base.base.id, encoder->base.name, + str_yes_no(intel_dp_mst_source_support(intel_dp)), + intel_dp_mst_mode_str(sink_mst_mode), + str_yes_no(i915->display.params.enable_dp_mst), + intel_dp_mst_mode_str(mst_detect)); + + return mst_detect; } static void intel_dp_configure_mst(struct intel_dp *intel_dp) { struct drm_i915_private *i915 = dp_to_i915(intel_dp); - struct intel_encoder *encoder = - &dp_to_dig_port(intel_dp)->base; bool sink_can_mst = drm_dp_read_mst_cap(&intel_dp->aux, intel_dp->dpcd) == DRM_DP_MST; - drm_dbg_kms(&i915->drm, - "[ENCODER:%d:%s] MST support: port: %s, sink: %s, modparam: %s\n", - encoder->base.base.id, encoder->base.name, - str_yes_no(intel_dp_mst_source_support(intel_dp)), - str_yes_no(sink_can_mst), - str_yes_no(i915->display.params.enable_dp_mst)); - if (!intel_dp_mst_source_support(intel_dp)) return; @@ -5352,6 +5371,7 @@ intel_dp_detect_dpcd(struct intel_dp *intel_dp) { struct drm_i915_private *i915 = dp_to_i915(intel_dp); struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); + enum drm_dp_mst_mode mst_detect; u8 *dpcd = intel_dp->dpcd; u8 type; @@ -5363,6 +5383,8 @@ intel_dp_detect_dpcd(struct intel_dp *intel_dp) if (!intel_dp_get_dpcd(intel_dp)) return connector_status_disconnected; + mst_detect = intel_dp_mst_detect(intel_dp); + /* if there's no downstream port, we're done */ if (!drm_dp_is_branch(dpcd)) return connector_status_connected; @@ -5374,7 +5396,7 @@ intel_dp_detect_dpcd(struct intel_dp *intel_dp) connector_status_connected : connector_status_disconnected; } - if (intel_dp_can_mst(intel_dp)) + if (mst_detect == DRM_DP_MST) return connector_status_connected; /* If no HPD, poke DDC gently */ From patchwork Tue Mar 19 09:12:50 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Jani Nikula X-Patchwork-Id: 13596465 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C0C49C54E60 for ; Tue, 19 Mar 2024 09:13:24 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id AE49610F8CC; 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X-IronPort-AV: E=McAfee;i="6600,9927,11017"; a="16238044" X-IronPort-AV: E=Sophos;i="6.07,136,1708416000"; d="scan'208";a="16238044" Received: from orviesa009.jf.intel.com ([10.64.159.149]) by orvoesa103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Mar 2024 02:13:14 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,136,1708416000"; d="scan'208";a="13780680" Received: from rcritchl-mobl1.ger.corp.intel.com (HELO localhost) ([10.252.36.139]) by orviesa009-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Mar 2024 02:13:11 -0700 From: Jani Nikula To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Cc: jani.nikula@intel.com, ville.syrjala@linux.intel.com, Arun R Murthy Subject: [RESEND v3 3/6] drm/i915/mst: abstract choosing the MST mode to use Date: Tue, 19 Mar 2024 11:12:50 +0200 Message-Id: X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Clarify the conditions for choosing the MST mode to use by adding a new function intel_dp_mst_mode_choose(). This also prepares for being able to extend the MST modes to single-stream sideband messaging. Cc: Arun R Murthy Cc: Ville Syrjälä Reviewed-by: Ville Syrjälä Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/display/intel_dp.c | 25 +++++++++++++++++++------ 1 file changed, 19 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 9590c8c2c4f3..127b5a89502d 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -4049,6 +4049,24 @@ static const char *intel_dp_mst_mode_str(enum drm_dp_mst_mode mst_mode) return "SST"; } +static enum drm_dp_mst_mode +intel_dp_mst_mode_choose(struct intel_dp *intel_dp, + enum drm_dp_mst_mode sink_mst_mode) +{ + struct drm_i915_private *i915 = dp_to_i915(intel_dp); + + if (!i915->display.params.enable_dp_mst) + return DRM_DP_SST; + + if (!intel_dp_mst_source_support(intel_dp)) + return DRM_DP_SST; + + if (sink_mst_mode == DRM_DP_SST_SIDEBAND_MSG) + return DRM_DP_SST; + + return sink_mst_mode; +} + static enum drm_dp_mst_mode intel_dp_mst_detect(struct intel_dp *intel_dp) { @@ -4059,12 +4077,7 @@ intel_dp_mst_detect(struct intel_dp *intel_dp) sink_mst_mode = drm_dp_read_mst_cap(&intel_dp->aux, intel_dp->dpcd); - if (i915->display.params.enable_dp_mst && - intel_dp_mst_source_support(intel_dp) && - sink_mst_mode == DRM_DP_MST) - mst_detect = DRM_DP_MST; - else - mst_detect = DRM_DP_SST; + mst_detect = intel_dp_mst_mode_choose(intel_dp, sink_mst_mode); drm_dbg_kms(&i915->drm, "[ENCODER:%d:%s] MST support: port: %s, sink: %s, modparam: %s -> enable: %s\n", From patchwork Tue Mar 19 09:12:51 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Jani Nikula X-Patchwork-Id: 13596464 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 154ACC54E5D for ; Tue, 19 Mar 2024 09:13:24 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 092F410F8BC; Tue, 19 Mar 2024 09:13:23 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="IOohO7Vw"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.11]) by gabe.freedesktop.org (Postfix) with ESMTPS id 3452310F8C6; Tue, 19 Mar 2024 09:13:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1710839602; x=1742375602; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=uEnxxBcYarf6pcSSJg8Nz2+LJRhxdjrvPWnMHKFGcFQ=; b=IOohO7VwPDGQ6rPz7PUJNQEFR/CTRIny5JZGp7NwNpqRJNDLpzG1ukoQ 8JmN+E6ezBNfd1mgTLi2x2fPJ7BXPRPnIzQQ9zGj40qCbrSy7DFhiLkCS Q1gRp9FQhdfaGVfUaZIgrfusnlnEd/RCf3Dd9hdZaMXc3udHlZonpDELu 7car+Sj19Txg8VHbNeTPfZRB+j4MplJ80gUPXeMgH/IEKhCG1gtUyWRmC zbwwC0MiDSrpRHVo71oi+bW6RBRkB/0moQpy11kOOTc7EtvTT5wAbznXT mvuUIR+mB4xiFgbzSPNuYE3FBNIWtA09JIL1x207MLTdi5Dyur05kU0Wo Q==; X-IronPort-AV: E=McAfee;i="6600,9927,11017"; a="16238049" X-IronPort-AV: E=Sophos;i="6.07,136,1708416000"; d="scan'208";a="16238049" Received: from orviesa009.jf.intel.com ([10.64.159.149]) by orvoesa103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Mar 2024 02:13:18 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,136,1708416000"; d="scan'208";a="13780690" Received: from rcritchl-mobl1.ger.corp.intel.com (HELO localhost) ([10.252.36.139]) by orviesa009-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Mar 2024 02:13:16 -0700 From: Jani Nikula To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Cc: jani.nikula@intel.com, ville.syrjala@linux.intel.com, Arun R Murthy Subject: [RESEND v3 4/6] drm/i915/mst: use the MST mode detected previously Date: Tue, 19 Mar 2024 11:12:51 +0200 Message-Id: <93a48df9a77e1138bb28e645fae3f9c79b094cc7.1710839496.git.jani.nikula@intel.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Drop the duplicate read of DP_MSTM_CAP DPCD register, and the duplicate logic for choosing MST mode, and store the chosen mode in struct intel_dp. Rename intel_dp_configure_mst() to intel_dp_mst_configure() while at it. v2: Rebase on drm_dp_mst_detect() returning the mode, not bool Cc: Arun R Murthy Cc: Ville Syrjälä Reviewed-by: Ville Syrjälä Signed-off-by: Jani Nikula --- .../drm/i915/display/intel_display_types.h | 1 + drivers/gpu/drm/i915/display/intel_dp.c | 21 ++++++++----------- 2 files changed, 10 insertions(+), 12 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h index 8b9860cefaae..8a35fb6b2ade 100644 --- a/drivers/gpu/drm/i915/display/intel_display_types.h +++ b/drivers/gpu/drm/i915/display/intel_display_types.h @@ -1804,6 +1804,7 @@ struct intel_dp { bool is_mst; int active_mst_links; + enum drm_dp_mst_mode mst_detect; /* connector directly attached - won't be use for modeset in mst world */ struct intel_connector *attached_connector; diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 127b5a89502d..e2f77855e4a0 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -4091,19 +4091,17 @@ intel_dp_mst_detect(struct intel_dp *intel_dp) } static void -intel_dp_configure_mst(struct intel_dp *intel_dp) +intel_dp_mst_configure(struct intel_dp *intel_dp) { - struct drm_i915_private *i915 = dp_to_i915(intel_dp); - bool sink_can_mst = drm_dp_read_mst_cap(&intel_dp->aux, intel_dp->dpcd) == DRM_DP_MST; - if (!intel_dp_mst_source_support(intel_dp)) return; - intel_dp->is_mst = sink_can_mst && - i915->display.params.enable_dp_mst; + intel_dp->is_mst = intel_dp->mst_detect != DRM_DP_SST; - drm_dp_mst_topology_mgr_set_mst(&intel_dp->mst_mgr, - intel_dp->is_mst); + drm_dp_mst_topology_mgr_set_mst(&intel_dp->mst_mgr, intel_dp->is_mst); + + /* Avoid stale info on the next detect cycle. */ + intel_dp->mst_detect = DRM_DP_SST; } static bool @@ -5384,7 +5382,6 @@ intel_dp_detect_dpcd(struct intel_dp *intel_dp) { struct drm_i915_private *i915 = dp_to_i915(intel_dp); struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); - enum drm_dp_mst_mode mst_detect; u8 *dpcd = intel_dp->dpcd; u8 type; @@ -5396,7 +5393,7 @@ intel_dp_detect_dpcd(struct intel_dp *intel_dp) if (!intel_dp_get_dpcd(intel_dp)) return connector_status_disconnected; - mst_detect = intel_dp_mst_detect(intel_dp); + intel_dp->mst_detect = intel_dp_mst_detect(intel_dp); /* if there's no downstream port, we're done */ if (!drm_dp_is_branch(dpcd)) @@ -5409,7 +5406,7 @@ intel_dp_detect_dpcd(struct intel_dp *intel_dp) connector_status_connected : connector_status_disconnected; } - if (mst_detect == DRM_DP_MST) + if (intel_dp->mst_detect == DRM_DP_MST) return connector_status_connected; /* If no HPD, poke DDC gently */ @@ -5741,7 +5738,7 @@ intel_dp_detect(struct drm_connector *connector, intel_dp_detect_dsc_caps(intel_dp, intel_connector); - intel_dp_configure_mst(intel_dp); + intel_dp_mst_configure(intel_dp); /* * TODO: Reset link params when switching to MST mode, until MST From patchwork Tue Mar 19 09:12:52 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Jani Nikula X-Patchwork-Id: 13596466 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id ECD91C54E5D for ; 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X-IronPort-AV: E=McAfee;i="6600,9927,11017"; a="16238063" X-IronPort-AV: E=Sophos;i="6.07,136,1708416000"; d="scan'208";a="16238063" Received: from orviesa009.jf.intel.com ([10.64.159.149]) by orvoesa103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Mar 2024 02:13:22 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,136,1708416000"; d="scan'208";a="13780700" Received: from rcritchl-mobl1.ger.corp.intel.com (HELO localhost) ([10.252.36.139]) by orviesa009-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Mar 2024 02:13:20 -0700 From: Jani Nikula To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Cc: jani.nikula@intel.com, ville.syrjala@linux.intel.com, Arun R Murthy Subject: [RESEND v3 5/6] drm/i915/mst: add intel_dp_mst_disconnect() Date: Tue, 19 Mar 2024 11:12:52 +0200 Message-Id: X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Abstract the MST mode disconnect to a separate function. Cc: Arun R Murthy Cc: Ville Syrjälä Reviewed-by: Ville Syrjälä Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/display/intel_dp.c | 24 +++++++++++++++--------- 1 file changed, 15 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index e2f77855e4a0..9b8bd85c1a4e 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -4104,6 +4104,20 @@ intel_dp_mst_configure(struct intel_dp *intel_dp) intel_dp->mst_detect = DRM_DP_SST; } +static void +intel_dp_mst_disconnect(struct intel_dp *intel_dp) +{ + struct drm_i915_private *i915 = dp_to_i915(intel_dp); + + if (!intel_dp->is_mst) + return; + + drm_dbg_kms(&i915->drm, "MST device may have disappeared %d vs %d\n", + intel_dp->is_mst, intel_dp->mst_mgr.mst_state); + intel_dp->is_mst = false; + drm_dp_mst_topology_mgr_set_mst(&intel_dp->mst_mgr, intel_dp->is_mst); +} + static bool intel_dp_get_sink_irq_esi(struct intel_dp *intel_dp, u8 *esi) { @@ -5711,15 +5725,7 @@ intel_dp_detect(struct drm_connector *connector, memset(intel_connector->dp.dsc_dpcd, 0, sizeof(intel_connector->dp.dsc_dpcd)); intel_dp->psr.sink_panel_replay_support = false; - if (intel_dp->is_mst) { - drm_dbg_kms(&dev_priv->drm, - "MST device may have disappeared %d vs %d\n", - intel_dp->is_mst, - intel_dp->mst_mgr.mst_state); - intel_dp->is_mst = false; - drm_dp_mst_topology_mgr_set_mst(&intel_dp->mst_mgr, - intel_dp->is_mst); - } + intel_dp_mst_disconnect(intel_dp); intel_dp_tunnel_disconnect(intel_dp); From patchwork Tue Mar 19 09:12:53 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Jani Nikula X-Patchwork-Id: 13596467 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 91DA1C54E68 for ; Tue, 19 Mar 2024 09:13:29 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 82E9A10F8D4; Tue, 19 Mar 2024 09:13:28 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="FIBOqbD5"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.11]) by gabe.freedesktop.org (Postfix) with ESMTPS id 6BA3810F8CD; Tue, 19 Mar 2024 09:13:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1710839607; x=1742375607; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=gbhq87XouhCOURZ1E2kHeVXsudU0rQcoUrdfYU04gZg=; b=FIBOqbD5GIQhwfJQZKW0CmqbV/VabkpIFBf+gXyRsQOAA9m1j7Tt+OsJ nXOZSkak9XxlBzOtjI8/x5r2FQuB5/vMvyGbG3ypbZ+hPpH/Ary2pSWMz 9zgzHbv2MjYcewC0VkRdHtep/7ZMSMATZ24wNm6mw1KltYIMXm8fN9NBD CPlrB+EL25hIX9OHBxA51eQLbIcgNl3WtutCzi0LDDDKZTAB2XdHvcHMy bcsTogzf0UY8uAktV2Px1YX2pmOCrlkRqqMGrbC3INN2zUcAZaAHHHPcD ddC9mKDTiOXHQ7p0CuuXnm6Q/OuLO68E90HiWJ9y4Y+sXyWMk6IuJhkeT Q==; X-IronPort-AV: E=McAfee;i="6600,9927,11017"; a="16238081" X-IronPort-AV: E=Sophos;i="6.07,136,1708416000"; d="scan'208";a="16238081" Received: from fmviesa002.fm.intel.com ([10.60.135.142]) by orvoesa103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Mar 2024 02:13:27 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,136,1708416000"; d="scan'208";a="36883710" Received: from rcritchl-mobl1.ger.corp.intel.com (HELO localhost) ([10.252.36.139]) by fmviesa002-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Mar 2024 02:13:24 -0700 From: Jani Nikula To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Cc: jani.nikula@intel.com, ville.syrjala@linux.intel.com, Arun R Murthy Subject: [RESEND v3 6/6] drm/i915/mst: enable MST mode for 128b/132b single-stream sideband Date: Tue, 19 Mar 2024 11:12:53 +0200 Message-Id: <39d753e53cd662c3fd3776b6167bf792219fd950.1710839496.git.jani.nikula@intel.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" If the sink supports 128b/132b and single-stream sideband messaging, enable MST mode. With this, the topology manager will still write DP_MSTM_CTRL, which should be ignored by the sink. In the future, the topology manager should probably only set the sideband messaging related parts of the register. Cc: Arun R Murthy Cc: Ville Syrjälä Reviewed-by: Ville Syrjälä Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/display/intel_dp.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 9b8bd85c1a4e..254f758e8dcd 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -4061,7 +4061,8 @@ intel_dp_mst_mode_choose(struct intel_dp *intel_dp, if (!intel_dp_mst_source_support(intel_dp)) return DRM_DP_SST; - if (sink_mst_mode == DRM_DP_SST_SIDEBAND_MSG) + if (sink_mst_mode == DRM_DP_SST_SIDEBAND_MSG && + !(intel_dp->dpcd[DP_MAIN_LINK_CHANNEL_CODING] & DP_CAP_ANSI_128B132B)) return DRM_DP_SST; return sink_mst_mode;