From patchwork Fri Mar 29 10:19:48 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhao Liu X-Patchwork-Id: 13610505 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E0739524AA for ; Fri, 29 Mar 2024 10:06:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.11 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711706772; cv=none; b=dcM/SDO2rBhxx0OzIHgADYnWBe3DJ8t5y0LacxvPveiuF5v3AjaXIfjUR77+QwUox2i9pUC5iRvHEAQIFLQ0s9+sH+zey1GIlNn8fQ9vqMuRcOlu1rnYeToVBNvABiph5T3O7b8Jo5MtlketDmXyuNN9zMfFp7aD/EgJmRoxjKg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711706772; c=relaxed/simple; bh=tGavWDETP6FT06JEiwwRQmVvkPbXQlkwx2ajYdHWMAQ=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=pNVhY++jHEVZiDfI98+sGjWiNOHytRK8rbkuRNDR55Q2y0VnEBDKMrVnnSDhp6Ewjwu6jVL9GMTn+dD0AT3zCozPOynyAqPEmdhnfbwmcy6CtUMLe7APIGhTo0isBWKlOTSTj27Yw9gvz66ZU1+LLZiXqsECHvFt1XgbEJHl/zU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=lgxn9qil; arc=none smtp.client-ip=192.198.163.11 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="lgxn9qil" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1711706771; x=1743242771; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=tGavWDETP6FT06JEiwwRQmVvkPbXQlkwx2ajYdHWMAQ=; b=lgxn9qilT84QRCkLBzSTjGDs4HIpjw7oF5w0CkAtS3EDZWTrUVDk120t Mx0JdOmD8HunWNncdKxyf/+ZnzGOCWdvFbicUM8/ZUlQh7J8dRJbRTcyf o/AWUmACUmpt5UvvqgLBzUtfGDcmA14Y4Isugzvmb2RZbWODPS34ykqjI Jupq/5b18kmGzOojlEV08EB2eYi9pXXAvbCmICEbn4Yuk0F+yU2KG/NxG wHehRj+c4wKmLjkifNZ0AQceXrNWxz3yjuRPQSp2vWw2w39oLaEefeePL M4NzmkACJmESjTjNqyRkxu10bdCPLf3SdSASrqygc9cFEjUpRKBzLH2hj Q==; X-CSE-ConnectionGUID: h7iVaNUbSRy514G004Ioww== X-CSE-MsgGUID: KuN34osbT1+1NY/Ng65u8w== X-IronPort-AV: E=McAfee;i="6600,9927,11027"; a="17519195" X-IronPort-AV: E=Sophos;i="6.07,164,1708416000"; d="scan'208";a="17519195" Received: from fmviesa003.fm.intel.com ([10.60.135.143]) by fmvoesa105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Mar 2024 03:06:10 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,164,1708416000"; d="scan'208";a="21441949" Received: from liuzhao-optiplex-7080.sh.intel.com ([10.239.160.36]) by fmviesa003.fm.intel.com with ESMTP; 29 Mar 2024 03:06:07 -0700 From: Zhao Liu To: Paolo Bonzini , Richard Henderson , Eduardo Habkost , "Michael S . Tsirkin" , Marcel Apfelbaum , Marcelo Tosatti , Igor Mammedov , Tim Wiederhake Cc: qemu-devel@nongnu.org, kvm@vger.kernel.org, Zhao Liu Subject: [PATCH for-9.1 1/7] target/i386/kvm: Add feature bit definitions for KVM CPUID Date: Fri, 29 Mar 2024 18:19:48 +0800 Message-Id: <20240329101954.3954987-2-zhao1.liu@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240329101954.3954987-1-zhao1.liu@linux.intel.com> References: <20240329101954.3954987-1-zhao1.liu@linux.intel.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Zhao Liu Add feature definiations for KVM_CPUID_FEATURES in CPUID ( CPUID[4000_0001].EAX and CPUID[4000_0001].EDX), to get rid of lots of offset calculations. Signed-off-by: Zhao Liu --- hw/i386/kvm/clock.c | 5 ++--- target/i386/cpu.h | 23 +++++++++++++++++++++++ target/i386/kvm/kvm.c | 28 ++++++++++++++-------------- 3 files changed, 39 insertions(+), 17 deletions(-) diff --git a/hw/i386/kvm/clock.c b/hw/i386/kvm/clock.c index 40aa9a32c32c..7c9752d5036f 100644 --- a/hw/i386/kvm/clock.c +++ b/hw/i386/kvm/clock.c @@ -27,7 +27,6 @@ #include "qapi/error.h" #include -#include "standard-headers/asm-x86/kvm_para.h" #include "qom/object.h" #define TYPE_KVM_CLOCK "kvmclock" @@ -334,8 +333,8 @@ void kvmclock_create(bool create_always) assert(kvm_enabled()); if (create_always || - cpu->env.features[FEAT_KVM] & ((1ULL << KVM_FEATURE_CLOCKSOURCE) | - (1ULL << KVM_FEATURE_CLOCKSOURCE2))) { + cpu->env.features[FEAT_KVM] & (CPUID_FEAT_KVM_CLOCK | + CPUID_FEAT_KVM_CLOCK2)) { sysbus_create_simple(TYPE_KVM_CLOCK, -1, NULL); } } diff --git a/target/i386/cpu.h b/target/i386/cpu.h index 83e473584517..b1b8d11cb0fe 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -27,6 +27,7 @@ #include "qapi/qapi-types-common.h" #include "qemu/cpu-float.h" #include "qemu/timer.h" +#include "standard-headers/asm-x86/kvm_para.h" #define XEN_NR_VIRQS 24 @@ -951,6 +952,28 @@ uint64_t x86_cpu_get_supported_feature_word(FeatureWord w, /* Packets which contain IP payload have LIP values */ #define CPUID_14_0_ECX_LIP (1U << 31) +/* (Old) KVM paravirtualized clocksource */ +#define CPUID_FEAT_KVM_CLOCK (1U << KVM_FEATURE_CLOCKSOURCE) +/* (New) KVM specific paravirtualized clocksource */ +#define CPUID_FEAT_KVM_CLOCK2 (1U << KVM_FEATURE_CLOCKSOURCE2) +/* KVM asynchronous page fault */ +#define CPUID_FEAT_KVM_ASYNCPF (1U << KVM_FEATURE_ASYNC_PF) +/* KVM stolen (when guest vCPU is not running) time accounting */ +#define CPUID_FEAT_KVM_STEAL_TIME (1U << KVM_FEATURE_STEAL_TIME) +/* KVM paravirtualized end-of-interrupt signaling */ +#define CPUID_FEAT_KVM_PV_EOI (1U << KVM_FEATURE_PV_EOI) +/* KVM paravirtualized spinlocks support */ +#define CPUID_FEAT_KVM_PV_UNHALT (1U << KVM_FEATURE_PV_UNHALT) +/* KVM host-side polling on HLT control from the guest */ +#define CPUID_FEAT_KVM_POLL_CONTROL (1U << KVM_FEATURE_POLL_CONTROL) +/* KVM interrupt based asynchronous page fault*/ +#define CPUID_FEAT_KVM_ASYNCPF_INT (1U << KVM_FEATURE_ASYNC_PF_INT) +/* KVM 'Extended Destination ID' support for external interrupts */ +#define CPUID_FEAT_KVM_MSI_EXT_DEST_ID (1U << KVM_FEATURE_MSI_EXT_DEST_ID) + +/* Hint to KVM that vCPUs expect never preempted for an unlimited time */ +#define CPUID_FEAT_KVM_HINTS_REALTIME (1U << KVM_HINTS_REALTIME) + /* CLZERO instruction */ #define CPUID_8000_0008_EBX_CLZERO (1U << 0) /* Always save/restore FP error pointers */ diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c index e68cbe929302..2f3c8bc3a4ed 100644 --- a/target/i386/kvm/kvm.c +++ b/target/i386/kvm/kvm.c @@ -481,13 +481,13 @@ uint32_t kvm_arch_get_supported_cpuid(KVMState *s, uint32_t function, * be enabled without the in-kernel irqchip */ if (!kvm_irqchip_in_kernel()) { - ret &= ~(1U << KVM_FEATURE_PV_UNHALT); + ret &= ~CPUID_FEAT_KVM_PV_UNHALT; } if (kvm_irqchip_is_split()) { - ret |= 1U << KVM_FEATURE_MSI_EXT_DEST_ID; + ret |= CPUID_FEAT_KVM_MSI_EXT_DEST_ID; } } else if (function == KVM_CPUID_FEATURES && reg == R_EDX) { - ret |= 1U << KVM_HINTS_REALTIME; + ret |= CPUID_FEAT_KVM_HINTS_REALTIME; } return ret; @@ -3324,20 +3324,20 @@ static int kvm_put_msrs(X86CPU *cpu, int level) kvm_msr_entry_add(cpu, MSR_IA32_TSC, env->tsc); kvm_msr_entry_add(cpu, MSR_KVM_SYSTEM_TIME, env->system_time_msr); kvm_msr_entry_add(cpu, MSR_KVM_WALL_CLOCK, env->wall_clock_msr); - if (env->features[FEAT_KVM] & (1 << KVM_FEATURE_ASYNC_PF_INT)) { + if (env->features[FEAT_KVM] & CPUID_FEAT_KVM_ASYNCPF_INT) { kvm_msr_entry_add(cpu, MSR_KVM_ASYNC_PF_INT, env->async_pf_int_msr); } - if (env->features[FEAT_KVM] & (1 << KVM_FEATURE_ASYNC_PF)) { + if (env->features[FEAT_KVM] & CPUID_FEAT_KVM_ASYNCPF) { kvm_msr_entry_add(cpu, MSR_KVM_ASYNC_PF_EN, env->async_pf_en_msr); } - if (env->features[FEAT_KVM] & (1 << KVM_FEATURE_PV_EOI)) { + if (env->features[FEAT_KVM] & CPUID_FEAT_KVM_PV_EOI) { kvm_msr_entry_add(cpu, MSR_KVM_PV_EOI_EN, env->pv_eoi_en_msr); } - if (env->features[FEAT_KVM] & (1 << KVM_FEATURE_STEAL_TIME)) { + if (env->features[FEAT_KVM] & CPUID_FEAT_KVM_STEAL_TIME) { kvm_msr_entry_add(cpu, MSR_KVM_STEAL_TIME, env->steal_time_msr); } - if (env->features[FEAT_KVM] & (1 << KVM_FEATURE_POLL_CONTROL)) { + if (env->features[FEAT_KVM] & CPUID_FEAT_KVM_POLL_CONTROL) { kvm_msr_entry_add(cpu, MSR_KVM_POLL_CONTROL, env->poll_control_msr); } @@ -3789,19 +3789,19 @@ static int kvm_get_msrs(X86CPU *cpu) #endif kvm_msr_entry_add(cpu, MSR_KVM_SYSTEM_TIME, 0); kvm_msr_entry_add(cpu, MSR_KVM_WALL_CLOCK, 0); - if (env->features[FEAT_KVM] & (1 << KVM_FEATURE_ASYNC_PF_INT)) { + if (env->features[FEAT_KVM] & CPUID_FEAT_KVM_ASYNCPF_INT) { kvm_msr_entry_add(cpu, MSR_KVM_ASYNC_PF_INT, 0); } - if (env->features[FEAT_KVM] & (1 << KVM_FEATURE_ASYNC_PF)) { + if (env->features[FEAT_KVM] & CPUID_FEAT_KVM_ASYNCPF) { kvm_msr_entry_add(cpu, MSR_KVM_ASYNC_PF_EN, 0); } - if (env->features[FEAT_KVM] & (1 << KVM_FEATURE_PV_EOI)) { + if (env->features[FEAT_KVM] & CPUID_FEAT_KVM_PV_EOI) { kvm_msr_entry_add(cpu, MSR_KVM_PV_EOI_EN, 0); } - if (env->features[FEAT_KVM] & (1 << KVM_FEATURE_STEAL_TIME)) { + if (env->features[FEAT_KVM] & CPUID_FEAT_KVM_STEAL_TIME) { kvm_msr_entry_add(cpu, MSR_KVM_STEAL_TIME, 0); } - if (env->features[FEAT_KVM] & (1 << KVM_FEATURE_POLL_CONTROL)) { + if (env->features[FEAT_KVM] & CPUID_FEAT_KVM_POLL_CONTROL) { kvm_msr_entry_add(cpu, MSR_KVM_POLL_CONTROL, 1); } if (has_architectural_pmu_version > 0) { @@ -5434,7 +5434,7 @@ uint64_t kvm_swizzle_msi_ext_dest_id(uint64_t address) return address; } env = &X86_CPU(first_cpu)->env; - if (!(env->features[FEAT_KVM] & (1 << KVM_FEATURE_MSI_EXT_DEST_ID))) { + if (!(env->features[FEAT_KVM] & CPUID_FEAT_KVM_MSI_EXT_DEST_ID)) { return address; } From patchwork Fri Mar 29 10:19:49 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhao Liu X-Patchwork-Id: 13610506 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CED69535B4 for ; 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X-CSE-ConnectionGUID: uiGmtduVR1WMgu1SWxqYYg== X-CSE-MsgGUID: nzPSVdjES7WEuJzEtEI10A== X-IronPort-AV: E=McAfee;i="6600,9927,11027"; a="17519212" X-IronPort-AV: E=Sophos;i="6.07,164,1708416000"; d="scan'208";a="17519212" Received: from fmviesa003.fm.intel.com ([10.60.135.143]) by fmvoesa105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Mar 2024 03:06:13 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,164,1708416000"; d="scan'208";a="21441964" Received: from liuzhao-optiplex-7080.sh.intel.com ([10.239.160.36]) by fmviesa003.fm.intel.com with ESMTP; 29 Mar 2024 03:06:10 -0700 From: Zhao Liu To: Paolo Bonzini , Richard Henderson , Eduardo Habkost , "Michael S . Tsirkin" , Marcel Apfelbaum , Marcelo Tosatti , Igor Mammedov , Tim Wiederhake Cc: qemu-devel@nongnu.org, kvm@vger.kernel.org, Zhao Liu Subject: [PATCH for-9.1 2/7] target/i386/kvm: Remove local MSR_KVM_WALL_CLOCK and MSR_KVM_SYSTEM_TIME definitions Date: Fri, 29 Mar 2024 18:19:49 +0800 Message-Id: <20240329101954.3954987-3-zhao1.liu@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240329101954.3954987-1-zhao1.liu@linux.intel.com> References: <20240329101954.3954987-1-zhao1.liu@linux.intel.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Zhao Liu These 2 MSRs have been already defined in the kvm_para header (standard-headers/asm-x86/kvm_para.h). Remove QEMU local definitions to avoid duplication. Signed-off-by: Zhao Liu Reviewed-by: Xiaoyao Li --- target/i386/kvm/kvm.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c index 2f3c8bc3a4ed..be88339fb8bd 100644 --- a/target/i386/kvm/kvm.c +++ b/target/i386/kvm/kvm.c @@ -78,9 +78,6 @@ #define KVM_APIC_BUS_CYCLE_NS 1 #define KVM_APIC_BUS_FREQUENCY (1000000000ULL / KVM_APIC_BUS_CYCLE_NS) -#define MSR_KVM_WALL_CLOCK 0x11 -#define MSR_KVM_SYSTEM_TIME 0x12 - /* A 4096-byte buffer can hold the 8-byte kvm_msrs header, plus * 255 kvm_msr_entry structs */ #define MSR_BUF_SIZE 4096 From patchwork Fri Mar 29 10:19:50 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhao Liu X-Patchwork-Id: 13610507 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CE2C8537E8 for ; Fri, 29 Mar 2024 10:06:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.11 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711706777; cv=none; b=fBNt4IU2rOdGiFqka6SrSgHxnT+ZgzwlBKjBLoTsm2bmHhwvcgaMZutTjqWG/laMSfLihZEPnJ1DOrnOuUB96dF7f6VMXWQa5haKilfdz6DHTL6/rcAIRONxAh0eIQeTfX8+TmHdqCkQKBpfQUaqTEEd94usl33vU0MO/jsnxl0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711706777; c=relaxed/simple; bh=YsoWb/M4LNq8Md17vTgsxsQeQ69Hei3aqAO+226S55Q=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=LAQiGZSt0S6eJUosK7GGJHC3X8i3FXgUhNriAmk7uVwt26DPGg/zkJygiy1q6DJTOYuaXmvcvv7kCmUMMltUve+GTQKdeT7IeKzpTNVUlKpfMBvic5USfLZnQQMPtGPY++DCIEjXTVWA+7vK9Wm0x3314OdRl7npMZdIgYgcx94= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=UxOFBa91; arc=none smtp.client-ip=192.198.163.11 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="UxOFBa91" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1711706776; x=1743242776; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=YsoWb/M4LNq8Md17vTgsxsQeQ69Hei3aqAO+226S55Q=; b=UxOFBa91cKn69ER6G2ZBRRM++Zl0bPugL9BJba9cKqs2xFTec+y69J6q 0z2uIJo8uKdycci1j2xjcoDE3fIkmCgmOLgQ6TE3mgpTEIJ6zA6onOw0y AYLYn8ndnzfp/ZDT8GnP9USTgf+OcKf5KuPC9N+e7hcashsr73wKOgQuI /Vy6pUKBGIw1avYx7oZ4KNE2sC024zQ6IYldaaGZA9rrIqyviithoDPxV xA8YqmKsRN2E/wQPaYeRBvxANZg9EfckqklT/7qEHAEfhiQVCFgnTj8UX oZcOPZ6AfDMiboe0pLgjv2QAsBLCAynmCqyNAQIlealc9oA3A/VbkUp4g w==; X-CSE-ConnectionGUID: stenhHcwS9KTxwCo0pyh2Q== X-CSE-MsgGUID: yuSpKrRRQUC1RrMBZLEPEg== X-IronPort-AV: E=McAfee;i="6600,9927,11027"; a="17519217" X-IronPort-AV: E=Sophos;i="6.07,164,1708416000"; d="scan'208";a="17519217" Received: from fmviesa003.fm.intel.com ([10.60.135.143]) by fmvoesa105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Mar 2024 03:06:16 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,164,1708416000"; d="scan'208";a="21441971" Received: from liuzhao-optiplex-7080.sh.intel.com ([10.239.160.36]) by fmviesa003.fm.intel.com with ESMTP; 29 Mar 2024 03:06:13 -0700 From: Zhao Liu To: Paolo Bonzini , Richard Henderson , Eduardo Habkost , "Michael S . Tsirkin" , Marcel Apfelbaum , Marcelo Tosatti , Igor Mammedov , Tim Wiederhake Cc: qemu-devel@nongnu.org, kvm@vger.kernel.org, Zhao Liu Subject: [PATCH for-9.1 3/7] target/i386/kvm: Only Save/load kvmclock MSRs when kvmclock enabled Date: Fri, 29 Mar 2024 18:19:50 +0800 Message-Id: <20240329101954.3954987-4-zhao1.liu@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240329101954.3954987-1-zhao1.liu@linux.intel.com> References: <20240329101954.3954987-1-zhao1.liu@linux.intel.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Zhao Liu MSR_KVM_SYSTEM_TIME and MSR_KVM_WALL_CLOCK are attached with the (old) kvmclock feature (KVM_FEATURE_CLOCKSOURCE). So, just save/load them only when kvmclock (KVM_FEATURE_CLOCKSOURCE) is enabled. Signed-off-by: Zhao Liu --- target/i386/kvm/kvm.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c index be88339fb8bd..498580d60c3b 100644 --- a/target/i386/kvm/kvm.c +++ b/target/i386/kvm/kvm.c @@ -3319,8 +3319,10 @@ static int kvm_put_msrs(X86CPU *cpu, int level) */ if (level >= KVM_PUT_RESET_STATE) { kvm_msr_entry_add(cpu, MSR_IA32_TSC, env->tsc); - kvm_msr_entry_add(cpu, MSR_KVM_SYSTEM_TIME, env->system_time_msr); - kvm_msr_entry_add(cpu, MSR_KVM_WALL_CLOCK, env->wall_clock_msr); + if (env->features[FEAT_KVM] & CPUID_FEAT_KVM_CLOCK) { + kvm_msr_entry_add(cpu, MSR_KVM_SYSTEM_TIME, env->system_time_msr); + kvm_msr_entry_add(cpu, MSR_KVM_WALL_CLOCK, env->wall_clock_msr); + } if (env->features[FEAT_KVM] & CPUID_FEAT_KVM_ASYNCPF_INT) { kvm_msr_entry_add(cpu, MSR_KVM_ASYNC_PF_INT, env->async_pf_int_msr); } @@ -3784,8 +3786,10 @@ static int kvm_get_msrs(X86CPU *cpu) kvm_msr_entry_add(cpu, MSR_LSTAR, 0); } #endif - kvm_msr_entry_add(cpu, MSR_KVM_SYSTEM_TIME, 0); - kvm_msr_entry_add(cpu, MSR_KVM_WALL_CLOCK, 0); + if (env->features[FEAT_KVM] & CPUID_FEAT_KVM_CLOCK) { + kvm_msr_entry_add(cpu, MSR_KVM_SYSTEM_TIME, 0); + kvm_msr_entry_add(cpu, MSR_KVM_WALL_CLOCK, 0); + } if (env->features[FEAT_KVM] & CPUID_FEAT_KVM_ASYNCPF_INT) { kvm_msr_entry_add(cpu, MSR_KVM_ASYNC_PF_INT, 0); } From patchwork Fri Mar 29 10:19:51 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhao Liu X-Patchwork-Id: 13610508 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A4E7054665 for ; Fri, 29 Mar 2024 10:06:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.11 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711706780; cv=none; b=mLUNK4/XpfAvOx0w1jPNstGleAr4hHMGmJvUvAAXkEm+K8C054Rdn9+z7TQ4psR6L2du4RNm1PMqj7o+KTaCmwmXVw1nmq3J5E0jI5LdiyaXRNpIC8DmnMYpd+0S6pHt79cBmjWyB3Lg3bV2W+vgNTz6UMCYGMcmeMAiVT+A/uM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711706780; c=relaxed/simple; bh=CPFiTV9kwMUtT6nXjgynyO/zl1aHyjo5L0Y6/sSk7Tg=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=K2pKPCm7ZR70SmQ7+n7Kdvm+EebET443V9aIGLb0d3rHKToeG1JJGW5oAF9RjAm2i5HRjvSDcelVTTLcZzkhnnLYmb5PcPkaRpI1wGp1XdwvDCa6xah3VdtRbKav3LUnKwSQJSkzV1t58DueXp2/y8hNvHBrbG44vlVyvhbJ6Ts= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=WWudb+Rl; arc=none smtp.client-ip=192.198.163.11 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="WWudb+Rl" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1711706779; x=1743242779; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=CPFiTV9kwMUtT6nXjgynyO/zl1aHyjo5L0Y6/sSk7Tg=; b=WWudb+RlAJn+XomICLFBp8fLXbTAdDBKWWh8n55kA6u2It6RoP7lDpbu FaAuAMg7wYvPMMeAc5xhFdnTkyEB+otDaeXF/0J6eb36jwWLajSRTh+an y59FEIT3PO8LMfPV/7sZF3MjeNHUdkLU55KgNshxhbayqYmIvPX/2Jg6q BWuKgA4gNvQgtWRGTHEa2PuixQTS1UB+9MNFuwfBWXbQdBc+0fjBw2Hjj SnFW+40B7tOqhpuzvPpcf59ncXuRaVP0CJK00ekF4P2FPFl1iI0N1iaO0 JagGIrY/+c5Fk4ZcCt0tnRY+hT7Pb5aCojkY+GfD2iAcmiBDdG5WXlGob w==; X-CSE-ConnectionGUID: 0FT0RSu6QZqT6kDC6Jwk5A== X-CSE-MsgGUID: MtKpWCZHRwyKVg2nFwbrKA== X-IronPort-AV: E=McAfee;i="6600,9927,11027"; a="17519225" X-IronPort-AV: E=Sophos;i="6.07,164,1708416000"; d="scan'208";a="17519225" Received: from fmviesa003.fm.intel.com ([10.60.135.143]) by fmvoesa105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Mar 2024 03:06:18 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,164,1708416000"; d="scan'208";a="21441975" Received: from liuzhao-optiplex-7080.sh.intel.com ([10.239.160.36]) by fmviesa003.fm.intel.com with ESMTP; 29 Mar 2024 03:06:15 -0700 From: Zhao Liu To: Paolo Bonzini , Richard Henderson , Eduardo Habkost , "Michael S . Tsirkin" , Marcel Apfelbaum , Marcelo Tosatti , Igor Mammedov , Tim Wiederhake Cc: qemu-devel@nongnu.org, kvm@vger.kernel.org, Zhao Liu Subject: [PATCH for-9.1 4/7] target/i386/kvm: Save/load MSRs of new kvmclock (KVM_FEATURE_CLOCKSOURCE2) Date: Fri, 29 Mar 2024 18:19:51 +0800 Message-Id: <20240329101954.3954987-5-zhao1.liu@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240329101954.3954987-1-zhao1.liu@linux.intel.com> References: <20240329101954.3954987-1-zhao1.liu@linux.intel.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Zhao Liu MSR_KVM_SYSTEM_TIME_NEW and MSR_KVM_WALL_CLOCK_NEW are bound to new kvmclock (KVM_FEATURE_CLOCKSOURCE2). Add the save/load support for these 2 MSRs. Signed-off-by: Zhao Liu --- target/i386/cpu.h | 2 ++ target/i386/kvm/kvm.c | 16 ++++++++++++++++ 2 files changed, 18 insertions(+) diff --git a/target/i386/cpu.h b/target/i386/cpu.h index b1b8d11cb0fe..b339f9ce454f 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -1741,6 +1741,8 @@ typedef struct CPUArchState { uint64_t system_time_msr; uint64_t wall_clock_msr; + uint64_t system_time_new_msr; + uint64_t wall_clock_new_msr; uint64_t steal_time_msr; uint64_t async_pf_en_msr; uint64_t async_pf_int_msr; diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c index 498580d60c3b..4a6bf0581859 100644 --- a/target/i386/kvm/kvm.c +++ b/target/i386/kvm/kvm.c @@ -3323,6 +3323,12 @@ static int kvm_put_msrs(X86CPU *cpu, int level) kvm_msr_entry_add(cpu, MSR_KVM_SYSTEM_TIME, env->system_time_msr); kvm_msr_entry_add(cpu, MSR_KVM_WALL_CLOCK, env->wall_clock_msr); } + if (env->features[FEAT_KVM] & CPUID_FEAT_KVM_CLOCK2) { + kvm_msr_entry_add(cpu, MSR_KVM_SYSTEM_TIME_NEW, + env->system_time_new_msr); + kvm_msr_entry_add(cpu, MSR_KVM_WALL_CLOCK_NEW, + env->wall_clock_new_msr); + } if (env->features[FEAT_KVM] & CPUID_FEAT_KVM_ASYNCPF_INT) { kvm_msr_entry_add(cpu, MSR_KVM_ASYNC_PF_INT, env->async_pf_int_msr); } @@ -3790,6 +3796,10 @@ static int kvm_get_msrs(X86CPU *cpu) kvm_msr_entry_add(cpu, MSR_KVM_SYSTEM_TIME, 0); kvm_msr_entry_add(cpu, MSR_KVM_WALL_CLOCK, 0); } + if (env->features[FEAT_KVM] & CPUID_FEAT_KVM_CLOCK2) { + kvm_msr_entry_add(cpu, MSR_KVM_SYSTEM_TIME_NEW, 0); + kvm_msr_entry_add(cpu, MSR_KVM_WALL_CLOCK_NEW, 0); + } if (env->features[FEAT_KVM] & CPUID_FEAT_KVM_ASYNCPF_INT) { kvm_msr_entry_add(cpu, MSR_KVM_ASYNC_PF_INT, 0); } @@ -4029,6 +4039,12 @@ static int kvm_get_msrs(X86CPU *cpu) case MSR_KVM_WALL_CLOCK: env->wall_clock_msr = msrs[i].data; break; + case MSR_KVM_SYSTEM_TIME_NEW: + env->system_time_new_msr = msrs[i].data; + break; + case MSR_KVM_WALL_CLOCK_NEW: + env->wall_clock_new_msr = msrs[i].data; + break; case MSR_MCG_STATUS: env->mcg_status = msrs[i].data; break; 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Tsirkin" , Marcel Apfelbaum , Marcelo Tosatti , Igor Mammedov , Tim Wiederhake Cc: qemu-devel@nongnu.org, kvm@vger.kernel.org, Zhao Liu Subject: [PATCH for-9.1 5/7] target/i386/kvm: Add legacy_kvmclock cpu property Date: Fri, 29 Mar 2024 18:19:52 +0800 Message-Id: <20240329101954.3954987-6-zhao1.liu@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240329101954.3954987-1-zhao1.liu@linux.intel.com> References: <20240329101954.3954987-1-zhao1.liu@linux.intel.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Zhao Liu Currently, the old kvmclock (KVM_FEATURE_CLOCKSOURCE) and the new (KVM_FEATURE_CLOCKSOURCE2) are always set/unset together since they have the same feature name "kvmclock" since the commit 642258c6c7 ("kvm: add kvmclock to its second bit"). Before renaming the new kvmclock, introduce legacy_kvmclock to inherit the behavior of both old and new kvmclocks being enabled/disabled at the same time. Signed-off-by: Zhao Liu --- hw/i386/pc.c | 1 + target/i386/cpu.c | 1 + target/i386/cpu.h | 7 +++++++ target/i386/kvm/kvm-cpu.c | 19 +++++++++++++++++++ 4 files changed, 28 insertions(+) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 9c4b3969cc8a..a452da0a45a1 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -80,6 +80,7 @@ GlobalProperty pc_compat_9_0[] = { { TYPE_X86_CPU, "guest-phys-bits", "0" }, + { TYPE_X86_CPU, "legacy-kvmclock", "true" }, }; const size_t pc_compat_9_0_len = G_N_ELEMENTS(pc_compat_9_0); diff --git a/target/i386/cpu.c b/target/i386/cpu.c index eef3d08473ed..1b6caf071a6d 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -7941,6 +7941,7 @@ static Property x86_cpu_properties[] = { */ DEFINE_PROP_BOOL("legacy-cache", X86CPU, legacy_cache, true), DEFINE_PROP_BOOL("xen-vapic", X86CPU, xen_vapic, false), + DEFINE_PROP_BOOL("legacy-kvmclock", X86CPU, legacy_kvmclock, false), /* * From "Requirements for Implementing the Microsoft diff --git a/target/i386/cpu.h b/target/i386/cpu.h index b339f9ce454f..b3ee2a35f2c1 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -2070,6 +2070,13 @@ struct ArchCPU { int32_t hv_max_vps; bool xen_vapic; + + /* + * Compatibility bits for old machine types. + * If true, always set/unset KVM_FEATURE_CLOCKSOURCE and + * KVM_FEATURE_CLOCKSOURCE2 at the same time. + */ + bool legacy_kvmclock; }; typedef struct X86CPUModel X86CPUModel; diff --git a/target/i386/kvm/kvm-cpu.c b/target/i386/kvm/kvm-cpu.c index e6b7a46743b5..ae3cb27c8aa8 100644 --- a/target/i386/kvm/kvm-cpu.c +++ b/target/i386/kvm/kvm-cpu.c @@ -18,6 +18,8 @@ #include "kvm_i386.h" #include "hw/core/accel-cpu.h" +#include "standard-headers/asm-x86/kvm_para.h" + static void kvm_set_guest_phys_bits(CPUState *cs) { X86CPU *cpu = X86_CPU(cs); @@ -72,6 +74,23 @@ static bool kvm_cpu_realizefn(CPUState *cs, Error **errp) MSR_IA32_UCODE_REV); } } + + if (cpu->legacy_kvmclock) { + /* + * The old and new kvmclock are both set by default from the + * oldest KVM supported (v4.5, see "OS requirements" section at + * docs/system/target-i386.rst). So when one of them is missing, + * it is only possible that the user is actively masking it. + * Then, mask both at the same time for compatibility with v9.0 + * and older QEMU's kvmclock behavior. + */ + if (!(env->features[FEAT_KVM] & CPUID_FEAT_KVM_CLOCK) || + !(env->features[FEAT_KVM] & CPUID_FEAT_KVM_CLOCK2)) { + env->features[FEAT_KVM] &= ~(CPUID_FEAT_KVM_CLOCK | + CPUID_FEAT_KVM_CLOCK2); + } + } + ret = host_cpu_realizefn(cs, errp); if (!ret) { return ret; From patchwork Fri Mar 29 10:19:53 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhao Liu X-Patchwork-Id: 13610510 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9FD6C52F72 for ; Fri, 29 Mar 2024 10:06:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.11 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711706786; cv=none; b=nlZP/wg8bVMVE81KOhaXRfuKtuNuewBUuZ9qsoU5ArD/spM/rRk4HGAZ2eu/UvY3kFG25WZjKtbyUlhhfgvChP+Yxg/Bcgl9EGxk/ovVUGWoRzpzpjXzMyC5Pd0oROk6c3B+AOXn+RH3ZdcVB9mnRLgXDSHvFkfeiPVfR/7aEIg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711706786; c=relaxed/simple; bh=5YnpqPAXnQgSLnwyieSH2PQh+ZNUxgYyQ1OBV3sT/yg=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=RaLG+KkAJqwKN0JH1I22fp3JcOPC08Hlpj2jbCdYlu2MVGUs5fklj94TXC1QSwSiPqgIIEAmS3crdt3Y4LlfufuA950yCwJsfqnBFxCjM8BJxHHHQtstFDRUM1rlWK896YtToscPJr//MovkKEyrtfNmbVeRx2GzGmjFbSkzKPw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=Ka4xH/kX; arc=none smtp.client-ip=192.198.163.11 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="Ka4xH/kX" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1711706785; x=1743242785; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=5YnpqPAXnQgSLnwyieSH2PQh+ZNUxgYyQ1OBV3sT/yg=; b=Ka4xH/kX4X2LeMFlVTPn+SbJM/A4y8rjnNtiknOGmvk69t+r7JBpVF4u PLAlxl3wM47rlQwsA+FA7ClsNTMCIe1vVGxr4Akv8+cqBSLPM2oGwfZNQ BKElJtTg0HH4DsqiscZdlBM82f//7/gcnilfomIsPDUtpGM9YbwXDMU3j xMC+NJF0REL+dq9Gqk/EhZXdIgAdEgoToejqXjvVkvIlvBy8O6/x1fKxx WSwnnl0RfRZDBiMWzj3fSj3hHwn57smk8umTcpwq45QwlEnROf+aETYYB tm6HAfew4s7ap0cQvSCdQKdQO1mGgtK5Tznlla55rL9B0iK6+gmHfDm6a Q==; X-CSE-ConnectionGUID: r5+O+p23Qgmlsk+p4mmUJQ== X-CSE-MsgGUID: hphfjLlhScWGmeGFw4oR5w== X-IronPort-AV: E=McAfee;i="6600,9927,11027"; a="17519237" X-IronPort-AV: E=Sophos;i="6.07,164,1708416000"; d="scan'208";a="17519237" Received: from fmviesa003.fm.intel.com ([10.60.135.143]) by fmvoesa105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Mar 2024 03:06:24 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,164,1708416000"; d="scan'208";a="21441985" Received: from liuzhao-optiplex-7080.sh.intel.com ([10.239.160.36]) by fmviesa003.fm.intel.com with ESMTP; 29 Mar 2024 03:06:21 -0700 From: Zhao Liu To: Paolo Bonzini , Richard Henderson , Eduardo Habkost , "Michael S . Tsirkin" , Marcel Apfelbaum , Marcelo Tosatti , Igor Mammedov , Tim Wiederhake Cc: qemu-devel@nongnu.org, kvm@vger.kernel.org, Zhao Liu Subject: [PATCH for-9.1 6/7] target/i386: Fix duplicated kvmclock name in FEAT_KVM Date: Fri, 29 Mar 2024 18:19:53 +0800 Message-Id: <20240329101954.3954987-7-zhao1.liu@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240329101954.3954987-1-zhao1.liu@linux.intel.com> References: <20240329101954.3954987-1-zhao1.liu@linux.intel.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Tim Wiederhake The commit 642258c6c7 ("kvm: add kvmclock to its second bit") gave the old and new kvmclocks with the same name "kvmclock", to facilitate user to set/unset the feature bits for both 2 kvmclock features together. This could work because: * QEMU side: - x86_cpu_register_bit_prop() supports "the same property name can be registered multiple times to make it affect multiple bits in the same FeatureWord". * KVM side: - The only difference between 2 version kvmclocks is their MSRs have different addresses. - When 2 kvmclocks are both enabled, KVM will prioritize the use of new kvmclock's MSRs. However, there're reasons we need give the second kvmclock a new name: * Based on the KVM mechanism, it doesn't make sense to bind two kvmclocks together. Since kvmclock is enabled by default in most cases as a KVM PV feature, the benefit of the same naming is reflected in the fact that -kvmclock can disable both. But, following the KVM interface style (i.e., separating the two kvmclocks) is clearly clearer to the user. * For developers, identical names have been creating confusion along with persistent doubts about the naming. * FeatureWordInfo should define names based on hardware/Host CPUID bit, and the name is used to distinguish the bit. * User actions based on +/- feature names should only work on independent feature bits. The common effect of multiple features should be controlled by an additional CPU property or additional code logic to show the association between different feature bits. * The old kvmclock will eventually be removed. Different naming can ease the burden of future cleanups. Therefore, rename the new kvmclock feature as "kvmclock2". Additionally, add "kvmclock2" entry in kvm_default_props[] since the oldest kernel supported by QEMU (v4.5) has supported the new kvm clock. Signed-off-by: Tim Wiederhake Signed-off-by: Zhao Liu --- Based on Tim's original patch, rewrote the commit message and added the tiny fix for compatibility. --- target/i386/cpu.c | 2 +- target/i386/kvm/kvm-cpu.c | 3 ++- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 1b6caf071a6d..0a1dac60f5de 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -855,7 +855,7 @@ FeatureWordInfo feature_word_info[FEATURE_WORDS] = { [FEAT_KVM] = { .type = CPUID_FEATURE_WORD, .feat_names = { - "kvmclock", "kvm-nopiodelay", "kvm-mmu", "kvmclock", + "kvmclock", "kvm-nopiodelay", "kvm-mmu", "kvmclock2", "kvm-asyncpf", "kvm-steal-time", "kvm-pv-eoi", "kvm-pv-unhalt", NULL, "kvm-pv-tlb-flush", "kvm-asyncpf-vmexit", "kvm-pv-ipi", "kvm-poll-control", "kvm-pv-sched-yield", "kvm-asyncpf-int", "kvm-msi-ext-dest-id", diff --git a/target/i386/kvm/kvm-cpu.c b/target/i386/kvm/kvm-cpu.c index ae3cb27c8aa8..753f90c18bd6 100644 --- a/target/i386/kvm/kvm-cpu.c +++ b/target/i386/kvm/kvm-cpu.c @@ -77,7 +77,7 @@ static bool kvm_cpu_realizefn(CPUState *cs, Error **errp) if (cpu->legacy_kvmclock) { /* - * The old and new kvmclock are both set by default from the + * The kvmclock and kvmclock2 are both set by default from the * oldest KVM supported (v4.5, see "OS requirements" section at * docs/system/target-i386.rst). So when one of them is missing, * it is only possible that the user is actively masking it. @@ -179,6 +179,7 @@ static void kvm_cpu_xsave_init(void) */ static PropValue kvm_default_props[] = { { "kvmclock", "on" }, + { "kvmclock2", "on" }, { "kvm-nopiodelay", "on" }, { "kvm-asyncpf", "on" }, { "kvm-steal-time", "on" }, From patchwork Fri Mar 29 10:19:54 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhao Liu X-Patchwork-Id: 13610511 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 36D8154BF6 for ; Fri, 29 Mar 2024 10:06:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.11 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711706788; cv=none; b=oziOf/bg5D1PopxnFxIZFzTHZvBu8XCfRiJWdOahrwp65FxdHNZcbVl7veG+1VyGZK4QdjJaYyDVFNVOhcjcnT2isAcmQsV3m/bnUqrZKXJ903bEQPxkvw91F76EWT9MWGdsF5yRhzfNtBvVVUawFNnk/IG6rj7oHWnlyo0Yf/U= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711706788; c=relaxed/simple; bh=EAlsIr9gV/OWidz8nIWqoCkuvpdnZz9VytfSWf5d/ic=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=mdtPeGhsC7OYdLi6yWB4FFwTQ7W7Bm8wSBeVYtVKdU00ZHgjBILRc4Z/Roq7kMgHgZ01lWEK/JIjt714ngRbNbjI4bhwXpVlEnIzLISNMjjt6i7igXTbsrYRYykCkm4eLyrN3WZh+W3JMvAg3QwQG3mCNsmok47eb5IdzAmKEmg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=PoO6pTnd; arc=none smtp.client-ip=192.198.163.11 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="PoO6pTnd" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1711706787; x=1743242787; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=EAlsIr9gV/OWidz8nIWqoCkuvpdnZz9VytfSWf5d/ic=; b=PoO6pTnd4VuNsTMGlKft80XFRRhTWD0sXFtWQSgA4j2I2eDt6p9Mx2t/ omVACRxWvWVIiUTw2i9H4X3q/axq2Ju2aYR+XngFoA9Mn//791JNAAfYU 4r76NNkZ6/ezligjTESaGZZ/P9L3QQlkVv+LsOcXP1463Ma6tWTT4y8R5 wgEzJGRA1rIyUBiv9TH+5r4S/nREW36zhe6AAtb1G9qDvi6ALyiSc7DeR ItsCdTBNrQwljYa93dAMOu3QDiuMRToaYdzivdLJuGMRgIjVVlqifsfBy 9EORC5hMNiE5LG8lzF0+guhvUooNRYtyzENANJAGm8GaSdAJTDuNbmwDV A==; X-CSE-ConnectionGUID: AyrUCFovQi+ZC7DAghDBrw== X-CSE-MsgGUID: rhLrSWlSSq2erXMulSf16w== X-IronPort-AV: E=McAfee;i="6600,9927,11027"; a="17519244" X-IronPort-AV: E=Sophos;i="6.07,164,1708416000"; d="scan'208";a="17519244" Received: from fmviesa003.fm.intel.com ([10.60.135.143]) by fmvoesa105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Mar 2024 03:06:27 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,164,1708416000"; d="scan'208";a="21441989" Received: from liuzhao-optiplex-7080.sh.intel.com ([10.239.160.36]) by fmviesa003.fm.intel.com with ESMTP; 29 Mar 2024 03:06:24 -0700 From: Zhao Liu To: Paolo Bonzini , Richard Henderson , Eduardo Habkost , "Michael S . Tsirkin" , Marcel Apfelbaum , Marcelo Tosatti , Igor Mammedov , Tim Wiederhake Cc: qemu-devel@nongnu.org, kvm@vger.kernel.org, Zhao Liu Subject: [PATCH for-9.1 7/7] target/i386/kvm: Update comment in kvm_cpu_realizefn() Date: Fri, 29 Mar 2024 18:19:54 +0800 Message-Id: <20240329101954.3954987-8-zhao1.liu@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240329101954.3954987-1-zhao1.liu@linux.intel.com> References: <20240329101954.3954987-1-zhao1.liu@linux.intel.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Zhao Liu With the guest_phys_bits and legacy_kvmclock change, update the comment about function call flow. Signed-off-by: Zhao Liu --- target/i386/kvm/kvm-cpu.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/target/i386/kvm/kvm-cpu.c b/target/i386/kvm/kvm-cpu.c index 753f90c18bd6..5b48b023c33b 100644 --- a/target/i386/kvm/kvm-cpu.c +++ b/target/i386/kvm/kvm-cpu.c @@ -60,7 +60,10 @@ static bool kvm_cpu_realizefn(CPUState *cs, Error **errp) * -> x86_cpu_expand_features() * -> cpu_exec_realizefn(): * -> accel_cpu_common_realize() - * kvm_cpu_realizefn() -> host_cpu_realizefn() + * kvm_cpu_realizefn() + * -> update cpu_pm, ucode_rev, kvmclock + * host_cpu_realizefn() + * update guest_phys_bits on Host support * -> cpu_common_realizefn() * -> check/update ucode_rev, phys_bits, mwait */