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a=openpgp-sha256; l=2135; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=12rUl+2HnN8d7afCUpo5jilPDeMfLdH1F3n7T397uIk=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBmCCke8taj0wJ8X25rcsRC2l4+1FyzH+0L4pQEl PR5XN45bp6JATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZggpHgAKCRCLPIo+Aiko 1dgUB/9Cy9Youl9yPUldBL810Zn8CCZQKNyF9iQbeAOAtEWQ0mzurRp1QWj3JhIgeIEtsvoMTZz ZpDFHdscoQzHkbDfoNYE94D1ikHhhPGT23yTeruJMAGLITZncwrk1BUngFD1tjDpgfQOl9+SkbD X4uBi6Q+IXETGPTWmrn2w95UozYHKavRJFhJEgiSTO474Ffssaay9XvQ6Peq3we1Jk47/cBdL5D uRG1QNXjc1gA8I1kYTR5Z2ExDqlxea/kCr/AiuZb+qEx6o1Vc8FIJq0CY+9ghyypA5tW4k8GcvV 8mDQAHBf5LvJITEFgHGyotsJEB+DGuZan6fpP9Cj7Di3P7RJ X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A From: Sumit Semwal LG SW43408 is 1080x2160, 4-lane MIPI-DSI panel present on Google Pixel 3 phones. Signed-off-by: Vinod Koul Signed-off-by: Sumit Semwal [caleb: convert to yaml] Signed-off-by: Caleb Connolly Signed-off-by: Dmitry Baryshkov Reviewed-by: Krzysztof Kozlowski --- .../bindings/display/panel/lg,sw43408.yaml | 62 ++++++++++++++++++++++ 1 file changed, 62 insertions(+) diff --git a/Documentation/devicetree/bindings/display/panel/lg,sw43408.yaml b/Documentation/devicetree/bindings/display/panel/lg,sw43408.yaml new file mode 100644 index 000000000000..1e08648f5bc7 --- /dev/null +++ b/Documentation/devicetree/bindings/display/panel/lg,sw43408.yaml @@ -0,0 +1,62 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/panel/lg,sw43408.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: LG SW43408 1080x2160 DSI panel + +maintainers: + - Caleb Connolly + +description: + This panel is used on the Pixel 3, it is a 60hz OLED panel which + required DSC (Display Stream Compression) and has rounded corners. + +allOf: + - $ref: panel-common.yaml# + +properties: + compatible: + items: + - const: lg,sw43408 + + reg: true + port: true + vddi-supply: true + vpnl-supply: true + reset-gpios: true + +required: + - compatible + - vddi-supply + - vpnl-supply + - reset-gpios + +additionalProperties: false + +examples: + - | + #include + + dsi { + #address-cells = <1>; + #size-cells = <0>; + + panel@0 { + compatible = "lg,sw43408"; + reg = <0>; + + vddi-supply = <&vreg_l14a_1p88>; + vpnl-supply = <&vreg_l28a_3p0>; + + reset-gpios = <&tlmm 6 GPIO_ACTIVE_LOW>; + + port { + endpoint { + remote-endpoint = <&mdss_dsi0_out>; + }; + }; + }; + }; +... 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a=openpgp-sha256; l=3402; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=1dHUwNPq/ZE2lZqujLo0paqKG5T8bLmbO34BUbpj00o=; b=owGbwMvMwMXYbdNlx6SpcZXxtFoSQxqHplxtUqThhGu919/sN//TceXwyktfCwLqyuu1DCecu edwe3F6J6MxCwMjF4OsmCKLT0HL1JhNyWEfdkythxnEygQyhYGLUwAmwvWLg6Gl56nEj66VlVyG xx9G7sxp1d98I4a37MfW5rKYx/57D0022SfSK5Zudy8x/M/8mUYW7Yc9ThV71L7cU7T8hV8zb9h 5pgw2w4Lf7ifi2ITbao2idruvqG/ZLL6u6NBCncKb+juX9E+6N6NKbYFxRr30D/njraWrpp0+Gt A2SyfrqPcN3oeOeqFf49a/SchwTHtYcCy3X2kTC68Dd/+aznOBKQnBn+b9+7igxNzhhZYAW7hfh /VXyRgR7T9B82L/1Gj57mZhm77N1m6dytac701mf7Y1HVglLP9i2y3VNVsCGup2fTa/WhH1dGfu s5M1ng5PEg259jSLOzjsnie21nSjwM1C84fqvde0E3kUAA== X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A The LG SW43408 panel requires sending non-standard data as a part of the MIPI_DSI_COMPRESSION_MODE packet. Rather than hacking existing mipi_dsi_compression_mode() add mipi_dsi_compression_mode_raw(), which accepts raw data buffer and length. Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/drm_mipi_dsi.c | 34 ++++++++++++++++++++++++++-------- include/drm/drm_mipi_dsi.h | 1 + 2 files changed, 27 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/drm_mipi_dsi.c b/drivers/gpu/drm/drm_mipi_dsi.c index ef6e416522f8..f340d1e0a9a5 100644 --- a/drivers/gpu/drm/drm_mipi_dsi.c +++ b/drivers/gpu/drm/drm_mipi_dsi.c @@ -645,29 +645,47 @@ int mipi_dsi_set_maximum_return_packet_size(struct mipi_dsi_device *dsi, EXPORT_SYMBOL(mipi_dsi_set_maximum_return_packet_size); /** - * mipi_dsi_compression_mode() - enable/disable DSC on the peripheral + * mipi_dsi_compression_mode_raw() - control DSC on the peripheral * @dsi: DSI peripheral device - * @enable: Whether to enable or disable the DSC + * @data: data to be sent to the device + * @len: size of the data buffer * - * Enable or disable Display Stream Compression on the peripheral using the + * Control the Display Stream Compression on the peripheral using the * default Picture Parameter Set and VESA DSC 1.1 algorithm. * * Return: 0 on success or a negative error code on failure. */ -ssize_t mipi_dsi_compression_mode(struct mipi_dsi_device *dsi, bool enable) +ssize_t mipi_dsi_compression_mode_raw(struct mipi_dsi_device *dsi, void *data, size_t len) { - /* Note: Needs updating for non-default PPS or algorithm */ - u8 tx[2] = { enable << 0, 0 }; struct mipi_dsi_msg msg = { .channel = dsi->channel, .type = MIPI_DSI_COMPRESSION_MODE, - .tx_len = sizeof(tx), - .tx_buf = tx, + .tx_len = len, + .tx_buf = data, }; int ret = mipi_dsi_device_transfer(dsi, &msg); return (ret < 0) ? ret : 0; } +EXPORT_SYMBOL(mipi_dsi_compression_mode_raw); + +/** + * mipi_dsi_compression_mode() - enable/disable DSC on the peripheral + * @dsi: DSI peripheral device + * @enable: Whether to enable or disable the DSC + * + * Enable or disable Display Stream Compression on the peripheral using the + * default Picture Parameter Set and VESA DSC 1.1 algorithm. + * + * Return: 0 on success or a negative error code on failure. + */ +ssize_t mipi_dsi_compression_mode(struct mipi_dsi_device *dsi, bool enable) +{ + /* Note: Needs updating for non-default PPS or algorithm */ + u8 tx[2] = { enable << 0, 0 }; + + return mipi_dsi_compression_mode_raw(dsi, tx, sizeof(tx)); +} EXPORT_SYMBOL(mipi_dsi_compression_mode); /** diff --git a/include/drm/drm_mipi_dsi.h b/include/drm/drm_mipi_dsi.h index c0aec0d4d664..321d2b019687 100644 --- a/include/drm/drm_mipi_dsi.h +++ b/include/drm/drm_mipi_dsi.h @@ -242,6 +242,7 @@ int mipi_dsi_turn_on_peripheral(struct mipi_dsi_device *dsi); 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Sat, 30 Mar 2024 08:00:50 -0700 (PDT) Received: from umbar.lan ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id j5-20020a056512344500b00515d205a6f0sm496199lfr.29.2024.03.30.08.00.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 30 Mar 2024 08:00:49 -0700 (PDT) From: Dmitry Baryshkov Date: Sat, 30 Mar 2024 17:00:48 +0200 Subject: [PATCH v2 3/3] drm: panel: Add LG sw43408 panel driver Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240330-lg-sw43408-panel-v2-3-293a58717b38@linaro.org> References: <20240330-lg-sw43408-panel-v2-0-293a58717b38@linaro.org> In-Reply-To: <20240330-lg-sw43408-panel-v2-0-293a58717b38@linaro.org> To: Sumit Semwal , Caleb Connolly , Neil Armstrong , Jessica Zhang , Sam Ravnborg , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Vinod Koul , Caleb Connolly X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=12229; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=D6vJJI+0cd9TezSGqlz9pC0jmFumI9Fyojywzyt3GeA=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBmCCkffNwBqAropCyO2l9Jyg07Kxpr10x4DXZIo z9bQSoOw56JATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZggpHwAKCRCLPIo+Aiko 1SZ5B/9Cv+ba2KyMkgNicBHJyvACx8mdXa5zay9s9JfnrmHcgAMkkTyvPWJn3cA7lBke+Zj7LwX zz6JpF0DZij96RrVVs3h8HqkOrkHe3F/oVRCPA/jhy7weDjRCr8LZzbyff/cqqLbkFwu8hcsjSS +W0/jxzrtS78N6nd4YQ7G+GOLYd0VN/5BafXu9i6Hqv/FxwsynObGSnk/zzQ9ydQ/9RbKYnWwbg ayQ+dEXOTThpxdIbVZkughUOUtEAnqh94MenrmDUqFR988DJTrNs6M7UF6AjIPymiJPYYpe19rs bbeDlR50Es5A2/QRQ/PqZ79YtGSzKyikuMmyeiylkXpURNXO X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A From: Sumit Semwal LG SW43408 is 1080x2160, 4-lane MIPI-DSI panel, used in some Pixel3 phones. Signed-off-by: Sumit Semwal [vinod: Add DSC support] Signed-off-by: Vinod Koul [caleb: cleanup and support turning off the panel] Signed-off-by: Caleb Connolly [DB: partially rewrote the driver and fixed DSC programming] Signed-off-by: Dmitry Baryshkov --- MAINTAINERS | 8 + drivers/gpu/drm/panel/Kconfig | 11 ++ drivers/gpu/drm/panel/Makefile | 1 + drivers/gpu/drm/panel/panel-lg-sw43408.c | 321 +++++++++++++++++++++++++++++++ 4 files changed, 341 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 4b511a55101c..f4cf7ee97376 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -6755,6 +6755,14 @@ S: Maintained F: Documentation/devicetree/bindings/display/panel/jadard,jd9365da-h3.yaml F: drivers/gpu/drm/panel/panel-jadard-jd9365da-h3.c +DRM DRIVER FOR LG SW43408 PANELS +M: Sumit Semwal +M: Caleb Connolly +S: Maintained +T: git git://anongit.freedesktop.org/drm/drm-misc +F: Documentation/devicetree/bindings/display/panel/lg,sw43408.yaml +F: drivers/gpu/drm/panel/panel-lg-sw43408.c + DRM DRIVER FOR LOGICVC DISPLAY CONTROLLER M: Paul Kocialkowski S: Supported diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig index d037b3b8b999..f94c702735cb 100644 --- a/drivers/gpu/drm/panel/Kconfig +++ b/drivers/gpu/drm/panel/Kconfig @@ -335,6 +335,17 @@ config DRM_PANEL_LG_LG4573 Say Y here if you want to enable support for LG4573 RGB panel. To compile this driver as a module, choose M here. +config DRM_PANEL_LG_SW43408 + tristate "LG SW43408 panel" + depends on OF + depends on DRM_MIPI_DSI + depends on BACKLIGHT_CLASS_DEVICE + help + Say Y here if you want to enable support for LG sw43408 panel. + The panel has a 1080x2160 resolution and uses + 24 bit RGB per pixel. It provides a MIPI DSI interface to + the host and has a built-in LED backlight. + config DRM_PANEL_MAGNACHIP_D53E6EA8966 tristate "Magnachip D53E6EA8966 DSI panel" depends on OF && SPI diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile index f156d7fa0bcc..a75687d13caf 100644 --- a/drivers/gpu/drm/panel/Makefile +++ b/drivers/gpu/drm/panel/Makefile @@ -34,6 +34,7 @@ obj-$(CONFIG_DRM_PANEL_LEADTEK_LTK050H3146W) += panel-leadtek-ltk050h3146w.o obj-$(CONFIG_DRM_PANEL_LEADTEK_LTK500HD1829) += panel-leadtek-ltk500hd1829.o obj-$(CONFIG_DRM_PANEL_LG_LB035Q02) += panel-lg-lb035q02.o obj-$(CONFIG_DRM_PANEL_LG_LG4573) += panel-lg-lg4573.o +obj-$(CONFIG_DRM_PANEL_LG_SW43408) += panel-lg-sw43408.o obj-$(CONFIG_DRM_PANEL_MAGNACHIP_D53E6EA8966) += panel-magnachip-d53e6ea8966.o obj-$(CONFIG_DRM_PANEL_NEC_NL8048HL11) += panel-nec-nl8048hl11.o obj-$(CONFIG_DRM_PANEL_NEWVISION_NV3051D) += panel-newvision-nv3051d.o diff --git a/drivers/gpu/drm/panel/panel-lg-sw43408.c b/drivers/gpu/drm/panel/panel-lg-sw43408.c new file mode 100644 index 000000000000..6c244b9642f1 --- /dev/null +++ b/drivers/gpu/drm/panel/panel-lg-sw43408.c @@ -0,0 +1,321 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2019-2024 Linaro Ltd + * Author: Sumit Semwal + * Dmitry Baryshkov + */ + +#include +#include +#include +#include +#include +#include + +#include