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a=openpgp-sha256; l=2135; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=12rUl+2HnN8d7afCUpo5jilPDeMfLdH1F3n7T397uIk=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBmC0hwBbAPFoe4VO+0i+xUCjCnUrwhXAUz8gChl BvoLM78kO6JATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZgtIcAAKCRCLPIo+Aiko 1SReCACowHvqNUvZGrCCOaGMgmIDhg8ZmYUdtAAvvyl2y4/6Oo664vzHuoX8LODxS80H/VENCRC uJiG08iJrDMUDE5HgSuGA+fqiKmfNF5Qe4zcUPTvr/Rs1mWiNsWy8NEOcoh5GRPTM7mZ/H5Tw5C kLO/KI7SZRV6H2dBX4NFa27DPEuPdFswYpTxjUWxIhNyUG2Fvue9WXDgluiS1cvHw8ZAkC9LKNQ Z7Bv7MJ/AQnRfvNF9G8nHN4jEE7MX7fUE7mAFflg1OBvDWtJh3++Ph8aHgtPSLvj+gwD3q9E1uN anNOwBmd6YkWQQe3zt2s2trXJGsp95RfTO3b8VFJs8zPYIu3 X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A From: Sumit Semwal LG SW43408 is 1080x2160, 4-lane MIPI-DSI panel present on Google Pixel 3 phones. Signed-off-by: Vinod Koul Signed-off-by: Sumit Semwal [caleb: convert to yaml] Signed-off-by: Caleb Connolly Signed-off-by: Dmitry Baryshkov --- .../bindings/display/panel/lg,sw43408.yaml | 62 ++++++++++++++++++++++ 1 file changed, 62 insertions(+) diff --git a/Documentation/devicetree/bindings/display/panel/lg,sw43408.yaml b/Documentation/devicetree/bindings/display/panel/lg,sw43408.yaml new file mode 100644 index 000000000000..1e08648f5bc7 --- /dev/null +++ b/Documentation/devicetree/bindings/display/panel/lg,sw43408.yaml @@ -0,0 +1,62 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/panel/lg,sw43408.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: LG SW43408 1080x2160 DSI panel + +maintainers: + - Caleb Connolly + +description: + This panel is used on the Pixel 3, it is a 60hz OLED panel which + required DSC (Display Stream Compression) and has rounded corners. + +allOf: + - $ref: panel-common.yaml# + +properties: + compatible: + items: + - const: lg,sw43408 + + reg: true + port: true + vddi-supply: true + vpnl-supply: true + reset-gpios: true + +required: + - compatible + - vddi-supply + - vpnl-supply + - reset-gpios + +additionalProperties: false + +examples: + - | + #include + + dsi { + #address-cells = <1>; + #size-cells = <0>; + + panel@0 { + compatible = "lg,sw43408"; + reg = <0>; + + vddi-supply = <&vreg_l14a_1p88>; + vpnl-supply = <&vreg_l28a_3p0>; + + reset-gpios = <&tlmm 6 GPIO_ACTIVE_LOW>; + + port { + endpoint { + remote-endpoint = <&mdss_dsi0_out>; + }; + }; + }; + }; +... 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a=openpgp-sha256; l=2540; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=rOvOaoNrEOh1JwJ8A0R+xJN2bNlhVIkJiYWXEFZjcZQ=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBmC0hwGj7vMo/Qzh0+3TBiCZLL4baY6KAU+dlyE vw+6BoHZOyJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZgtIcAAKCRCLPIo+Aiko 1Zv+B/9wd2V5+AZfCycvRGBF4noHw+StvkzjCmm8/yNBKOTXw92ECQQeXQyhdCDfxWuJSNcfdhH z3MjqZwynJX76c3byfFHg3E4Y16BAv21oi7lfKZXZCD3eotB7i448jq6ObfxKEBWEae3rT/+nKs GoP9NlqdeuTpURnhpCqqb+Xt9/cfmyyavxioTm0vhtfT8PzGPiIh54S3UZkSJqZ9j6pqY/ugBAM bsC1MPWunq1bMRstUGrwHypdSHdHgGXfR5cbU2Qd2sfYfJmUgiTOdoMppG0NmmtILsToesdm/q/ RxDM0+dlz8tfLJOi90XWEi8jRA9un1FqARRV9Vbz/7aW/duX X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A The functions mipi_dsi_compression_mode() and mipi_dsi_picture_parameter_set() return 0-or-error rather than a buffer size. Follow example of other similar MIPI DSI functions and use int return type instead of size_t. Fixes: f4dea1aaa9a1 ("drm/dsi: add helpers for DSI compression mode and PPS packets") Signed-off-by: Dmitry Baryshkov Reviewed-by: Marijn Suijten --- drivers/gpu/drm/drm_mipi_dsi.c | 6 +++--- include/drm/drm_mipi_dsi.h | 6 +++--- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/drm_mipi_dsi.c b/drivers/gpu/drm/drm_mipi_dsi.c index ef6e416522f8..9874ff6d4718 100644 --- a/drivers/gpu/drm/drm_mipi_dsi.c +++ b/drivers/gpu/drm/drm_mipi_dsi.c @@ -654,7 +654,7 @@ EXPORT_SYMBOL(mipi_dsi_set_maximum_return_packet_size); * * Return: 0 on success or a negative error code on failure. */ -ssize_t mipi_dsi_compression_mode(struct mipi_dsi_device *dsi, bool enable) +int mipi_dsi_compression_mode(struct mipi_dsi_device *dsi, bool enable) { /* Note: Needs updating for non-default PPS or algorithm */ u8 tx[2] = { enable << 0, 0 }; @@ -679,8 +679,8 @@ EXPORT_SYMBOL(mipi_dsi_compression_mode); * * Return: 0 on success or a negative error code on failure. */ -ssize_t mipi_dsi_picture_parameter_set(struct mipi_dsi_device *dsi, - const struct drm_dsc_picture_parameter_set *pps) +int mipi_dsi_picture_parameter_set(struct mipi_dsi_device *dsi, + const struct drm_dsc_picture_parameter_set *pps) { struct mipi_dsi_msg msg = { .channel = dsi->channel, diff --git a/include/drm/drm_mipi_dsi.h b/include/drm/drm_mipi_dsi.h index c0aec0d4d664..3011d33eccbd 100644 --- a/include/drm/drm_mipi_dsi.h +++ b/include/drm/drm_mipi_dsi.h @@ -241,9 +241,9 @@ int mipi_dsi_shutdown_peripheral(struct mipi_dsi_device *dsi); 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It provides a way to specify the algorithm and PPS selector. Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/drm_mipi_dsi.c | 33 +++++++++++++++++++++++++++------ include/drm/drm_mipi_dsi.h | 9 +++++++++ 2 files changed, 36 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/drm_mipi_dsi.c b/drivers/gpu/drm/drm_mipi_dsi.c index 9874ff6d4718..0ecbc811eb7a 100644 --- a/drivers/gpu/drm/drm_mipi_dsi.c +++ b/drivers/gpu/drm/drm_mipi_dsi.c @@ -645,19 +645,24 @@ int mipi_dsi_set_maximum_return_packet_size(struct mipi_dsi_device *dsi, EXPORT_SYMBOL(mipi_dsi_set_maximum_return_packet_size); /** - * mipi_dsi_compression_mode() - enable/disable DSC on the peripheral + * mipi_dsi_compression_mode_ext() - enable/disable DSC on the peripheral * @dsi: DSI peripheral device * @enable: Whether to enable or disable the DSC + * @algo: Selected algorithm + * @pps_selector: The PPS selector * - * Enable or disable Display Stream Compression on the peripheral using the - * default Picture Parameter Set and VESA DSC 1.1 algorithm. + * Enable or disable Display Stream Compression on the peripheral. * * Return: 0 on success or a negative error code on failure. */ -int mipi_dsi_compression_mode(struct mipi_dsi_device *dsi, bool enable) +int mipi_dsi_compression_mode_ext(struct mipi_dsi_device *dsi, bool enable, + enum mipi_dsi_compression_algo algo, + unsigned int pps_selector) { - /* Note: Needs updating for non-default PPS or algorithm */ - u8 tx[2] = { enable << 0, 0 }; + u8 data = (enable << 0) | + (algo << 1) | + (pps_selector << 4); + u8 tx[2] = { data, 0 }; struct mipi_dsi_msg msg = { .channel = dsi->channel, .type = MIPI_DSI_COMPRESSION_MODE, @@ -668,6 +673,22 @@ int mipi_dsi_compression_mode(struct mipi_dsi_device *dsi, bool enable) return (ret < 0) ? ret : 0; } +EXPORT_SYMBOL(mipi_dsi_compression_mode_ext); + +/** + * mipi_dsi_compression_mode() - enable/disable DSC on the peripheral + * @dsi: DSI peripheral device + * @enable: Whether to enable or disable the DSC + * + * Enable or disable Display Stream Compression on the peripheral using the + * default Picture Parameter Set and VESA DSC 1.1 algorithm. + * + * Return: 0 on success or a negative error code on failure. + */ +int mipi_dsi_compression_mode(struct mipi_dsi_device *dsi, bool enable) +{ + return mipi_dsi_compression_mode_ext(dsi, enable, 0, MIPI_DSI_COMPRESSION_DSC); +} EXPORT_SYMBOL(mipi_dsi_compression_mode); /** diff --git a/include/drm/drm_mipi_dsi.h b/include/drm/drm_mipi_dsi.h index 3011d33eccbd..78cb7b688b1d 100644 --- a/include/drm/drm_mipi_dsi.h +++ b/include/drm/drm_mipi_dsi.h @@ -226,6 +226,12 @@ static inline int mipi_dsi_pixel_format_to_bpp(enum mipi_dsi_pixel_format fmt) return -EINVAL; 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Mon, 01 Apr 2024 16:51:17 -0700 (PDT) Received: from umbar.lan ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id g28-20020a0565123b9c00b00515d127a399sm1176135lfv.58.2024.04.01.16.51.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 01 Apr 2024 16:51:16 -0700 (PDT) From: Dmitry Baryshkov Date: Tue, 02 Apr 2024 02:51:15 +0300 Subject: [PATCH v3 4/4] drm: panel: Add LG sw43408 panel driver Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240402-lg-sw43408-panel-v3-4-144f17a11a56@linaro.org> References: <20240402-lg-sw43408-panel-v3-0-144f17a11a56@linaro.org> In-Reply-To: <20240402-lg-sw43408-panel-v3-0-144f17a11a56@linaro.org> To: Sumit Semwal , Caleb Connolly , Neil Armstrong , Jessica Zhang , Sam Ravnborg , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Vinod Koul , Caleb Connolly X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=12340; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=MNtQocnhPbn21d01nTwkNNinrQdzLkyr8DRma9TIYVw=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBmC0hxpRxbtYshJNrsXySDiZuVd/ph6njfNGCw8 UwfIDVBJuKJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZgtIcQAKCRCLPIo+Aiko 1RUqCACOH3WnFeD5VAvBwRUPH8zFdYMJMfHVIdncB+aoeA3We0Xr4uzyWrGO5WlU+pHiFRiL/Yy nM47AFrfLzljAjlowxd3NaAZdB3NPRznfSP0zUTxkWN/DN43T6KbdBnJjoRgmpiHjgIEXWqR7pe u8R4iA45lOBIUm4IRNsV/t5T5vMhN8JKItNZ02Z3ofnJZMer9fObN9kaLa71aRViy9apI8GEbEU dQzCgRPHhcgxJS+6+H0o49iqee4Xn7rWoCWADCsDFX56PjZDwxGKpVONBpe1D5YK/AM7blAlgIm /w1RvK4RyZBLVcDehP6H/dKAa4HzjAqNHipE6J/iGIFkINED X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A From: Sumit Semwal LG SW43408 is 1080x2160, 4-lane MIPI-DSI panel, used in some Pixel3 phones. Signed-off-by: Sumit Semwal [vinod: Add DSC support] Signed-off-by: Vinod Koul [caleb: cleanup and support turning off the panel] Signed-off-by: Caleb Connolly [DB: partially rewrote the driver and fixed DSC programming] Signed-off-by: Dmitry Baryshkov Reviewed-by: Marijn Suijten --- MAINTAINERS | 8 + drivers/gpu/drm/panel/Kconfig | 11 ++ drivers/gpu/drm/panel/Makefile | 1 + drivers/gpu/drm/panel/panel-lg-sw43408.c | 326 +++++++++++++++++++++++++++++++ 4 files changed, 346 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index d36c19c1bf81..4cc43c16e07e 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -6789,6 +6789,14 @@ S: Maintained F: Documentation/devicetree/bindings/display/panel/jadard,jd9365da-h3.yaml F: drivers/gpu/drm/panel/panel-jadard-jd9365da-h3.c +DRM DRIVER FOR LG SW43408 PANELS +M: Sumit Semwal +M: Caleb Connolly +S: Maintained +T: git git://anongit.freedesktop.org/drm/drm-misc +F: Documentation/devicetree/bindings/display/panel/lg,sw43408.yaml +F: drivers/gpu/drm/panel/panel-lg-sw43408.c + DRM DRIVER FOR LOGICVC DISPLAY CONTROLLER M: Paul Kocialkowski S: Supported diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig index 6dc451f58a3e..a55e9437c8cf 100644 --- a/drivers/gpu/drm/panel/Kconfig +++ b/drivers/gpu/drm/panel/Kconfig @@ -335,6 +335,17 @@ config DRM_PANEL_LG_LG4573 Say Y here if you want to enable support for LG4573 RGB panel. To compile this driver as a module, choose M here. +config DRM_PANEL_LG_SW43408 + tristate "LG SW43408 panel" + depends on OF + depends on DRM_MIPI_DSI + depends on BACKLIGHT_CLASS_DEVICE + help + Say Y here if you want to enable support for LG sw43408 panel. + The panel has a 1080x2160 resolution and uses + 24 bit RGB per pixel. It provides a MIPI DSI interface to + the host and has a built-in LED backlight. + config DRM_PANEL_MAGNACHIP_D53E6EA8966 tristate "Magnachip D53E6EA8966 DSI panel" depends on OF && SPI diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile index 24a02655d726..0b40b010e8e7 100644 --- a/drivers/gpu/drm/panel/Makefile +++ b/drivers/gpu/drm/panel/Makefile @@ -34,6 +34,7 @@ obj-$(CONFIG_DRM_PANEL_LEADTEK_LTK050H3146W) += panel-leadtek-ltk050h3146w.o obj-$(CONFIG_DRM_PANEL_LEADTEK_LTK500HD1829) += panel-leadtek-ltk500hd1829.o obj-$(CONFIG_DRM_PANEL_LG_LB035Q02) += panel-lg-lb035q02.o obj-$(CONFIG_DRM_PANEL_LG_LG4573) += panel-lg-lg4573.o +obj-$(CONFIG_DRM_PANEL_LG_SW43408) += panel-lg-sw43408.o obj-$(CONFIG_DRM_PANEL_MAGNACHIP_D53E6EA8966) += panel-magnachip-d53e6ea8966.o obj-$(CONFIG_DRM_PANEL_NEC_NL8048HL11) += panel-nec-nl8048hl11.o obj-$(CONFIG_DRM_PANEL_NEWVISION_NV3051D) += panel-newvision-nv3051d.o diff --git a/drivers/gpu/drm/panel/panel-lg-sw43408.c b/drivers/gpu/drm/panel/panel-lg-sw43408.c new file mode 100644 index 000000000000..c7611bfa796b --- /dev/null +++ b/drivers/gpu/drm/panel/panel-lg-sw43408.c @@ -0,0 +1,326 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2019-2024 Linaro Ltd + * Author: Sumit Semwal + * Dmitry Baryshkov + */ + +#include +#include +#include +#include +#include +#include + +#include