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[34.125.73.210]) by smtp.gmail.com with ESMTPSA id n16-20020aa79850000000b006e64ddfa71asm12359162pfq.170.2024.04.03.11.05.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 03 Apr 2024 11:05:24 -0700 (PDT) From: Pavan Holla Date: Wed, 03 Apr 2024 18:05:21 +0000 Subject: [PATCH v3 1/2] platform/chrome: Update ChromeOS EC header for UCSI Precedence: bulk X-Mailing-List: chrome-platform@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240403-public-ucsi-h-v3-1-f848e18c8ed2@chromium.org> References: <20240403-public-ucsi-h-v3-0-f848e18c8ed2@chromium.org> In-Reply-To: <20240403-public-ucsi-h-v3-0-f848e18c8ed2@chromium.org> To: Greg Kroah-Hartman , Heikki Krogerus , Benson Leung , Tzung-Bi Shih , Guenter Roeck Cc: linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, Abhishek Pandit-Subedi , chrome-platform@lists.linux.dev, Pavan Holla X-Mailer: b4 0.12.4 Add EC host commands for reading and writing UCSI structures in the EC. The corresponding kernel driver is cros-ec-ucsi. Also update PD events supported by the EC. Signed-off-by: Pavan Holla --- include/linux/platform_data/cros_ec_commands.h | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/include/linux/platform_data/cros_ec_commands.h b/include/linux/platform_data/cros_ec_commands.h index ecc47d5fe239..c0f6d054a566 100644 --- a/include/linux/platform_data/cros_ec_commands.h +++ b/include/linux/platform_data/cros_ec_commands.h @@ -4933,6 +4933,8 @@ struct ec_response_pd_status { #define PD_EVENT_POWER_CHANGE BIT(1) #define PD_EVENT_IDENTITY_RECEIVED BIT(2) #define PD_EVENT_DATA_SWAP BIT(3) +#define PD_EVENT_TYPEC BIT(4) +#define PD_EVENT_PPM BIT(5) struct ec_response_host_event_status { uint32_t status; /* PD MCU host event status */ } __ec_align4; @@ -5994,6 +5996,24 @@ struct ec_response_typec_vdm_response { #undef VDO_MAX_SIZE +/* + * Read/write interface for UCSI OPM <-> PPM communication. + */ +#define EC_CMD_UCSI_PPM_SET 0x0140 + +/* The data size is stored in the host command protocol header. */ +struct ec_params_ucsi_ppm_set { + uint16_t offset; + uint8_t data[]; +} __ec_align2; + +#define EC_CMD_UCSI_PPM_GET 0x0141 + +struct ec_params_ucsi_ppm_get { + uint16_t offset; + uint8_t size; +} __ec_align2; + /*****************************************************************************/ /* The command range 0x200-0x2FF is reserved for Rotor. */ From patchwork Wed Apr 3 18:05:22 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pavan Holla X-Patchwork-Id: 13616565 Received: from mail-pf1-f181.google.com (mail-pf1-f181.google.com [209.85.210.181]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2B6B5154BE8 for ; Wed, 3 Apr 2024 18:05:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.210.181 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1712167528; cv=none; b=q36VzcFIC/2EGrnCw2rOf9z2AJJTvD3ReU06kO5ykybnDkI5NbwMnw3n/ZIWNAw5PgpymEmWli4BKQKdoaUYZdVsFEHLpproo2BOvCryP+fceZmjJCkG0/5mCfnipesPJE/B7wDZCagTC9TFwXrSYGGXlxSty2SZf19ml2S95H0= ARC-Message-Signature: i=1; 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[34.125.73.210]) by smtp.gmail.com with ESMTPSA id n16-20020aa79850000000b006e64ddfa71asm12359162pfq.170.2024.04.03.11.05.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 03 Apr 2024 11:05:25 -0700 (PDT) From: Pavan Holla Date: Wed, 03 Apr 2024 18:05:22 +0000 Subject: [PATCH v3 2/2] usb: typec: ucsi: Implement ChromeOS UCSI driver Precedence: bulk X-Mailing-List: chrome-platform@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240403-public-ucsi-h-v3-2-f848e18c8ed2@chromium.org> References: <20240403-public-ucsi-h-v3-0-f848e18c8ed2@chromium.org> In-Reply-To: <20240403-public-ucsi-h-v3-0-f848e18c8ed2@chromium.org> To: Greg Kroah-Hartman , Heikki Krogerus , Benson Leung , Tzung-Bi Shih , Guenter Roeck Cc: linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, Abhishek Pandit-Subedi , chrome-platform@lists.linux.dev, Pavan Holla X-Mailer: b4 0.12.4 Implementation of a UCSI transport driver for ChromeOS. This driver will be loaded if the ChromeOS EC implements a PPM. Signed-off-by: Pavan Holla --- drivers/usb/typec/ucsi/Kconfig | 13 ++ drivers/usb/typec/ucsi/Makefile | 1 + drivers/usb/typec/ucsi/cros_ec_ucsi.c | 245 ++++++++++++++++++++++++++++++++++ 3 files changed, 259 insertions(+) diff --git a/drivers/usb/typec/ucsi/Kconfig b/drivers/usb/typec/ucsi/Kconfig index bdcb1764cfae..4dceb14a66ee 100644 --- a/drivers/usb/typec/ucsi/Kconfig +++ b/drivers/usb/typec/ucsi/Kconfig @@ -69,4 +69,17 @@ config UCSI_PMIC_GLINK To compile the driver as a module, choose M here: the module will be called ucsi_glink. +config CROS_EC_UCSI + tristate "UCSI Driver for ChromeOS EC" + depends on MFD_CROS_EC_DEV + depends on CROS_USBPD_NOTIFY + depends on !EXTCON_TCSS_CROS_EC + default MFD_CROS_EC_DEV + help + This driver enables UCSI support for a ChromeOS EC. The EC is + expected to implement a PPM. + + To compile the driver as a module, choose M here: the module + will be called cros_ec_ucsi. + endif diff --git a/drivers/usb/typec/ucsi/Makefile b/drivers/usb/typec/ucsi/Makefile index b4679f94696b..cb336eee055c 100644 --- a/drivers/usb/typec/ucsi/Makefile +++ b/drivers/usb/typec/ucsi/Makefile @@ -21,3 +21,4 @@ obj-$(CONFIG_UCSI_ACPI) += ucsi_acpi.o obj-$(CONFIG_UCSI_CCG) += ucsi_ccg.o obj-$(CONFIG_UCSI_STM32G0) += ucsi_stm32g0.o obj-$(CONFIG_UCSI_PMIC_GLINK) += ucsi_glink.o +obj-$(CONFIG_CROS_EC_UCSI) += cros_ec_ucsi.o diff --git a/drivers/usb/typec/ucsi/cros_ec_ucsi.c b/drivers/usb/typec/ucsi/cros_ec_ucsi.c new file mode 100644 index 000000000000..dd46b46d430f --- /dev/null +++ b/drivers/usb/typec/ucsi/cros_ec_ucsi.c @@ -0,0 +1,245 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * UCSI driver for ChromeOS EC + * + * Copyright 2024 Google LLC. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "ucsi.h" + +#define DRV_NAME "cros-ec-ucsi" + +#define MAX_EC_DATA_SIZE 256 +#define WRITE_TMO_MS 500 + +struct cros_ucsi_data { + struct device *dev; + struct ucsi *ucsi; + + struct cros_ec_device *ec; + struct notifier_block nb; + struct work_struct work; + + struct completion complete; + unsigned long flags; +}; + +static int cros_ucsi_read(struct ucsi *ucsi, unsigned int offset, void *val, + size_t val_len) +{ + struct cros_ucsi_data *udata = ucsi_get_drvdata(ucsi); + struct ec_params_ucsi_ppm_get req = { + .offset = offset, + .size = val_len, + }; + int ret; + + if (val_len > MAX_EC_DATA_SIZE) { + dev_err(udata->dev, "Can't read %zu bytes. Too big.", val_len); + return -EINVAL; + } + + ret = cros_ec_cmd(udata->ec, 0, EC_CMD_UCSI_PPM_GET, + &req, sizeof(req), val, val_len); + if (ret < 0) { + dev_warn(udata->dev, "Failed to send EC message UCSI_PPM_GET: error=%d", ret); + return ret; + } + return 0; +} + +static int cros_ucsi_async_write(struct ucsi *ucsi, unsigned int offset, + const void *val, size_t val_len) +{ + struct cros_ucsi_data *udata = ucsi_get_drvdata(ucsi); + uint8_t ec_buffer[MAX_EC_DATA_SIZE + sizeof(struct ec_params_ucsi_ppm_set)]; + struct ec_params_ucsi_ppm_set *req = (struct ec_params_ucsi_ppm_set *)ec_buffer; + int ret = 0; + + if (val_len > MAX_EC_DATA_SIZE) { + dev_err(udata->dev, "Can't write %zu bytes. Too big.", val_len); + return -EINVAL; + } + + memset(req, 0, sizeof(ec_buffer)); + req->offset = offset; + memcpy(req->data, val, val_len); + ret = cros_ec_cmd(udata->ec, 0, EC_CMD_UCSI_PPM_SET, + req, sizeof(struct ec_params_ucsi_ppm_set) + val_len, NULL, 0); + + if (ret < 0) { + dev_warn(udata->dev, "Failed to send EC message UCSI_PPM_SET: error=%d", ret); + return ret; + } + return 0; +} + +static int cros_ucsi_sync_write(struct ucsi *ucsi, unsigned int offset, + const void *val, size_t val_len) +{ + struct cros_ucsi_data *udata = ucsi_get_drvdata(ucsi); + bool ack = UCSI_COMMAND(*(u64 *)val) == UCSI_ACK_CC_CI; + int ret; + + if (ack) + set_bit(ACK_PENDING, &udata->flags); + else + set_bit(COMMAND_PENDING, &udata->flags); + + ret = cros_ucsi_async_write(ucsi, offset, val, val_len); + if (ret) + goto out; + + if (!wait_for_completion_timeout(&udata->complete, WRITE_TMO_MS)) + ret = -ETIMEDOUT; + +out: + if (ack) + clear_bit(ACK_PENDING, &udata->flags); + else + clear_bit(COMMAND_PENDING, &udata->flags); + return ret; +} + +struct ucsi_operations cros_ucsi_ops = { + .read = cros_ucsi_read, + .async_write = cros_ucsi_async_write, + .sync_write = cros_ucsi_sync_write, +}; + +static void cros_ucsi_work(struct work_struct *work) +{ + struct cros_ucsi_data *udata = container_of(work, struct cros_ucsi_data, work); + u32 cci; + int ret; + + ret = cros_ucsi_read(udata->ucsi, UCSI_CCI, &cci, sizeof(cci)); + if (ret) + return; + + if (UCSI_CCI_CONNECTOR(cci)) + ucsi_connector_change(udata->ucsi, UCSI_CCI_CONNECTOR(cci)); + + if (cci & UCSI_CCI_ACK_COMPLETE && test_bit(ACK_PENDING, &udata->flags)) + complete(&udata->complete); + if (cci & UCSI_CCI_COMMAND_COMPLETE && + test_bit(COMMAND_PENDING, &udata->flags)) + complete(&udata->complete); +} + +static int cros_ucsi_event(struct notifier_block *nb, + unsigned long host_event, void *_notify) +{ + struct cros_ucsi_data *udata = container_of(nb, struct cros_ucsi_data, nb); + + if (!(host_event & PD_EVENT_PPM)) + return NOTIFY_OK; + + dev_dbg(udata->dev, "UCSI notification received"); + flush_work(&udata->work); + schedule_work(&udata->work); + + return NOTIFY_OK; +} + +static int cros_ucsi_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct cros_ec_dev *ec_data = dev_get_drvdata(dev->parent); + struct cros_ucsi_data *udata; + int ret; + + udata = devm_kzalloc(dev, sizeof(*udata), GFP_KERNEL); + if (!udata) + return -ENOMEM; + + udata->dev = dev; + + udata->ec = ec_data->ec_dev; + if (!udata->ec) { + dev_err(dev, "couldn't find parent EC device\n"); + return -ENODEV; + } + + platform_set_drvdata(pdev, udata); + + INIT_WORK(&udata->work, cros_ucsi_work); + init_completion(&udata->complete); + + udata->ucsi = ucsi_create(udata->dev, &cros_ucsi_ops); + if (IS_ERR(udata->ucsi)) { + dev_err(dev, "failed to allocate UCSI instance\n"); + return PTR_ERR(udata->ucsi); + } + + ucsi_set_drvdata(udata->ucsi, udata); + + ret = ucsi_register(udata->ucsi); + if (ret) { + ucsi_destroy(udata->ucsi); + return ret; + } + + udata->nb.notifier_call = cros_ucsi_event; + return cros_usbpd_register_notify(&udata->nb); +} + +static int cros_ucsi_remove(struct platform_device *dev) +{ + struct cros_ucsi_data *udata = platform_get_drvdata(dev); + + ucsi_unregister(udata->ucsi); + ucsi_destroy(udata->ucsi); + return 0; +} + +static int __maybe_unused cros_ucsi_suspend(struct device *dev) +{ + struct cros_ucsi_data *udata = dev_get_drvdata(dev); + + cancel_work_sync(&udata->work); + + return 0; +} + +static int __maybe_unused cros_ucsi_resume(struct device *dev) +{ + struct cros_ucsi_data *udata = dev_get_drvdata(dev); + + return ucsi_resume(udata->ucsi); +} + +static SIMPLE_DEV_PM_OPS(cros_ucsi_pm_ops, cros_ucsi_suspend, + cros_ucsi_resume); + +static const struct platform_device_id cros_ec_ucsi_id[] = { + { "cros-ec-ucsi"}, + {} +}; +MODULE_DEVICE_TABLE(platform, cros_ec_ucsi_id); + +static struct platform_driver cros_ucsi_driver = { + .driver = { + .name = DRV_NAME, + .pm = &cros_ucsi_pm_ops, + }, + .id_table = cros_ec_ucsi_id, + .probe = cros_ucsi_probe, + .remove = cros_ucsi_remove, +}; + +module_platform_driver(cros_ucsi_driver); + +MODULE_LICENSE("GPL"); +MODULE_DESCRIPTION("UCSI driver for ChromeOS EC");