From patchwork Thu Apr 11 22:52:51 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Judith Mendez X-Patchwork-Id: 13626603 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D23AAC4345F for ; Thu, 11 Apr 2024 22:53:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=ffmw/BcZdM7/i/o4sH/qQ3KIbnZ2vdM97GphoMCUB7U=; b=Xtrd9M2Le027Zp wI29vfKZNTQu7tNXbGn/tmSS5f6wPaa9LNQSkcq8ortsz1+ao91s9LC3vablL3KyCzRghKbIKN7/n Z86Kdi25eQ8xf+ntIIKxwWJt0OJL39eSRt/NBmmJ6tdGbjVf6+te5uc5d5FdoEj/J7R9UnFe8gNhN 2rC0L7at6kzzUb2JU+dxKkwBq+D0adC0DJ1UDcws+JWxvXMk9xHCHoSW8ItVbFyc9fNZ3a6V1eYSc gRSM4uW4LG9h30dCgodkk2fL4tlTTNLHZoHxI/QKgm2wO657LJ4LVkozIhGTK2X4YLrY9O+/33qA8 1PAtWgwa6OEDAvDrohOA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rv3IF-0000000ENmq-28Bj; Thu, 11 Apr 2024 22:53:19 +0000 Received: from fllv0016.ext.ti.com ([198.47.19.142]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rv3I5-0000000ENgd-1DiQ for linux-arm-kernel@lists.infradead.org; Thu, 11 Apr 2024 22:53:12 +0000 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 43BMqvCJ033916; Thu, 11 Apr 2024 17:52:57 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1712875978; bh=izg+oGQCuUwOQiPJW6J8T+O9QAeRgI3fYhFwd8fM1Pc=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=VGP6d1eA94Cfxc1xdiVJgOZ7h5NL+n3Q0EnvCMjDZyixWBRZB5jkhJiDVmfH4SkSs SnnH6Kh5yd7jwpm89wjk7Utu+Nkb9cd14VpDAnghL/APxl2LJDfbVeVH+4Z1zmg0BL J3L0OkPqc2qvRPa4FRYj4LKh8vYK78w3k5pJjuuk= Received: from DLEE109.ent.ti.com (dlee109.ent.ti.com [157.170.170.41]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 43BMqv7R083766 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 11 Apr 2024 17:52:57 -0500 Received: from DLEE102.ent.ti.com (157.170.170.32) by DLEE109.ent.ti.com (157.170.170.41) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Thu, 11 Apr 2024 17:52:57 -0500 Received: from lelvsmtp6.itg.ti.com (10.180.75.249) by DLEE102.ent.ti.com (157.170.170.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Thu, 11 Apr 2024 17:52:57 -0500 Received: from judy-hp.dhcp.ti.com (judy-hp.dhcp.ti.com [128.247.81.105]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 43BMqv7X002381; Thu, 11 Apr 2024 17:52:57 -0500 From: Judith Mendez To: Rob Herring , Krzysztof Kozlowski CC: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Conor Dooley , , , , Bhavya Kapoor , Dasnavis Sabiya , Udit Kumar Subject: [PATCH 1/7] arm64: dts: ti: k3-am65-main: Update sdhci properties Date: Thu, 11 Apr 2024 17:52:51 -0500 Message-ID: <20240411225257.383889-2-jm@ti.com> X-Mailer: git-send-email 2.43.2 In-Reply-To: <20240411225257.383889-1-jm@ti.com> References: <20240411225257.383889-1-jm@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240411_155309_502618_5AA02DE1 X-CRM114-Status: GOOD ( 10.32 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Update otap-del-sel properties as per datasheet [0]. Add missing clkbuf-sel and itap-del-sel values also as per datasheet [0]. Move clkbuf-sel and ti,trm-icp above the otap-del-sel properties so the sdhci nodes could be more uniform across platforms. [0] https://www.ti.com/lit/ds/symlink/am6548.pdf Fixes: eac99d38f861 ("arm64: dts: ti: k3-am654-main: Update otap-del-sel values") Fixes: d7600d070fb0 ("arm64: dts: ti: k3-am65-main: Add support for sdhci1") Signed-off-by: Judith Mendez --- arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 17 +++++++++++------ 1 file changed, 11 insertions(+), 6 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi index 670557c89f756..0803a8b9bfe84 100644 --- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi @@ -435,6 +435,8 @@ sdhci0: mmc@4f80000 { interrupts = ; mmc-ddr-1_8v; mmc-hs200-1_8v; + ti,clkbuf-sel = <0x7>; + ti,trm-icp = <0x8>; ti,otap-del-sel-legacy = <0x0>; ti,otap-del-sel-mmc-hs = <0x0>; ti,otap-del-sel-sd-hs = <0x0>; @@ -445,8 +447,7 @@ sdhci0: mmc@4f80000 { ti,otap-del-sel-ddr50 = <0x5>; ti,otap-del-sel-ddr52 = <0x5>; ti,otap-del-sel-hs200 = <0x5>; - ti,otap-del-sel-hs400 = <0x0>; - ti,trm-icp = <0x8>; + ti,itap-del-sel-ddr52 = <0x0>; dma-coherent; status = "disabled"; }; @@ -458,18 +459,22 @@ sdhci1: mmc@4fa0000 { clocks = <&k3_clks 48 0>, <&k3_clks 48 1>; clock-names = "clk_ahb", "clk_xin"; interrupts = ; + ti,clkbuf-sel = <0x7>; + ti,trm-icp = <0x8>; ti,otap-del-sel-legacy = <0x0>; ti,otap-del-sel-mmc-hs = <0x0>; ti,otap-del-sel-sd-hs = <0x0>; - ti,otap-del-sel-sdr12 = <0x0>; - ti,otap-del-sel-sdr25 = <0x0>; + ti,otap-del-sel-sdr12 = <0xf>; + ti,otap-del-sel-sdr25 = <0xf>; ti,otap-del-sel-sdr50 = <0x8>; ti,otap-del-sel-sdr104 = <0x7>; ti,otap-del-sel-ddr50 = <0x4>; ti,otap-del-sel-ddr52 = <0x4>; ti,otap-del-sel-hs200 = <0x7>; - ti,clkbuf-sel = <0x7>; - ti,trm-icp = <0x8>; + ti,itap-del-sel-legacy = <0xa>; + ti,itap-del-sel-sd-hs = <0x1>; + ti,itap-del-sel-sdr12 = <0xa>; + ti,itap-del-sel-sdr25 = <0x1>; dma-coherent; status = "disabled"; }; From patchwork Thu Apr 11 22:52:52 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Judith Mendez X-Patchwork-Id: 13626601 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6B40BC4345F for ; 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Thu, 11 Apr 2024 17:52:57 -0500 Received: from lelvsmtp6.itg.ti.com (10.180.75.249) by DLEE115.ent.ti.com (157.170.170.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Thu, 11 Apr 2024 17:52:57 -0500 Received: from judy-hp.dhcp.ti.com (judy-hp.dhcp.ti.com [128.247.81.105]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 43BMqv7Y002381; Thu, 11 Apr 2024 17:52:57 -0500 From: Judith Mendez To: Rob Herring , Krzysztof Kozlowski CC: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Conor Dooley , , , , Bhavya Kapoor , Dasnavis Sabiya , Udit Kumar Subject: [PATCH 2/7] arm64: dts: ti: k3-am65-main: Remove unused properties in sdhci nodes Date: Thu, 11 Apr 2024 17:52:52 -0500 Message-ID: <20240411225257.383889-3-jm@ti.com> X-Mailer: git-send-email 2.43.2 In-Reply-To: <20240411225257.383889-1-jm@ti.com> References: <20240411225257.383889-1-jm@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240411_155309_105918_345A0EF5 X-CRM114-Status: UNSURE ( 8.29 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On AM65x platform, sdhci0 is for eMMC and sdhci1 is for SD. Remove the properties that are not applicable for each device. Fixes: eac99d38f861 ("arm64: dts: ti: k3-am654-main: Update otap-del-sel values") Fixes: d7600d070fb0 ("arm64: dts: ti: k3-am65-main: Add support for sdhci1") Signed-off-by: Judith Mendez --- arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 9 --------- 1 file changed, 9 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi index 0803a8b9bfe84..127f581a56bc6 100644 --- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi @@ -439,12 +439,6 @@ sdhci0: mmc@4f80000 { ti,trm-icp = <0x8>; ti,otap-del-sel-legacy = <0x0>; ti,otap-del-sel-mmc-hs = <0x0>; - ti,otap-del-sel-sd-hs = <0x0>; - ti,otap-del-sel-sdr12 = <0x0>; - ti,otap-del-sel-sdr25 = <0x0>; - ti,otap-del-sel-sdr50 = <0x8>; - ti,otap-del-sel-sdr104 = <0x7>; - ti,otap-del-sel-ddr50 = <0x5>; ti,otap-del-sel-ddr52 = <0x5>; ti,otap-del-sel-hs200 = <0x5>; ti,itap-del-sel-ddr52 = <0x0>; @@ -462,15 +456,12 @@ sdhci1: mmc@4fa0000 { ti,clkbuf-sel = <0x7>; ti,trm-icp = <0x8>; ti,otap-del-sel-legacy = <0x0>; - ti,otap-del-sel-mmc-hs = <0x0>; ti,otap-del-sel-sd-hs = <0x0>; ti,otap-del-sel-sdr12 = <0xf>; ti,otap-del-sel-sdr25 = <0xf>; ti,otap-del-sel-sdr50 = <0x8>; ti,otap-del-sel-sdr104 = <0x7>; ti,otap-del-sel-ddr50 = <0x4>; - ti,otap-del-sel-ddr52 = <0x4>; - ti,otap-del-sel-hs200 = <0x7>; ti,itap-del-sel-legacy = <0xa>; ti,itap-del-sel-sd-hs = <0x1>; ti,itap-del-sel-sdr12 = <0xa>; From patchwork Thu Apr 11 22:52:53 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Judith Mendez X-Patchwork-Id: 13626598 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 91D4BC001CC for ; Thu, 11 Apr 2024 22:53:26 +0000 (UTC) DKIM-Signature: v=1; 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Thu, 11 Apr 2024 17:52:57 -0500 Received: from judy-hp.dhcp.ti.com (judy-hp.dhcp.ti.com [128.247.81.105]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 43BMqv7Z002381; Thu, 11 Apr 2024 17:52:57 -0500 From: Judith Mendez To: Rob Herring , Krzysztof Kozlowski CC: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Conor Dooley , , , , Bhavya Kapoor , Dasnavis Sabiya , Udit Kumar Subject: [PATCH 3/7] arm64: dts: ti: k3-am62a: Enable UHS mode support for SD cards Date: Thu, 11 Apr 2024 17:52:53 -0500 Message-ID: <20240411225257.383889-4-jm@ti.com> X-Mailer: git-send-email 2.43.2 In-Reply-To: <20240411225257.383889-1-jm@ti.com> References: <20240411225257.383889-1-jm@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240411_155304_367259_E608D72B X-CRM114-Status: GOOD ( 11.91 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Vignesh Raghavendra Hook up required IO voltage regulators and drop no-1-8-v to support UHS modes on SD cards. Fixes: 5fc6b1b62639 ("arm64: dts: ti: Introduce AM62A7 family of SoCs") Signed-off-by: Vignesh Raghavendra [Judith: Remove no-1-8-v for sdhci2, keep otap-del-sel-legacy=0, add fixes tag, reword commit] Signed-off-by: Judith Mendez --- arch/arm64/boot/dts/ti/k3-am62a-main.dtsi | 2 -- arch/arm64/boot/dts/ti/k3-am62a7-sk.dts | 21 +++++++++++++++++++++ 2 files changed, 21 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi index aa1e057082f08..6652701d3e3b8 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi @@ -573,7 +573,6 @@ sdhci1: mmc@fa00000 { ti,itap-del-sel-sd-hs = <0x0>; ti,itap-del-sel-sdr12 = <0x0>; ti,itap-del-sel-sdr25 = <0x0>; - no-1-8-v; status = "disabled"; }; @@ -597,7 +596,6 @@ sdhci2: mmc@fa20000 { ti,itap-del-sel-sd-hs = <0x0>; ti,itap-del-sel-sdr12 = <0x0>; ti,itap-del-sel-sdr25 = <0x0>; - no-1-8-v; status = "disabled"; }; diff --git a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts index f241637a5642a..1af5d01c7b94c 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts @@ -113,6 +113,20 @@ vcc_3v3_sys: regulator-4 { regulator-boot-on; }; + vddshv_sdio: regulator-5 { + compatible = "regulator-gpio"; + regulator-name = "vddshv_sdio"; + pinctrl-names = "default"; + pinctrl-0 = <&vddshv_sdio_pins_default>; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + vin-supply = <&ldo1>; + gpios = <&main_gpio0 31 GPIO_ACTIVE_HIGH>; + states = <1800000 0x0>, + <3300000 0x1>; + }; + leds { compatible = "gpio-leds"; pinctrl-names = "default"; @@ -342,6 +356,12 @@ main_gpio1_ioexp_intr_pins_default: main-gpio1-ioexp-intr-default-pins { AM62AX_IOPAD(0x01d4, PIN_INPUT, 7) /* (C15) UART0_RTSn.GPIO1_23 */ >; }; + + vddshv_sdio_pins_default: vddshv-sdio-pins-default { + pinctrl-single,pins = < + AM62AX_IOPAD(0x07c, PIN_OUTPUT, 7) /* (M19) GPMC0_CLK.GPIO0_31 */ + >; + }; }; &mcu_pmx0 { @@ -580,6 +600,7 @@ &sdhci1 { /* SD/MMC */ status = "okay"; vmmc-supply = <&vdd_mmc1>; + vqmmc-supply = <&vddshv_sdio>; pinctrl-names = "default"; pinctrl-0 = <&main_mmc1_pins_default>; disable-wp; From patchwork Thu Apr 11 22:52:54 2024 Content-Type: text/plain; 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Thu, 11 Apr 2024 17:52:57 -0500 From: Judith Mendez To: Rob Herring , Krzysztof Kozlowski CC: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Conor Dooley , , , , Bhavya Kapoor , Dasnavis Sabiya , Udit Kumar Subject: [PATCH 4/7] arm64: dts: ti: k3-j721s2-main: Enable support for SDR104 speed mode Date: Thu, 11 Apr 2024 17:52:54 -0500 Message-ID: <20240411225257.383889-5-jm@ti.com> X-Mailer: git-send-email 2.43.2 In-Reply-To: <20240411225257.383889-1-jm@ti.com> References: <20240411225257.383889-1-jm@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240411_155309_477239_2A0E9A12 X-CRM114-Status: GOOD ( 11.08 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Bhavya Kapoor According to TRM for J721S2, SDR104 speed mode is supported by the SoC but its capabilities were masked in device tree. Remove sdhci-caps-mask to enable support for SDR104 speed mode for SD card in J721S2 SoC. [+] Refer to : section 12.3.6.1.1 MMCSD Features, in J721S2 TRM - https://www.ti.com/lit/zip/spruj28 Fixes: b8545f9d3a54 ("arm64: dts: ti: Add initial support for J721S2 SoC") Signed-off-by: Bhavya Kapoor Signed-off-by: Vignesh Raghavendra --- arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 2 -- 1 file changed, 2 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi index 3cb06a7e4117f..9ed6949b40e9d 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi @@ -768,8 +768,6 @@ main_sdhci1: mmc@4fb0000 { ti,clkbuf-sel = <0x7>; ti,trm-icp = <0x8>; dma-coherent; - /* Masking support for SDR104 capability */ - sdhci-caps-mask = <0x00000003 0x00000000>; status = "disabled"; }; From patchwork Thu Apr 11 22:52:55 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Judith Mendez X-Patchwork-Id: 13626600 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7F1A0C04FF8 for ; Thu, 11 Apr 2024 22:53:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=4oM9cNKuKprbZl0n+1Z412GQ7PSz984GGdxhjxoGUcc=; b=b680rzODWMcPvX 8Z5YFJGJp9B6xuBFa0pjs9Cp0cRY45nYWJfnklBLNL3YY2yIehWGw019+IfEXnB/qQ3GRG2Knb42x vhjnvMsVkfXAJzMdTNY15hbl9SrIGxPH70gNK5iI1gnRXgHjTm74FTkZKlW3OCqZ4FAzk77mjqwCc h5yk+OZIw/hpNUFVMiOeQI8lK7ruJRCuLvuS2aq8hzr/YAIFJNLh3cspkF0MQia/Rs8tTkKhI/HVP 7mgBEqJkUyFso6OlKdzKh9WDQDrYP1WgdTtTgn3uJmlWrRoQKFt/C34856Konep64kksvitldc8u+ 8Cuu4h4d1l6WIX3Ln+mQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rv3IB-0000000ENju-3ME4; Thu, 11 Apr 2024 22:53:15 +0000 Received: from lelv0142.ext.ti.com ([198.47.23.249]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rv3I0-0000000ENea-0VQi for linux-arm-kernel@lists.infradead.org; Thu, 11 Apr 2024 22:53:06 +0000 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 43BMqwXU106819; Thu, 11 Apr 2024 17:52:58 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1712875978; bh=u6vHxsop2dc7G8tz56tmeLvsOTidrw9pFmeRN0x2ua4=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=IHMcDpS3fW3buueDLD6uV71ScK6RovtUKYr7IKodb/pg6O+GZDnK0uUzwdLLFa7cR 6FahIO5WaLUnGl4RYLTHx9QutJXW4Xba40/6Lh20kdZ6aCLWnzhTM7xVK6W+p0ur7Q mpq4kgjT/Rd4TdZ36hpp1+Uoc8FaT7Oz5owPEpUw= Received: from DLEE106.ent.ti.com (dlee106.ent.ti.com [157.170.170.36]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 43BMqwL2083771 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 11 Apr 2024 17:52:58 -0500 Received: from DLEE112.ent.ti.com (157.170.170.23) by DLEE106.ent.ti.com (157.170.170.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Thu, 11 Apr 2024 17:52:57 -0500 Received: from lelvsmtp6.itg.ti.com (10.180.75.249) by DLEE112.ent.ti.com (157.170.170.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Thu, 11 Apr 2024 17:52:57 -0500 Received: from judy-hp.dhcp.ti.com (judy-hp.dhcp.ti.com [128.247.81.105]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 43BMqv7b002381; Thu, 11 Apr 2024 17:52:57 -0500 From: Judith Mendez To: Rob Herring , Krzysztof Kozlowski CC: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Conor Dooley , , , , Bhavya Kapoor , Dasnavis Sabiya , Udit Kumar Subject: [PATCH 5/7] arm64: dts: ti: k3-j784s4-main: Enable support for UHS mode Date: Thu, 11 Apr 2024 17:52:55 -0500 Message-ID: <20240411225257.383889-6-jm@ti.com> X-Mailer: git-send-email 2.43.2 In-Reply-To: <20240411225257.383889-1-jm@ti.com> References: <20240411225257.383889-1-jm@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240411_155304_365446_6017BC21 X-CRM114-Status: UNSURE ( 9.09 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Dasnavis Sabiya Remove sdhci-caps-mask to enable support for SDR104 speed mode for SD card and remove no-1-8-v property so that SD card can work in any UHS-1 high speed mode it can support. Fixes: 4664ebd8346a ("arm64: dts: ti: Add initial support for J784S4 SoC") Signed-off-by: Bhavya Kapoor Signed-off-by: Dasnavis Sabiya Signed-off-by: Vignesh Raghavendra [Judith: Add fixes tag] Signed-off-by: Judith Mendez --- arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 2 -- 1 file changed, 2 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi index d42f25cacf23d..6a4554c6c9c13 100644 --- a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi @@ -904,8 +904,6 @@ main_sdhci1: mmc@4fb0000 { ti,clkbuf-sel = <0x7>; ti,trm-icp = <0x8>; dma-coherent; - sdhci-caps-mask = <0x00000003 0x00000000>; - no-1-8-v; status = "disabled"; }; From patchwork Thu Apr 11 22:52:56 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Judith Mendez X-Patchwork-Id: 13626597 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6C93BC4345F for ; Thu, 11 Apr 2024 22:53:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=qAMYPS8MEHLxA0a5ZqOXeXZVWkRA7oNC1cUosLNZ6Yc=; b=E2OeU+gBCjoncz fbsJ0m3LtxVKDMLLg4S78Bc9Rp6APJRF+zw/dsAjgr0TFI2fQdEWpJOvxqtiDfkSURP6pPnj6wMQf 0TodPga7o6XCm6ePn/RmXRXn5WGsr56W/lgd2B4qCbveKF/bBAlpiLoGq2bg2vbNSUSuhSg6NkXuC KLqXXBAb2Un2UAUKRe+XWu/BAOXG8jhNkD0gvsLpNOZGwZc8Bia6RHDwejLcj/nCXX6GPnV68PXXP guhi4eZ+9p6AfDyqGHM2D8NoYEWF7Id72Zr/LKE/gHozl+3dO2bwR87sM/0UXh20cEOZ6XHQNhYrP JedvhiGthptcjkxchP5w==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rv3I3-0000000ENgH-1CGO; Thu, 11 Apr 2024 22:53:07 +0000 Received: from lelv0142.ext.ti.com ([198.47.23.249]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rv3I0-0000000ENeY-0Tna for linux-arm-kernel@lists.infradead.org; Thu, 11 Apr 2024 22:53:05 +0000 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 43BMqwO2106827; Thu, 11 Apr 2024 17:52:58 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1712875978; bh=U5vGaNlkeZBsjgOImgjsk8+GhPmZ/Wnc8cLNrjW4OwY=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=u1a3iG+8WMQFLsaUGuF+sny4IT0HYhrWg9PG5zA+jlCxtVThU/KJ0VsVKIoe/Er6o 9lNbmJoNV4coTm6dvDBN1RgPdpPFZhbCfs2xvuhC2f/A8dHdTi9gA05y1/FecJTI98 aNcOIA0w/+R39RC/ScyRJ+zB32per4pVYs026brg= Received: from DLEE108.ent.ti.com (dlee108.ent.ti.com [157.170.170.38]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 43BMqwZo083776 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 11 Apr 2024 17:52:58 -0500 Received: from DLEE105.ent.ti.com (157.170.170.35) by DLEE108.ent.ti.com (157.170.170.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Thu, 11 Apr 2024 17:52:57 -0500 Received: from lelvsmtp6.itg.ti.com (10.180.75.249) by DLEE105.ent.ti.com (157.170.170.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Thu, 11 Apr 2024 17:52:57 -0500 Received: from judy-hp.dhcp.ti.com (judy-hp.dhcp.ti.com [128.247.81.105]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 43BMqv7c002381; Thu, 11 Apr 2024 17:52:57 -0500 From: Judith Mendez To: Rob Herring , Krzysztof Kozlowski CC: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Conor Dooley , , , , Bhavya Kapoor , Dasnavis Sabiya , Udit Kumar Subject: [PATCH 6/7] arm64: dts: ti: k3-am69-sk: Remove HS400 mode support for eMMC Date: Thu, 11 Apr 2024 17:52:56 -0500 Message-ID: <20240411225257.383889-7-jm@ti.com> X-Mailer: git-send-email 2.43.2 In-Reply-To: <20240411225257.383889-1-jm@ti.com> References: <20240411225257.383889-1-jm@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240411_155304_359923_DAE40682 X-CRM114-Status: UNSURE ( 8.91 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Dasnavis Sabiya The eMMC fails to enumerate intermittently on HS400 mode. Also observing multiple CQE recovery warnings. Update the sdhci0 node to disable HS400 and set HS200 mode for eMMC node. Signed-off-by: Dasnavis Sabiya Signed-off-by: Vignesh Raghavendra --- arch/arm64/boot/dts/ti/k3-am69-sk.dts | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/ti/k3-am69-sk.dts b/arch/arm64/boot/dts/ti/k3-am69-sk.dts index 50de2a448a3a6..a677bb9200a35 100644 --- a/arch/arm64/boot/dts/ti/k3-am69-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am69-sk.dts @@ -906,6 +906,7 @@ &main_sdhci0 { non-removable; ti,driver-strength-ohm = <50>; disable-wp; + no-mmc-hs400; }; &main_sdhci1 { From patchwork Thu Apr 11 22:52:57 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Judith Mendez X-Patchwork-Id: 13626596 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D264BC4345F for ; Thu, 11 Apr 2024 22:53:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=PRuxk0It2dVS3WWWnikwV0yen3TE2wlqtmstRIiFRy8=; b=c2Ia2/7zbTxg50 91ha6dE3cs+Qz6xCTrpBs+vsfW2g0VOCeQ9RND2y5HP8Cd9k26eq6XQn8KNgvKGNE84SxMLfv/VZ9 CUqUFxQ7DoXI21ZuzgVv799L5dudhgC5QvMXHgZEO/1Du6p6DnAjsSRrVlVLuVs/xvAudVrDaLlzZ IThIzIqqJCq/QpH0hP+YtBUdYjJDq5OwzBESJOZ7W83mAXFst9YePVW7lgidHMyOpTQ/yNtKSXgrb 5AU+Y8J3yY4O1Fq+ZCIU8c3MmLtzq1wck8+A92tyX1Tv7a84CdJgkwOgLfnrM+ZeCJV8vQAeEgSy3 uO4k18YxrY9chTJGGLHQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rv3I3-0000000ENgV-3aMs; Thu, 11 Apr 2024 22:53:07 +0000 Received: from lelv0142.ext.ti.com ([198.47.23.249]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rv3I0-0000000ENee-0UyA for linux-arm-kernel@lists.infradead.org; Thu, 11 Apr 2024 22:53:05 +0000 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 43BMqwIe106823; Thu, 11 Apr 2024 17:52:58 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1712875978; bh=2LfTDKlFS9AeONkXkDfJQ8nmESoidJKOear7mi/CZWg=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=D0zKLJTsLgbiDY0k/nZoElt03uCqZTNTQPqUZ/QWRgiBEpbx/kV7KiOvjzXnbFZrE 91nUFIYd5fGuH53/DYBx6I56duAIrEHcoI5L/ysZSMywK0czdfiEygsBsfI1a/2Dzc mTM7lfnPjgVj06hdwG4Hnts/FuyqLoGw2RFBciDI= Received: from DFLE113.ent.ti.com (dfle113.ent.ti.com [10.64.6.34]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 43BMqwqX108003 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 11 Apr 2024 17:52:58 -0500 Received: from DFLE106.ent.ti.com (10.64.6.27) by DFLE113.ent.ti.com (10.64.6.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Thu, 11 Apr 2024 17:52:57 -0500 Received: from lelvsmtp6.itg.ti.com (10.180.75.249) by DFLE106.ent.ti.com (10.64.6.27) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Thu, 11 Apr 2024 17:52:57 -0500 Received: from judy-hp.dhcp.ti.com (judy-hp.dhcp.ti.com [128.247.81.105]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 43BMqv7d002381; Thu, 11 Apr 2024 17:52:57 -0500 From: Judith Mendez To: Rob Herring , Krzysztof Kozlowski CC: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Conor Dooley , , , , Bhavya Kapoor , Dasnavis Sabiya , Udit Kumar Subject: [PATCH 7/7] arm64: dts: ti: k3-j784s4-evm: Remove HS400 mode support for eMMC Date: Thu, 11 Apr 2024 17:52:57 -0500 Message-ID: <20240411225257.383889-8-jm@ti.com> X-Mailer: git-send-email 2.43.2 In-Reply-To: <20240411225257.383889-1-jm@ti.com> References: <20240411225257.383889-1-jm@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240411_155304_355864_B6E760B6 X-CRM114-Status: UNSURE ( 8.85 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Udit Kumar The eMMC fails to enumerate intermittently on HS400 mode. Also observing multiple CQE recovery warnings. Update the sdhci0 node to disable HS400. Cc: Vignesh Raghavendra Cc: Bhavya Kapoor Cc: Siddharth Vadapalli Signed-off-by: Udit Kumar Signed-off-by: Vignesh Raghavendra [Judith: Reword commit] Signed-off-by: Judith Mendez --- arch/arm64/boot/dts/ti/k3-j784s4-evm.dts | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts index 81fd7afac8c57..04a241a91e6b8 100644 --- a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts +++ b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts @@ -791,6 +791,7 @@ &main_sdhci0 { non-removable; ti,driver-strength-ohm = <50>; disable-wp; + no-mmc-hs400; }; &main_sdhci1 {