From patchwork Mon Apr 15 18:20:46 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Alex G." X-Patchwork-Id: 13630461 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 71ADFC4345F for ; Mon, 15 Apr 2024 18:21:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=0xPP4o7knwHrx/cp+IiiJ8990Jkf1+iWaTU+kw6JgPs=; b=1WiZYEQos5M8iI zOBUb8N+H63QayZVI2eH4ttnFNyHDNiNphIGsoXgk1cJ9Gad8ih4r/C6OImM4mUx+DPA402nX56OI cMAmTAtbqhH2yrBRO03+uFS6JA9iuiturvGX//V48L5ieTnmuaS/ERhhfbZI1kxWtbCwAnOs27fBc TlgylCGBf0S/poiMptN4xe9DHQOHrwYy9CR/3rmDh3wro++BOz+suZNSJWd9qSfC6zt3uVZlHlZl0 R8BFU1Jpcb0LItDftSMAhL39ik3ITxOWzIep0CVRN1M5Jqqsl+Kn8ncT3R/LNnxkrYQJ2gnREmZjq GsfrwWPOT52ht+mgoX/Q==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rwQxH-00000009Qjp-0UQc; Mon, 15 Apr 2024 18:21:23 +0000 Received: from mail-oo1-xc2a.google.com ([2607:f8b0:4864:20::c2a]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rwQxD-00000009QhS-2rdk for linux-phy@lists.infradead.org; Mon, 15 Apr 2024 18:21:20 +0000 Received: by mail-oo1-xc2a.google.com with SMTP id 006d021491bc7-5a7d6bc81c6so2656670eaf.2 for ; Mon, 15 Apr 2024 11:21:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1713205276; x=1713810076; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=eQII4bd5vU3iEBUOJRNxIf3Y2tkmIxs3qzEGZCMfEv8=; b=gm3eCedE+/hZ9hUGUp9jfLPbk9iavIE8i7LMkqrPDw5afowHsdP3PHyPY+ODHUSJ6Q tQXMgtrDt5kLLUPxgHkAiPTu7Jh+NjKdCjKWm8piMoeH1Pa8bslTcN+OuTJ6DcW2Bagz 9mMwxL6avvqQIvsjjnrI/QzjAX+NkPkUJZDOpiYztl/saGTptiqfNG/8Up3OO9EtZPkJ A6nNCKFtUG2QkMnc58E3D9Ew8KfxIAPhUBum1SDaQP8rHBdhGm2mNBEwPkHs1rT15BmU DGto1rJOQwKPOYW6mlLnuFYpiTIGOuHlTamoM4SP2Omfq7jesHP2frnKpofVCnpuC58a MIiw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1713205276; x=1713810076; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=eQII4bd5vU3iEBUOJRNxIf3Y2tkmIxs3qzEGZCMfEv8=; b=lj7W61Z8Mr/tfFwWtBxskBEjeO0Nzc4YxxOSSfmNQFM1fgUQfsyapUMiZaAkLug2i9 oKaB/8mQTnGENkduIiWsQ8kJPoepFe+Aiu8Nyn4/k4tgMxZ7aElCH9NYbjjTi6nL/cWX U5THDanLHSUYnhPKpU2CZDdXKUfB3BB7e9bzUPOgQKeOJ8Be1CrC2dmVwwxgueOC3xNX uLj/V11pMCV3/0KRwu6u99E1fUVchapWaOX0+SWD7PDpBYo8U0q/BHFsW4KtvsJD2nZ2 fWY27GzKTHD5QJP7DUjyhUyhwUeb8R7hi36dm6ACrHe420C3Icqlbmzq/T6ikXhGhTWR lHOg== X-Forwarded-Encrypted: i=1; AJvYcCVl+8yWuwXidDshXiXNcKvrho2a8AhmTR+wCHdVVsOi3scuA+J+oyCxPwoLDmAzqYjcJteyGKksbPCYYxOTfwUIQqfajzinL8IkMtaELg== X-Gm-Message-State: AOJu0Yworvv/k1KIMDXVKKP39HrGK7d5PrTpVxZzJMqYWDhk0FWgXNMn t6OhOzzlO0yE+4fU9OGlYOwMg3QFhC4Tj6QUrcmWTZVuCbUkxXCT X-Google-Smtp-Source: AGHT+IEeVcvxHNezT/W5g+Igrx1FREJxZQPkhRmeduAzr31PwaRKeMNBmncsMYxNomC3jAJlTvCPaw== X-Received: by 2002:a05:6820:2715:b0:5aa:3b8a:b491 with SMTP id db21-20020a056820271500b005aa3b8ab491mr9969886oob.4.1713205275860; Mon, 15 Apr 2024 11:21:15 -0700 (PDT) Received: from nukework.lan (c-98-197-58-203.hsd1.tx.comcast.net. [98.197.58.203]) by smtp.gmail.com with ESMTPSA id x4-20020a056820104400b005a4dc7abc01sm2177494oot.11.2024.04.15.11.21.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 15 Apr 2024 11:21:15 -0700 (PDT) From: Alexandru Gagniuc To: Bjorn Andersson , Konrad Dybcio , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Rob Herring , Bjorn Helgaas , Krzysztof Kozlowski , Conor Dooley , Vinod Koul , Kishon Vijay Abraham I , Michael Turquette , Stephen Boyd , Manivannan Sadhasivam , linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-clk@vger.kernel.org Cc: Alexandru Gagniuc , Krzysztof Kozlowski Subject: [PATCH v3 1/7] dt-bindings: clock: Add PCIe pipe related clocks for IPQ9574 Date: Mon, 15 Apr 2024 13:20:46 -0500 Message-Id: <20240415182052.374494-2-mr.nuke.me@gmail.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240415182052.374494-1-mr.nuke.me@gmail.com> References: <20240415182052.374494-1-mr.nuke.me@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240415_112119_743698_31E3A678 X-CRM114-Status: UNSURE ( 7.93 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-phy@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux Phy Mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org Add defines for the missing PCIe PIPE clocks. Signed-off-by: Alexandru Gagniuc Acked-by: Krzysztof Kozlowski --- include/dt-bindings/clock/qcom,ipq9574-gcc.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/include/dt-bindings/clock/qcom,ipq9574-gcc.h b/include/dt-bindings/clock/qcom,ipq9574-gcc.h index 08fd3a37acaa..52123c5a09fa 100644 --- a/include/dt-bindings/clock/qcom,ipq9574-gcc.h +++ b/include/dt-bindings/clock/qcom,ipq9574-gcc.h @@ -216,4 +216,8 @@ #define GCC_CRYPTO_AHB_CLK 207 #define GCC_USB0_PIPE_CLK 208 #define GCC_USB0_SLEEP_CLK 209 +#define GCC_PCIE0_PIPE_CLK 210 +#define GCC_PCIE1_PIPE_CLK 211 +#define GCC_PCIE2_PIPE_CLK 212 +#define GCC_PCIE3_PIPE_CLK 213 #endif From patchwork Mon Apr 15 18:20:47 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Alex G." X-Patchwork-Id: 13630462 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D6118C04FF9 for ; Mon, 15 Apr 2024 18:21:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=s9XIMy2j5pCXM/PtxSMgc6SYSMcUOXDZZJ1uo/i4tq4=; b=ruHUQWqOyJwOsx y47YzC3yHx8ZX61g9DGyMRNKBgVsfSiv0xO9j3hYWvb1EYRC4ttK8Hya/Ewxe7rFBH+9zSRQr1A5G 8n3FmhTIQ78v1mgJWTNUOySFuZQgMBn1Ljo79J6d4kYm8hbLGlxfYuaLYV89CWSFvLTJxBxsgnYKM Y53uVZ1J5YSxgpg5A0eLv4xqENzmUpkDwKAW3zwxsAy/6iNHvhDLJEsVUdKTj8QzVrx05AQo2w/0u QVKp9f57oPY0mkeKm8ry0Gr/AHCbj25b9IPHQmgY9akLGVq2q3v5sQSDtDxo+YqV/6r0N1BwQnp9A 2is+TZfZ2p4b7kGcn8Qw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rwQxH-00000009QkI-2D8P; Mon, 15 Apr 2024 18:21:23 +0000 Received: from mail-oo1-xc2f.google.com ([2607:f8b0:4864:20::c2f]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rwQxE-00000009Qi2-1q0Q for linux-phy@lists.infradead.org; Mon, 15 Apr 2024 18:21:21 +0000 Received: by mail-oo1-xc2f.google.com with SMTP id 006d021491bc7-5ac5376c4b2so2257131eaf.2 for ; Mon, 15 Apr 2024 11:21:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1713205277; x=1713810077; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=LlnM+eqCNJTkFhy3dKbpBAVjG1mhxcSQlqhRDb9T8g0=; b=bLh3PydEAXPQ9ZQLuFdxtIUWc/Wg9hn1Su4x6eXqm9T63BQR6gBX52ghEzBZVxZnKI SAN1kCLAKnnFNiyfDXxtgxjxebgdbPsvYFiPUNqy5DfpHTFEstIFjBXxlTVsQDe3btl0 QYAFu4OwjOcH9pKjiyymUI1MzM0B6cNg8PqGupTju79YvOxQymaGy1ifngkJDSMqFdKr kt9KkC2So+zIlxIXNoA82CZBhfpHP0bBe+xXWNXh3WMRRSgc3bni/KI/b+jTf/YT1YwS LlnG2rKFagekWnZzVzvSgEJ35lcCn5dUyagEhR0tWanplwoEpZpnFW5NAYg654KkeOWS AERQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1713205277; x=1713810077; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=LlnM+eqCNJTkFhy3dKbpBAVjG1mhxcSQlqhRDb9T8g0=; b=RvcXEsIUGSCcyC37GS1eU290EWV555T1tRkm7CSbJVeUVHo+YURuCN0MJbIsZbAUN4 1zHYll/NdmiPVzmV84GbbWI+6lIwxHaYEF08nu+Xiaexm2GGUxkTG0rBvylYfXiFIX1K vfyrqPGY06X+zcoX57G1EIpRGunVCGewM1niDfe64BrtRs9D/OUBundx+IQ5yfJM+g/l ENJd8Rf4q/rnqrXgBFMH5JgTA5t8aQZ2zMeBbpvKAfsZNbHcolRHyg8INbwQRA+ICKzn zhaXwI6760vEpSchmA+x4KouEvXy19Q6+/SLA0yjoqqvBW4UAPfvLKb4Ks2SURD2Wh1B Qe/g== X-Forwarded-Encrypted: i=1; AJvYcCXd8NVlK/7gjwKw/FQX0lkPPfZrcIoQsERK22h7BPUqxcm7CnxDX8yBWg6MAQk1/Rn88kbJsQkExzNtgkZHH7f7Qs+TgF2nqK9SoYelGA== X-Gm-Message-State: AOJu0Yzc7NJveBNOyXObAd+1mgCHcEQIviTb3yVHmRwpRX0VCdBBnK77 qvQBMTjMWMRnfjkOr0w/r2bvtCpQqEwyFZi2WUwTmjZ0N/zDNy8UOYNsf8iVkF4= X-Google-Smtp-Source: AGHT+IEKOi45/kwRCjBQMTcYd8g4P0Ch4xB6GVM4qKQkrGxwditd/JeXRmD6IhThyApBzZsEqVNptQ== X-Received: by 2002:a05:6820:250b:b0:5ac:5c78:390e with SMTP id cr11-20020a056820250b00b005ac5c78390emr9027335oob.2.1713205277462; Mon, 15 Apr 2024 11:21:17 -0700 (PDT) Received: from nukework.lan (c-98-197-58-203.hsd1.tx.comcast.net. [98.197.58.203]) by smtp.gmail.com with ESMTPSA id x4-20020a056820104400b005a4dc7abc01sm2177494oot.11.2024.04.15.11.21.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 15 Apr 2024 11:21:17 -0700 (PDT) From: Alexandru Gagniuc To: Bjorn Andersson , Konrad Dybcio , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Rob Herring , Bjorn Helgaas , Krzysztof Kozlowski , Conor Dooley , Vinod Koul , Kishon Vijay Abraham I , Michael Turquette , Stephen Boyd , Manivannan Sadhasivam , linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-clk@vger.kernel.org Cc: Alexandru Gagniuc Subject: [PATCH v3 2/7] clk: qcom: gcc-ipq9574: Add PCIe pipe clocks Date: Mon, 15 Apr 2024 13:20:47 -0500 Message-Id: <20240415182052.374494-3-mr.nuke.me@gmail.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240415182052.374494-1-mr.nuke.me@gmail.com> References: <20240415182052.374494-1-mr.nuke.me@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240415_112120_498573_267A3187 X-CRM114-Status: UNSURE ( 9.98 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-phy@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux Phy Mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org The IPQ9574 has four PCIe "pipe" clocks. These clocks are required by PCIe PHYs. Port the pipe clocks from the downstream 5.4 kernel. Signed-off-by: Alexandru Gagniuc Reviewed-by: Dmitry Baryshkov --- drivers/clk/qcom/gcc-ipq9574.c | 76 ++++++++++++++++++++++++++++++++++ 1 file changed, 76 insertions(+) diff --git a/drivers/clk/qcom/gcc-ipq9574.c b/drivers/clk/qcom/gcc-ipq9574.c index 0a3f846695b8..c748d2f124f3 100644 --- a/drivers/clk/qcom/gcc-ipq9574.c +++ b/drivers/clk/qcom/gcc-ipq9574.c @@ -1569,6 +1569,24 @@ static struct clk_regmap_phy_mux pcie0_pipe_clk_src = { }, }; +static struct clk_branch gcc_pcie0_pipe_clk = { + .halt_reg = 0x28044, + .halt_check = BRANCH_HALT_DELAY, + .clkr = { + .enable_reg = 0x28044, + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_pcie0_pipe_clk", + .parent_hws = (const struct clk_hw *[]) { + &pcie0_pipe_clk_src.clkr.hw + }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, + }, + }, +}; + static struct clk_regmap_phy_mux pcie1_pipe_clk_src = { .reg = 0x29064, .clkr = { @@ -1583,6 +1601,24 @@ static struct clk_regmap_phy_mux pcie1_pipe_clk_src = { }, }; +static struct clk_branch gcc_pcie1_pipe_clk = { + .halt_reg = 0x29044, + .halt_check = BRANCH_HALT_DELAY, + .clkr = { + .enable_reg = 0x29044, + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_pcie1_pipe_clk", + .parent_hws = (const struct clk_hw *[]) { + &pcie1_pipe_clk_src.clkr.hw + }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, + }, + }, +}; + static struct clk_regmap_phy_mux pcie2_pipe_clk_src = { .reg = 0x2a064, .clkr = { @@ -1597,6 +1633,24 @@ static struct clk_regmap_phy_mux pcie2_pipe_clk_src = { }, }; +static struct clk_branch gcc_pcie2_pipe_clk = { + .halt_reg = 0x2a044, + .halt_check = BRANCH_HALT_DELAY, + .clkr = { + .enable_reg = 0x2a044, + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data) { + .name = "gcc_pcie2_pipe_clk", + .parent_hws = (const struct clk_hw *[]) { + &pcie2_pipe_clk_src.clkr.hw + }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, + }, + }, +}; + static struct clk_regmap_phy_mux pcie3_pipe_clk_src = { .reg = 0x2b064, .clkr = { @@ -1611,6 +1665,24 @@ static struct clk_regmap_phy_mux pcie3_pipe_clk_src = { }, }; +static struct clk_branch gcc_pcie3_pipe_clk = { + .halt_reg = 0x2b044, + .halt_check = BRANCH_HALT_DELAY, + .clkr = { + .enable_reg = 0x2b044, + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data) { + .name = "gcc_pcie3_pipe_clk", + .parent_hws = (const struct clk_hw *[]) { + &pcie3_pipe_clk_src.clkr.hw + }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, + }, + }, +}; + static const struct freq_tbl ftbl_pcie_rchng_clk_src[] = { F(24000000, P_XO, 1, 0, 0), F(100000000, P_GPLL0, 8, 0, 0), @@ -4141,6 +4213,10 @@ static struct clk_regmap *gcc_ipq9574_clks[] = { [GCC_SNOC_PCIE1_1LANE_S_CLK] = &gcc_snoc_pcie1_1lane_s_clk.clkr, [GCC_SNOC_PCIE2_2LANE_S_CLK] = &gcc_snoc_pcie2_2lane_s_clk.clkr, [GCC_SNOC_PCIE3_2LANE_S_CLK] = &gcc_snoc_pcie3_2lane_s_clk.clkr, + [GCC_PCIE0_PIPE_CLK] = &gcc_pcie0_pipe_clk.clkr, + [GCC_PCIE1_PIPE_CLK] = &gcc_pcie1_pipe_clk.clkr, + [GCC_PCIE2_PIPE_CLK] = &gcc_pcie2_pipe_clk.clkr, + [GCC_PCIE3_PIPE_CLK] = &gcc_pcie3_pipe_clk.clkr, }; static const struct qcom_reset_map gcc_ipq9574_resets[] = { From patchwork Mon Apr 15 18:20:48 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Alex G." X-Patchwork-Id: 13630463 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4B0F4C00A94 for ; Mon, 15 Apr 2024 18:21:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=0S8MFoRuGo7eJSuOB1X/jOxYiNm2UutMB9i5IrUbCBQ=; b=yhzQnjfbrkuuGH PmkDkXSLVsizot9KbP//UHTmJCmWou24PriXT0bYwbwFZTkTCRhdAFjwAVTu66ATeiwUmap5zJ4pg Dlchtj1jJJp1kzZSNzW5K8VLU21fiw2GaChT1X5SHXSvnGYRewfaZaXiIkD3co2kTOqZ9EBcr8gxl JpgNcvqISkr3gPURxJEU2SU3Bsdnlt+kndpCe9DumAicwLuEqiy1zrLrFgr8cSD/AMqXlSkWz7Wxa IouYNglxNqnnnatDyItRDWZHaKse9JeIOhVb0sKTHAf9+YLq7uVFlHifvrieT4PUUeTsvqG6LNXwz rG8dKdUSWp1wIBr2H1sA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rwQxH-00000009Qkb-3XbP; Mon, 15 Apr 2024 18:21:23 +0000 Received: from mail-oo1-xc33.google.com ([2607:f8b0:4864:20::c33]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rwQxF-00000009QiO-1TEv for linux-phy@lists.infradead.org; Mon, 15 Apr 2024 18:21:22 +0000 Received: by mail-oo1-xc33.google.com with SMTP id 006d021491bc7-5aa400b917dso2299254eaf.0 for ; Mon, 15 Apr 2024 11:21:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1713205279; x=1713810079; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=VSUxhRAqtSpAkOo8bigYXpnuJtyRvKgYbnzdNf6wuKY=; b=FdJbBFZUAr6jpWNGwxyDk20mH7d12yzV145LaTWN+Icb3qgeloCYbZbVr6tiu6yhZW 9U7YcUM5SvXcfdiosZ/AUl2lzHylx53TJ6PksVft9DcVwNueLds75Rt2A0SOtu/mUGTQ Vj62SaiBilNAV91Q2EXAVvL3CT4oAqQUhrdKjQ8ZR/tHLZwZW0ZGrY+tr4mSfOTVVcEn fPpyuxSJWrFcJ14EJA78Fba7TQR9RdXBMGDVKWVijA81757oUFr5Jeko+bQwgqwoqpMe +nLWxHhUMaUbcr6yPlzn3kEfZdClkCW5IzhbLDqc63GP/C0tGq1a4BaUE9Hf7dYPljnq NfkQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1713205279; x=1713810079; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=VSUxhRAqtSpAkOo8bigYXpnuJtyRvKgYbnzdNf6wuKY=; b=ZVnyfhgmKClyfEKses7G5uhC6dDAR7mFHH0AXh7rSIbu9MH7iqHAjjb85yTYBz09d1 6u8V09GCfdug0bXM6lf+uRFLacZ+PJbSdMZ9aCxIO8sQZLPF3ZBsOQxTCPvWIKo0K6QZ 2Jnv4Xx4pnv81vv1EoRiCtqBZ3qfHsv8XExUZwQIIqeJl/1B4feLDFnOGX6KA6Zgazvp iu0S8+M0jxlieLqa0d1cJ+oMPmIEqvuqwBk+E4B5YM5yKA4scHIOZO0inV/FwqXi48l0 z9RoBS+R5ji/nlE+gHvON7oMWFjHE2u7ryV12kObRYPyaC+aRaU/TVvP57G6szbB+tJD pVVg== X-Forwarded-Encrypted: i=1; AJvYcCX7vA9mxyD/6anSjkjNNMoN7N5f/4jLbsYsn1cN/gdRBcHRlYrRj2aoiAjpw/QpWsXllpYSTnKpROhIu6w5xZbVi+I4fTCCpKf1HVV+Tw== X-Gm-Message-State: AOJu0Yw1sGKzpQ6rh3BYdWQVzm3se7oJIzml6i//DS88fJaIXFVm0kYz 09Pcks8vH6heZ8xXpRftKzV9StpV5LVboZe+s96pMt6OJcsNxuL+ X-Google-Smtp-Source: AGHT+IHWDOfDR262vpiTAuGOuGAJ+9982G4HI7/75giU8A9pOm9OGbS5vpH7wkRuMoZaxW+ulBWPpQ== X-Received: by 2002:a4a:b045:0:b0:5ac:9fec:c32e with SMTP id g5-20020a4ab045000000b005ac9fecc32emr4272840oon.8.1713205279255; Mon, 15 Apr 2024 11:21:19 -0700 (PDT) Received: from nukework.lan (c-98-197-58-203.hsd1.tx.comcast.net. [98.197.58.203]) by smtp.gmail.com with ESMTPSA id x4-20020a056820104400b005a4dc7abc01sm2177494oot.11.2024.04.15.11.21.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 15 Apr 2024 11:21:18 -0700 (PDT) From: Alexandru Gagniuc To: Bjorn Andersson , Konrad Dybcio , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Rob Herring , Bjorn Helgaas , Krzysztof Kozlowski , Conor Dooley , Vinod Koul , Kishon Vijay Abraham I , Michael Turquette , Stephen Boyd , Manivannan Sadhasivam , linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-clk@vger.kernel.org Cc: Alexandru Gagniuc Subject: [PATCH v3 3/7] dt-bindings: PCI: qcom: Add IPQ9574 PCIe controller Date: Mon, 15 Apr 2024 13:20:48 -0500 Message-Id: <20240415182052.374494-4-mr.nuke.me@gmail.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240415182052.374494-1-mr.nuke.me@gmail.com> References: <20240415182052.374494-1-mr.nuke.me@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240415_112121_413905_13D6EAD0 X-CRM114-Status: UNSURE ( 8.34 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-phy@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux Phy Mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org IPQ9574 has PCIe controllers which are almost identical to IPQ6018. The difference is that the "iface" clock is not required, and the "sleep" reset is replaced by an "aux" reset. Document these differences along with the compatible string. Signed-off-by: Alexandru Gagniuc Acked-by: Rob Herring (Arm) --- .../devicetree/bindings/pci/qcom,pcie.yaml | 35 +++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml index cf9a6910b542..2d9bbcc95c31 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml @@ -26,6 +26,7 @@ properties: - qcom,pcie-ipq8064-v2 - qcom,pcie-ipq8074 - qcom,pcie-ipq8074-gen3 + - qcom,pcie-ipq9574 - qcom,pcie-msm8996 - qcom,pcie-qcs404 - qcom,pcie-sdm845 @@ -161,6 +162,7 @@ allOf: enum: - qcom,pcie-ipq6018 - qcom,pcie-ipq8074-gen3 + - qcom,pcie-ipq9574 then: properties: reg: @@ -397,6 +399,37 @@ allOf: - const: axi_m_sticky # AXI Master Sticky reset - const: axi_s_sticky # AXI Slave Sticky reset + - if: + properties: + compatible: + contains: + enum: + - qcom,pcie-ipq9574 + then: + properties: + clocks: + minItems: 4 + maxItems: 4 + clock-names: + items: + - const: axi_m # AXI Master clock + - const: axi_s # AXI Slave clock + - const: axi_bridge # AXI bridge clock + - const: rchng + resets: + minItems: 8 + maxItems: 8 + reset-names: + items: + - const: pipe # PIPE reset + - const: aux # AUX reset + - const: sticky # Core Sticky reset + - const: axi_m # AXI Master reset + - const: axi_s # AXI Slave reset + - const: axi_s_sticky # AXI Slave Sticky reset + - const: axi_m_sticky # AXI Master Sticky reset + - const: ahb # AHB Reset + - if: properties: compatible: @@ -507,6 +540,7 @@ allOf: - qcom,pcie-ipq8064v2 - qcom,pcie-ipq8074 - qcom,pcie-ipq8074-gen3 + - qcom,pcie-ipq9574 - qcom,pcie-qcs404 then: required: @@ -566,6 +600,7 @@ allOf: - qcom,pcie-ipq8064-v2 - qcom,pcie-ipq8074 - qcom,pcie-ipq8074-gen3 + - qcom,pcie-ipq9574 - qcom,pcie-qcs404 then: properties: From patchwork Mon Apr 15 18:20:49 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Alex G." X-Patchwork-Id: 13630464 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B88F6C4345F for ; Mon, 15 Apr 2024 18:21:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=n3beAJQC16Hw16mR5j0/g/uLUw5psE7q0m/ddFFYgBo=; b=wT1Gpx6once+Lq Io0lLzavjwepB5MtrqZzV2D1ouqqGMCdloQo7Zb3htZjQWqay1HRT4Eh4oizS1POka2ocZmrqe+JF 87lDFeUdhtf+FZ3INPwL7dAYCMLFrMDMQp8+7oy0pzvP6nhiHpT6eZ+yV58w2TV1KAIcEAEECxNqT W7+TKopJlkLhGFcVqc9ntiSh4oUMFnjP9TiIH6QD4QfTDscseGEWhaOC6m+wnbdbQj2l8AJ1D5smG 5/emKqPFBZ9A2TpHY/dTg193AXXEnMWYs5CqZlWosPE+w8c9oj8U33/e+0+BCTZWuaLLnGJRUE0PN y7uLgkaXVHF2wYHod6yA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rwQxJ-00000009Qm4-1NT0; Mon, 15 Apr 2024 18:21:25 +0000 Received: from mail-oa1-x2c.google.com ([2001:4860:4864:20::2c]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rwQxH-00000009QjA-0HDL for linux-phy@lists.infradead.org; Mon, 15 Apr 2024 18:21:24 +0000 Received: by mail-oa1-x2c.google.com with SMTP id 586e51a60fabf-22edbb5dd40so1375384fac.1 for ; Mon, 15 Apr 2024 11:21:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1713205281; x=1713810081; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=u509fpdTL3x8h0sKnxRrMd2Q/Sm/IRVlvPpLmK46sCY=; b=G9v7oNzMdtEPchcfEmhyfD0kTLwJwlOqhJbn0ZEeTUW1nZtIyIgh+lzeVxnQlzeZzQ JCezDfVFqNmdJOGv/iknnSV5gJ3fYdZcwM9eHKRfinQSCBzxwyDQOoG5vVQU/WYm0Nej tC3Kh/WV04fm3N18jLIlDZWrCLMWktxxhMCmwdOUIgQRh2l/OeZKXby8IH+yR51eUH+b Mrd0oR9Ig0uTAdpJk9hGc6hqRWa/mZtCMu8CITNefz74KR9p/djwKY/yeVxXerNZ6NJy Q0JCxsrA72+XHRS4BuilWTKQhKk+7SrViOsyPPsFHRm/gqnLwDoapeG7c3PzwUEcnye+ NHUw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1713205281; x=1713810081; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=u509fpdTL3x8h0sKnxRrMd2Q/Sm/IRVlvPpLmK46sCY=; b=ZmQW7Up96PQBvbHaN/ZQsl0PL/S/r/iCHicmOslt2EP8nLRnHp6V7Fk76ljKJLiiyc mV3t9RkgxKtp51PYkkbnhf0/qnxUl0EHKsNGBd4ILacB2DX7PO2dtRO1nMVbjuGDMwhE Km8ljHaq+hJ2wBvyJVdKewIQVo4H3dKjE624SAmOSngwZPwyAd3rie6Hk5si1OTBWOAN Um5YHTPN0NQ5f/qS9UlajCHDtpiMc/1e3bH8SIHM1RbxySGDIr2URp1ookcrhl5+UNwc PJuqN2iJuiNdyBb5qnWDdEYTS2Zh3iUrRGs5afgeCTBY4aWGCPH1g2s0QoE1+yfnn0KI BudA== X-Forwarded-Encrypted: i=1; AJvYcCXlj1CLWePphQG8ig6zK4jnofTL0ZZbztZQLj5NtNgK9zZGra273fDwgZcq+dorNWvD5cexM65YTsKIbdabityrMgVCZ6vHP8O2jQYNUw== X-Gm-Message-State: AOJu0YwFCJuQNcM6BEEY7jHzeUdJQ8Y8LHvL/ajEUyNvtuIDHNub1H5/ SKDae5nzBprC/mE9GBSmSuTkSkXifDS/KjG1rKNA5oipv3AVDdYB X-Google-Smtp-Source: AGHT+IH/8B0e9NM5WliOP9w/PF1ZRgCApTZi+SCJC4O7CiUjYmCpNmOGWSyNpvTqihZDA+VKDZbWTg== X-Received: by 2002:a05:6870:f694:b0:233:6e01:69b8 with SMTP id el20-20020a056870f69400b002336e0169b8mr159816oab.3.1713205280834; Mon, 15 Apr 2024 11:21:20 -0700 (PDT) Received: from nukework.lan (c-98-197-58-203.hsd1.tx.comcast.net. [98.197.58.203]) by smtp.gmail.com with ESMTPSA id x4-20020a056820104400b005a4dc7abc01sm2177494oot.11.2024.04.15.11.21.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 15 Apr 2024 11:21:20 -0700 (PDT) From: Alexandru Gagniuc To: Bjorn Andersson , Konrad Dybcio , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Rob Herring , Bjorn Helgaas , Krzysztof Kozlowski , Conor Dooley , Vinod Koul , Kishon Vijay Abraham I , Michael Turquette , Stephen Boyd , Manivannan Sadhasivam , linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-clk@vger.kernel.org Cc: Alexandru Gagniuc Subject: [PATCH v3 4/7] PCI: qcom: Add support for IPQ9574 Date: Mon, 15 Apr 2024 13:20:49 -0500 Message-Id: <20240415182052.374494-5-mr.nuke.me@gmail.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240415182052.374494-1-mr.nuke.me@gmail.com> References: <20240415182052.374494-1-mr.nuke.me@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240415_112123_138282_F4E8659C X-CRM114-Status: GOOD ( 13.78 ) X-BeenThere: linux-phy@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux Phy Mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org Add support for the PCIe on IPQ9574. The main difference from ipq6018 is that the "iface" clock is not necessarry. Add a special case in qcom_pcie_get_resources_2_9_0() to handle this. Signed-off-by: Alexandru Gagniuc --- drivers/pci/controller/dwc/pcie-qcom.c | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c index 14772edcf0d3..10560d6d6336 100644 --- a/drivers/pci/controller/dwc/pcie-qcom.c +++ b/drivers/pci/controller/dwc/pcie-qcom.c @@ -1101,15 +1101,19 @@ static int qcom_pcie_get_resources_2_9_0(struct qcom_pcie *pcie) struct qcom_pcie_resources_2_9_0 *res = &pcie->res.v2_9_0; struct dw_pcie *pci = pcie->pci; struct device *dev = pci->dev; - int ret; + int ret, num_clks = ARRAY_SIZE(res->clks) - 1; - res->clks[0].id = "iface"; + res->clks[0].id = "rchng"; res->clks[1].id = "axi_m"; res->clks[2].id = "axi_s"; res->clks[3].id = "axi_bridge"; - res->clks[4].id = "rchng"; - ret = devm_clk_bulk_get(dev, ARRAY_SIZE(res->clks), res->clks); + if (!of_device_is_compatible(dev->of_node, "qcom,pcie-ipq9574")) { + res->clks[4].id = "iface"; + num_clks++; + } + + ret = devm_clk_bulk_get(dev, num_clks, res->clks); if (ret < 0) return ret; @@ -1664,6 +1668,7 @@ static const struct of_device_id qcom_pcie_match[] = { { .compatible = "qcom,pcie-ipq8064-v2", .data = &cfg_2_1_0 }, { .compatible = "qcom,pcie-ipq8074", .data = &cfg_2_3_3 }, { .compatible = "qcom,pcie-ipq8074-gen3", .data = &cfg_2_9_0 }, + { .compatible = "qcom,pcie-ipq9574", .data = &cfg_2_9_0 }, { .compatible = "qcom,pcie-msm8996", .data = &cfg_2_3_2 }, { .compatible = "qcom,pcie-qcs404", .data = &cfg_2_4_0 }, { .compatible = "qcom,pcie-sa8540p", .data = &cfg_sc8280xp }, From patchwork Mon Apr 15 18:20:50 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Alex G." X-Patchwork-Id: 13630465 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4CF53C4345F for ; Mon, 15 Apr 2024 18:21:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=x6debqS9Zr4cemtRM/2MMUVOw33cH8zzYU0y2loNPYw=; b=M+Bvzlfo/gbk+w kHmzxX2vpYJulNfe0pxuQejkHH36Kcg/pXe0/S7cx7kt+Q0xmqy9j4MQv9LBKVK+iuHZtf9ngAwqY tw5hIJYZUuIuLKeO+LITlVjmPcchO4YYcj65pEHpBok+sTtLdoWYSyiuKNlVtvq0s+Dw886hA+YSr TYQxWgxDYmSw0GDSLOVsW/hdTnXDVfUWFwksVPBozet3CDXHwhUAmb6l/0YmYNcO0kqd7UCNRkoAi fff7VsXgsYLq4f3nPLtoBCQHTpaduJOnwR8Hu1VuIcSirbWPFMyEY7hUz2+LezktpsGa3vaa6s2HZ b471pDp5DXo6pk7WDnHA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rwQxM-00000009QoY-3bkP; Mon, 15 Apr 2024 18:21:28 +0000 Received: from mail-oo1-xc34.google.com ([2607:f8b0:4864:20::c34]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rwQxI-00000009Qjk-2Sg1 for linux-phy@lists.infradead.org; Mon, 15 Apr 2024 18:21:26 +0000 Received: by mail-oo1-xc34.google.com with SMTP id 006d021491bc7-5aa400b917dso2299285eaf.0 for ; Mon, 15 Apr 2024 11:21:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1713205282; x=1713810082; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=CTnP6eipSs1lQbgXBNYS3udbxY0JHas09pkOXVb4n1w=; b=MzIQY9NqOfJ7bm2A1+HgCnrPC967Z5F4mCru+TXnbdgKnXU4xAlytmfb48ya0fui2a sbIqcMacIy+Rd5ee98NjsfrnKqE1N/QMOkgmFYWZrfMOccavK78tp1AzcH8T63DmVEyP nst1b57wfQbBRHhm5IxccFb48Qr0nZvhAYmyzeyiJ/hCyRORTkow9AqMUzD037w2afvi cgiYa/G9hDOwNWRkmJPz53fu3P+f4qSoapE3v7AczyU1KIR8XpOAcNAoIqreAmLEJSUC W6e0vUHhe6ZsRl/0tZH+9lrKIhsR2rGLRnb3FLhMXlLYHW4KcTxRBv7yMbZByunNTSoX 82rg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1713205282; x=1713810082; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=CTnP6eipSs1lQbgXBNYS3udbxY0JHas09pkOXVb4n1w=; b=JQIrl5ukPuVfAWGoVi1i4JdUs217Pgko589n0YYM6HRixELpJETMpBb0EAiixlu6oR f7EeKA21tx0yrQM8MhQqkyKqq/CarYr8o3ileBB6q0EuRIWR7CVbF16SjqGM7+/LIW8R lBdrO4OXUjdOuXG5JTd2Hfpubm6qxUkhTu4qETc23ztkri7FGdGhcPkIhTcDDy3HcmT2 AJcOJhQEA3Oo2Ulicqs+VCWkxrEouJHeOMPRMicaVaJ+YQqQZCMsnLUSbl1edNseOhcT E99+ZCM8W3/Ayy8z5FwuObvYR1z83eOt+IF8OYXAamXuyjtgIx66g1mdx7uWICuhvnH4 kbrA== X-Forwarded-Encrypted: i=1; AJvYcCX+KLXHpVHJuWaqQp2P0SQrmUR3Y0ENjpDMznxDcWAg9tgzX68kJIOgZTIAEi1sY8u/4VSJWCvioazDKsBeWYHFW0bCWgSAAgNcMWPXjA== X-Gm-Message-State: AOJu0YzJHLsyqlVITa6lHaIn2ibI1ekCmkVBxpiozfynNBvFZSZ8iOnC zd/Iq9+U9cmg7+o/1bWNs99Q1IkwveZx1aHiIWU3QkorL4NSlGE2 X-Google-Smtp-Source: AGHT+IHg5ugq1lohZEm0ehzMxEcdWVwoP8XQwZRTCLQ22SHdryJbt4bEX3o8wVWphYHKU7n0nCcShA== X-Received: by 2002:a4a:1482:0:b0:5ac:c39b:3a7a with SMTP id 124-20020a4a1482000000b005acc39b3a7amr1127677ood.1.1713205282432; Mon, 15 Apr 2024 11:21:22 -0700 (PDT) Received: from nukework.lan (c-98-197-58-203.hsd1.tx.comcast.net. [98.197.58.203]) by smtp.gmail.com with ESMTPSA id x4-20020a056820104400b005a4dc7abc01sm2177494oot.11.2024.04.15.11.21.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 15 Apr 2024 11:21:22 -0700 (PDT) From: Alexandru Gagniuc To: Bjorn Andersson , Konrad Dybcio , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Rob Herring , Bjorn Helgaas , Krzysztof Kozlowski , Conor Dooley , Vinod Koul , Kishon Vijay Abraham I , Michael Turquette , Stephen Boyd , Manivannan Sadhasivam , linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-clk@vger.kernel.org Cc: Alexandru Gagniuc Subject: [PATCH v3 5/7] dt-bindings: phy: qcom,ipq8074-qmp-pcie: add ipq9574 gen3x2 PHY Date: Mon, 15 Apr 2024 13:20:50 -0500 Message-Id: <20240415182052.374494-6-mr.nuke.me@gmail.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240415182052.374494-1-mr.nuke.me@gmail.com> References: <20240415182052.374494-1-mr.nuke.me@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240415_112124_849242_4BDC284B X-CRM114-Status: UNSURE ( 8.83 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-phy@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux Phy Mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org The IPQ9574 gen3x2 PHY is very similar to IPQ6018. It requires two extra clocks named "anoc" and "snoc". Document this, and add a new compatible string for this PHY. Signed-off-by: Alexandru Gagniuc Acked-by: Rob Herring (Arm) --- .../phy/qcom,ipq8074-qmp-pcie-phy.yaml | 36 ++++++++++++++++++- 1 file changed, 35 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/phy/qcom,ipq8074-qmp-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,ipq8074-qmp-pcie-phy.yaml index 634cec5d57ea..89949f4e89db 100644 --- a/Documentation/devicetree/bindings/phy/qcom,ipq8074-qmp-pcie-phy.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,ipq8074-qmp-pcie-phy.yaml @@ -19,19 +19,24 @@ properties: - qcom,ipq6018-qmp-pcie-phy - qcom,ipq8074-qmp-gen3-pcie-phy - qcom,ipq8074-qmp-pcie-phy + - qcom,ipq9574-qmp-gen3x2-pcie-phy reg: items: - description: serdes clocks: - maxItems: 3 + minItems: 3 + maxItems: 5 clock-names: + minItems: 3 items: - const: aux - const: cfg_ahb - const: pipe + - const: anoc + - const: snoc resets: maxItems: 2 @@ -61,6 +66,35 @@ required: - clock-output-names - "#phy-cells" +allOf: + - if: + properties: + compatible: + contains: + enum: + - qcom,ipq6018-qmp-pcie-phy + - qcom,ipq8074-qmp-gen3-pcie-phy + - qcom,ipq8074-qmp-pcie-phy + then: + properties: + clocks: + maxItems: 3 + clock-names: + maxItems: 3 + + - if: + properties: + compatible: + contains: + enum: + - qcom,ipq9574-qmp-gen3x2-pcie-phy + then: + properties: + clocks: + minItems: 5 + clock-names: + minItems: 5 + additionalProperties: false examples: From patchwork Mon Apr 15 18:20:51 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Alex G." X-Patchwork-Id: 13630466 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9DBF6C04FF9 for ; Mon, 15 Apr 2024 18:21:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=73wPOXxHx3jL1xyWdVRMcavTTl0DGayjC02XxNA6m2Y=; b=hn3iiY2xTZ+qds kV/jJflUrJ3hTjJTqCAkcEklnvoV0yv10BwarSuuBJPw9NFkmfHWkVYiraLv/mw85mK+fMWm/Ogfd IvR474mL1brBlYJpEARJIr3FId/P5C1CQ9xNDPA2P9GBsOBM7r2aiyqUot7FQs8Glp3KOk1iMf468 +Xp5bfQyLWGN60q6FDjag8fg1iqP2e/ja7VKpF48dxAOHfG9f6UKoZeMQXdcWTEzP2BEbFUTOPsRP uC5UdIOp1tH0aeyvnaZ4fGQVvePBPbQJA0t71BThp1Z28UEsWffLypQNBlydln+FxtFmlL2IXwXi+ RH4GIS86iHQWNAO3Gokw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rwQxO-00000009QpU-11un; Mon, 15 Apr 2024 18:21:30 +0000 Received: from mail-oo1-xc31.google.com ([2607:f8b0:4864:20::c31]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rwQxK-00000009Qli-2GwK for linux-phy@lists.infradead.org; Mon, 15 Apr 2024 18:21:28 +0000 Received: by mail-oo1-xc31.google.com with SMTP id 006d021491bc7-5aa362cc2ccso2826147eaf.3 for ; Mon, 15 Apr 2024 11:21:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1713205284; x=1713810084; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=xdbXKh+RNp4MnGM/FujpTCGmHI3sINIt3cug6zl8uss=; b=fAUloFuCfPpV7sa4Gr88lBcdg4QA4xVSCnlT3XT8mYqpGAhu+SWO6mPpG5AvwMyAnf dUwgKvldSrF/5RWC9FCqF7K0j4EGlscxwP4EDyiltYKAgdSEMqUjM9e3n7GXchSIf+/4 NNjgWUTEcZ7a1q8BVYVVU5DqHvUJfFSDQ3gxrRLtcOf261JBO97QIN5mF57VQqM6L5Ei pIYyrLat/cwbtH7Pf51SDTtXN7ot7zdGoW2V8H+uF25IzkPa9Hu5dJyYUt/+liOK7por /XMSXKZ62JxfH8YZa0GCE6B0DKJxrklK6Pe/UGtR/j2ZprMYG6c+a5Ve691u4RavZB0f fO9g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1713205284; x=1713810084; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=xdbXKh+RNp4MnGM/FujpTCGmHI3sINIt3cug6zl8uss=; b=pYTIaBWOuvJjbo68aQCpzx3bOxEL/zbH5K4Ql+cd2jZSQ9hLsRCcvPdmxoDGjY3nE/ v1DdGB6CbfK3l9s2jBcikF8/Ct33Bg+FPIdgHsqZIQIaNrzmVvvaNc0u2rYdFm3FCej1 /IQe8S5DQlIjr8o6B53gAPL5u3RVZH9Iq4etetUlKBsiX5B40heGahaybSoQUM2i8x1a J4BXanesMdab9okv38jZ6VJTUl69j6aSlO7+7tKIdVceLVAKHdzNEVo0WbRhgFs9JP/h iSRQ1Uun5Wr8ILgPtMU1WeZdVrN+DdyA8xRKrb658uGTeebx0q5p+n2UEJ7NDEE4yNuf 2kdA== X-Forwarded-Encrypted: i=1; AJvYcCUii6P9P76Uf6qBpOiJ4Mh3uEhWzWJijKV8prx6aTwCJ5+SmrkNo+wd/mSEMbi2F2osGS69hJxAjjcFiBZB/Jt14tS6DMiIYu8gQ6O+Bg== X-Gm-Message-State: AOJu0Yx0FR9SvFNgJBZUCapeNUdi6n/64mPXlktrY8dpQLCc9gyI+Q4i 1F5SLAuH48PS/mDMrBKIalUxFXOn7faHDVheowr9JiYIGH9oo3g1 X-Google-Smtp-Source: AGHT+IGrnREYRFbxIcokeJIMps7f+ORY88lwVGB2OdkgvY9Hc11FJWognyVI1aZdKa+5Ltq2CjXHoQ== X-Received: by 2002:a05:6820:1e02:b0:5aa:4e19:39aa with SMTP id dh2-20020a0568201e0200b005aa4e1939aamr10177134oob.2.1713205284313; Mon, 15 Apr 2024 11:21:24 -0700 (PDT) Received: from nukework.lan (c-98-197-58-203.hsd1.tx.comcast.net. [98.197.58.203]) by smtp.gmail.com with ESMTPSA id x4-20020a056820104400b005a4dc7abc01sm2177494oot.11.2024.04.15.11.21.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 15 Apr 2024 11:21:23 -0700 (PDT) From: Alexandru Gagniuc To: Bjorn Andersson , Konrad Dybcio , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Rob Herring , Bjorn Helgaas , Krzysztof Kozlowski , Conor Dooley , Vinod Koul , Kishon Vijay Abraham I , Michael Turquette , Stephen Boyd , Manivannan Sadhasivam , linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-clk@vger.kernel.org Cc: Alexandru Gagniuc Subject: [PATCH v3 6/7] phy: qcom-qmp-pcie: add support for ipq9574 gen3x2 PHY Date: Mon, 15 Apr 2024 13:20:51 -0500 Message-Id: <20240415182052.374494-7-mr.nuke.me@gmail.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240415182052.374494-1-mr.nuke.me@gmail.com> References: <20240415182052.374494-1-mr.nuke.me@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240415_112126_608676_25782D74 X-CRM114-Status: GOOD ( 12.52 ) X-BeenThere: linux-phy@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux Phy Mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org Add support for the gen3x2 PCIe PHY on IPQ9574, ported form downstream 5.4 kernel. Only the serdes and pcs_misc tables are new, the others being reused from IPQ8074 and IPQ6018 PHYs. Signed-off-by: Alexandru Gagniuc --- drivers/phy/qualcomm/phy-qcom-qmp-pcie.c | 136 +++++++++++++++++- .../phy/qualcomm/phy-qcom-qmp-pcs-pcie-v5.h | 14 ++ 2 files changed, 149 insertions(+), 1 deletion(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c b/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c index 8836bb1ff0cc..a4a79ddf50a5 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c @@ -487,6 +487,100 @@ static const struct qmp_phy_init_tbl ipq8074_pcie_gen3_pcs_misc_tbl[] = { QMP_PHY_INIT_CFG(QPHY_V4_PCS_PCIE_ENDPOINT_REFCLK_DRIVE, 0xc1), }; +static const struct qmp_phy_init_tbl ipq9574_gen3x2_pcie_serdes_tbl[] = { + QMP_PHY_INIT_CFG(QSERDES_PLL_BIAS_EN_CLKBUFLR_EN, 0x18), + QMP_PHY_INIT_CFG(QSERDES_PLL_BIAS_EN_CTRL_BY_PSM, 0x01), + QMP_PHY_INIT_CFG(QSERDES_PLL_CLK_SELECT, 0x31), + QMP_PHY_INIT_CFG(QSERDES_PLL_PLL_IVCO, 0x0f), + QMP_PHY_INIT_CFG(QSERDES_PLL_BG_TRIM, 0x0f), + QMP_PHY_INIT_CFG(QSERDES_PLL_CMN_CONFIG, 0x06), + QMP_PHY_INIT_CFG(QSERDES_PLL_LOCK_CMP_EN, 0x42), + QMP_PHY_INIT_CFG(QSERDES_PLL_RESETSM_CNTRL, 0x20), + QMP_PHY_INIT_CFG(QSERDES_PLL_SVS_MODE_CLK_SEL, 0x01), + QMP_PHY_INIT_CFG(QSERDES_PLL_VCO_TUNE_MAP, 0x04), + QMP_PHY_INIT_CFG(QSERDES_PLL_SVS_MODE_CLK_SEL, 0x05), + QMP_PHY_INIT_CFG(QSERDES_PLL_VCO_TUNE_TIMER1, 0xff), + QMP_PHY_INIT_CFG(QSERDES_PLL_VCO_TUNE_TIMER2, 0x3f), + QMP_PHY_INIT_CFG(QSERDES_PLL_CORE_CLK_EN, 0x30), + QMP_PHY_INIT_CFG(QSERDES_PLL_HSCLK_SEL, 0x21), + QMP_PHY_INIT_CFG(QSERDES_PLL_DEC_START_MODE0, 0x68), + QMP_PHY_INIT_CFG(QSERDES_PLL_DIV_FRAC_START3_MODE0, 0x02), + QMP_PHY_INIT_CFG(QSERDES_PLL_DIV_FRAC_START2_MODE0, 0xaa), + QMP_PHY_INIT_CFG(QSERDES_PLL_DIV_FRAC_START1_MODE0, 0xab), + QMP_PHY_INIT_CFG(QSERDES_PLL_LOCK_CMP2_MODE0, 0x14), + QMP_PHY_INIT_CFG(QSERDES_PLL_LOCK_CMP1_MODE0, 0xd4), + QMP_PHY_INIT_CFG(QSERDES_PLL_CP_CTRL_MODE0, 0x09), + QMP_PHY_INIT_CFG(QSERDES_PLL_PLL_RCTRL_MODE0, 0x16), + QMP_PHY_INIT_CFG(QSERDES_PLL_PLL_CCTRL_MODE0, 0x28), + QMP_PHY_INIT_CFG(QSERDES_PLL_INTEGLOOP_GAIN1_MODE0, 0x00), + QMP_PHY_INIT_CFG(QSERDES_PLL_INTEGLOOP_GAIN0_MODE0, 0xa0), + QMP_PHY_INIT_CFG(QSERDES_PLL_VCO_TUNE2_MODE0, 0x02), + QMP_PHY_INIT_CFG(QSERDES_PLL_VCO_TUNE1_MODE0, 0x24), + QMP_PHY_INIT_CFG(QSERDES_PLL_SVS_MODE_CLK_SEL, 0x05), + QMP_PHY_INIT_CFG(QSERDES_PLL_CORE_CLK_EN, 0x00), + QMP_PHY_INIT_CFG(QSERDES_PLL_CORECLK_DIV, 0x0a), + QMP_PHY_INIT_CFG(QSERDES_PLL_CLK_SELECT, 0x32), + QMP_PHY_INIT_CFG(QSERDES_PLL_SYS_CLK_CTRL, 0x02), + QMP_PHY_INIT_CFG(QSERDES_PLL_SYSCLK_BUF_ENABLE, 0x07), + QMP_PHY_INIT_CFG(QSERDES_PLL_SYSCLK_EN_SEL, 0x08), + QMP_PHY_INIT_CFG(QSERDES_PLL_BG_TIMER, 0x0a), + QMP_PHY_INIT_CFG(QSERDES_PLL_HSCLK_SEL, 0x01), + QMP_PHY_INIT_CFG(QSERDES_PLL_DEC_START_MODE1, 0x53), + QMP_PHY_INIT_CFG(QSERDES_PLL_DIV_FRAC_START3_MODE1, 0x05), + QMP_PHY_INIT_CFG(QSERDES_PLL_DIV_FRAC_START2_MODE1, 0x55), + QMP_PHY_INIT_CFG(QSERDES_PLL_DIV_FRAC_START1_MODE1, 0x55), + QMP_PHY_INIT_CFG(QSERDES_PLL_LOCK_CMP2_MODE1, 0x29), + QMP_PHY_INIT_CFG(QSERDES_PLL_LOCK_CMP1_MODE1, 0xaa), + QMP_PHY_INIT_CFG(QSERDES_PLL_CP_CTRL_MODE1, 0x09), + QMP_PHY_INIT_CFG(QSERDES_PLL_PLL_RCTRL_MODE1, 0x16), + QMP_PHY_INIT_CFG(QSERDES_PLL_PLL_CCTRL_MODE1, 0x28), + QMP_PHY_INIT_CFG(QSERDES_PLL_INTEGLOOP_GAIN1_MODE1, 0x00), + QMP_PHY_INIT_CFG(QSERDES_PLL_INTEGLOOP_GAIN0_MODE1, 0xa0), + QMP_PHY_INIT_CFG(QSERDES_PLL_VCO_TUNE2_MODE1, 0x03), + QMP_PHY_INIT_CFG(QSERDES_PLL_VCO_TUNE1_MODE1, 0xb4), + QMP_PHY_INIT_CFG(QSERDES_PLL_SVS_MODE_CLK_SEL, 0x05), + QMP_PHY_INIT_CFG(QSERDES_PLL_CORE_CLK_EN, 0x00), + QMP_PHY_INIT_CFG(QSERDES_PLL_CORECLK_DIV_MODE1, 0x08), + QMP_PHY_INIT_CFG(QSERDES_COM_SSC_EN_CENTER, 0x01), + QMP_PHY_INIT_CFG(QSERDES_PLL_SSC_PER1, 0x7d), + QMP_PHY_INIT_CFG(QSERDES_PLL_SSC_PER2, 0x01), + QMP_PHY_INIT_CFG(QSERDES_COM_SSC_ADJ_PER1, 0x00), + QMP_PHY_INIT_CFG(QSERDES_COM_SSC_ADJ_PER2, 0x00), + QMP_PHY_INIT_CFG(QSERDES_PLL_SSC_STEP_SIZE1_MODE0, 0x0a), + QMP_PHY_INIT_CFG(QSERDES_PLL_SSC_STEP_SIZE2_MODE0, 0x05), + QMP_PHY_INIT_CFG(QSERDES_PLL_SSC_STEP_SIZE1_MODE1, 0x08), + QMP_PHY_INIT_CFG(QSERDES_PLL_SSC_STEP_SIZE2_MODE1, 0x04), + QMP_PHY_INIT_CFG(QSERDES_PLL_CLK_EP_DIV_MODE0, 0x19), + QMP_PHY_INIT_CFG(QSERDES_PLL_CLK_EP_DIV_MODE1, 0x28), + QMP_PHY_INIT_CFG(QSERDES_PLL_CLK_ENABLE1, 0x90), + QMP_PHY_INIT_CFG(QSERDES_PLL_HSCLK_SEL, 0x89), + QMP_PHY_INIT_CFG(QSERDES_PLL_CLK_ENABLE1, 0x10), +}; + +static const struct qmp_phy_init_tbl ipq9574_gen3x2_pcie_pcs_misc_tbl[] = { + QMP_PHY_INIT_CFG(QPHY_V5_PCS_PCIE_OSC_DTCT_ACTIONS, 0x00), + QMP_PHY_INIT_CFG(QPHY_V5_PCS_PCIE_POWER_STATE_CONFIG2, 0x1d), + QMP_PHY_INIT_CFG(QPHY_V5_PCS_PCIE_L1P1_WAKEUP_DLY_TIME_AUXCLK_H, 0x00), + QMP_PHY_INIT_CFG(QPHY_V5_PCS_PCIE_L1P1_WAKEUP_DLY_TIME_AUXCLK_L, 0x01), + QMP_PHY_INIT_CFG(QPHY_V5_PCS_PCIE_L1P2_WAKEUP_DLY_TIME_AUXCLK_H, 0x00), + QMP_PHY_INIT_CFG(QPHY_V5_PCS_PCIE_L1P2_WAKEUP_DLY_TIME_AUXCLK_L, 0x01), + QMP_PHY_INIT_CFG(QPHY_V5_PCS_PCIE_EQ_CONFIG1, 0x14), + QMP_PHY_INIT_CFG(QPHY_V5_PCS_PCIE_EQ_CONFIG1, 0x10), + QMP_PHY_INIT_CFG(QPHY_V5_PCS_PCIE_EQ_CONFIG2, 0x0b), + QMP_PHY_INIT_CFG(QPHY_V5_PCS_PCIE_PRESET_P10_PRE, 0x00), + QMP_PHY_INIT_CFG(QPHY_V5_PCS_PCIE_PRESET_P10_POST, 0x58), + QMP_PHY_INIT_CFG(QPHY_V5_PCS_PCIE_POWER_STATE_CONFIG4, 0x07), + QMP_PHY_INIT_CFG(QPHY_V5_PCS_PCIE_OSC_DTCT_CONFIG1, 0x00), + QMP_PHY_INIT_CFG(QPHY_V5_PCS_PCIE_OSC_DTCT_CONFIG2, 0x52), + QMP_PHY_INIT_CFG(QPHY_V5_PCS_PCIE_OSC_DTCT_CONFIG4, 0x19), + QMP_PHY_INIT_CFG(QPHY_V5_PCS_PCIE_INT_AUX_CLK_CONFIG1, 0x00), + QMP_PHY_INIT_CFG(QPHY_V5_PCS_PCIE_OSC_DTCT_MODE2_CONFIG2, 0x49), + QMP_PHY_INIT_CFG(QPHY_V5_PCS_PCIE_OSC_DTCT_MODE2_CONFIG4, 0x2a), + QMP_PHY_INIT_CFG(QPHY_V5_PCS_PCIE_OSC_DTCT_MODE2_CONFIG5, 0x02), + QMP_PHY_INIT_CFG(QPHY_V5_PCS_PCIE_OSC_DTCT_MODE2_CONFIG6, 0x03), + QMP_PHY_INIT_CFG(QPHY_V5_PCS_PCIE_ENDPOINT_REFCLK_DRIVE, 0xc1), +}; + static const struct qmp_phy_init_tbl sdm845_qmp_pcie_serdes_tbl[] = { QMP_PHY_INIT_CFG(QSERDES_V3_COM_BIAS_EN_CLKBUFLR_EN, 0x14), QMP_PHY_INIT_CFG(QSERDES_V3_COM_CLK_SELECT, 0x30), @@ -2448,7 +2542,7 @@ static inline void qphy_clrbits(void __iomem *base, u32 offset, u32 val) /* list of clocks required by phy */ static const char * const qmp_pciephy_clk_l[] = { - "aux", "cfg_ahb", "ref", "refgen", "rchng", "phy_aux", + "aux", "cfg_ahb", "ref", "refgen", "rchng", "phy_aux", "anoc", "snoc" }; /* list of regulators */ @@ -2499,6 +2593,16 @@ static const struct qmp_pcie_offsets qmp_pcie_offsets_v4x1 = { .rx = 0x0400, }; +static const struct qmp_pcie_offsets qmp_pcie_offsets_ipq9574 = { + .serdes = 0, + .pcs = 0x1000, + .pcs_misc = 0x1400, + .tx = 0x0200, + .rx = 0x0400, + .tx2 = 0x0600, + .rx2 = 0x0800, +}; + static const struct qmp_pcie_offsets qmp_pcie_offsets_v4x2 = { .serdes = 0, .pcs = 0x0a00, @@ -2728,6 +2832,33 @@ static const struct qmp_phy_cfg sm8250_qmp_gen3x1_pciephy_cfg = { .phy_status = PHYSTATUS, }; +static const struct qmp_phy_cfg ipq9574_pciephy_gen3x2_cfg = { + .lanes = 2, + + .offsets = &qmp_pcie_offsets_ipq9574, + + .tbls = { + .serdes = ipq9574_gen3x2_pcie_serdes_tbl, + .serdes_num = ARRAY_SIZE(ipq9574_gen3x2_pcie_serdes_tbl), + .tx = ipq8074_pcie_gen3_tx_tbl, + .tx_num = ARRAY_SIZE(ipq8074_pcie_gen3_tx_tbl), + .rx = ipq6018_pcie_rx_tbl, + .rx_num = ARRAY_SIZE(ipq6018_pcie_rx_tbl), + .pcs = ipq6018_pcie_pcs_tbl, + .pcs_num = ARRAY_SIZE(ipq6018_pcie_pcs_tbl), + .pcs_misc = ipq9574_gen3x2_pcie_pcs_misc_tbl, + .pcs_misc_num = ARRAY_SIZE(ipq9574_gen3x2_pcie_pcs_misc_tbl), + }, + .reset_list = ipq8074_pciephy_reset_l, + .num_resets = ARRAY_SIZE(ipq8074_pciephy_reset_l), + .vreg_list = NULL, + .num_vregs = 0, + .regs = pciephy_v4_regs_layout, + + .pwrdn_ctrl = SW_PWRDN | REFCLK_DRV_DSBL, + .phy_status = PHYSTATUS, +}; + static const struct qmp_phy_cfg sm8250_qmp_gen3x2_pciephy_cfg = { .lanes = 2, @@ -3935,6 +4066,9 @@ static const struct of_device_id qmp_pcie_of_match_table[] = { }, { .compatible = "qcom,ipq8074-qmp-pcie-phy", .data = &ipq8074_pciephy_cfg, + }, { + .compatible = "qcom,ipq9574-qmp-gen3x2-pcie-phy", + .data = &ipq9574_pciephy_gen3x2_cfg, }, { .compatible = "qcom,msm8998-qmp-pcie-phy", .data = &msm8998_pciephy_cfg, diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-pcie-v5.h b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-pcie-v5.h index a469ae2a10a1..fa15a03055de 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-pcie-v5.h +++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-pcie-v5.h @@ -11,8 +11,22 @@ #define QPHY_V5_PCS_PCIE_POWER_STATE_CONFIG2 0x0c #define QPHY_V5_PCS_PCIE_POWER_STATE_CONFIG4 0x14 #define QPHY_V5_PCS_PCIE_ENDPOINT_REFCLK_DRIVE 0x20 +#define QPHY_V5_PCS_PCIE_L1P1_WAKEUP_DLY_TIME_AUXCLK_L 0x44 +#define QPHY_V5_PCS_PCIE_L1P1_WAKEUP_DLY_TIME_AUXCLK_H 0x48 +#define QPHY_V5_PCS_PCIE_L1P2_WAKEUP_DLY_TIME_AUXCLK_L 0x4c +#define QPHY_V5_PCS_PCIE_L1P2_WAKEUP_DLY_TIME_AUXCLK_H 0x50 #define QPHY_V5_PCS_PCIE_INT_AUX_CLK_CONFIG1 0x54 +#define QPHY_V5_PCS_PCIE_OSC_DTCT_CONFIG1 0x5c +#define QPHY_V5_PCS_PCIE_OSC_DTCT_CONFIG2 0x60 +#define QPHY_V5_PCS_PCIE_OSC_DTCT_CONFIG4 0x68 +#define QPHY_V5_PCS_PCIE_OSC_DTCT_MODE2_CONFIG2 0x7c +#define QPHY_V5_PCS_PCIE_OSC_DTCT_MODE2_CONFIG4 0x84 +#define QPHY_V5_PCS_PCIE_OSC_DTCT_MODE2_CONFIG5 0x88 +#define QPHY_V5_PCS_PCIE_OSC_DTCT_MODE2_CONFIG6 0x8c #define QPHY_V5_PCS_PCIE_OSC_DTCT_ACTIONS 0x94 +#define QPHY_V5_PCS_PCIE_EQ_CONFIG1 0xa4 #define QPHY_V5_PCS_PCIE_EQ_CONFIG2 0xa8 +#define QPHY_V5_PCS_PCIE_PRESET_P10_PRE 0xc0 +#define QPHY_V5_PCS_PCIE_PRESET_P10_POST 0xe4 #endif From patchwork Mon Apr 15 18:20:52 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Alex G." X-Patchwork-Id: 13630467 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 15360C00A94 for ; Mon, 15 Apr 2024 18:21:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=KOn9mBsfgs4XceRgxU6Z1CHY6aBR2rTTW/ukpCizzmQ=; b=QtN77Fn0oIvie8 fA06Se8Y2Yv2nKdGrF/N6TxaK9LteZB4YE7rUSCpHc6xtXT+7HM4y++4sazvg/KrGwSNimPBXoSUD XUdhPg9mZvoY8Bh+5UXF2BGPSYCPLOjeB7do302QPAxzzQ5ANQV5gIaXzyugfiNRMi3/PrsgxQVeh Zi04FGg12ilWd0Yx7XFi50Veoelfb0ROxrlMWVtRVZYPyR4MT19Py6J+6tfZeu/fz88nNAx5Jcq7K 79UwSFLA89p9zYo7lFcrMXIyYxpkA6pRAdodUpysC1IL1rBhez+V3Bz65eSrmBRlAZFHGunVIN/Az 08/Tjn7+mBw7H2skxL8g==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rwQxO-00000009Qpq-2TPL; Mon, 15 Apr 2024 18:21:30 +0000 Received: from mail-oo1-xc33.google.com ([2607:f8b0:4864:20::c33]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rwQxK-00000009QmY-3IPH for linux-phy@lists.infradead.org; Mon, 15 Apr 2024 18:21:28 +0000 Received: by mail-oo1-xc33.google.com with SMTP id 006d021491bc7-5a7d6bc81c6so2656759eaf.2 for ; Mon, 15 Apr 2024 11:21:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1713205286; x=1713810086; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=FzgGDQmklEWFrISIR4IcwxoAKiKCzk4r1Ppmvkj7XiQ=; b=CsERi8j2i/jgkL8rOlCm5I3MN6uNmV45VUYX1r8ULqs326jt1j1v4jvowKPyYcOEQt LsJhoRfJPNkcpHJFT4eTxeCle+nsLqUbYMsR7HySBLnuROtSHlfbi+LLRhbGew9HbZFs FeJ+APxLAUymI46CR1IxIjTyOEHyFcuvA/xQ5CMHluQ189h7Rgx5wynaWm5+JKhVzF2Q AeitjqWXjw7oiYgt2+LDtkiV1xqiD9QeZsPxQzuwrB33oUGSBPvCc8RpE00Za8Y8shCo opKn8VkNGddcS7JPPAkG5Xlv67lG3SJbiUgu3LC4GdB03F8cDr6HnFhy/0bnGZ5FY4aG 8cpQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1713205286; x=1713810086; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=FzgGDQmklEWFrISIR4IcwxoAKiKCzk4r1Ppmvkj7XiQ=; b=uRoqeLDsRJqJLKZxhJOh0dRmGoagdqDjX++yUQNudedhn8tiV1KwGpo9bRWDtkq5WV 9bkAuUdNFnZiPiDrCR928FbZfoUMJCw5tsRwXDQL0RwgHr+Z9BATzkhPVT271VBlhLyc vRaLaCOStc+FSGHne5Ckwqw4BP1DsphD1370rphdiiqUzZlFni0nPGz/uFAPtdj7Wp1d PI8K999uuzm6+UqBnfzyzuDTw7fnRJeXv6JOQ79uNsLtBkL9jkJnts28IIGZLJhB+oHD +UP1lav5tfZy+3pqoJHsKlYvWEkz9l/LkWsYi31rI94dKrSVyJ8fn0dJjdcl7m3PIi59 ctig== X-Forwarded-Encrypted: i=1; AJvYcCURIR8qdxUurByp+9pkw74cOvNOzWqWSpEkHYN6kOXjGQ7BNeng0Yw6fRxLcxBXlGgTckSKJclF04lBfTjxoSVBgC7z2/nZSyS1L0yr4g== X-Gm-Message-State: AOJu0YyuzskuoEqNp6/nA81fDgsBvUeC2L5v+btfjZh16o0Q2k03GOjI zTin0QaNw87xE+Sst4IN27KITMEISjuWF6lgdOk3To/GboRYawDJ X-Google-Smtp-Source: AGHT+IFzBspjAQ4rLg81eFZJL29bkc3W+mz4hD/gAWcReSsmqzSYHyKiD0HMSDTzbp14adcuHiezMg== X-Received: by 2002:a4a:1ac3:0:b0:5ac:9ff2:8ca4 with SMTP id 186-20020a4a1ac3000000b005ac9ff28ca4mr4669479oof.6.1713205285937; Mon, 15 Apr 2024 11:21:25 -0700 (PDT) Received: from nukework.lan (c-98-197-58-203.hsd1.tx.comcast.net. [98.197.58.203]) by smtp.gmail.com with ESMTPSA id x4-20020a056820104400b005a4dc7abc01sm2177494oot.11.2024.04.15.11.21.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 15 Apr 2024 11:21:25 -0700 (PDT) From: Alexandru Gagniuc To: Bjorn Andersson , Konrad Dybcio , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Rob Herring , Bjorn Helgaas , Krzysztof Kozlowski , Conor Dooley , Vinod Koul , Kishon Vijay Abraham I , Michael Turquette , Stephen Boyd , Manivannan Sadhasivam , linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-clk@vger.kernel.org Cc: Alexandru Gagniuc Subject: [PATCH v3 7/7] arm64: dts: qcom: ipq9574: add PCIe2 nodes Date: Mon, 15 Apr 2024 13:20:52 -0500 Message-Id: <20240415182052.374494-8-mr.nuke.me@gmail.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240415182052.374494-1-mr.nuke.me@gmail.com> References: <20240415182052.374494-1-mr.nuke.me@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240415_112126_919474_9BDE7380 X-CRM114-Status: GOOD ( 10.40 ) X-BeenThere: linux-phy@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux Phy Mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org On ipq9574, there are 4 PCIe controllers. Describe the pcie2 node, and its PHY in devicetree. Only pcie2 is described, because only hardware using that controller was available for testing. Signed-off-by: Alexandru Gagniuc --- arch/arm64/boot/dts/qcom/ipq9574.dtsi | 93 ++++++++++++++++++++++++++- 1 file changed, 92 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/ipq9574.dtsi b/arch/arm64/boot/dts/qcom/ipq9574.dtsi index 7f2e5cbf3bbb..f075e2715300 100644 --- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi @@ -300,7 +300,7 @@ gcc: clock-controller@1800000 { <0>, <0>, <0>, - <0>, + <&pcie2_phy>, <0>, <0>; #clock-cells = <1>; @@ -745,6 +745,97 @@ frame@b128000 { status = "disabled"; }; }; + + pcie2_phy: phy@8c000 { + compatible = "qcom,ipq9574-qmp-gen3x2-pcie-phy"; + reg = <0x0008c000 0x14f4>; + + clocks = <&gcc GCC_PCIE2_AUX_CLK>, + <&gcc GCC_PCIE2_AHB_CLK>, + <&gcc GCC_PCIE2_PIPE_CLK>, + <&gcc GCC_ANOC_PCIE2_2LANE_M_CLK>, + <&gcc GCC_SNOC_PCIE2_2LANE_S_CLK>; + clock-names = "aux", + "cfg_ahb", + "pipe", + "anoc", + "snoc"; + + clock-output-names = "pcie_phy2_pipe_clk"; + #clock-cells = <0>; + #phy-cells = <0>; + + resets = <&gcc GCC_PCIE2_PHY_BCR>, + <&gcc GCC_PCIE2PHY_PHY_BCR>; + reset-names = "phy", + "common"; + status = "disabled"; + }; + + pcie2: pcie@20000000 { + compatible = "qcom,pcie-ipq9574"; + reg = <0x20000000 0xf1d>, + <0x20000f20 0xa8>, + <0x20001000 0x1000>, + <0x00088000 0x4000>, + <0x20100000 0x1000>; + reg-names = "dbi", "elbi", "atu", "parf", "config"; + + ranges = <0x81000000 0x0 0x20200000 0x20200000 0x0 0x00100000>, /* I/O */ + <0x82000000 0x0 0x20300000 0x20300000 0x0 0x07d00000>; /* MEM */ + + device_type = "pci"; + linux,pci-domain = <3>; + bus-range = <0x00 0xff>; + num-lanes = <2>; + max-link-speed = <3>; + #address-cells = <3>; + #size-cells = <2>; + + phys = <&pcie2_phy>; + phy-names = "pciephy"; + + interrupts = ; + interrupt-names = "msi"; + + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0x7>; + interrupt-map = <0 0 0 1 &intc 0 0 164 + IRQ_TYPE_LEVEL_HIGH>, /* int_a */ + <0 0 0 2 &intc 0 0 165 + IRQ_TYPE_LEVEL_HIGH>, /* int_b */ + <0 0 0 3 &intc 0 0 186 + IRQ_TYPE_LEVEL_HIGH>, /* int_c */ + <0 0 0 4 &intc 0 0 187 + IRQ_TYPE_LEVEL_HIGH>; /* int_d */ + + clocks = <&gcc GCC_PCIE2_AXI_M_CLK>, + <&gcc GCC_PCIE2_AXI_S_CLK>, + <&gcc GCC_PCIE2_AXI_S_BRIDGE_CLK>, + <&gcc GCC_PCIE2_RCHNG_CLK>; + clock-names = "axi_m", + "axi_s", + "axi_bridge", + "rchng"; + + resets = <&gcc GCC_PCIE2_PIPE_ARES>, + <&gcc GCC_PCIE2_AUX_ARES>, + <&gcc GCC_PCIE2_CORE_STICKY_ARES>, + <&gcc GCC_PCIE2_AXI_M_ARES>, + <&gcc GCC_PCIE2_AXI_S_ARES>, + <&gcc GCC_PCIE2_AXI_S_STICKY_ARES>, + <&gcc GCC_PCIE2_AXI_M_STICKY_ARES>, + <&gcc GCC_PCIE2_AHB_ARES>; + reset-names = "pipe", + "aux", + "sticky", + "axi_m", + "axi_s", + "axi_s_sticky", + "axi_m_sticky", + "ahb"; + status = "disabled"; + }; }; thermal-zones {