From patchwork Tue Apr 16 06:39:47 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sergiy Kibrik X-Patchwork-Id: 13631377 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 560FEC4345F for ; Tue, 16 Apr 2024 06:40:09 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.706642.1103925 (Exim 4.92) (envelope-from ) id 1rwcU2-0007Uk-Fs; Tue, 16 Apr 2024 06:39:58 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 706642.1103925; Tue, 16 Apr 2024 06:39:58 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1rwcU2-0007Ud-CH; Tue, 16 Apr 2024 06:39:58 +0000 Received: by outflank-mailman (input) for mailman id 706642; Tue, 16 Apr 2024 06:39:56 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1rwcU0-0007UT-N8 for xen-devel@lists.xenproject.org; Tue, 16 Apr 2024 06:39:56 +0000 Received: from pb-smtp21.pobox.com (pb-smtp21.pobox.com [173.228.157.53]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 2249d11b-fbbc-11ee-b909-491648fe20b8; Tue, 16 Apr 2024 08:39:55 +0200 (CEST) Received: from pb-smtp21.pobox.com (unknown [127.0.0.1]) by pb-smtp21.pobox.com (Postfix) with ESMTP id AC5072D94C; Tue, 16 Apr 2024 02:39:53 -0400 (EDT) (envelope-from sakib@darkstar.site) Received: from pb-smtp21.sea.icgroup.com (unknown [127.0.0.1]) by pb-smtp21.pobox.com (Postfix) with ESMTP id A527C2D94B; Tue, 16 Apr 2024 02:39:53 -0400 (EDT) (envelope-from sakib@darkstar.site) Received: from localhost (unknown [185.130.54.126]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by pb-smtp21.pobox.com (Postfix) with ESMTPSA id 93C3E2D94A; Tue, 16 Apr 2024 02:39:50 -0400 (EDT) (envelope-from sakib@darkstar.site) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 2249d11b-fbbc-11ee-b909-491648fe20b8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed; d=pobox.com; h=from:to:cc :subject:date:message-id:mime-version:content-transfer-encoding; s=sasl; bh=Zov7P26ovoeyz12WpNWta0tTBMaGMTqH9ir2jv5nGU8=; b=BVpW s5Fn0VKS4FkDq+TxfFi26d+8QhJ4OCqBuMdnjNUQ8HiBe0QSL7YBS2blU4fZrq9k VDiKaObLGrrMC1RKjQAX1wkVK+o5DkzSy/akmgajKlf3KEhZ0uXY6LFiFzIylKoX f2YBrxZ3PjgA+XGMFzhcQybFjNPmIj62iXab4g0= From: Sergiy Kibrik To: xen-devel@lists.xenproject.org Cc: Xenia Ragiadakou , Jan Beulich , Andrew Cooper , =?utf-8?q?Roger_Pau_Monn=C3=A9?= , Xenia Ragiadakou , Stefano Stabellini , Sergiy Kibrik Subject: [XEN PATCH v1 10/15] x86/domain: guard svm specific functions with CONFIG_SVM Date: Tue, 16 Apr 2024 09:39:47 +0300 Message-Id: <20240416063947.3469718-1-Sergiy_Kibrik@epam.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Pobox-Relay-ID: 201CACFA-FBBC-11EE-8CD0-A19503B9AAD1-90055647!pb-smtp21.pobox.com From: Xenia Ragiadakou The functions svm_load_segs() and svm_load_segs_prefetch() are AMD-V specific so guard their calls in common code with CONFIG_SVM. Since SVM depends on HVM, it can be used alone. No functional change intended. Signed-off-by: Xenia Ragiadakou Signed-off-by: Sergiy Kibrik --- xen/arch/x86/domain.c | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c index 33a2830d9d..e10e453aa1 100644 --- a/xen/arch/x86/domain.c +++ b/xen/arch/x86/domain.c @@ -1702,11 +1702,10 @@ static void load_segments(struct vcpu *n) if ( !(n->arch.flags & TF_kernel_mode) ) SWAP(gsb, gss); -#ifdef CONFIG_HVM - if ( cpu_has_svm && (uregs->fs | uregs->gs) <= 3 ) + if ( IS_ENABLED(CONFIG_SVM) && cpu_has_svm && + (uregs->fs | uregs->gs) <= 3 ) fs_gs_done = svm_load_segs(n->arch.pv.ldt_ents, LDT_VIRT_START(n), n->arch.pv.fs_base, gsb, gss); -#endif } if ( !fs_gs_done ) @@ -2019,11 +2018,10 @@ static void __context_switch(void) write_ptbase(n); -#if defined(CONFIG_PV) && defined(CONFIG_HVM) /* Prefetch the VMCB if we expect to use it later in the context switch */ - if ( cpu_has_svm && is_pv_64bit_domain(nd) && !is_idle_domain(nd) ) + if ( IS_ENABLED(CONFIG_PV) && IS_ENABLED(CONFIG_SVM) && + cpu_has_svm && is_pv_64bit_domain(nd) && !is_idle_domain(nd) ) svm_load_segs_prefetch(); -#endif if ( need_full_gdt(nd) && !per_cpu(full_gdt_loaded, cpu) ) load_full_gdt(n, cpu); From patchwork Tue Apr 16 06:41:53 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sergiy Kibrik X-Patchwork-Id: 13631393 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5FBE5C04FF6 for ; Tue, 16 Apr 2024 06:42:15 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.706651.1103935 (Exim 4.92) (envelope-from ) id 1rwcW6-0000TI-Ql; Tue, 16 Apr 2024 06:42:06 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 706651.1103935; Tue, 16 Apr 2024 06:42:06 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1rwcW6-0000TB-Nf; Tue, 16 Apr 2024 06:42:06 +0000 Received: by outflank-mailman (input) for mailman id 706651; Tue, 16 Apr 2024 06:42:05 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1rwcW5-0000T0-62 for xen-devel@lists.xenproject.org; Tue, 16 Apr 2024 06:42:05 +0000 Received: from pb-smtp1.pobox.com (pb-smtp1.pobox.com [64.147.108.70]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 6f1314a8-fbbc-11ee-b909-491648fe20b8; Tue, 16 Apr 2024 08:42:04 +0200 (CEST) Received: from pb-smtp1.pobox.com (unknown [127.0.0.1]) by pb-smtp1.pobox.com (Postfix) with ESMTP id 92CCF1D09FA; Tue, 16 Apr 2024 02:42:02 -0400 (EDT) (envelope-from sakib@darkstar.site) Received: from pb-smtp1.nyi.icgroup.com (unknown [127.0.0.1]) by pb-smtp1.pobox.com (Postfix) with ESMTP id 8893B1D09F9; Tue, 16 Apr 2024 02:42:02 -0400 (EDT) (envelope-from sakib@darkstar.site) Received: from localhost (unknown [185.130.54.126]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by pb-smtp1.pobox.com (Postfix) with ESMTPSA id 5F7661D09F7; Tue, 16 Apr 2024 02:42:01 -0400 (EDT) (envelope-from sakib@darkstar.site) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 6f1314a8-fbbc-11ee-b909-491648fe20b8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed; d=pobox.com; h=from:to:cc :subject:date:message-id:mime-version:content-transfer-encoding; s=sasl; bh=/ajn3Y23Ptep8PMnKlNl2X5WfquTjK0FGfT5lFyKeSU=; b=H51W XchhICvzFeR/uw4+9dZNAuizDXUoZJYKW02/V5+qp8Gjg/TsCTncsBvhw51yX472 Oyhh6M8zkezReYB1Cl2K8uiciuwxKO4mc5JugWBR+tictwacIpI65mmecm4h55Cs j59bwE8GKplbK5PBamJId2W20SxlbZrhWnNdxRA= From: Sergiy Kibrik To: xen-devel@lists.xenproject.org Cc: Xenia Ragiadakou , Jan Beulich , Andrew Cooper , =?utf-8?q?Roger_Pau_Monn=C3=A9?= , Xenia Ragiadakou , Stefano Stabellini , Sergiy Kibrik Subject: [XEN PATCH v1 11/15] x86/oprofile: guard svm specific symbols with CONFIG_SVM Date: Tue, 16 Apr 2024 09:41:53 +0300 Message-Id: <20240416064153.3469836-1-Sergiy_Kibrik@epam.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Pobox-Relay-ID: 6E156D0C-FBBC-11EE-A0B3-78DCEB2EC81B-90055647!pb-smtp1.pobox.com From: Xenia Ragiadakou The symbol svm_stgi_label is AMD-V specific so guard its usage in common code with CONFIG_SVM. Since SVM depends on HVM, it can be used alone. Also, use #ifdef instead of #if. No functional change intended. Signed-off-by: Xenia Ragiadakou Signed-off-by: Sergiy Kibrik Acked-by: Jan Beulich --- xen/arch/x86/oprofile/op_model_athlon.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/arch/x86/oprofile/op_model_athlon.c b/xen/arch/x86/oprofile/op_model_athlon.c index 69fd3fcc86..a9c7b87d67 100644 --- a/xen/arch/x86/oprofile/op_model_athlon.c +++ b/xen/arch/x86/oprofile/op_model_athlon.c @@ -320,7 +320,7 @@ static int cf_check athlon_check_ctrs( struct vcpu *v = current; unsigned int const nr_ctrs = model->num_counters; -#if CONFIG_HVM +#ifdef CONFIG_SVM struct cpu_user_regs *guest_regs = guest_cpu_user_regs(); if (!guest_mode(regs) && From patchwork Tue Apr 16 06:44:02 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sergiy Kibrik X-Patchwork-Id: 13631394 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id EA187C4345F for ; Tue, 16 Apr 2024 06:44:22 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.706656.1103945 (Exim 4.92) (envelope-from ) id 1rwcY7-0001Xu-9r; Tue, 16 Apr 2024 06:44:11 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 706656.1103945; Tue, 16 Apr 2024 06:44:11 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1rwcY7-0001Xn-6u; Tue, 16 Apr 2024 06:44:11 +0000 Received: by outflank-mailman (input) for mailman id 706656; Tue, 16 Apr 2024 06:44:10 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1rwcY6-0001WR-0p for xen-devel@lists.xenproject.org; Tue, 16 Apr 2024 06:44:10 +0000 Received: from pb-smtp1.pobox.com (pb-smtp1.pobox.com [64.147.108.70]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id b8a60b5e-fbbc-11ee-94a3-07e782e9044d; Tue, 16 Apr 2024 08:44:07 +0200 (CEST) Received: from pb-smtp1.pobox.com (unknown [127.0.0.1]) by pb-smtp1.pobox.com (Postfix) with ESMTP id 50C931D0A19; Tue, 16 Apr 2024 02:44:06 -0400 (EDT) (envelope-from sakib@darkstar.site) Received: from pb-smtp1.nyi.icgroup.com (unknown [127.0.0.1]) by pb-smtp1.pobox.com (Postfix) with ESMTP id 47E661D0A18; Tue, 16 Apr 2024 02:44:06 -0400 (EDT) (envelope-from sakib@darkstar.site) Received: from localhost (unknown [185.130.54.126]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by pb-smtp1.pobox.com (Postfix) with ESMTPSA id AD61A1D0A16; Tue, 16 Apr 2024 02:44:04 -0400 (EDT) (envelope-from sakib@darkstar.site) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: b8a60b5e-fbbc-11ee-94a3-07e782e9044d DKIM-Signature: v=1; a=rsa-sha256; c=relaxed; d=pobox.com; h=from:to:cc :subject:date:message-id:mime-version:content-transfer-encoding; s=sasl; bh=/uREAnj7xyFJAn9t5tyenZ0Ga3osS5TtM/XEUFZgq9E=; b=FCff Z3V7kiluft6lCJ2isGbY/1lJ/h+y7judJJfBQqI5ZpipjRsLoTKmIyouhvAIBIqM Ztyb1g2nseUcOaSZ252VLb6PES0yr0pvrXBH1Q+3kcFtO+c4v4WUVXqKemGW7hES XP6E2U67qsh0xsPuPkTbwOaCvk9YADE3p9qVbJg= From: Sergiy Kibrik To: xen-devel@lists.xenproject.org Cc: Sergiy Kibrik , Jan Beulich , Andrew Cooper , =?utf-8?q?Roger_Pau_Monn=C3=A9?= , Xenia Ragiadakou , Stefano Stabellini Subject: [XEN PATCH v1 12/15] x86/vmx: introduce helper function for vmcs macro Date: Tue, 16 Apr 2024 09:44:02 +0300 Message-Id: <20240416064402.3469959-1-Sergiy_Kibrik@epam.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Pobox-Relay-ID: B791BC6A-FBBC-11EE-A9C4-78DCEB2EC81B-90055647!pb-smtp1.pobox.com Instead of directly accessing control variables from vmcs macros let intermediate helper routine vmx_ctrl_has_feature() do it. This way we can turn all the VMX-related macros off, if building for non VT-d platform, by tweaking only a single helper's function behaviour. No functional change intended. Signed-off-by: Sergiy Kibrik --- xen/arch/x86/include/asm/hvm/vmx/vmcs.h | 89 ++++++++++++++++--------- xen/arch/x86/include/asm/hvm/vmx/vmx.h | 28 +++++--- 2 files changed, 74 insertions(+), 43 deletions(-) diff --git a/xen/arch/x86/include/asm/hvm/vmx/vmcs.h b/xen/arch/x86/include/asm/hvm/vmx/vmcs.h index a7dd2eeffc..fd197e2603 100644 --- a/xen/arch/x86/include/asm/hvm/vmx/vmcs.h +++ b/xen/arch/x86/include/asm/hvm/vmx/vmcs.h @@ -287,6 +287,11 @@ extern uint64_t vmx_tertiary_exec_control; #define VMX_VPID_INVVPID_SINGLE_CONTEXT_RETAINING_GLOBAL 0x80000000000ULL extern u64 vmx_ept_vpid_cap; +static inline bool vmx_ctrl_has_feature(uint64_t control, unsigned long feature) +{ + return control & feature; +} + #define VMX_MISC_ACTIVITY_MASK 0x000001c0 #define VMX_MISC_PROC_TRACE 0x00004000 #define VMX_MISC_CR3_TARGET 0x01ff0000 @@ -295,69 +300,89 @@ extern u64 vmx_ept_vpid_cap; #define VMX_TSC_MULTIPLIER_MAX 0xffffffffffffffffULL #define cpu_has_wbinvd_exiting \ - (vmx_secondary_exec_control & SECONDARY_EXEC_WBINVD_EXITING) + vmx_ctrl_has_feature(vmx_secondary_exec_control, \ + SECONDARY_EXEC_WBINVD_EXITING) #define cpu_has_vmx_virtualize_apic_accesses \ - (vmx_secondary_exec_control & SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES) + vmx_ctrl_has_feature(vmx_secondary_exec_control,\ + SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES) #define cpu_has_vmx_tpr_shadow \ - (vmx_cpu_based_exec_control & CPU_BASED_TPR_SHADOW) + vmx_ctrl_has_feature(vmx_cpu_based_exec_control, CPU_BASED_TPR_SHADOW) #define cpu_has_vmx_vnmi \ - (vmx_pin_based_exec_control & PIN_BASED_VIRTUAL_NMIS) + vmx_ctrl_has_feature(vmx_pin_based_exec_control, PIN_BASED_VIRTUAL_NMIS) #define cpu_has_vmx_msr_bitmap \ - (vmx_cpu_based_exec_control & CPU_BASED_ACTIVATE_MSR_BITMAP) + vmx_ctrl_has_feature(vmx_cpu_based_exec_control, \ + CPU_BASED_ACTIVATE_MSR_BITMAP) #define cpu_has_vmx_secondary_exec_control \ - (vmx_cpu_based_exec_control & CPU_BASED_ACTIVATE_SECONDARY_CONTROLS) + vmx_ctrl_has_feature(vmx_cpu_based_exec_control, \ + CPU_BASED_ACTIVATE_SECONDARY_CONTROLS) #define cpu_has_vmx_tertiary_exec_control \ - (vmx_cpu_based_exec_control & CPU_BASED_ACTIVATE_TERTIARY_CONTROLS) + vmx_ctrl_has_feature(vmx_cpu_based_exec_control, \ + CPU_BASED_ACTIVATE_TERTIARY_CONTROLS) #define cpu_has_vmx_ept \ - (vmx_secondary_exec_control & SECONDARY_EXEC_ENABLE_EPT) + vmx_ctrl_has_feature(vmx_secondary_exec_control, SECONDARY_EXEC_ENABLE_EPT) #define cpu_has_vmx_dt_exiting \ - (vmx_secondary_exec_control & SECONDARY_EXEC_DESCRIPTOR_TABLE_EXITING) + vmx_ctrl_has_feature(vmx_secondary_exec_control, \ + SECONDARY_EXEC_DESCRIPTOR_TABLE_EXITING) #define cpu_has_vmx_rdtscp \ - (vmx_secondary_exec_control & SECONDARY_EXEC_ENABLE_RDTSCP) + vmx_ctrl_has_feature(vmx_secondary_exec_control, \ + SECONDARY_EXEC_ENABLE_RDTSCP) #define cpu_has_vmx_vpid \ - (vmx_secondary_exec_control & SECONDARY_EXEC_ENABLE_VPID) + vmx_ctrl_has_feature(vmx_secondary_exec_control, \ + SECONDARY_EXEC_ENABLE_VPID) #define cpu_has_monitor_trap_flag \ - (vmx_cpu_based_exec_control & CPU_BASED_MONITOR_TRAP_FLAG) + vmx_ctrl_has_feature(vmx_cpu_based_exec_control, \ + CPU_BASED_MONITOR_TRAP_FLAG) #define cpu_has_vmx_pat \ - (vmx_vmentry_control & VM_ENTRY_LOAD_GUEST_PAT) + vmx_ctrl_has_feature(vmx_vmentry_control, VM_ENTRY_LOAD_GUEST_PAT) #define cpu_has_vmx_efer \ - (vmx_vmentry_control & VM_ENTRY_LOAD_GUEST_EFER) + vmx_ctrl_has_feature(vmx_vmentry_control, VM_ENTRY_LOAD_GUEST_EFER) #define cpu_has_vmx_unrestricted_guest \ - (vmx_secondary_exec_control & SECONDARY_EXEC_UNRESTRICTED_GUEST) + vmx_ctrl_has_feature(vmx_secondary_exec_control, \ + SECONDARY_EXEC_UNRESTRICTED_GUEST) #define vmx_unrestricted_guest(v) \ ((v)->arch.hvm.vmx.secondary_exec_control & \ SECONDARY_EXEC_UNRESTRICTED_GUEST) #define cpu_has_vmx_ple \ - (vmx_secondary_exec_control & SECONDARY_EXEC_PAUSE_LOOP_EXITING) + vmx_ctrl_has_feature(vmx_secondary_exec_control, \ + SECONDARY_EXEC_PAUSE_LOOP_EXITING) #define cpu_has_vmx_invpcid \ - (vmx_secondary_exec_control & SECONDARY_EXEC_ENABLE_INVPCID) + vmx_ctrl_has_feature(vmx_secondary_exec_control, \ + SECONDARY_EXEC_ENABLE_INVPCID) #define cpu_has_vmx_apic_reg_virt \ - (vmx_secondary_exec_control & SECONDARY_EXEC_APIC_REGISTER_VIRT) + vmx_ctrl_has_feature(vmx_secondary_exec_control, \ + SECONDARY_EXEC_APIC_REGISTER_VIRT) #define cpu_has_vmx_virtual_intr_delivery \ - (vmx_secondary_exec_control & SECONDARY_EXEC_VIRTUAL_INTR_DELIVERY) + vmx_ctrl_has_feature(vmx_secondary_exec_control, \ + SECONDARY_EXEC_VIRTUAL_INTR_DELIVERY) #define cpu_has_vmx_virtualize_x2apic_mode \ - (vmx_secondary_exec_control & SECONDARY_EXEC_VIRTUALIZE_X2APIC_MODE) + vmx_ctrl_has_feature(vmx_secondary_exec_control, \ + SECONDARY_EXEC_VIRTUALIZE_X2APIC_MODE) #define cpu_has_vmx_posted_intr_processing \ - (vmx_pin_based_exec_control & PIN_BASED_POSTED_INTERRUPT) + vmx_ctrl_has_feature(vmx_pin_based_exec_control, PIN_BASED_POSTED_INTERRUPT) #define cpu_has_vmx_vmcs_shadowing \ - (vmx_secondary_exec_control & SECONDARY_EXEC_ENABLE_VMCS_SHADOWING) + vmx_ctrl_has_feature(vmx_secondary_exec_control, \ + SECONDARY_EXEC_ENABLE_VMCS_SHADOWING) #define cpu_has_vmx_vmfunc \ - (vmx_secondary_exec_control & SECONDARY_EXEC_ENABLE_VM_FUNCTIONS) + vmx_ctrl_has_feature(vmx_secondary_exec_control, \ + SECONDARY_EXEC_ENABLE_VM_FUNCTIONS) #define cpu_has_vmx_virt_exceptions \ - (vmx_secondary_exec_control & SECONDARY_EXEC_ENABLE_VIRT_EXCEPTIONS) + vmx_ctrl_has_feature(vmx_secondary_exec_control, \ + SECONDARY_EXEC_ENABLE_VIRT_EXCEPTIONS) #define cpu_has_vmx_pml \ - (vmx_secondary_exec_control & SECONDARY_EXEC_ENABLE_PML) + vmx_ctrl_has_feature(vmx_secondary_exec_control, SECONDARY_EXEC_ENABLE_PML) #define cpu_has_vmx_mpx \ - ((vmx_vmexit_control & VM_EXIT_CLEAR_BNDCFGS) && \ - (vmx_vmentry_control & VM_ENTRY_LOAD_BNDCFGS)) + (vmx_ctrl_has_feature(vmx_vmexit_control, VM_EXIT_CLEAR_BNDCFGS) && \ + vmx_ctrl_has_feature(vmx_vmentry_control, VM_ENTRY_LOAD_BNDCFGS)) #define cpu_has_vmx_xsaves \ - (vmx_secondary_exec_control & SECONDARY_EXEC_XSAVES) + vmx_ctrl_has_feature(vmx_secondary_exec_control, SECONDARY_EXEC_XSAVES) #define cpu_has_vmx_tsc_scaling \ - (vmx_secondary_exec_control & SECONDARY_EXEC_TSC_SCALING) + vmx_ctrl_has_feature(vmx_secondary_exec_control, SECONDARY_EXEC_TSC_SCALING) #define cpu_has_vmx_bus_lock_detection \ - (vmx_secondary_exec_control & SECONDARY_EXEC_BUS_LOCK_DETECTION) + vmx_ctrl_has_feature(vmx_secondary_exec_control, \ + SECONDARY_EXEC_BUS_LOCK_DETECTION) #define cpu_has_vmx_notify_vm_exiting \ - (vmx_secondary_exec_control & SECONDARY_EXEC_NOTIFY_VM_EXITING) + vmx_ctrl_has_feature(vmx_secondary_exec_control, \ + SECONDARY_EXEC_NOTIFY_VM_EXITING) #define VMCS_RID_TYPE_MASK 0x80000000U @@ -381,7 +406,7 @@ extern u64 vmx_ept_vpid_cap; extern u64 vmx_basic_msr; #define cpu_has_vmx_ins_outs_instr_info \ - (!!(vmx_basic_msr & VMX_BASIC_INS_OUT_INFO)) + (!!vmx_ctrl_has_feature(vmx_basic_msr, VMX_BASIC_INS_OUT_INFO)) /* Guest interrupt status */ #define VMX_GUEST_INTR_STATUS_SUBFIELD_BITMASK 0x0FF diff --git a/xen/arch/x86/include/asm/hvm/vmx/vmx.h b/xen/arch/x86/include/asm/hvm/vmx/vmx.h index 8ffab7d94c..587772dc51 100644 --- a/xen/arch/x86/include/asm/hvm/vmx/vmx.h +++ b/xen/arch/x86/include/asm/hvm/vmx/vmx.h @@ -279,17 +279,22 @@ typedef union cr_access_qual { extern uint8_t posted_intr_vector; #define cpu_has_vmx_ept_exec_only_supported \ - (vmx_ept_vpid_cap & VMX_EPT_EXEC_ONLY_SUPPORTED) + vmx_ctrl_has_feature(vmx_ept_vpid_cap, VMX_EPT_EXEC_ONLY_SUPPORTED) #define cpu_has_vmx_ept_wl4_supported \ - (vmx_ept_vpid_cap & VMX_EPT_WALK_LENGTH_4_SUPPORTED) -#define cpu_has_vmx_ept_mt_uc (vmx_ept_vpid_cap & VMX_EPT_MEMORY_TYPE_UC) -#define cpu_has_vmx_ept_mt_wb (vmx_ept_vpid_cap & VMX_EPT_MEMORY_TYPE_WB) -#define cpu_has_vmx_ept_2mb (vmx_ept_vpid_cap & VMX_EPT_SUPERPAGE_2MB) -#define cpu_has_vmx_ept_1gb (vmx_ept_vpid_cap & VMX_EPT_SUPERPAGE_1GB) -#define cpu_has_vmx_ept_ad (vmx_ept_vpid_cap & VMX_EPT_AD_BIT) + vmx_ctrl_has_feature(vmx_ept_vpid_cap, VMX_EPT_WALK_LENGTH_4_SUPPORTED) +#define cpu_has_vmx_ept_mt_uc \ + vmx_ctrl_has_feature(vmx_ept_vpid_cap, VMX_EPT_MEMORY_TYPE_UC) +#define cpu_has_vmx_ept_mt_wb \ + vmx_ctrl_has_feature(vmx_ept_vpid_cap, VMX_EPT_MEMORY_TYPE_WB) +#define cpu_has_vmx_ept_2mb \ + vmx_ctrl_has_feature(vmx_ept_vpid_cap, VMX_EPT_SUPERPAGE_2MB) +#define cpu_has_vmx_ept_1gb \ + vmx_ctrl_has_feature(vmx_ept_vpid_cap, VMX_EPT_SUPERPAGE_1GB) +#define cpu_has_vmx_ept_ad \ + vmx_ctrl_has_feature(vmx_ept_vpid_cap, VMX_EPT_AD_BIT) #define cpu_has_vmx_ept_invept_single_context \ - (vmx_ept_vpid_cap & VMX_EPT_INVEPT_SINGLE_CONTEXT) + vmx_ctrl_has_feature(vmx_ept_vpid_cap, VMX_EPT_INVEPT_SINGLE_CONTEXT) #define EPT_2MB_SHIFT 16 #define EPT_1GB_SHIFT 17 @@ -300,11 +305,12 @@ extern uint8_t posted_intr_vector; #define INVEPT_ALL_CONTEXT 2 #define cpu_has_vmx_vpid_invvpid_individual_addr \ - (vmx_ept_vpid_cap & VMX_VPID_INVVPID_INDIVIDUAL_ADDR) + vmx_ctrl_has_feature(vmx_ept_vpid_cap, VMX_VPID_INVVPID_INDIVIDUAL_ADDR) #define cpu_has_vmx_vpid_invvpid_single_context \ - (vmx_ept_vpid_cap & VMX_VPID_INVVPID_SINGLE_CONTEXT) + vmx_ctrl_has_feature(vmx_ept_vpid_cap, VMX_VPID_INVVPID_SINGLE_CONTEXT) #define cpu_has_vmx_vpid_invvpid_single_context_retaining_global \ - (vmx_ept_vpid_cap & VMX_VPID_INVVPID_SINGLE_CONTEXT_RETAINING_GLOBAL) + vmx_ctrl_has_feature(vmx_ept_vpid_cap, \ + VMX_VPID_INVVPID_SINGLE_CONTEXT_RETAINING_GLOBAL) #define INVVPID_INDIVIDUAL_ADDR 0 #define INVVPID_SINGLE_CONTEXT 1 From patchwork Tue Apr 16 06:46:06 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sergiy Kibrik X-Patchwork-Id: 13631404 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0EE51C4345F for ; Tue, 16 Apr 2024 06:46:21 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.706661.1103955 (Exim 4.92) (envelope-from ) id 1rwca5-0003K9-L2; Tue, 16 Apr 2024 06:46:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 706661.1103955; Tue, 16 Apr 2024 06:46:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1rwca5-0003K2-IB; Tue, 16 Apr 2024 06:46:13 +0000 Received: by outflank-mailman (input) for mailman id 706661; Tue, 16 Apr 2024 06:46:12 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1rwca4-0003Jw-5T for xen-devel@lists.xenproject.org; Tue, 16 Apr 2024 06:46:12 +0000 Received: from pb-smtp1.pobox.com (pb-smtp1.pobox.com [64.147.108.70]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 01f140a4-fbbd-11ee-94a3-07e782e9044d; Tue, 16 Apr 2024 08:46:10 +0200 (CEST) Received: from pb-smtp1.pobox.com (unknown [127.0.0.1]) by pb-smtp1.pobox.com (Postfix) with ESMTP id 37F031D0A31; Tue, 16 Apr 2024 02:46:09 -0400 (EDT) (envelope-from sakib@darkstar.site) Received: from pb-smtp1.nyi.icgroup.com (unknown [127.0.0.1]) by pb-smtp1.pobox.com (Postfix) with ESMTP id 2FD301D0A30; Tue, 16 Apr 2024 02:46:09 -0400 (EDT) (envelope-from sakib@darkstar.site) Received: from localhost (unknown [185.130.54.126]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by pb-smtp1.pobox.com (Postfix) with ESMTPSA id 495981D0A2F; Tue, 16 Apr 2024 02:46:08 -0400 (EDT) (envelope-from sakib@darkstar.site) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 01f140a4-fbbd-11ee-94a3-07e782e9044d DKIM-Signature: v=1; a=rsa-sha256; c=relaxed; d=pobox.com; h=from:to:cc :subject:date:message-id:mime-version:content-transfer-encoding; s=sasl; bh=KaEzanhccZjO7IvRYu+AvlrfcyDTCZszIXSID2e2aqc=; b=o1Yd N2xvtIDjh0Zts+MV4iuAFUTOxCRn6dUcNNwWVWW8c8dWjRdQx01jkhWWiRhkK8W0 CaYvUjgqYrH7AtrjCKeEp9WpRGdl6hJbxQPK5okWuo54ocaZB8+lmrX4hYg5XITN hQFa1IGPx5GGe6GHeGLjlWZzBtCAwfZDbp0lwL8= From: Sergiy Kibrik To: xen-devel@lists.xenproject.org Cc: Xenia Ragiadakou , Jan Beulich , Andrew Cooper , =?utf-8?q?Roger_Pau_Monn=C3=A9?= , Xenia Ragiadakou , Stefano Stabellini , Sergiy Kibrik Subject: [XEN PATCH v1 13/15] x86: wire cpu_has_{svm/vmx}_* to false when svm/vmx not enabled Date: Tue, 16 Apr 2024 09:46:06 +0300 Message-Id: <20240416064606.3470052-1-Sergiy_Kibrik@epam.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Pobox-Relay-ID: 013B9CD2-FBBD-11EE-8A6E-78DCEB2EC81B-90055647!pb-smtp1.pobox.com From: Xenia Ragiadakou To be able to use cpu_has_{svm/vmx}_* macros in common code without enclosing them inside #ifdef guards when the respective virtualization technology is not enabled, define corresponding helper routines as false when not applicable. No functional change intended. Signed-off-by: Xenia Ragiadakou Signed-off-by: Sergiy Kibrik --- xen/arch/x86/include/asm/hvm/svm/svm.h | 8 ++++++++ xen/arch/x86/include/asm/hvm/vmx/vmcs.h | 7 +++++++ 2 files changed, 15 insertions(+) diff --git a/xen/arch/x86/include/asm/hvm/svm/svm.h b/xen/arch/x86/include/asm/hvm/svm/svm.h index 4eeeb25da9..7e8cdb4a27 100644 --- a/xen/arch/x86/include/asm/hvm/svm/svm.h +++ b/xen/arch/x86/include/asm/hvm/svm/svm.h @@ -38,10 +38,18 @@ extern u32 svm_feature_flags; #define SVM_FEATURE_SSS 19 /* NPT Supervisor Shadow Stacks */ #define SVM_FEATURE_SPEC_CTRL 20 /* MSR_SPEC_CTRL virtualisation */ +#ifdef CONFIG_SVM static inline bool cpu_has_svm_feature(unsigned int feat) { return svm_feature_flags & (1u << feat); } +#else +static inline bool cpu_has_svm_feature(unsigned int feat) +{ + return false; +} +#endif + #define cpu_has_svm_npt cpu_has_svm_feature(SVM_FEATURE_NPT) #define cpu_has_svm_lbrv cpu_has_svm_feature(SVM_FEATURE_LBRV) #define cpu_has_svm_svml cpu_has_svm_feature(SVM_FEATURE_SVML) diff --git a/xen/arch/x86/include/asm/hvm/vmx/vmcs.h b/xen/arch/x86/include/asm/hvm/vmx/vmcs.h index fd197e2603..2d927d3100 100644 --- a/xen/arch/x86/include/asm/hvm/vmx/vmcs.h +++ b/xen/arch/x86/include/asm/hvm/vmx/vmcs.h @@ -287,10 +287,17 @@ extern uint64_t vmx_tertiary_exec_control; #define VMX_VPID_INVVPID_SINGLE_CONTEXT_RETAINING_GLOBAL 0x80000000000ULL extern u64 vmx_ept_vpid_cap; +#ifdef CONFIG_VMX static inline bool vmx_ctrl_has_feature(uint64_t control, unsigned long feature) { return control & feature; } +#else +static inline bool vmx_ctrl_has_feature(uint64_t control, unsigned long feature) +{ + return false; +} +#endif #define VMX_MISC_ACTIVITY_MASK 0x000001c0 #define VMX_MISC_PROC_TRACE 0x00004000 From patchwork Tue Apr 16 06:48:09 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sergiy Kibrik X-Patchwork-Id: 13631405 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B42D0C4345F for ; Tue, 16 Apr 2024 06:48:24 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.706666.1103965 (Exim 4.92) (envelope-from ) id 1rwcc3-0003u4-0K; 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Tue, 16 Apr 2024 02:48:12 -0400 (EDT) (envelope-from sakib@darkstar.site) Received: from pb-smtp1.nyi.icgroup.com (unknown [127.0.0.1]) by pb-smtp1.pobox.com (Postfix) with ESMTP id ED29B1D0A8F; Tue, 16 Apr 2024 02:48:11 -0400 (EDT) (envelope-from sakib@darkstar.site) Received: from localhost (unknown [185.130.54.126]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by pb-smtp1.pobox.com (Postfix) with ESMTPSA id 4D6401D0A8E; Tue, 16 Apr 2024 02:48:11 -0400 (EDT) (envelope-from sakib@darkstar.site) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 4b473517-fbbd-11ee-b909-491648fe20b8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed; d=pobox.com; h=from:to:cc :subject:date:message-id:mime-version:content-transfer-encoding; s=sasl; bh=rJcfhoO3HyeAGJ2fKAISiP6yxeb4xPfPNnImBL6CMFY=; b=BfZO mIY8TRI7WBIofuwIMB20QkXLnVeBqzdmyUi8MtCpB505WKPFxUHFlU49UJVgGm9k w7qHtfyZvTViGkAcBYCBi3t9TlJuqYVLGi7dzWfbcxhiP+GwqN5GraHjqSaWlaUW YCvfkTgFq98jvdoggtmNwGsTUgsbQ81pJDOOsRE= From: Sergiy Kibrik To: xen-devel@lists.xenproject.org Cc: Xenia Ragiadakou , Jan Beulich , Andrew Cooper , =?utf-8?q?Roger_Pau_Monn=C3=A9?= , George Dunlap , Julien Grall , Stefano Stabellini , Xenia Ragiadakou , Sergiy Kibrik Subject: [XEN PATCH v1 14/15] x86/ioreq: guard VIO_realmode_completion with CONFIG_VMX Date: Tue, 16 Apr 2024 09:48:09 +0300 Message-Id: <20240416064809.3470155-1-Sergiy_Kibrik@epam.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Pobox-Relay-ID: 4A8EDC8C-FBBD-11EE-840E-78DCEB2EC81B-90055647!pb-smtp1.pobox.com From: Xenia Ragiadakou VIO_realmode_completion is specific to vmx realmode, so guard the completion handling code with CONFIG_VMX. Also, guard VIO_realmode_completion itself by CONFIG_VMX, instead of generic CONFIG_X86. No functional change intended. Signed-off-by: Xenia Ragiadakou Signed-off-by: Sergiy Kibrik --- xen/arch/x86/hvm/emulate.c | 2 ++ xen/arch/x86/hvm/ioreq.c | 2 ++ xen/include/xen/sched.h | 2 +- 3 files changed, 5 insertions(+), 1 deletion(-) diff --git a/xen/arch/x86/hvm/emulate.c b/xen/arch/x86/hvm/emulate.c index ab1bc51683..d60b1f6f4d 100644 --- a/xen/arch/x86/hvm/emulate.c +++ b/xen/arch/x86/hvm/emulate.c @@ -2667,7 +2667,9 @@ static int _hvm_emulate_one(struct hvm_emulate_ctxt *hvmemul_ctxt, break; case VIO_mmio_completion: +#ifdef CONFIG_VMX case VIO_realmode_completion: +#endif BUILD_BUG_ON(sizeof(hvio->mmio_insn) < sizeof(hvmemul_ctxt->insn_buf)); hvio->mmio_insn_bytes = hvmemul_ctxt->insn_buf_bytes; memcpy(hvio->mmio_insn, hvmemul_ctxt->insn_buf, hvio->mmio_insn_bytes); diff --git a/xen/arch/x86/hvm/ioreq.c b/xen/arch/x86/hvm/ioreq.c index 4eb7a70182..b37bbd660b 100644 --- a/xen/arch/x86/hvm/ioreq.c +++ b/xen/arch/x86/hvm/ioreq.c @@ -33,6 +33,7 @@ bool arch_vcpu_ioreq_completion(enum vio_completion completion) { switch ( completion ) { +#ifdef CONFIG_VMX case VIO_realmode_completion: { struct hvm_emulate_ctxt ctxt; @@ -43,6 +44,7 @@ bool arch_vcpu_ioreq_completion(enum vio_completion completion) break; } +#endif default: ASSERT_UNREACHABLE(); diff --git a/xen/include/xen/sched.h b/xen/include/xen/sched.h index 132b841995..50a58fe428 100644 --- a/xen/include/xen/sched.h +++ b/xen/include/xen/sched.h @@ -152,7 +152,7 @@ enum vio_completion { VIO_no_completion, VIO_mmio_completion, VIO_pio_completion, -#ifdef CONFIG_X86 +#ifdef CONFIG_VMX VIO_realmode_completion, #endif }; From patchwork Tue Apr 16 06:50:12 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sergiy Kibrik X-Patchwork-Id: 13631406 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7D554C04FF6 for ; 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a=rsa-sha256; c=relaxed; d=pobox.com; h=from:to:cc :subject:date:message-id:mime-version:content-transfer-encoding; s=sasl; bh=73oB9cz+rgWGRmiSEPuj3snqYNDtbVDV4nr/Z0x8dhI=; b=rcyS Wvj70ZB752KV8xYG/QpWo3ROyuoxrE0D+TlIsXNauNbGy+1n9dT+phE2w1F+005H hFQV6EoSLnw8DRmdvY4inLaMLwUOKoyE21x0oyw/gid7go+HdMClyYTqMLHsmEtB +D6HP+XuYXA5DcWEm3/uKTsybRMUEJtLvEwpukk= From: Sergiy Kibrik To: xen-devel@lists.xenproject.org Cc: Xenia Ragiadakou , Jan Beulich , Andrew Cooper , =?utf-8?q?Roger_Pau_Monn=C3=A9?= , Xenia Ragiadakou , Stefano Stabellini , Sergiy Kibrik Subject: [XEN PATCH v1 15/15] x86/hvm: make AMD-V and Intel VT-x support configurable Date: Tue, 16 Apr 2024 09:50:12 +0300 Message-Id: <20240416065012.3470263-1-Sergiy_Kibrik@epam.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Pobox-Relay-ID: 9407D292-FBBD-11EE-B8B3-78DCEB2EC81B-90055647!pb-smtp1.pobox.com From: Xenia Ragiadakou Provide the user with configuration control over the cpu virtualization support in Xen by making SVM and VMX options user selectable. To preserve the current default behavior, both options depend on HVM and default to Y. To prevent users from unknowingly disabling virtualization support, make the controls user selectable only if EXPERT is enabled. Also make INTEL_IOMMU/AMD_IOMMU options dependant on VMX/SVM options. No functional change intended. Signed-off-by: Xenia Ragiadakou Signed-off-by: Sergiy Kibrik --- xen/arch/x86/Kconfig | 18 ++++++++++++++++-- xen/drivers/passthrough/Kconfig | 4 ++-- 2 files changed, 18 insertions(+), 4 deletions(-) diff --git a/xen/arch/x86/Kconfig b/xen/arch/x86/Kconfig index 6f06d3baa5..98a6f8d877 100644 --- a/xen/arch/x86/Kconfig +++ b/xen/arch/x86/Kconfig @@ -121,10 +121,24 @@ config HVM If unsure, say Y. config SVM - def_bool y if HVM + bool "AMD-V" if EXPERT + depends on HVM + default y + help + Enables virtual machine extensions on platforms that implement the + AMD Virtualization Technology (AMD-V). + If your system includes a processor with AMD-V support, say Y. + If in doubt, say Y. config VMX - def_bool y if HVM + bool "Intel VT-x" if EXPERT + depends on HVM + default y + help + Enables virtual machine extensions on platforms that implement the + Intel Virtualization Technology (Intel VT-x). + If your system includes a processor with Intel VT-x support, say Y. + If in doubt, say Y. config XEN_SHSTK bool "Supervisor Shadow Stacks" diff --git a/xen/drivers/passthrough/Kconfig b/xen/drivers/passthrough/Kconfig index 864fcf3b0c..5f53639c2d 100644 --- a/xen/drivers/passthrough/Kconfig +++ b/xen/drivers/passthrough/Kconfig @@ -39,7 +39,7 @@ endif config AMD_IOMMU bool "AMD IOMMU" if EXPERT - depends on X86 + depends on X86 && SVM default y help Enables I/O virtualization on platforms that implement the @@ -51,7 +51,7 @@ config AMD_IOMMU config INTEL_IOMMU bool "Intel VT-d" if EXPERT - depends on X86 + depends on X86 && VMX default y help Enables I/O virtualization on platforms that implement the