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Tue, 16 Apr 2024 15:18:56 +0000 From: "Peng Fan (OSS)" Date: Tue, 16 Apr 2024 23:26:37 +0800 Subject: [PATCH 01/11] arm64: dts: imx93: add dma support for lpi2c[1..8] Message-Id: <20240416-imx93-dts-4-13-v1-1-da8ac02e8413@nxp.com> References: <20240416-imx93-dts-4-13-v1-0-da8ac02e8413@nxp.com> In-Reply-To: <20240416-imx93-dts-4-13-v1-0-da8ac02e8413@nxp.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam Cc: devicetree@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Peng Fan X-Mailer: b4 0.12.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1713281223; l=2626; i=peng.fan@nxp.com; s=20230812; h=from:subject:message-id; bh=5oF/x8PxcPbwIEPx68AVDmK3DdSghfjUDifVdGG1b3M=; b=YIIGhFctfj2jzStz9MY2S+slgtBqrD2cO3DF8ZbppxW2fOrjBdfeaG0bIId4JKpUS/sSzgO2h D8dVwEdY9WWCZ7Q9+fENnYcMVovDhUvXcxR19LAbYNO0nUENz0tP5Gw X-Developer-Key: i=peng.fan@nxp.com; a=ed25519; pk=I4sJg7atIT1g63H7bb5lDRGR2gJW14RKDD0wFL8TT1g= X-ClientProxiedBy: SI2PR04CA0012.apcprd04.prod.outlook.com (2603:1096:4:197::14) To DU0PR04MB9417.eurprd04.prod.outlook.com (2603:10a6:10:358::11) Precedence: bulk X-Mailing-List: imx@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DU0PR04MB9417:EE_|VI1PR04MB7039:EE_ X-MS-Office365-Filtering-Correlation-Id: d213a94e-3c66-49f8-16d2-08dc5e28887a X-MS-Exchange-SharedMailbox-RoutingAgent-Processed: True X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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Signed-off-by: Peng Fan --- arch/arm64/boot/dts/freescale/imx93.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx93.dtsi b/arch/arm64/boot/dts/freescale/imx93.dtsi index b8ef9b938856..5c08e8787989 100644 --- a/arch/arm64/boot/dts/freescale/imx93.dtsi +++ b/arch/arm64/boot/dts/freescale/imx93.dtsi @@ -316,6 +316,8 @@ lpi2c1: i2c@44340000 { clocks = <&clk IMX93_CLK_LPI2C1_GATE>, <&clk IMX93_CLK_BUS_AON>; clock-names = "per", "ipg"; + dmas = <&edma1 7 0 0>, <&edma1 8 0 1>; + dma-names = "tx", "rx"; status = "disabled"; }; @@ -328,6 +330,8 @@ lpi2c2: i2c@44350000 { clocks = <&clk IMX93_CLK_LPI2C2_GATE>, <&clk IMX93_CLK_BUS_AON>; clock-names = "per", "ipg"; + dmas = <&edma1 9 0 0>, <&edma1 10 0 1>; + dma-names = "tx", "rx"; status = "disabled"; }; @@ -692,6 +696,8 @@ lpi2c3: i2c@42530000 { clocks = <&clk IMX93_CLK_LPI2C3_GATE>, <&clk IMX93_CLK_BUS_WAKEUP>; clock-names = "per", "ipg"; + dmas = <&edma2 8 0 0>, <&edma2 9 0 1>; + dma-names = "tx", "rx"; status = "disabled"; }; @@ -704,6 +710,8 @@ lpi2c4: i2c@42540000 { clocks = <&clk IMX93_CLK_LPI2C4_GATE>, <&clk IMX93_CLK_BUS_WAKEUP>; clock-names = "per", "ipg"; + dmas = <&edma2 10 0 0>, <&edma2 11 0 1>; + dma-names = "tx", "rx"; status = "disabled"; }; @@ -881,6 +889,8 @@ lpi2c5: i2c@426b0000 { clocks = <&clk IMX93_CLK_LPI2C5_GATE>, <&clk IMX93_CLK_BUS_WAKEUP>; clock-names = "per", "ipg"; + dmas = <&edma2 71 0 0>, <&edma2 72 0 1>; + dma-names = "tx", "rx"; status = "disabled"; }; @@ -893,6 +903,8 @@ lpi2c6: i2c@426c0000 { clocks = <&clk IMX93_CLK_LPI2C6_GATE>, <&clk IMX93_CLK_BUS_WAKEUP>; clock-names = "per", "ipg"; + dmas = <&edma2 73 0 0>, <&edma2 74 0 1>; + dma-names = "tx", "rx"; status = "disabled"; }; @@ -905,6 +917,8 @@ lpi2c7: i2c@426d0000 { clocks = <&clk IMX93_CLK_LPI2C7_GATE>, <&clk IMX93_CLK_BUS_WAKEUP>; clock-names = "per", "ipg"; + dmas = <&edma2 75 0 0>, <&edma2 76 0 1>; + dma-names = "tx", "rx"; status = "disabled"; }; @@ -917,6 +931,8 @@ lpi2c8: i2c@426e0000 { clocks = <&clk IMX93_CLK_LPI2C8_GATE>, <&clk IMX93_CLK_BUS_WAKEUP>; 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Tue, 16 Apr 2024 15:19:00 +0000 From: "Peng Fan (OSS)" Date: Tue, 16 Apr 2024 23:26:38 +0800 Subject: [PATCH 02/11] arm64: dts: imx93: add dma support for lpspi[1..8] Message-Id: <20240416-imx93-dts-4-13-v1-2-da8ac02e8413@nxp.com> References: <20240416-imx93-dts-4-13-v1-0-da8ac02e8413@nxp.com> In-Reply-To: <20240416-imx93-dts-4-13-v1-0-da8ac02e8413@nxp.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam Cc: devicetree@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Peng Fan X-Mailer: b4 0.12.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1713281223; l=2630; i=peng.fan@nxp.com; s=20230812; h=from:subject:message-id; bh=eBviQjjFgEN5lnYsEmqMS0rKXbfK975Zf9b90AIzx3k=; b=iV6D7qnDYiRSplSNenwoiw9hA6BNf+LaFIysCTNHARbKUZ1k9A65FoKbrmxHQkKwIykCv20HC 0II/ANZ7o60BwEexubp00KCG6wMUNcGTsh62FztyMBlIB0bTE3S0Oeb X-Developer-Key: i=peng.fan@nxp.com; a=ed25519; pk=I4sJg7atIT1g63H7bb5lDRGR2gJW14RKDD0wFL8TT1g= X-ClientProxiedBy: SI2PR04CA0012.apcprd04.prod.outlook.com (2603:1096:4:197::14) To DU0PR04MB9417.eurprd04.prod.outlook.com (2603:10a6:10:358::11) Precedence: bulk X-Mailing-List: imx@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DU0PR04MB9417:EE_|AS8PR04MB8183:EE_ X-MS-Office365-Filtering-Correlation-Id: 4c33ecd6-43f8-4f73-7d72-08dc5e288ac9 X-MS-Exchange-SharedMailbox-RoutingAgent-Processed: True X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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clock-names = "per", "ipg"; + dmas = <&edma1 11 0 0>, <&edma1 12 0 1>; + dma-names = "tx", "rx"; status = "disabled"; }; @@ -356,6 +358,8 @@ lpspi2: spi@44370000 { clocks = <&clk IMX93_CLK_LPSPI2_GATE>, <&clk IMX93_CLK_BUS_AON>; clock-names = "per", "ipg"; + dmas = <&edma1 13 0 0>, <&edma1 14 0 1>; + dma-names = "tx", "rx"; status = "disabled"; }; @@ -724,6 +728,8 @@ lpspi3: spi@42550000 { clocks = <&clk IMX93_CLK_LPSPI3_GATE>, <&clk IMX93_CLK_BUS_WAKEUP>; clock-names = "per", "ipg"; + dmas = <&edma2 12 0 0>, <&edma2 13 0 1>; + dma-names = "tx", "rx"; status = "disabled"; }; @@ -736,6 +742,8 @@ lpspi4: spi@42560000 { clocks = <&clk IMX93_CLK_LPSPI4_GATE>, <&clk IMX93_CLK_BUS_WAKEUP>; clock-names = "per", "ipg"; + dmas = <&edma2 14 0 0>, <&edma2 15 0 1>; + dma-names = "tx", "rx"; status = "disabled"; }; @@ -945,6 +953,8 @@ lpspi5: spi@426f0000 { clocks = <&clk IMX93_CLK_LPSPI5_GATE>, <&clk IMX93_CLK_BUS_WAKEUP>; clock-names = "per", "ipg"; + dmas = <&edma2 79 0 0>, <&edma2 80 0 1>; + dma-names = "tx", "rx"; status = "disabled"; }; @@ -957,6 +967,8 @@ lpspi6: spi@42700000 { clocks = <&clk IMX93_CLK_LPSPI6_GATE>, <&clk IMX93_CLK_BUS_WAKEUP>; clock-names = "per", "ipg"; + dmas = <&edma2 81 0 0>, <&edma2 82 0 1>; + dma-names = "tx", "rx"; status = "disabled"; }; @@ -969,6 +981,8 @@ lpspi7: spi@42710000 { clocks = <&clk IMX93_CLK_LPSPI7_GATE>, <&clk IMX93_CLK_BUS_WAKEUP>; clock-names = "per", "ipg"; + dmas = <&edma2 83 0 0>, <&edma2 84 0 1>; + dma-names = "tx", "rx"; status = "disabled"; }; @@ -981,6 +995,8 @@ lpspi8: spi@42720000 { clocks = <&clk IMX93_CLK_LPSPI8_GATE>, <&clk IMX93_CLK_BUS_WAKEUP>; clock-names = "per", "ipg"; + dmas = <&edma2 85 0 0>, <&edma2 86 0 1>; + dma-names = "tx", "rx"; status = "disabled"; }; From patchwork Tue Apr 16 15:26:39 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Peng Fan (OSS)" X-Patchwork-Id: 13632045 Received: from EUR03-AM7-obe.outbound.protection.outlook.com (mail-am7eur03on2044.outbound.protection.outlook.com [40.107.105.44]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E3607130E27 for ; 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Config SDHC1 clock 400MHz to support eMMC HS400ES mode 2. The original usdhc2 and usdhc3 root clock is 200MHz. Then WIFI on usdhc3 at SDR104 mode can work under 200MHz. But if imx93 work under Low Drive mode, the usdhc3 pad signal is not good under 200MHz, SDR104 mode can't work stable. Need to downgrade to 133MHz to let WIFI work stable. To cover all the cases, for Norminal Drive mode, keep usdhc root at 400MHz, then card(SD/wifi) can work at SDR104 mode under 200MHz to get the best performance. For Low Drive mode, bootloader need override usdhc root clock to 266MHz, and the card(SD/wifi) work at SDR104 mode under 133MHz, can work stable. Reviewed-by: Sherry Sun Signed-off-by: Haibo Chen Signed-off-by: Peng Fan --- arch/arm64/boot/dts/freescale/imx93.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx93.dtsi b/arch/arm64/boot/dts/freescale/imx93.dtsi index 00f2526c4011..1c5e2049a37a 100644 --- a/arch/arm64/boot/dts/freescale/imx93.dtsi +++ b/arch/arm64/boot/dts/freescale/imx93.dtsi @@ -1017,6 +1017,9 @@ usdhc1: mmc@42850000 { <&clk IMX93_CLK_WAKEUP_AXI>, <&clk IMX93_CLK_USDHC1_GATE>; clock-names = "ipg", "ahb", "per"; + assigned-clocks = <&clk IMX93_CLK_USDHC1>; + assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1>; + assigned-clock-rates = <400000000>; bus-width = <8>; fsl,tuning-start-tap = <1>; fsl,tuning-step = <2>; @@ -1031,6 +1034,9 @@ usdhc2: mmc@42860000 { <&clk IMX93_CLK_WAKEUP_AXI>, <&clk IMX93_CLK_USDHC2_GATE>; clock-names = "ipg", "ahb", "per"; + assigned-clocks = <&clk IMX93_CLK_USDHC2>; + assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1>; + assigned-clock-rates = <400000000>; bus-width = <4>; fsl,tuning-start-tap = <1>; fsl,tuning-step = <2>; @@ -1094,6 +1100,9 @@ usdhc3: mmc@428b0000 { <&clk IMX93_CLK_WAKEUP_AXI>, <&clk IMX93_CLK_USDHC3_GATE>; clock-names = "ipg", "ahb", "per"; + assigned-clocks = <&clk IMX93_CLK_USDHC3>; + assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1>; + assigned-clock-rates = <400000000>; bus-width = <4>; fsl,tuning-start-tap = <1>; fsl,tuning-step = <2>; From patchwork Tue Apr 16 15:26:40 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Peng Fan (OSS)" X-Patchwork-Id: 13632046 Received: from EUR03-AM7-obe.outbound.protection.outlook.com (mail-am7eur03on2044.outbound.protection.outlook.com [40.107.105.44]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E5C03130E27 for ; Tue, 16 Apr 2024 15:19:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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Signed-off-by: Peng Fan --- arch/arm64/boot/dts/freescale/imx93.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx93.dtsi b/arch/arm64/boot/dts/freescale/imx93.dtsi index 1c5e2049a37a..b09014b9a719 100644 --- a/arch/arm64/boot/dts/freescale/imx93.dtsi +++ b/arch/arm64/boot/dts/freescale/imx93.dtsi @@ -1067,6 +1067,8 @@ fec: ethernet@42890000 { fsl,num-tx-queues = <3>; fsl,num-rx-queues = <3>; fsl,stop-mode = <&wakeupmix_gpr 0x0c 1>; + nvmem-cells = <ð_mac1>; + nvmem-cell-names = "mac-address"; status = "disabled"; }; @@ -1176,6 +1178,11 @@ ocotp: efuse@47510000 { reg = <0x47510000 0x10000>; #address-cells = <1>; #size-cells = <1>; + + eth_mac1: mac-address@4ec { + reg = <0x4ec 0x6>; + }; + }; s4muap: mailbox@47520000 { From patchwork Tue Apr 16 15:26:41 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Peng Fan (OSS)" X-Patchwork-Id: 13632047 Received: from EUR03-AM7-obe.outbound.protection.outlook.com (mail-am7eur03on2047.outbound.protection.outlook.com [40.107.105.47]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 24C0513280D for ; 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Signed-off-by: Peng Fan --- arch/arm64/boot/dts/freescale/imx93.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx93.dtsi b/arch/arm64/boot/dts/freescale/imx93.dtsi index b09014b9a719..a83ac1bb1e41 100644 --- a/arch/arm64/boot/dts/freescale/imx93.dtsi +++ b/arch/arm64/boot/dts/freescale/imx93.dtsi @@ -1091,6 +1091,8 @@ eqos: ethernet@428a0000 { assigned-clock-rates = <100000000>, <250000000>; intf_mode = <&wakeupmix_gpr 0x28>; snps,clk-csr = <0>; + nvmem-cells = <ð_mac2>; + nvmem-cell-names = "mac-address"; status = "disabled"; }; @@ -1183,6 +1185,10 @@ eth_mac1: mac-address@4ec { reg = <0x4ec 0x6>; }; + eth_mac2: mac-address@4f2 { + reg = <0x4f2 0x6>; + }; + }; s4muap: mailbox@47520000 { From patchwork Tue Apr 16 15:26:42 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Peng Fan (OSS)" X-Patchwork-Id: 13632048 Received: from EUR03-AM7-obe.outbound.protection.outlook.com (mail-am7eur03on2081.outbound.protection.outlook.com [40.107.105.81]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EC3B21332A0 for ; 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Also correct vdev1vring node name to align with reg. Signed-off-by: Peng Fan --- arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts b/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts index 07e85a30a25f..b7b52576586f 100644 --- a/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts +++ b/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts @@ -38,7 +38,7 @@ vdev0vring1: vdev0vring1@a4008000 { no-map; }; - vdev1vring0: vdev1vring0@a4000000 { + vdev1vring0: vdev1vring0@a4010000 { reg = <0 0xa4010000 0 0x8000>; no-map; }; @@ -48,8 +48,8 @@ vdev1vring1: vdev1vring1@a4018000 { no-map; }; - rsc_table: rsc-table@2021f000 { - reg = <0 0x2021f000 0 0x1000>; + rsc_table: rsc-table@2021e000 { + reg = <0 0x2021e000 0 0x1000>; no-map; }; From patchwork Tue Apr 16 15:26:43 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Peng Fan (OSS)" X-Patchwork-Id: 13632049 Received: from EUR03-AM7-obe.outbound.protection.outlook.com (mail-am7eur03on2047.outbound.protection.outlook.com [40.107.105.47]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D68CB133284 for ; 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Signed-off-by: Peng Fan --- arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts | 44 +++++++++++++++++++++-- 1 file changed, 42 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts b/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts index b7b52576586f..2b67724db685 100644 --- a/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts +++ b/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts @@ -105,8 +105,9 @@ &mu2 { }; &eqos { - pinctrl-names = "default"; + pinctrl-names = "default", "sleep"; pinctrl-0 = <&pinctrl_eqos>; + pinctrl-1 = <&pinctrl_eqos_sleep>; phy-mode = "rgmii-id"; phy-handle = <ðphy1>; status = "okay"; @@ -125,8 +126,9 @@ ethphy1: ethernet-phy@1 { }; &fec { - pinctrl-names = "default"; + pinctrl-names = "default", "sleep"; pinctrl-0 = <&pinctrl_fec>; + pinctrl-1 = <&pinctrl_fec_sleep>; phy-mode = "rgmii-id"; phy-handle = <ðphy2>; fsl,magic-packet; @@ -301,6 +303,25 @@ MX93_PAD_ENET1_TX_CTL__ENET_QOS_RGMII_TX_CTL 0x57e >; }; + pinctrl_eqos_sleep: eqossleepgrp { + fsl,pins = < + MX93_PAD_ENET1_MDC__GPIO4_IO00 0x31e + MX93_PAD_ENET1_MDIO__GPIO4_IO01 0x31e + MX93_PAD_ENET1_RD0__GPIO4_IO10 0x31e + MX93_PAD_ENET1_RD1__GPIO4_IO11 0x31e + MX93_PAD_ENET1_RD2__GPIO4_IO12 0x31e + MX93_PAD_ENET1_RD3__GPIO4_IO13 0x31e + MX93_PAD_ENET1_RXC__GPIO4_IO09 0x31e + MX93_PAD_ENET1_RX_CTL__GPIO4_IO08 0x31e + MX93_PAD_ENET1_TD0__GPIO4_IO05 0x31e + MX93_PAD_ENET1_TD1__GPIO4_IO04 0x31e + MX93_PAD_ENET1_TD2__GPIO4_IO03 0x31e + MX93_PAD_ENET1_TD3__GPIO4_IO02 0x31e + MX93_PAD_ENET1_TXC__GPIO4_IO07 0x31e + MX93_PAD_ENET1_TX_CTL__GPIO4_IO06 0x31e + >; + }; + pinctrl_fec: fecgrp { fsl,pins = < MX93_PAD_ENET2_MDC__ENET1_MDC 0x57e @@ -320,6 +341,25 @@ MX93_PAD_ENET2_TX_CTL__ENET1_RGMII_TX_CTL 0x57e >; }; + pinctrl_fec_sleep: fecsleepgrp { + fsl,pins = < + MX93_PAD_ENET2_MDC__GPIO4_IO14 0x51e + MX93_PAD_ENET2_MDIO__GPIO4_IO15 0x51e + MX93_PAD_ENET2_RD0__GPIO4_IO24 0x51e + MX93_PAD_ENET2_RD1__GPIO4_IO25 0x51e + MX93_PAD_ENET2_RD2__GPIO4_IO26 0x51e + MX93_PAD_ENET2_RD3__GPIO4_IO27 0x51e + MX93_PAD_ENET2_RXC__GPIO4_IO23 0x51e + MX93_PAD_ENET2_RX_CTL__GPIO4_IO22 0x51e + MX93_PAD_ENET2_TD0__GPIO4_IO19 0x51e + MX93_PAD_ENET2_TD1__GPIO4_IO18 0x51e + MX93_PAD_ENET2_TD2__GPIO4_IO17 0x51e + MX93_PAD_ENET2_TD3__GPIO4_IO16 0x51e + MX93_PAD_ENET2_TXC__GPIO4_IO21 0x51e + MX93_PAD_ENET2_TX_CTL__GPIO4_IO20 0x51e + >; + }; + pinctrl_uart1: uart1grp { fsl,pins = < MX93_PAD_UART1_RXD__LPUART1_RX 0x31e From patchwork Tue Apr 16 15:26:44 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Peng Fan (OSS)" X-Patchwork-Id: 13632050 Received: from EUR04-DB3-obe.outbound.protection.outlook.com (mail-db3eur04on2081.outbound.protection.outlook.com [40.107.6.81]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AB0F5134407 for ; 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To make usdhc working appropriately for each timing, add X1 drive strength to default timing and X3 drive strength to 100MHz timing. Reviewed-by: Haibo Chen Signed-off-by: Luke Wang Signed-off-by: Peng Fan --- arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts | 68 +++++++++++++++++++++-- 1 file changed, 64 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts b/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts index 2b67724db685..f848cb0922ef 100644 --- a/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts +++ b/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts @@ -161,8 +161,8 @@ &lpuart5 { &usdhc1 { pinctrl-names = "default", "state_100mhz", "state_200mhz"; pinctrl-0 = <&pinctrl_usdhc1>; - pinctrl-1 = <&pinctrl_usdhc1>; - pinctrl-2 = <&pinctrl_usdhc1>; + pinctrl-1 = <&pinctrl_usdhc1_100mhz>; + pinctrl-2 = <&pinctrl_usdhc1_200mhz>; bus-width = <8>; non-removable; status = "okay"; @@ -171,8 +171,8 @@ &usdhc1 { &usdhc2 { pinctrl-names = "default", "state_100mhz", "state_200mhz"; pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; - pinctrl-1 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; - pinctrl-2 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; + pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>; + pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>; cd-gpios = <&gpio3 00 GPIO_ACTIVE_LOW>; vmmc-supply = <®_usdhc2_vmmc>; bus-width = <4>; @@ -391,6 +391,40 @@ MX93_PAD_CCM_CLKO2__GPIO3_IO27 0x31e /* need to config the SION for data and cmd pad, refer to ERR052021 */ pinctrl_usdhc1: usdhc1grp { + fsl,pins = < + MX93_PAD_SD1_CLK__USDHC1_CLK 0x1582 + MX93_PAD_SD1_CMD__USDHC1_CMD 0x40001382 + MX93_PAD_SD1_DATA0__USDHC1_DATA0 0x40001382 + MX93_PAD_SD1_DATA1__USDHC1_DATA1 0x40001382 + MX93_PAD_SD1_DATA2__USDHC1_DATA2 0x40001382 + MX93_PAD_SD1_DATA3__USDHC1_DATA3 0x40001382 + MX93_PAD_SD1_DATA4__USDHC1_DATA4 0x40001382 + MX93_PAD_SD1_DATA5__USDHC1_DATA5 0x40001382 + MX93_PAD_SD1_DATA6__USDHC1_DATA6 0x40001382 + MX93_PAD_SD1_DATA7__USDHC1_DATA7 0x40001382 + MX93_PAD_SD1_STROBE__USDHC1_STROBE 0x1582 + >; + }; + + /* need to config the SION for data and cmd pad, refer to ERR052021 */ + pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp { + fsl,pins = < + MX93_PAD_SD1_CLK__USDHC1_CLK 0x158e + MX93_PAD_SD1_CMD__USDHC1_CMD 0x4000138e + MX93_PAD_SD1_DATA0__USDHC1_DATA0 0x4000138e + MX93_PAD_SD1_DATA1__USDHC1_DATA1 0x4000138e + MX93_PAD_SD1_DATA2__USDHC1_DATA2 0x4000138e + MX93_PAD_SD1_DATA3__USDHC1_DATA3 0x4000138e + MX93_PAD_SD1_DATA4__USDHC1_DATA4 0x4000138e + MX93_PAD_SD1_DATA5__USDHC1_DATA5 0x4000138e + MX93_PAD_SD1_DATA6__USDHC1_DATA6 0x4000138e + MX93_PAD_SD1_DATA7__USDHC1_DATA7 0x4000138e + MX93_PAD_SD1_STROBE__USDHC1_STROBE 0x158e + >; + }; + + /* need to config the SION for data and cmd pad, refer to ERR052021 */ + pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp { fsl,pins = < MX93_PAD_SD1_CLK__USDHC1_CLK 0x15fe MX93_PAD_SD1_CMD__USDHC1_CMD 0x400013fe @@ -420,6 +454,32 @@ MX93_PAD_SD2_CD_B__GPIO3_IO00 0x31e /* need to config the SION for data and cmd pad, refer to ERR052021 */ pinctrl_usdhc2: usdhc2grp { + fsl,pins = < + MX93_PAD_SD2_CLK__USDHC2_CLK 0x1582 + MX93_PAD_SD2_CMD__USDHC2_CMD 0x40001382 + MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x40001382 + MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x40001382 + MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x40001382 + MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x40001382 + MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e + >; + }; + + /* need to config the SION for data and cmd pad, refer to ERR052021 */ + pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp { + fsl,pins = < + MX93_PAD_SD2_CLK__USDHC2_CLK 0x158e + MX93_PAD_SD2_CMD__USDHC2_CMD 0x4000138e + MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x4000138e + MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x4000138e + MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x4000138e + MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x4000138e + MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e + >; + }; + + /* need to config the SION for data and cmd pad, refer to ERR052021 */ + pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp { fsl,pins = < MX93_PAD_SD2_CLK__USDHC2_CLK 0x15fe MX93_PAD_SD2_CMD__USDHC2_CMD 0x400013fe From patchwork Tue Apr 16 15:26:45 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Peng Fan (OSS)" X-Patchwork-Id: 13632051 Received: from EUR04-DB3-obe.outbound.protection.outlook.com (mail-db3eur04on2081.outbound.protection.outlook.com [40.107.6.81]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C3D5E130A64 for ; Tue, 16 Apr 2024 15:19:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=40.107.6.81 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713280771; cv=fail; b=cV+LipRnEYkjyoJrsOsZiAp0YwwBCAFMrx72KB54qrlLEWFaPay7IWundoa0nEQak1fBYGRY/kKb6BoaUlg04m/G5TEsaxUY6btzuiv23DU2L/hWAITya3qYyKSwFl6KQG4oGiEJJmAcsXEYbsIA21prSfnx/kEfsIZHP1K+xtc= ARC-Message-Signature: i=2; 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Tue, 16 Apr 2024 15:19:28 +0000 From: "Peng Fan (OSS)" Date: Tue, 16 Apr 2024 23:26:45 +0800 Subject: [PATCH 09/11] arm64: dts: imx93-11x11-evk: add sleep pinctrl for sdhc2 Message-Id: <20240416-imx93-dts-4-13-v1-9-da8ac02e8413@nxp.com> References: <20240416-imx93-dts-4-13-v1-0-da8ac02e8413@nxp.com> In-Reply-To: <20240416-imx93-dts-4-13-v1-0-da8ac02e8413@nxp.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam Cc: devicetree@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Peng Fan X-Mailer: b4 0.12.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1713281224; l=1902; i=peng.fan@nxp.com; s=20230812; h=from:subject:message-id; bh=IkgkzajW3i1/2uBfzzBinYnK7req5nUwjI0YrZQay6g=; b=cgtKK1BL+Gm9DeOmk6BC7Lj5yOQSoXesqsP6htoWUo9i511SpIefxQoSheojBZ1QN4E+K+qSp KTUk1Fc7AToCwv5bdaxjDmYDrwJY7Tro3UZB8s/FB969Hg1c7kl3LNA X-Developer-Key: i=peng.fan@nxp.com; a=ed25519; pk=I4sJg7atIT1g63H7bb5lDRGR2gJW14RKDD0wFL8TT1g= X-ClientProxiedBy: SI2PR04CA0012.apcprd04.prod.outlook.com (2603:1096:4:197::14) To DU0PR04MB9417.eurprd04.prod.outlook.com (2603:10a6:10:358::11) Precedence: bulk X-Mailing-List: imx@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DU0PR04MB9417:EE_|DU2PR04MB9194:EE_ X-MS-Office365-Filtering-Correlation-Id: 163d6662-54ca-4fd9-b7d8-08dc5e289ba1 X-MS-Exchange-SharedMailbox-RoutingAgent-Processed: True X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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Signed-off-by: Peng Fan --- arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts | 22 +++++++++++++++++++++- 1 file changed, 21 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts b/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts index f848cb0922ef..b29d470d2492 100644 --- a/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts +++ b/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts @@ -169,10 +169,11 @@ &usdhc1 { }; &usdhc2 { - pinctrl-names = "default", "state_100mhz", "state_200mhz"; + pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep"; pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>; pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>; + pinctrl-3 = <&pinctrl_usdhc2_sleep>, <&pinctrl_usdhc2_gpio_sleep>; cd-gpios = <&gpio3 00 GPIO_ACTIVE_LOW>; vmmc-supply = <®_usdhc2_vmmc>; bus-width = <4>; @@ -452,6 +453,12 @@ MX93_PAD_SD2_CD_B__GPIO3_IO00 0x31e >; }; + pinctrl_usdhc2_gpio_sleep: usdhc2gpiosleepgrp { + fsl,pins = < + MX93_PAD_SD2_CD_B__GPIO3_IO00 0x51e + >; + }; + /* need to config the SION for data and cmd pad, refer to ERR052021 */ pinctrl_usdhc2: usdhc2grp { fsl,pins = < @@ -490,4 +497,17 @@ MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x400013fe MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e >; }; + + pinctrl_usdhc2_sleep: usdhc2sleepgrp { + fsl,pins = < + MX93_PAD_SD2_CLK__GPIO3_IO01 0x51e + MX93_PAD_SD2_CMD__GPIO3_IO02 0x51e + MX93_PAD_SD2_DATA0__GPIO3_IO03 0x51e + MX93_PAD_SD2_DATA1__GPIO3_IO04 0x51e + MX93_PAD_SD2_DATA2__GPIO3_IO05 0x51e + MX93_PAD_SD2_DATA3__GPIO3_IO06 0x51e + MX93_PAD_SD2_VSELECT__GPIO3_IO19 0x51e + >; + }; + }; From patchwork Tue Apr 16 15:26:46 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Peng Fan (OSS)" X-Patchwork-Id: 13632052 Received: from EUR04-DB3-obe.outbound.protection.outlook.com (mail-db3eur04on2051.outbound.protection.outlook.com [40.107.6.51]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C7CD11353F9 for ; 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So add the support to reset PHYs. Signed-off-by: Wei Fang Reviewed-by: Clark Wang Signed-off-by: Peng Fan --- arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts b/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts index b29d470d2492..44ae985945ad 100644 --- a/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts +++ b/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts @@ -121,6 +121,9 @@ mdio { ethphy1: ethernet-phy@1 { reg = <1>; eee-broken-1000t; + reset-gpios = <&pcal6524 15 GPIO_ACTIVE_LOW>; + reset-assert-us = <10000>; + reset-deassert-us = <80000>; }; }; }; @@ -142,6 +145,9 @@ mdio { ethphy2: ethernet-phy@2 { reg = <2>; eee-broken-1000t; + reset-gpios = <&pcal6524 16 GPIO_ACTIVE_LOW>; + reset-assert-us = <10000>; + reset-deassert-us = <80000>; }; }; }; From patchwork Tue Apr 16 15:26:47 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Peng Fan (OSS)" X-Patchwork-Id: 13632053 Received: from EUR04-DB3-obe.outbound.protection.outlook.com (mail-db3eur04on2059.outbound.protection.outlook.com [40.107.6.59]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 59484136649 for ; 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So build in OCOTP ELE driver. Signed-off-by: Peng Fan --- arch/arm64/configs/defconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 9957e126e32d..b9f0805abeef 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -1553,7 +1553,7 @@ CONFIG_ARM_CORESIGHT_PMU_ARCH_SYSTEM_PMU=m CONFIG_MESON_DDR_PMU=m CONFIG_NVMEM_LAYOUT_SL28_VPD=m CONFIG_NVMEM_IMX_OCOTP=y -CONFIG_NVMEM_IMX_OCOTP_ELE=m +CONFIG_NVMEM_IMX_OCOTP_ELE=y CONFIG_NVMEM_IMX_OCOTP_SCU=y CONFIG_NVMEM_LAYERSCAPE_SFP=m CONFIG_NVMEM_MESON_EFUSE=m