From patchwork Wed Apr 17 20:00:53 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Abel Vesa X-Patchwork-Id: 13633778 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E64C1C001CC for ; Wed, 17 Apr 2024 20:01:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References :Message-Id:Content-Transfer-Encoding:Content-Type:MIME-Version:Subject:Date: From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=43HApKIj0WdLuJWJQYaWKBO78pu58Pa0oGQOq0HzDlg=; b=5BSNNO41CuQQorqAdzkEwceB5y gvLyk2rfs9q9kb/UkVWFe64kVST0pefmw9LneT7neLsOAPV/g7iGmg2+PD3bpxcOQ1yFNxRtl0WPf KtBjvchvMXzVbZWQkrNbGCw25v+bh22jJ2LJpoBERO/ZbZdt3B1w8HnaFrsSNmLi2GHx0+0z9I2Qm U4NFuqku+tB45tUw243kxroEzVpOib2To77Nc6AzVZeP5MhOHee18dfZWFmBWwnflNKpdk7rTmfsj +J8Mj9svDkaFrqyEuUTDgJX6ymmZdfBSq7xBjvwSY9tfiFdilaGhH96vNAKV3m+RiC6oG2AQOEcG0 2ceGBQEA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rxBTR-0000000HQmJ-1bXV; Wed, 17 Apr 2024 20:01:41 +0000 Received: from mail-ej1-x634.google.com ([2a00:1450:4864:20::634]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rxBTF-0000000HQdi-2u6K for linux-mediatek@lists.infradead.org; Wed, 17 Apr 2024 20:01:33 +0000 Received: by mail-ej1-x634.google.com with SMTP id a640c23a62f3a-a51addddbd4so1999466b.0 for ; Wed, 17 Apr 2024 13:01:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1713384082; x=1713988882; darn=lists.infradead.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=43HApKIj0WdLuJWJQYaWKBO78pu58Pa0oGQOq0HzDlg=; b=PldeDBcozdPbv44Xl/WuFtxO/Eoxz9adWbjHWxMB0INSNCmJTvN2YDqszhV3vXxOzf uZ4hu2M+0ZYFvPKFdxt7ny+bt1iD53LDXyfQzkVKMQKrxmmdXPEpoU+5k+0fPBqn9WAs drdnXrwvgiDPH4a+asXRwzhqyYKIe4Ijm8weFacCPv/yQnKNiGw80Cd3+HMN9ykx1yov hULOgj3zagR6wTvQRps6etYo8iHRVgFnBRn1VPEcNBrhaTr9TbODz+MWEGG51Gp+oyOy DasSr0+r+hTLQvCcIP5LK3GEgauQWXxaB415FZ2IggZAh40Eqr1DMf2iv7YAjanFHZ2x Um7w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1713384082; x=1713988882; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=43HApKIj0WdLuJWJQYaWKBO78pu58Pa0oGQOq0HzDlg=; b=hdbh5ZCae4rNWcF/vs1uI76eqirwsvQ/I3Za/XZTjOikIJKq/cuTXStDYSwMa22/pU cO167Uu5+g3f5bwo5BXhpiYJmL4YSNCpFeQt8MV1swk/CgwY0gNa1zhPYhs9YlXxDFZh yYTTcYnHSxSbo4ITA/cPmYDL2BBuL6MoSBNDaj/SmuSa+TGr+sHuVSZLcX/NqoWcOc9U xYeKdjDQTk/5bqQETet1xQ2JaEYz7E5kbFOLsmovTb5DUGb72Z/P+pvknZDlDKD0FqZw LtHS4RN2gnRdr2M7+cVGrBS/wcO2SU7s4+BdP9RLM/eQQ9Z4fwQOvfSeKHMrTLwQBCrs oNDg== X-Forwarded-Encrypted: i=1; AJvYcCUxWjy8EpV0Zp/yDbdfZWFTBIzMqw3HoQZXzFdwStzl0e2/T0GkQWTC+h0Kdz4T734Oqn9wZlFSHLFdpW4aM0NoAx5NpXrB5jhT7mzpIplhPD1X X-Gm-Message-State: AOJu0Yyhc8W2h6LPvb2pL78oX+6vHLFTamrWPmSLB0YBP6fGhSsfuWYF yBB7n+MIDKLsfFJz3HthTHTNDNINN3y9Qp9b7EdvDd/6B6rQhKWyj/Rw498q2ro= X-Google-Smtp-Source: AGHT+IEfVAP5icOIVHJw1Nv4oEkeMlkL7zZzTHle4C/+UhATBDRNfzsaHY3+L+kT5HHxQ7ufCStNAw== X-Received: by 2002:a17:906:710c:b0:a51:d1f6:3938 with SMTP id x12-20020a170906710c00b00a51d1f63938mr334650ejj.42.1713384082165; Wed, 17 Apr 2024 13:01:22 -0700 (PDT) Received: from [127.0.1.1] ([79.114.172.194]) by smtp.gmail.com with ESMTPSA id gs6-20020a170906f18600b00a555ef55ab5sm939981ejb.218.2024.04.17.13.01.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 17 Apr 2024 13:01:21 -0700 (PDT) From: Abel Vesa Date: Wed, 17 Apr 2024 23:00:53 +0300 Subject: [PATCH v10 1/7] dt-bindings: spmi: Add X1E80100 SPMI PMIC ARB schema MIME-Version: 1.0 Message-Id: <20240417-spmi-multi-master-support-v10-1-5bc6d322e266@linaro.org> References: <20240417-spmi-multi-master-support-v10-0-5bc6d322e266@linaro.org> In-Reply-To: <20240417-spmi-multi-master-support-v10-0-5bc6d322e266@linaro.org> To: Stephen Boyd , Matthias Brugger , Bjorn Andersson , Konrad Dybcio , Dmitry Baryshkov , Neil Armstrong , AngeloGioacchino Del Regno , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Srini Kandagatla , Johan Hovold , David Collins , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, Abel Vesa , Krzysztof Kozlowski X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=4635; i=abel.vesa@linaro.org; h=from:subject:message-id; bh=HsBWA6C5yW4IIcnCtqxAW2pot9IPKHCnHQDO4UZ05LQ=; b=owEBbQKS/ZANAwAKARtfRMkAlRVWAcsmYgBmICp9ePv3z5MxN9myqCZrbWFYyyjC2N+0AXUP+ rnmj1nqV3uJAjMEAAEKAB0WIQRO8+4RTnqPKsqn0bgbX0TJAJUVVgUCZiAqfQAKCRAbX0TJAJUV VsIID/4gHIr6dpPvTMMMBeRmFAHO1zvty/TqrFp+m6l6gWxhD2Qkb66EXd9QiXrSPi9kbk7efzp rmEE6Lp1yN9Ej29G8D23jhfYeGD/YUOgeZqSOTNrRK8JXA+WSFLb7EqhtURcZ1Dd+vHatcN3iTe 6PaDkaW31SxskM6BXRp8HG6J0oPbBdNwqQUwbiBIspDPLl9UnvPfKgw5gH9wuN79uCcztcwVuJW MNtTrfuXUIaH3pD5nqDM26tH7qGgbu9gUIw0zwdgfvMqPgHDjM6Km/HMUIDUPLIk7XlBLXkd2xf NyZ+iyPlXqFbSLKm+peHBIE+hR2n1Po3RS4hpHzg1WhHC+EeF04Ej1Rm5pN8rHo+1xj8cC6L3LP 8jE9L6BLrxVCNC6G+cQKU1kTuzlFmhPkbmuZqQMrka0LmrbsRFG1w1zNd94FLclk+zWHaKcBz/Y jOGxGOB3j35MxcD8CSy38pYuIYRZQLGoBAKPG2oU+Zj99JhPoiD9m0p6QC2IfWgiBP1xWu3b2vM ClU7nZ0NHDsMIYOvRhbRbVojil9ANAUF1IpartwU82DdeIIoCNGns3zEG4RfkfIxbhDWbJFjy33 5ngENGI1Nt70oXFcFrDHKp9bc4Gk8rVXBa+4l/tdhSx9Pt4mc5+3S7ekziujk7ZtX9PEt6kubPq GAh0pyuUBzVvdFA== X-Developer-Key: i=abel.vesa@linaro.org; a=openpgp; fpr=6AFF162D57F4223A8770EF5AF7BF214136F41FAE X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240417_130130_106561_9C2C0CCD X-CRM114-Status: GOOD ( 14.89 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org Add dedicated schema for X1E80100 PMIC ARB. This is not the first platform to introduce multiple buses. In fact, all platforms that implement the version 7 for the SPMI PMIC arbiter have multiple buses. Since the compatible should not be version based, the platform specific one is used. The X1E80100 platform is the first platform to really need the second master, as all the available boards have the PMICs that provide the eUSB2 repeater on the second bus. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Abel Vesa --- .../bindings/spmi/qcom,x1e80100-spmi-pmic-arb.yaml | 136 +++++++++++++++++++++ 1 file changed, 136 insertions(+) diff --git a/Documentation/devicetree/bindings/spmi/qcom,x1e80100-spmi-pmic-arb.yaml b/Documentation/devicetree/bindings/spmi/qcom,x1e80100-spmi-pmic-arb.yaml new file mode 100644 index 000000000000..a28b70fb330a --- /dev/null +++ b/Documentation/devicetree/bindings/spmi/qcom,x1e80100-spmi-pmic-arb.yaml @@ -0,0 +1,136 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/spmi/qcom,x1e80100-spmi-pmic-arb.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm X1E80100 SPMI Controller (PMIC Arbiter v7) + +maintainers: + - Stephen Boyd + +description: | + The X1E80100 SPMI PMIC Arbiter implements HW version 7 and it's an SPMI + controller with wrapping arbitration logic to allow for multiple on-chip + devices to control up to 2 SPMI separate buses. + + The PMIC Arbiter can also act as an interrupt controller, providing interrupts + to slave devices. + +properties: + compatible: + const: qcom,x1e80100-spmi-pmic-arb + + reg: + items: + - description: core registers + - description: tx-channel per virtual slave registers + - description: rx-channel (called observer) per virtual slave registers + + reg-names: + items: + - const: core + - const: chnls + - const: obsrvr + + ranges: true + + '#address-cells': + const: 2 + + '#size-cells': + const: 2 + + qcom,ee: + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 5 + description: > + indicates the active Execution Environment identifier + + qcom,channel: + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 5 + description: > + which of the PMIC Arb provided channels to use for accesses + +patternProperties: + "^spmi@[a-f0-9]+$": + type: object + $ref: /schemas/spmi/spmi.yaml + unevaluatedProperties: false + + properties: + reg: + items: + - description: configuration registers + - description: interrupt controller registers + + reg-names: + items: + - const: cnfg + - const: intr + + interrupts: + maxItems: 1 + + interrupt-names: + const: periph_irq + + interrupt-controller: true + + '#interrupt-cells': + const: 4 + description: | + cell 1: slave ID for the requested interrupt (0-15) + cell 2: peripheral ID for requested interrupt (0-255) + cell 3: the requested peripheral interrupt (0-7) + cell 4: interrupt flags indicating level-sense information, + as defined in dt-bindings/interrupt-controller/irq.h + +required: + - compatible + - reg-names + - qcom,ee + - qcom,channel + +additionalProperties: false + +examples: + - | + #include + + soc { + #address-cells = <2>; + #size-cells = <2>; + + spmi: arbiter@c400000 { + compatible = "qcom,x1e80100-spmi-pmic-arb"; + reg = <0 0x0c400000 0 0x3000>, + <0 0x0c500000 0 0x4000000>, + <0 0x0c440000 0 0x80000>; + reg-names = "core", "chnls", "obsrvr"; + + qcom,ee = <0>; + qcom,channel = <0>; + + #address-cells = <2>; + #size-cells = <2>; + ranges; + + spmi_bus0: spmi@c42d000 { + reg = <0 0x0c42d000 0 0x4000>, + <0 0x0c4c0000 0 0x10000>; + reg-names = "cnfg", "intr"; + + interrupt-names = "periph_irq"; + interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>; + interrupt-controller; + #interrupt-cells = <4>; + + #address-cells = <2>; + #size-cells = <0>; + }; + }; + }; From patchwork Wed Apr 17 20:00:54 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Abel Vesa X-Patchwork-Id: 13633776 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1EA0CC4345F for ; Wed, 17 Apr 2024 20:01:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References :Message-Id:Content-Transfer-Encoding:Content-Type:MIME-Version:Subject:Date: From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=8lYudh1XGipLZp45Ed9irT2kjTBzp7nX6WUMRhG9/PM=; b=YTG+MnQ3X+t0amBt13Jx9d3OJb aOofh3U2olhnE5BDYX8Pj1DrhroG58uxGMtNnvtAXmD/93v8ezn/NNJ0NMzIB/pfg+8JZVzAUMNHC eAMzIc2VPpr26KlR7mPYlgsSTDP8pireqrT9NjdwZDN/kIWrsnA7O/+V1QbsLALL5DB1idrMvKEvZ +E9W0qTNvGBvj2KV2e7wuJQcxl20OCDnQLhWqbOmJNKLWJjOnIjP7Qn6s4DylJHNmEiPOh0RxFCfq CvJ/PiL8G0xrVsr9h5TqA0PLRfX5WhCZDqkznul/CQPkTm4IZXUUmNTS7vZoAzMml/GfEs+A9q/of 4duxxQLw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rxBTO-0000000HQkB-0kPY; Wed, 17 Apr 2024 20:01:38 +0000 Received: from mail-lf1-x12c.google.com ([2a00:1450:4864:20::12c]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rxBTF-0000000HQdn-3JXU for linux-mediatek@lists.infradead.org; Wed, 17 Apr 2024 20:01:33 +0000 Received: by mail-lf1-x12c.google.com with SMTP id 2adb3069b0e04-516d0161e13so61811e87.3 for ; Wed, 17 Apr 2024 13:01:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1713384084; x=1713988884; darn=lists.infradead.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=8lYudh1XGipLZp45Ed9irT2kjTBzp7nX6WUMRhG9/PM=; b=Zen7GkB4CRdlhJGZjXIZzxfouj1fKv5r/l2dcTGtDa4ckU6+0QdHos5yfcMVVoirln oFG9ZaOTwBfiYSmgf41MO8W/lmvNjtCRV4cjMMmMTc/u4zYd4XBhR/Nvs52gsuXAtELa ohPov3jEvAs1DiJuznpG3hU+gWeLVp87eD5OjTBMfHAxHJ7VJarrsTeNHkQXynnAY8Ra WApLC7Ej0QlECK+kC45E5kaQCywiXn2L689ISGhbRC9cDmoeLX5FvW0YNgaEbtjviDJT /926bAOVv6osXVebcvnyiSFvyr+mn9Qi83bPbBpceSFJt0VgFdnc1kkZe3luTAcB/a71 3tEA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1713384084; x=1713988884; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=8lYudh1XGipLZp45Ed9irT2kjTBzp7nX6WUMRhG9/PM=; b=jSD/mu0yG+AjmE9+Djrf3N/pUY6jUWkpimsadOIJaIH+G9c+5BxasVwCxhbus23TfL NVwfqDtDkT+brWgD69hvaY2dr5gtn+63T2qAU0HExTaQ5NdIMxIhYOi4ndFfFt/mcV7i X7NcI7BtxTOLvxB/ksHQY2bz1vP8u2D6t1od+5vWkPH1GWUCXB5Dl/2+F2FeysarRNK0 KLb5sRhgvp06GkefQ1YNS3osfrt9KEfZSlg4xGiEWBabxNQlN/GiqBZ3pHmFqpkkwCld jAwgSUlyhBJml3+jS8X6gdH0eXvBzP7NP4jbsym6leTdkgUMOT+wYRk0UXoWvlw3YyWl CxsQ== X-Forwarded-Encrypted: i=1; AJvYcCXpOGVxNDXgpE2rqezuEUTQ+WsRIGy/HBur64SAlC7Y5QU+8dEoGcghnhx4ZgvMjL8e8eJXNdpGnZ4wsx/a+D8xjm2g8XaZQj32Xh1jnOvLJpHA X-Gm-Message-State: AOJu0Yw0hyIbzq5ewCNUrL+asc8isin63uMx9emHhhZ0/HNtmDEGLx2D U6k8qwpp7r2BeuqEcJZUssQAt7V1RWA9k9YL4EZZwEQI5CuTS3la1PZuz7rUK3E= X-Google-Smtp-Source: AGHT+IGxbKfuE7tOKYWJaJSpGP1x/nWe/jbsF0dBAScwJnX0ukMTu47VDz749HA5eUzZvJ0MfqluBg== X-Received: by 2002:a19:7506:0:b0:516:d0d5:6f60 with SMTP id y6-20020a197506000000b00516d0d56f60mr166215lfe.38.1713384083867; Wed, 17 Apr 2024 13:01:23 -0700 (PDT) Received: from [127.0.1.1] ([79.114.172.194]) by smtp.gmail.com with ESMTPSA id gs6-20020a170906f18600b00a555ef55ab5sm939981ejb.218.2024.04.17.13.01.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 17 Apr 2024 13:01:23 -0700 (PDT) From: Abel Vesa Date: Wed, 17 Apr 2024 23:00:54 +0300 Subject: [PATCH v10 2/7] dt-bindings: spmi: Deprecate qcom,bus-id MIME-Version: 1.0 Message-Id: <20240417-spmi-multi-master-support-v10-2-5bc6d322e266@linaro.org> References: <20240417-spmi-multi-master-support-v10-0-5bc6d322e266@linaro.org> In-Reply-To: <20240417-spmi-multi-master-support-v10-0-5bc6d322e266@linaro.org> To: Stephen Boyd , Matthias Brugger , Bjorn Andersson , Konrad Dybcio , Dmitry Baryshkov , Neil Armstrong , AngeloGioacchino Del Regno , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Srini Kandagatla , Johan Hovold , David Collins , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, Abel Vesa , Krzysztof Kozlowski X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1023; i=abel.vesa@linaro.org; h=from:subject:message-id; bh=f1k2/XtnKKT0QabjDTtzy+0Tu+D0+1BkiYHMuQzuNWI=; b=owEBbQKS/ZANAwAKARtfRMkAlRVWAcsmYgBmICp/E095iDTa8F+bI7nMeF6DLZpKpnbK1WlsZ vC11586iXyJAjMEAAEKAB0WIQRO8+4RTnqPKsqn0bgbX0TJAJUVVgUCZiAqfwAKCRAbX0TJAJUV VmOID/4/QtTIUnPQg72FBvwzNTf7Qn8PSseRsPOVcd59hjYGzXVIKJUjALH2WyOJwQ5+j/l2lkY 9Asqjwh8s2qg4m/ftcu9O4VpjDhopW7Pmx8s0d/qvFAPVDaKFGH/7YQpOSY9kFBWHRuHnbT7DXu 788a89Yyuydvhf3atnI/JCVVfYoxC6IfPeq5jwpyihUKXGHDCZqM9cAiQrW5beQNOVcIAjQX6BK 0uzpDRsttZ9Iuj95MkOx+0OYD3aQUInhuOKVml/vkbTZ3ZLSZMA6QcaSCd3hZVHut8JPOAOt1rb zyHRO3OS9B0jPQkhc+RI8d2n3wBH1WuXAQWMD3egHcqvD2al1RpRoceNJwrfyx7zW7SR03OfE6x NMkAzMLgiDJ1RyMPir15bsw7DszLyybjM2+kYahi/2LpBLyc4M3qxZd4lu3c7iD2Y4iQphaHzFj LHeOfa/ii2BXa5UKaU8qD4/7dWMSCuTXwOlez+OnFH7i/nb+Q+a8N8Y9wKOEPzlcKKsoJo9jo8/ W+O3lLIXxKVa/QQhWpDqKxdSzSZ7IzBvejeZhyxC5muWlS1dkiU7y3do5WGW79SXV4raWtnLgl6 H9BaXkJyOK2YyEJWd0z/dhxxDPXxC5o35zjyUgbgAaz+0pLdTvYVIOmr6YTukdWGO4ohoaeeNhv ie9OSctpsnQjJEQ== X-Developer-Key: i=abel.vesa@linaro.org; a=openpgp; fpr=6AFF162D57F4223A8770EF5AF7BF214136F41FAE X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240417_130130_076262_45D6273C X-CRM114-Status: UNSURE ( 7.81 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org As it is optional and no platform is actually using the secondary bus, deprecate the qcom,bus-id property. For newer platforms that implement SPMI PMIC ARB v7 in HW, the X1E80100 approach should be used. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Abel Vesa --- Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb.yaml b/Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb.yaml index f983b4af6db9..51daf1b847a9 100644 --- a/Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb.yaml +++ b/Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb.yaml @@ -92,6 +92,7 @@ properties: description: > SPMI bus instance. only applicable to PMIC arbiter version 7 and beyond. Supported values, 0 = primary bus, 1 = secondary bus + deprecated: true required: - compatible From patchwork Wed Apr 17 20:00:55 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Abel Vesa X-Patchwork-Id: 13633777 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5871CC04FFE for ; Wed, 17 Apr 2024 20:01:39 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References :Message-Id:Content-Transfer-Encoding:Content-Type:MIME-Version:Subject:Date: From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=vkJszbQYs1o414BkCnfzaobHDnZKDVd8xFkMWbtLTqM=; b=H9iqk1FolbsSJLtwWXE7FTUYus FpNQ5qkxf3k9LwrmVp3tsB2x3jInkZMN60mRUOZhbup7P4gf0F/FH5RhrwYyTbwNwlJNgdeExRezY eDT6QJop8v/iXHIlIYHFYWjN5Q94LNmOqrZnrMAuIUfxf+Vnr5w910hiKJ0iHcRvrFOJU0QjjAUTX hI73vtPzWlVj+ZwzOmMaEMFHiX2sstWL6IJrZ6yg5qrZciDNHfGIwudSp0zUVOLMW0cWEtw+9/T9P sT2vafxT7hkI5cJlwGxd/XZbm6n3dCe7iPGP9CjdMHDxrWxzwy/Be0DSlcH5RRwhJM6UcVVW9QUaC XRp5SAbg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rxBTO-0000000HQkY-2lFn; Wed, 17 Apr 2024 20:01:38 +0000 Received: from mail-ed1-x532.google.com ([2a00:1450:4864:20::532]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rxBTG-0000000HQdy-2Xw4 for linux-mediatek@lists.infradead.org; Wed, 17 Apr 2024 20:01:33 +0000 Received: by mail-ed1-x532.google.com with SMTP id 4fb4d7f45d1cf-56e477db7fbso111528a12.3 for ; Wed, 17 Apr 2024 13:01:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1713384086; x=1713988886; darn=lists.infradead.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=vkJszbQYs1o414BkCnfzaobHDnZKDVd8xFkMWbtLTqM=; b=NfGVgQIH5kbpaf30NUULgyqLLTfCRD0YARG4TuwZg15JqINXEHwuxk5FBxPTnUCLdv y95teDt4/tbK6+HXa28GMvXXXygYy6CafOIa4kNvkniFFH/MJGVC/7pYATH9Y7yInVQT /mVIQ/cpJM4aIUc2JOqKONiFjHzKyyOYOzZa0+vb1aBgyxcLpdx39t2eYLck2bNwL6GF 4xEGbTKlJpp0f7aLP6QOQByiTD4nXJ1vjHklT/wmeLYBOHAoWbA2M4Tvm5ouJ0OmsXbP Roblc+SIp+gWgCw+T2Nv/g5A1j/e40W1nu+MS8Ga9qV3DbV0FVnrOf0SjB9lu/MSHeY0 0wUA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1713384086; x=1713988886; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=vkJszbQYs1o414BkCnfzaobHDnZKDVd8xFkMWbtLTqM=; b=Z1qz8E0jeUt13tn5eC4HHZ7IwK2csnPaCg9mrikPYfH/MJGG6BD+wdGb9QTrB8gjZV cEM0jEjE6lM7UxK8CaJDmw0LYYbSxt14HaFa4cL4fkNkIHxikWgzyYfCROgACZDDwIdz p2jh0AP7ZvlEfScqhGVELG9AJ/59SD4T0uOwDhBmrfcSsRpS6yOhA57RgvH+IoNqm9E7 24w1E0s/X0HGFjRXcu5+hkrD0JRmk7gJJxF5HHpEtc/cuKO1vvtYO+sAvelTYZp5QOe2 L17o/5swBUESKDmkqAxRyprEkFxZRhuAvE3v4485To7LagkI2qj6OiAnZA/GnuOVnEHx 3OKw== X-Forwarded-Encrypted: i=1; AJvYcCVgeuCxS+ptFPON6SW3rDFJU10NjCtvjoYLSJ6N1LQ4IF5vuV64sQAdxQjpSFKdaewlMDYhW/FW6TLhbUbF+Br3PzvbGUHhiwEZI5qyUBQedY7y X-Gm-Message-State: AOJu0YzYo8TuFa83LFE88OXLT09n51eMCjdL4UDYkO1Ten6oU2lc7vIh e+RxTPbZkV7eOyGRlddUrcVPqTG1l7/K7gbs8tx+z4cCAf84Sga1nwPXodaktS8= X-Google-Smtp-Source: AGHT+IFpQveQN0WrZ+igZQXQ/yZHaNlkS0Wb8UjbefxIeVkiBGAZDA+tfI2DaDqdb7B/J0ieeXhS+A== X-Received: by 2002:a17:906:3108:b0:a52:408f:8575 with SMTP id 8-20020a170906310800b00a52408f8575mr323610ejx.12.1713384085598; Wed, 17 Apr 2024 13:01:25 -0700 (PDT) Received: from [127.0.1.1] ([79.114.172.194]) by smtp.gmail.com with ESMTPSA id gs6-20020a170906f18600b00a555ef55ab5sm939981ejb.218.2024.04.17.13.01.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 17 Apr 2024 13:01:25 -0700 (PDT) From: Abel Vesa Date: Wed, 17 Apr 2024 23:00:55 +0300 Subject: [PATCH v10 3/7] spmi: pmic-arb: Fix some compile warnings about members not being described MIME-Version: 1.0 Message-Id: <20240417-spmi-multi-master-support-v10-3-5bc6d322e266@linaro.org> References: <20240417-spmi-multi-master-support-v10-0-5bc6d322e266@linaro.org> In-Reply-To: <20240417-spmi-multi-master-support-v10-0-5bc6d322e266@linaro.org> To: Stephen Boyd , Matthias Brugger , Bjorn Andersson , Konrad Dybcio , Dmitry Baryshkov , Neil Armstrong , AngeloGioacchino Del Regno , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Srini Kandagatla , Johan Hovold , David Collins , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, Abel Vesa X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=2479; i=abel.vesa@linaro.org; h=from:subject:message-id; bh=YI6kFnUdqCb3smm8drA7puqPY4IMwS3WgmIgWIqmjO4=; b=owEBbQKS/ZANAwAKARtfRMkAlRVWAcsmYgBmICqCsJCp5gvQLMFFQqhO6XcTbU8fTs4T/CIWa AXutDY5l12JAjMEAAEKAB0WIQRO8+4RTnqPKsqn0bgbX0TJAJUVVgUCZiAqggAKCRAbX0TJAJUV VuoPEADFvtdR0eoFq683MWj9bQyN6Ev9lNZORhL83dK7WvbVw5uafRLMCnA8CU4fP3w0Kf9IL9L n2+Ur2s+mFLl3pmu4dirqFKWJ1LLsB6bMwwxQ6RiBOlZuzE4UPaRLlJmwHLqngTW/XYdYecjBuM FO+inXrw4Wdasn0e0h7YPAAgolDlPESnihqZbwn5ej+XRKWIEy38Wg4wMG0dm1dGs6tqAJkWa0B Z5mdv9QnJIkakiwkXsAEthf4EBpuT69ko6SfBIQXsvKVNGS5fYpYluyzj4kDbTxmldyCXiOWpwU 4UTt6nDZ0e0703FBlPHnIFVxUEsyNP6XawDt/7b7XNRhhEXIrgOUzqT7WWPTPoP0xLD30VGatWp ScUxn6pqpbFo+eL7ARai0GUsGKnyLCESqSG3x7NOmpgJ7vHZ3TJuU893QVmpOnjIIBoENLLDJ/O yW0AQW+LokEnUW31ICYLlRdt4i8iJ5Hsr9eHd2CZ6Xr8p77O6bDVkp1vLmxElC5fdoR0aISE7pl 5jMF3HaDzquGQRvE/yG7JHeCoSAeyIR4j/ZtlKR6Gvecd0HLQnIhYLq2crXtSIDWbrZdrbijulw 2SpE9/SpxhZ8D9rkwLvWp46T0nGpFJrFgljjVD4M39zH9X+yKnjpyvWkaXV0FoCrFn/bKR1gXDS h3TrYgCKNQ5rzeQ== X-Developer-Key: i=abel.vesa@linaro.org; a=openpgp; fpr=6AFF162D57F4223A8770EF5AF7BF214136F41FAE X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240417_130130_701461_AE399CA3 X-CRM114-Status: UNSURE ( 9.30 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org Fix the following compile warnings: warning: Function parameter or struct member 'core' not described in 'spmi_pmic_arb' warning: Function parameter or struct member 'core_size' not described in 'spmi_pmic_arb' warning: Function parameter or struct member 'mapping_table_valid' not described in 'spmi_pmic_arb' warning: Function parameter or struct member 'pmic_arb' not described in 'pmic_arb_read_data' warning: Function parameter or struct member 'pmic_arb' not described in 'pmic_arb_write_data' Reviewed-by: Neil Armstrong Signed-off-by: Abel Vesa --- drivers/spmi/spmi-pmic-arb.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/spmi/spmi-pmic-arb.c b/drivers/spmi/spmi-pmic-arb.c index 937c15324513..12c0efd744c2 100644 --- a/drivers/spmi/spmi-pmic-arb.c +++ b/drivers/spmi/spmi-pmic-arb.c @@ -132,6 +132,8 @@ struct apid_data { * @wr_base: on v1 "core", on v2 "chnls" register base off DT. * @intr: address of the SPMI interrupt control registers. * @cnfg: address of the PMIC Arbiter configuration registers. + * @core: core register base for v2 and above only (see above) + * @core_size: core register base size * @lock: lock to synchronize accesses. * @channel: execution environment channel to use for accesses. * @irq: PMIC ARB interrupt. @@ -144,6 +146,7 @@ struct apid_data { * @apid_count: on v5 and v7: number of APIDs associated with the * particular SPMI bus instance * @mapping_table: in-memory copy of PPID -> APID mapping table. + * @mapping_table_valid:bitmap containing valid-only periphs * @domain: irq domain object for PMIC IRQ domain * @spmic: SPMI controller object * @ver_ops: version dependent operations. @@ -232,6 +235,7 @@ static inline void pmic_arb_set_rd_cmd(struct spmi_pmic_arb *pmic_arb, /** * pmic_arb_read_data: reads pmic-arb's register and copy 1..4 bytes to buf + * @pmic_arb: the SPMI PMIC arbiter * @bc: byte count -1. range: 0..3 * @reg: register's address * @buf: output parameter, length must be bc + 1 @@ -246,6 +250,7 @@ pmic_arb_read_data(struct spmi_pmic_arb *pmic_arb, u8 *buf, u32 reg, u8 bc) /** * pmic_arb_write_data: write 1..4 bytes from buf to pmic-arb's register + * @pmic_arb: the SPMI PMIC arbiter * @bc: byte-count -1. range: 0..3. * @reg: register's address. * @buf: buffer to write. length must be bc + 1. From patchwork Wed Apr 17 20:00:56 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Abel Vesa X-Patchwork-Id: 13633780 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 64F2CC001CC for ; Wed, 17 Apr 2024 20:01:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References :Message-Id:Content-Transfer-Encoding:Content-Type:MIME-Version:Subject:Date: From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=JPbCq+oOUcmq2IMBiN6gCV1jsU1Thi9sfqYTDJv76Mk=; b=k0x0m9UpJ9Ms+0MVLqubTNy65G CQKlBMlfNp8EzjUTXWuKkSZ2ccCQw+wcFgaBQmrWZkUP2rIhqNqhK8zM10tgPqo1TYjmmCu3Z5dLC t2t0GPW1tC9xJq7DkY6JHzXzl20jpSchgnD0vJt2iqWpIJy6p9jD6oTuNXgy0Qvr26ZXVNm/nCNUE h4l2kpCfOQZ23bsIEh4O1UdofHhvP8Uy2JeC7Gl2Dof4ixFU0SZ7KTq09HUg3xWkpKb6vzZuDwK/z /veHXPe9wT22jgNPM28s6m5AkIjed1ygPnnT/KZ4CpROZxwbwNbjsgHC0dD/z85GKM2MV4vNpsfxj FCbM5w+w==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rxBTa-0000000HQsz-3rBQ; Wed, 17 Apr 2024 20:01:50 +0000 Received: from mail-ed1-x52d.google.com ([2a00:1450:4864:20::52d]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rxBTH-0000000HQe2-3mp4 for linux-mediatek@lists.infradead.org; Wed, 17 Apr 2024 20:01:36 +0000 Received: by mail-ed1-x52d.google.com with SMTP id 4fb4d7f45d1cf-5700a9caee0so76196a12.2 for ; Wed, 17 Apr 2024 13:01:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1713384087; x=1713988887; darn=lists.infradead.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=JPbCq+oOUcmq2IMBiN6gCV1jsU1Thi9sfqYTDJv76Mk=; b=BCnOTINs+I5Oy8CMgQDUalokyDnV+V7MKlVygwBZmh+NKJmW9vAaC92bY3d3qOahrf jWsJkvxA/thmsbB+UcB2wftAhB9RYq+ACohHQm2w8riN8zPcXWnvyFrWlGwe1FTND7Z+ ycFHUqy46FuXBmxc6k1pf23xTyJM12haFjOBt5IZn6dPsjxRlicmqomoQm1EZ9IVoTLg FcINH/eosL+2hmFdMUCmC5BzBe/b4DIZ9zwZhO9Qvj8kFI0aJqAKtlievgKD9WZakyG5 C7b8ZpN4wj4njcC/4NrD+VWUW4JGime6zSP6YpYWjZEOQO/HHkmZCN1hnSkmSh8kNusD GtNg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1713384087; x=1713988887; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=JPbCq+oOUcmq2IMBiN6gCV1jsU1Thi9sfqYTDJv76Mk=; b=vt055YxA6yoHA7z37OGQJzkpxcmWteElYJiHb8jKMKfbOCCIi0xpxEDxTgWjyqeCaG Nq8fCPUnqunvEy1l+rQuasJO7Ly1f3j9qLvXw9neNNftMWz1Q8JAZL2Brvk/yxejYyLb jEOyQ0yy1RCy0I0Wvz/RqECURBQxbfFhQ/oVVp0b6sE3g3l3XDCfg/StMDjbw8Q5Hkd6 DZ/zNgJ0nQY2kp6pT4em1hM2uO1rNPqWzNHfbpElULOkWE/5300ceDHrlLKU5CZlRitr yKnmH2dTyrRxwEf23/9R5pChXSMZv2dV0Oat2gevf2Bw+Xyv+oyPE1qGFmWMrABPiMnw IUMQ== X-Forwarded-Encrypted: i=1; AJvYcCVMKNEPaaFgnzy8FpPowQtY16H4O4uHUzK3IJM3eWC7htqpSu9YrBp1hqg5KVNbJZSfGj8pFZOQlzTj7R3kVBVMFEjMVKaaCrH0aLIsjawRkr94 X-Gm-Message-State: AOJu0YxWuslQH3eHTeRlozq1AU/UvhGtd6iLfM4483kXuXkU6/Xrciil mhlIvxCB1XJ/n2IYthRDdcExCLhmMc2fSIaDWflvTPIo3djVN54OCzoXuuTFH7c= X-Google-Smtp-Source: AGHT+IGua8+m5t8v6T12y+RuGXYF3KFnzmkDgbe1oqMkbVQmx5XTKjDvs0Gfd1slqTTZRF4rKL/5FA== X-Received: by 2002:a17:906:144d:b0:a55:6600:b33 with SMTP id q13-20020a170906144d00b00a5566000b33mr324872ejc.23.1713384087256; Wed, 17 Apr 2024 13:01:27 -0700 (PDT) Received: from [127.0.1.1] ([79.114.172.194]) by smtp.gmail.com with ESMTPSA id gs6-20020a170906f18600b00a555ef55ab5sm939981ejb.218.2024.04.17.13.01.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 17 Apr 2024 13:01:26 -0700 (PDT) From: Abel Vesa Date: Wed, 17 Apr 2024 23:00:56 +0300 Subject: [PATCH v10 4/7] spmi: pmic-arb: Make the APID init a version operation MIME-Version: 1.0 Message-Id: <20240417-spmi-multi-master-support-v10-4-5bc6d322e266@linaro.org> References: <20240417-spmi-multi-master-support-v10-0-5bc6d322e266@linaro.org> In-Reply-To: <20240417-spmi-multi-master-support-v10-0-5bc6d322e266@linaro.org> To: Stephen Boyd , Matthias Brugger , Bjorn Andersson , Konrad Dybcio , Dmitry Baryshkov , Neil Armstrong , AngeloGioacchino Del Regno , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Srini Kandagatla , Johan Hovold , David Collins , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, Abel Vesa X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=9035; i=abel.vesa@linaro.org; h=from:subject:message-id; bh=nDUGRMtAX6AaUNrI4RsW85nuAecGS2OuKESyiWtIJd0=; b=owEBbQKS/ZANAwAKARtfRMkAlRVWAcsmYgBmICqFwbGUbq2PsX2eGqy4maYPsUKhfMAH9YNeZ hSfhupI27aJAjMEAAEKAB0WIQRO8+4RTnqPKsqn0bgbX0TJAJUVVgUCZiAqhQAKCRAbX0TJAJUV Vgs2D/45SZ5NUEJDVdxBMiV9kzH8CJQr93noiG+lFPDHLKKkTziW7zif/LC4O98LiIMxuYAo8wR SzW4CZ2En/Yb0+60WUyF1UZuG4VnqM6f3AL+mSSlreZdWXPCkTpwoLzQGRzmCNwMQekAM1HA+P0 TbQM8Z0p/+wgIz2iaQU2G2dX2NoWrjhHxycxE51GF0sT5Z0Fqmcrg0yHhmxz9Fkt0fU5Prk43ci dlfMjuaPeGRZ8Ev+cz0VBqCBAsVygmESpTRd3bXs1Om9xRBqSPN+K0Gy2YJitQEaL1qUBTcRmil 9cqGvlHzKp8nwGb0nzEOsZM6hHNepyUtD5FmtoI/i8nKzyo1CSLGBv/dSzH6RGbUh5Te0aA1OYA 1dowLr2hdYTu094I+ULnZ4VXV3/O7sh9GpvDVY9BhdfMAiWX7r8tflSL8Nq9D37Kc+tgG+pFibJ c/q8AeZNYTUgqCkqETJED66VRA4/Zq4mwVYE5MJiyhibXRBdAe7v17oW1N2ndc1xTu7TqmcTiOJ LON6QkfGzjjA20cxRJfTPVaL7/IWn2TI6PyoDy6N6vHJN1QkPyuiS5ygKdwQVobqKAPBsTC4/+g HNwcRQjreWxhSGRFd/cZSnXs7GI3Ksr45LtO7Divi6YaZ8a9iCljrKJnkgI7BcMItVD4e6FKsgM EKCA3BfqxIwsZuQ== X-Developer-Key: i=abel.vesa@linaro.org; a=openpgp; fpr=6AFF162D57F4223A8770EF5AF7BF214136F41FAE X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240417_130132_034789_3387A51E X-CRM114-Status: GOOD ( 19.23 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org Rather than using conditionals in probe function, add the APID init as a version specific operation. Due to v7, which supports multiple buses, pass on the bus index to be used for sorting out the apid base and count. Reviewed-by: Neil Armstrong Signed-off-by: Abel Vesa --- drivers/spmi/spmi-pmic-arb.c | 144 +++++++++++++++++++++---------------------- 1 file changed, 69 insertions(+), 75 deletions(-) diff --git a/drivers/spmi/spmi-pmic-arb.c b/drivers/spmi/spmi-pmic-arb.c index 12c0efd744c2..fe45d62a42e2 100644 --- a/drivers/spmi/spmi-pmic-arb.c +++ b/drivers/spmi/spmi-pmic-arb.c @@ -186,6 +186,7 @@ struct spmi_pmic_arb { * struct pmic_arb_ver_ops - version dependent functionality. * * @ver_str: version string. + * @init_apid: finds the apid base and count * @ppid_to_apid: finds the apid for a given ppid. * @non_data_cmd: on v1 issues an spmi non-data command. * on v2 no HW support, returns -EOPNOTSUPP. @@ -205,6 +206,7 @@ struct spmi_pmic_arb { */ struct pmic_arb_ver_ops { const char *ver_str; + int (*init_apid)(struct spmi_pmic_arb *pmic_arb); int (*ppid_to_apid)(struct spmi_pmic_arb *pmic_arb, u16 ppid); /* spmi commands (read_cmd, write_cmd, cmd) functionality */ int (*offset)(struct spmi_pmic_arb *pmic_arb, u8 sid, u16 addr, @@ -947,6 +949,32 @@ static int qpnpint_irq_domain_alloc(struct irq_domain *domain, return 0; } +static int pmic_arb_init_apid_min_max(struct spmi_pmic_arb *pmic_arb) +{ + /* + * Initialize max_apid/min_apid to the opposite bounds, during + * the irq domain translation, we are sure to update these + */ + pmic_arb->max_apid = 0; + pmic_arb->min_apid = pmic_arb->max_periphs - 1; + + return 0; +} + +static int pmic_arb_init_apid_v1(struct spmi_pmic_arb *pmic_arb) +{ + u32 *mapping_table; + + mapping_table = devm_kcalloc(&pmic_arb->spmic->dev, pmic_arb->max_periphs, + sizeof(*mapping_table), GFP_KERNEL); + if (!mapping_table) + return -ENOMEM; + + pmic_arb->mapping_table = mapping_table; + + return pmic_arb_init_apid_min_max(pmic_arb); +} + static int pmic_arb_ppid_to_apid_v1(struct spmi_pmic_arb *pmic_arb, u16 ppid) { u32 *mapping_table = pmic_arb->mapping_table; @@ -1149,6 +1177,34 @@ static int pmic_arb_offset_v2(struct spmi_pmic_arb *pmic_arb, u8 sid, u16 addr, return 0x1000 * pmic_arb->ee + 0x8000 * apid; } +static int pmic_arb_init_apid_v5(struct spmi_pmic_arb *pmic_arb) +{ + int ret; + + pmic_arb->base_apid = 0; + pmic_arb->apid_count = readl_relaxed(pmic_arb->core + PMIC_ARB_FEATURES) & + PMIC_ARB_FEATURES_PERIPH_MASK; + + if (pmic_arb->base_apid + pmic_arb->apid_count > pmic_arb->max_periphs) { + dev_err(&pmic_arb->spmic->dev, "Unsupported APID count %d detected\n", + pmic_arb->base_apid + pmic_arb->apid_count); + return -EINVAL; + } + + ret = pmic_arb_init_apid_min_max(pmic_arb); + if (ret) + return ret; + + ret = pmic_arb_read_apid_map_v5(pmic_arb); + if (ret) { + dev_err(&pmic_arb->spmic->dev, "could not read APID->PPID mapping table, rc= %d\n", + ret); + return ret; + } + + return 0; +} + /* * v5 offset per ee and per apid for observer channels and per apid for * read/write channels. @@ -1363,6 +1419,7 @@ pmic_arb_apid_owner_v7(struct spmi_pmic_arb *pmic_arb, u16 n) static const struct pmic_arb_ver_ops pmic_arb_v1 = { .ver_str = "v1", + .init_apid = pmic_arb_init_apid_v1, .ppid_to_apid = pmic_arb_ppid_to_apid_v1, .non_data_cmd = pmic_arb_non_data_cmd_v1, .offset = pmic_arb_offset_v1, @@ -1377,6 +1434,7 @@ static const struct pmic_arb_ver_ops pmic_arb_v1 = { static const struct pmic_arb_ver_ops pmic_arb_v2 = { .ver_str = "v2", + .init_apid = pmic_arb_init_apid_v1, .ppid_to_apid = pmic_arb_ppid_to_apid_v2, .non_data_cmd = pmic_arb_non_data_cmd_v2, .offset = pmic_arb_offset_v2, @@ -1391,6 +1449,7 @@ static const struct pmic_arb_ver_ops pmic_arb_v2 = { static const struct pmic_arb_ver_ops pmic_arb_v3 = { .ver_str = "v3", + .init_apid = pmic_arb_init_apid_v1, .ppid_to_apid = pmic_arb_ppid_to_apid_v2, .non_data_cmd = pmic_arb_non_data_cmd_v2, .offset = pmic_arb_offset_v2, @@ -1405,6 +1464,7 @@ static const struct pmic_arb_ver_ops pmic_arb_v3 = { static const struct pmic_arb_ver_ops pmic_arb_v5 = { .ver_str = "v5", + .init_apid = pmic_arb_init_apid_v5, .ppid_to_apid = pmic_arb_ppid_to_apid_v5, .non_data_cmd = pmic_arb_non_data_cmd_v2, .offset = pmic_arb_offset_v5, @@ -1419,6 +1479,7 @@ static const struct pmic_arb_ver_ops pmic_arb_v5 = { static const struct pmic_arb_ver_ops pmic_arb_v7 = { .ver_str = "v7", + .init_apid = pmic_arb_init_apid_v5, .ppid_to_apid = pmic_arb_ppid_to_apid_v5, .non_data_cmd = pmic_arb_non_data_cmd_v2, .offset = pmic_arb_offset_v7, @@ -1444,7 +1505,6 @@ static int spmi_pmic_arb_probe(struct platform_device *pdev) struct spmi_controller *ctrl; struct resource *res; void __iomem *core; - u32 *mapping_table; u32 channel, ee, hw_ver; int err; @@ -1472,12 +1532,6 @@ static int spmi_pmic_arb_probe(struct platform_device *pdev) pmic_arb->core_size = resource_size(res); - pmic_arb->ppid_to_apid = devm_kcalloc(&ctrl->dev, PMIC_ARB_MAX_PPID, - sizeof(*pmic_arb->ppid_to_apid), - GFP_KERNEL); - if (!pmic_arb->ppid_to_apid) - return -ENOMEM; - hw_ver = readl_relaxed(core + PMIC_ARB_VERSION); if (hw_ver < PMIC_ARB_VERSION_V2_MIN) { @@ -1511,58 +1565,17 @@ static int spmi_pmic_arb_probe(struct platform_device *pdev) return -ENOMEM; } - pmic_arb->max_periphs = PMIC_ARB_MAX_PERIPHS; + dev_info(&ctrl->dev, "PMIC arbiter version %s (0x%x)\n", + pmic_arb->ver_ops->ver_str, hw_ver); - if (hw_ver >= PMIC_ARB_VERSION_V7_MIN) { + if (hw_ver < PMIC_ARB_VERSION_V7_MIN) + pmic_arb->max_periphs = PMIC_ARB_MAX_PERIPHS; + else pmic_arb->max_periphs = PMIC_ARB_MAX_PERIPHS_V7; - /* Optional property for v7: */ - of_property_read_u32(pdev->dev.of_node, "qcom,bus-id", - &pmic_arb->bus_instance); - if (pmic_arb->bus_instance > 1) { - dev_err(&pdev->dev, "invalid bus instance (%u) specified\n", - pmic_arb->bus_instance); - return -EINVAL; - } - if (pmic_arb->bus_instance == 0) { - pmic_arb->base_apid = 0; - pmic_arb->apid_count = - readl_relaxed(core + PMIC_ARB_FEATURES) & - PMIC_ARB_FEATURES_PERIPH_MASK; - } else { - pmic_arb->base_apid = - readl_relaxed(core + PMIC_ARB_FEATURES) & - PMIC_ARB_FEATURES_PERIPH_MASK; - pmic_arb->apid_count = - readl_relaxed(core + PMIC_ARB_FEATURES1) & - PMIC_ARB_FEATURES_PERIPH_MASK; - } - - if (pmic_arb->base_apid + pmic_arb->apid_count > pmic_arb->max_periphs) { - dev_err(&pdev->dev, "Unsupported APID count %d detected\n", - pmic_arb->base_apid + pmic_arb->apid_count); - return -EINVAL; - } - } else if (hw_ver >= PMIC_ARB_VERSION_V5_MIN) { - pmic_arb->base_apid = 0; - pmic_arb->apid_count = readl_relaxed(core + PMIC_ARB_FEATURES) & - PMIC_ARB_FEATURES_PERIPH_MASK; - - if (pmic_arb->apid_count > pmic_arb->max_periphs) { - dev_err(&pdev->dev, "Unsupported APID count %d detected\n", - pmic_arb->apid_count); - return -EINVAL; - } - } - - pmic_arb->apid_data = devm_kcalloc(&ctrl->dev, pmic_arb->max_periphs, - sizeof(*pmic_arb->apid_data), - GFP_KERNEL); - if (!pmic_arb->apid_data) - return -ENOMEM; - - dev_info(&ctrl->dev, "PMIC arbiter version %s (0x%x)\n", - pmic_arb->ver_ops->ver_str, hw_ver); + err = pmic_arb->ver_ops->init_apid(pmic_arb); + if (err) + return err; res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "intr"); pmic_arb->intr = devm_ioremap_resource(&ctrl->dev, res); @@ -1604,16 +1617,6 @@ static int spmi_pmic_arb_probe(struct platform_device *pdev) } pmic_arb->ee = ee; - mapping_table = devm_kcalloc(&ctrl->dev, pmic_arb->max_periphs, - sizeof(*mapping_table), GFP_KERNEL); - if (!mapping_table) - return -ENOMEM; - - pmic_arb->mapping_table = mapping_table; - /* Initialize max_apid/min_apid to the opposite bounds, during - * the irq domain translation, we are sure to update these */ - pmic_arb->max_apid = 0; - pmic_arb->min_apid = pmic_arb->max_periphs - 1; platform_set_drvdata(pdev, ctrl); raw_spin_lock_init(&pmic_arb->lock); @@ -1622,15 +1625,6 @@ static int spmi_pmic_arb_probe(struct platform_device *pdev) ctrl->read_cmd = pmic_arb_read_cmd; ctrl->write_cmd = pmic_arb_write_cmd; - if (hw_ver >= PMIC_ARB_VERSION_V5_MIN) { - err = pmic_arb_read_apid_map_v5(pmic_arb); - if (err) { - dev_err(&pdev->dev, "could not read APID->PPID mapping table, rc= %d\n", - err); - return err; - } - } - dev_dbg(&pdev->dev, "adding irq domain\n"); pmic_arb->domain = irq_domain_add_tree(pdev->dev.of_node, &pmic_arb_irq_domain_ops, pmic_arb); From patchwork Wed Apr 17 20:00:57 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Abel Vesa X-Patchwork-Id: 13633779 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id AE49CC4345F for ; Wed, 17 Apr 2024 20:01:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References :Message-Id:Content-Transfer-Encoding:Content-Type:MIME-Version:Subject:Date: From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=9Ik1QcwFkKnesUoCKrKTfZ744eQhYqC76PyVF8lARPM=; b=O3vy08OS+ki/6mtUDfcvbREKw3 4KW5pHumj2lhCn6JuJgUUkn9wKti1L1y0vHhNDfdQz/Lxn9EFvCw2xqPTLKaRLKeBPQB7qtEVRdOk HgZ2eG2qe9lcY2TPAFqq3JtpdEAy60aWA6sGL0gqG0ZvGkWkgeUERIAqZ+r01hSw9w40zQtn2VpuR DzOtaonnkKkq21kh0tiZnmiP9LTKIZT4l2sy5XhbYPJR3XDPGp5tfoIAeAOW/XB8JKPIrZI/QVb0z Sy4ZSOrW+QEPMz8ATvtWT3JfgHNZUBMi4uHiBM5vkFcyaZa4GeyHV+2gNlHmd3w3Z5R3lgPYZSJZN iud4eyGg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rxBTZ-0000000HQru-3JxK; Wed, 17 Apr 2024 20:01:49 +0000 Received: from mail-ed1-x536.google.com ([2a00:1450:4864:20::536]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rxBTH-0000000HQeA-3on5 for linux-mediatek@lists.infradead.org; Wed, 17 Apr 2024 20:01:36 +0000 Received: by mail-ed1-x536.google.com with SMTP id 4fb4d7f45d1cf-565c6cf4819so2199163a12.1 for ; Wed, 17 Apr 2024 13:01:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1713384089; x=1713988889; darn=lists.infradead.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=9Ik1QcwFkKnesUoCKrKTfZ744eQhYqC76PyVF8lARPM=; b=FxLfd6Hee9ivdK+bqeadA7CSjmPZ5Lh18DBstD8wKhfwyk4J0vezXiXaarHUzJmdOm PDSNk9Q7T2rB4NepV0jaZ4g1zYwWMXc6idEEkqEBTQvc5myfVqmrwRHlz6miZOXxsuN+ OszmrmH0QgmFSEPIwWuA/N8ELn13roS0q6AHvSWW4El6jyiNjzlqRV1weyoJDT5K33dk kaEvsLziT6papxyGxEHL2w/FzWUMGqldTG+tNKJPZIXFkj4IeYQ/xAyUbagEkqKpjv8o kmFWIdVmxH64Ec7YfrQ8m7bt1j7RNDgQGI49mojDM82AtI1DGYEkWNrbFrZecsCdmcuD lduA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1713384089; x=1713988889; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=9Ik1QcwFkKnesUoCKrKTfZ744eQhYqC76PyVF8lARPM=; b=YwGvtfqs0nP2iJsuaTj7QeTLDNcyKS4Uw2swNJFvW2OCOubUuxg2YqOtVtkrkHMl2n nDQPs4OraVr6REu57WMsooSuaiUZfRPeY/VafEX2spc53chgbiTtOruGToOR+QApsl9x vJtOSY7Z1BIbVpmDTr3t4S8uzp67QkA1EnSEbzGSPq9BhfN8NVSjQXWZJ+FV4lBSqArH D1ijQiLAaeGttzc4PqS7hCWUBDCBue+t1jvw8etaOZHLUb0SvrUNHDJrcb5z9SQ43+8b FLG3zTinSOvCDBY0aHIhcxGU1xFXop0xuCBjVkph3QPQgVeNjxEA6ZDXBRtByreOYR4n llqg== X-Forwarded-Encrypted: i=1; AJvYcCVmdvZEEOphRiOLBE6BU03LR2f7/0ys8c471hM/VQTG2f+5LF87a+owENjVNWszlijKzSjXmrBIlESnqJRfSjpuPIPPbWFTsPSlXnGOGr8x9XNd X-Gm-Message-State: AOJu0Yyruh1zmOLTFzbhCsHWC/HHbniEPiyEXS06cb4NYg3ObhfhfeOu YjEVQ0rldEF9ZcHij+05NP8XMp0qCSWw8imcONE++Zft7O6RBkfLCKLLv4po57k= X-Google-Smtp-Source: AGHT+IH0ADVjOSm46pm7JjBY2G41SJgsx0GYCr4kfnbaMkRcZph7J0C5UHNbVGDyRkwCgDxixTPbbQ== X-Received: by 2002:a17:906:33d7:b0:a51:c62f:3c91 with SMTP id w23-20020a17090633d700b00a51c62f3c91mr145681eja.21.1713384088938; Wed, 17 Apr 2024 13:01:28 -0700 (PDT) Received: from [127.0.1.1] ([79.114.172.194]) by smtp.gmail.com with ESMTPSA id gs6-20020a170906f18600b00a555ef55ab5sm939981ejb.218.2024.04.17.13.01.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 17 Apr 2024 13:01:28 -0700 (PDT) From: Abel Vesa Date: Wed, 17 Apr 2024 23:00:57 +0300 Subject: [PATCH v10 5/7] spmi: pmic-arb: Make core resources acquiring a version operation MIME-Version: 1.0 Message-Id: <20240417-spmi-multi-master-support-v10-5-5bc6d322e266@linaro.org> References: <20240417-spmi-multi-master-support-v10-0-5bc6d322e266@linaro.org> In-Reply-To: <20240417-spmi-multi-master-support-v10-0-5bc6d322e266@linaro.org> To: Stephen Boyd , Matthias Brugger , Bjorn Andersson , Konrad Dybcio , Dmitry Baryshkov , Neil Armstrong , AngeloGioacchino Del Regno , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Srini Kandagatla , Johan Hovold , David Collins , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, Abel Vesa X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=8178; i=abel.vesa@linaro.org; h=from:subject:message-id; bh=JgE0pLWRTv3liz7sG3qb+WlIgraYdzr6rzGEiGnF5I4=; b=owEBbQKS/ZANAwAKARtfRMkAlRVWAcsmYgBmICqIeZOQ/UFnoQfy8FF9orO8nCgmRRZlXvP9E obaa5rfUNyJAjMEAAEKAB0WIQRO8+4RTnqPKsqn0bgbX0TJAJUVVgUCZiAqiAAKCRAbX0TJAJUV VnrHEACcNk9YzKjklZVvURP0R2ebjLmBuVNrEpPeJWAK6M8jxodrHRei7dQWJjTjPknRP7tKwuD lUedljsovk4q7UZt4yeX6kIbH0zcxppunqWB6ri3PA0jYP7BWbZ+w4oUUrgF0QGc8+FGtUKE0+i 7DwwW57X5mSwAfp/DFyQAkBEoZqru61D0Gan0rMZzKvkaIqH/MU65YG5d5e10qeiRDy4+g0hRLK KeaOrc/qp7UJb2WRbJAQ/giyPYahtcc7rlFX/nVYtT+InNmEy0aHyVzwjjaRxVR5md7C21px/g9 W5Pap+fFjCcr0UlDWfqWzGRaauEYhqAUArGimmPThwTbFeZ+FFJVD4eZ3gmJvL7VioqUcNeKYbX 2affei5CxttUztREbpi5c+7jq4SyZ3xR2+pu9zS+EMZaEVU7I/GwfWOGW6+5Gseh+t4WCbt4FmU cLN0yvSIftEpPRD/hGmwWmu89oGdxtKsKnXdKV4xyV65b7EKuwnqBeborL/pUK5zHgjTeJkJQPz uyME4yjgmefvjIET0HP9XPa7h4pqCcV4T5zRkkFzFdFgM684bnIugdkitiA2PGd/8KqgOREnx1w m1lNJ28BPjlWa5ZBEVS2408/80kD+fO6r9F+6rgFMJqTbHeR2ZehbyfLswrfSE8j2iXNcw3gzrq 3MMIMjRT2PC1aEA== X-Developer-Key: i=abel.vesa@linaro.org; a=openpgp; fpr=6AFF162D57F4223A8770EF5AF7BF214136F41FAE X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240417_130132_048831_9484FB99 X-CRM114-Status: GOOD ( 19.08 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org Rather than setting up the core, obsrv and chnls in probe by using version specific conditionals, add a dedicated "get_core_resources" version specific op and move the acquiring in there. Since there are no current users of the second bus yet, drop the comment about why devm_platform_ioremap_resource can't be used in case of "core", as it is not applicable anymore. Don't switch to devm_platform_ioremap_resource though as we need to keep track of core size. Reviewed-by: Neil Armstrong Signed-off-by: Abel Vesa --- drivers/spmi/spmi-pmic-arb.c | 114 +++++++++++++++++++++++++++---------------- 1 file changed, 71 insertions(+), 43 deletions(-) diff --git a/drivers/spmi/spmi-pmic-arb.c b/drivers/spmi/spmi-pmic-arb.c index fe45d62a42e2..db33ca0e11b8 100644 --- a/drivers/spmi/spmi-pmic-arb.c +++ b/drivers/spmi/spmi-pmic-arb.c @@ -186,6 +186,7 @@ struct spmi_pmic_arb { * struct pmic_arb_ver_ops - version dependent functionality. * * @ver_str: version string. + * @get_core_resources: initializes the core, observer and channels * @init_apid: finds the apid base and count * @ppid_to_apid: finds the apid for a given ppid. * @non_data_cmd: on v1 issues an spmi non-data command. @@ -206,6 +207,7 @@ struct spmi_pmic_arb { */ struct pmic_arb_ver_ops { const char *ver_str; + int (*get_core_resources)(struct platform_device *pdev, void __iomem *core); int (*init_apid)(struct spmi_pmic_arb *pmic_arb); int (*ppid_to_apid)(struct spmi_pmic_arb *pmic_arb, u16 ppid); /* spmi commands (read_cmd, write_cmd, cmd) functionality */ @@ -961,6 +963,19 @@ static int pmic_arb_init_apid_min_max(struct spmi_pmic_arb *pmic_arb) return 0; } +static int pmic_arb_get_core_resources_v1(struct platform_device *pdev, + void __iomem *core) +{ + struct spmi_pmic_arb *pmic_arb = platform_get_drvdata(pdev); + + pmic_arb->wr_base = core; + pmic_arb->rd_base = core; + + pmic_arb->max_periphs = PMIC_ARB_MAX_PERIPHS; + + return 0; +} + static int pmic_arb_init_apid_v1(struct spmi_pmic_arb *pmic_arb) { u32 *mapping_table; @@ -1062,6 +1077,33 @@ static u16 pmic_arb_find_apid(struct spmi_pmic_arb *pmic_arb, u16 ppid) return apid; } +static int pmic_arb_get_obsrvr_chnls_v2(struct platform_device *pdev) +{ + struct spmi_pmic_arb *pmic_arb = platform_get_drvdata(pdev); + + pmic_arb->rd_base = devm_platform_ioremap_resource_byname(pdev, "obsrvr"); + if (IS_ERR(pmic_arb->rd_base)) + return PTR_ERR(pmic_arb->rd_base); + + pmic_arb->wr_base = devm_platform_ioremap_resource_byname(pdev, "chnls"); + if (IS_ERR(pmic_arb->wr_base)) + return PTR_ERR(pmic_arb->wr_base); + + return 0; +} + +static int pmic_arb_get_core_resources_v2(struct platform_device *pdev, + void __iomem *core) +{ + struct spmi_pmic_arb *pmic_arb = platform_get_drvdata(pdev); + + pmic_arb->core = core; + + pmic_arb->max_periphs = PMIC_ARB_MAX_PERIPHS; + + return pmic_arb_get_obsrvr_chnls_v2(pdev); +} + static int pmic_arb_ppid_to_apid_v2(struct spmi_pmic_arb *pmic_arb, u16 ppid) { u16 apid_valid; @@ -1239,6 +1281,18 @@ static int pmic_arb_offset_v5(struct spmi_pmic_arb *pmic_arb, u8 sid, u16 addr, return offset; } +static int pmic_arb_get_core_resources_v7(struct platform_device *pdev, + void __iomem *core) +{ + struct spmi_pmic_arb *pmic_arb = platform_get_drvdata(pdev); + + pmic_arb->core = core; + + pmic_arb->max_periphs = PMIC_ARB_MAX_PERIPHS_V7; + + return pmic_arb_get_obsrvr_chnls_v2(pdev); +} + /* * v7 offset per ee and per apid for observer channels and per apid for * read/write channels. @@ -1419,6 +1473,7 @@ pmic_arb_apid_owner_v7(struct spmi_pmic_arb *pmic_arb, u16 n) static const struct pmic_arb_ver_ops pmic_arb_v1 = { .ver_str = "v1", + .get_core_resources = pmic_arb_get_core_resources_v1, .init_apid = pmic_arb_init_apid_v1, .ppid_to_apid = pmic_arb_ppid_to_apid_v1, .non_data_cmd = pmic_arb_non_data_cmd_v1, @@ -1434,6 +1489,7 @@ static const struct pmic_arb_ver_ops pmic_arb_v1 = { static const struct pmic_arb_ver_ops pmic_arb_v2 = { .ver_str = "v2", + .get_core_resources = pmic_arb_get_core_resources_v2, .init_apid = pmic_arb_init_apid_v1, .ppid_to_apid = pmic_arb_ppid_to_apid_v2, .non_data_cmd = pmic_arb_non_data_cmd_v2, @@ -1449,6 +1505,7 @@ static const struct pmic_arb_ver_ops pmic_arb_v2 = { static const struct pmic_arb_ver_ops pmic_arb_v3 = { .ver_str = "v3", + .get_core_resources = pmic_arb_get_core_resources_v2, .init_apid = pmic_arb_init_apid_v1, .ppid_to_apid = pmic_arb_ppid_to_apid_v2, .non_data_cmd = pmic_arb_non_data_cmd_v2, @@ -1464,6 +1521,7 @@ static const struct pmic_arb_ver_ops pmic_arb_v3 = { static const struct pmic_arb_ver_ops pmic_arb_v5 = { .ver_str = "v5", + .get_core_resources = pmic_arb_get_core_resources_v2, .init_apid = pmic_arb_init_apid_v5, .ppid_to_apid = pmic_arb_ppid_to_apid_v5, .non_data_cmd = pmic_arb_non_data_cmd_v2, @@ -1479,6 +1537,7 @@ static const struct pmic_arb_ver_ops pmic_arb_v5 = { static const struct pmic_arb_ver_ops pmic_arb_v7 = { .ver_str = "v7", + .get_core_resources = pmic_arb_get_core_resources_v7, .init_apid = pmic_arb_init_apid_v5, .ppid_to_apid = pmic_arb_ppid_to_apid_v5, .non_data_cmd = pmic_arb_non_data_cmd_v2, @@ -1515,16 +1574,6 @@ static int spmi_pmic_arb_probe(struct platform_device *pdev) pmic_arb = spmi_controller_get_drvdata(ctrl); pmic_arb->spmic = ctrl; - /* - * Please don't replace this with devm_platform_ioremap_resource() or - * devm_ioremap_resource(). These both result in a call to - * devm_request_mem_region() which prevents multiple mappings of this - * register address range. SoCs with PMIC arbiter v7 may define two - * arbiter devices, for the two physical SPMI interfaces, which share - * some register address ranges (i.e. "core", "obsrvr", and "chnls"). - * Ensure that both devices probe successfully by calling devm_ioremap() - * which does not result in a devm_request_mem_region() call. - */ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "core"); core = devm_ioremap(&ctrl->dev, res->start, resource_size(res)); if (!core) @@ -1534,44 +1583,23 @@ static int spmi_pmic_arb_probe(struct platform_device *pdev) hw_ver = readl_relaxed(core + PMIC_ARB_VERSION); - if (hw_ver < PMIC_ARB_VERSION_V2_MIN) { + if (hw_ver < PMIC_ARB_VERSION_V2_MIN) pmic_arb->ver_ops = &pmic_arb_v1; - pmic_arb->wr_base = core; - pmic_arb->rd_base = core; - } else { - pmic_arb->core = core; - - if (hw_ver < PMIC_ARB_VERSION_V3_MIN) - pmic_arb->ver_ops = &pmic_arb_v2; - else if (hw_ver < PMIC_ARB_VERSION_V5_MIN) - pmic_arb->ver_ops = &pmic_arb_v3; - else if (hw_ver < PMIC_ARB_VERSION_V7_MIN) - pmic_arb->ver_ops = &pmic_arb_v5; - else - pmic_arb->ver_ops = &pmic_arb_v7; - - res = platform_get_resource_byname(pdev, IORESOURCE_MEM, - "obsrvr"); - pmic_arb->rd_base = devm_ioremap(&ctrl->dev, res->start, - resource_size(res)); - if (!pmic_arb->rd_base) - return -ENOMEM; - - res = platform_get_resource_byname(pdev, IORESOURCE_MEM, - "chnls"); - pmic_arb->wr_base = devm_ioremap(&ctrl->dev, res->start, - resource_size(res)); - if (!pmic_arb->wr_base) - return -ENOMEM; - } + else if (hw_ver < PMIC_ARB_VERSION_V3_MIN) + pmic_arb->ver_ops = &pmic_arb_v2; + else if (hw_ver < PMIC_ARB_VERSION_V5_MIN) + pmic_arb->ver_ops = &pmic_arb_v3; + else if (hw_ver < PMIC_ARB_VERSION_V7_MIN) + pmic_arb->ver_ops = &pmic_arb_v5; + else + pmic_arb->ver_ops = &pmic_arb_v7; dev_info(&ctrl->dev, "PMIC arbiter version %s (0x%x)\n", pmic_arb->ver_ops->ver_str, hw_ver); - if (hw_ver < PMIC_ARB_VERSION_V7_MIN) - pmic_arb->max_periphs = PMIC_ARB_MAX_PERIPHS; - else - pmic_arb->max_periphs = PMIC_ARB_MAX_PERIPHS_V7; + err = pmic_arb->ver_ops->get_core_resources(pdev, core); + if (err) + return err; err = pmic_arb->ver_ops->init_apid(pmic_arb); if (err) From patchwork Wed Apr 17 20:00:58 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Abel Vesa X-Patchwork-Id: 13633782 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7DFE8C4345F for ; Wed, 17 Apr 2024 20:02:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References :Message-Id:Content-Transfer-Encoding:Content-Type:MIME-Version:Subject:Date: From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=42WiJ/8189wFZMyEblUnD9lJNMuNnxVENcbXmm8CVbI=; b=jdM2PvNmF25rWOGHINF6le+Rue VCaOx1lAFyXP7i8PTiPWhbCrkGLpCQOvqZedORK0LxgAlnIH+pmRqpUyjmMmdLo1qg95mRXkunMub FPAK4gCCdTpAGv/M4w/312RzcWD5SN1JUABT+6h1+ZWl4MdT+T97eSjWt6ubxVnuv8VBNuSaHywQd yGoxnRU1g4GGgeZVuwPRtmjZOqa/+X8nZBqXwOvd+00dxRdmwLccr5cMrfQ6sWIAlkrD75rRTvusc VMeuzrPsGE73j13XkcN2kNH3cHdUU1hi7vzNOyIzXcxs4vjPYsB069STrGvODmD309NxzE7IXnhrC T+1pJT0w==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rxBU0-0000000HREJ-2Ufk; Wed, 17 Apr 2024 20:02:16 +0000 Received: from mail-lj1-x232.google.com ([2a00:1450:4864:20::232]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rxBTJ-0000000HQg5-22iP for linux-mediatek@lists.infradead.org; Wed, 17 Apr 2024 20:01:47 +0000 Received: by mail-lj1-x232.google.com with SMTP id 38308e7fff4ca-2da01cb187cso2494081fa.0 for ; Wed, 17 Apr 2024 13:01:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1713384091; x=1713988891; darn=lists.infradead.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=42WiJ/8189wFZMyEblUnD9lJNMuNnxVENcbXmm8CVbI=; b=TQIUeZXEmp/mJklNLuC+KxsXx0YcJ+ewe5pH7ityc5K3bdELPLFTa27It9/eeobwyU VaGZn8VZpzWfrGn94T4ZLLF/xvCJHUmF5w3qnbYq6tEaMApdTYoDmOxuVqyUg53N2Z63 215KHYzYpqm/BJIIRPclJIjyNHEmBt+d+wLhJNaUG7SC/beSDBpqLjDYd4uz2EFT4N7l DYptYrWf1c7oBDpNdfueIckXXlfp3skqPGrr7aIZbSBTbzwZtUDDCjIvBKLCtV6Ajggk Juet1lpdc8a9NNQL2TFBYJ7jMzXgp0EEjBiOK3duxrP1aX5IdfTEJ9NgFexaunEGHEaW OnSg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1713384091; x=1713988891; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=42WiJ/8189wFZMyEblUnD9lJNMuNnxVENcbXmm8CVbI=; b=d3JuAu/CqXZNlV2IPrTz8gj8ymiFTocSo4myORgQO7MEYXzWJic/DTMNIGp/G+ZR6P xTcfX0GRQTPjNeQfe8wVZ8eg6PVOTBJCgLqtu4k/i69K9rPj3fp+pEHHtJQTeBAN0jbv ew6Ex2Y6jRq0AMFBEvV/O+FZy3kCjyN/7BIRMsxWdpc8XALaRFUAEzpeOpRfsyAWIwD9 rtBCu7ZVpJzh2J/vnPOsv1nBERPDqxf0ahDSWLjb/GIaiDcDfPy5QxrvIEm68zQBD1oT 0TBu8ylGy8Z81v1cax4B9ZvMKzsXoUWWdBNEI4KsilvPYIMy4iFTpHk/Z8P6xuM6S2Uy NRow== X-Forwarded-Encrypted: i=1; AJvYcCVrCmrAAtxLlpt409ub3RIraf2kIjC6M8VrcFXywhmZviiOBVK1QzqePdd0wh5mRaXYk/1aqtT7yc+tsGgwwTZ0KBbiOwAZCZwkOg9T0S7simrH X-Gm-Message-State: AOJu0YxulIWJZGel/gGmW7IzFTzsHgXcZjCjboKjW931iSYjbCcLCj+i uKNOJeXKb5iEI7pCxvg3YphcSZgcEUeZyP91T+ux7A1JH+jpQii4qX7puuCovOU= X-Google-Smtp-Source: AGHT+IG2+RSpJC4sITVc2w72rY+X8+sAI/oDPi5a4tLzxt05gBlYXnSpjpE1Z1qayZ9auuzu+yf2AA== X-Received: by 2002:a05:651c:217:b0:2d6:a609:9a33 with SMTP id y23-20020a05651c021700b002d6a6099a33mr278343ljn.0.1713384090939; Wed, 17 Apr 2024 13:01:30 -0700 (PDT) Received: from [127.0.1.1] ([79.114.172.194]) by smtp.gmail.com with ESMTPSA id gs6-20020a170906f18600b00a555ef55ab5sm939981ejb.218.2024.04.17.13.01.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 17 Apr 2024 13:01:30 -0700 (PDT) From: Abel Vesa Date: Wed, 17 Apr 2024 23:00:58 +0300 Subject: [PATCH v10 6/7] spmi: pmic-arb: Register controller for bus instead of arbiter MIME-Version: 1.0 Message-Id: <20240417-spmi-multi-master-support-v10-6-5bc6d322e266@linaro.org> References: <20240417-spmi-multi-master-support-v10-0-5bc6d322e266@linaro.org> In-Reply-To: <20240417-spmi-multi-master-support-v10-0-5bc6d322e266@linaro.org> To: Stephen Boyd , Matthias Brugger , Bjorn Andersson , Konrad Dybcio , Dmitry Baryshkov , Neil Armstrong , AngeloGioacchino Del Regno , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Srini Kandagatla , Johan Hovold , David Collins , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, Abel Vesa X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=51440; i=abel.vesa@linaro.org; h=from:subject:message-id; bh=Rj711lEjucwGUWeCyDlEvNXQIJ7UbiyrNmXghy+Tqy0=; b=owEBbQKS/ZANAwAKARtfRMkAlRVWAcsmYgBmICqKt9NJbq1gxmPPKvfEqxaumpFotDA92TAIl l2gtRi7RIeJAjMEAAEKAB0WIQRO8+4RTnqPKsqn0bgbX0TJAJUVVgUCZiAqigAKCRAbX0TJAJUV VpH1EADNBu3a+zNxWzzYSgIvv5hQcedgPkbQcQhiRxx3oyUNIvJCcS3iXUEOUp0BkamTNxD/2IC ZJa6qNNIGWAroJ0POLx0LXHKUDZBCa1gkKT1zHG9PKWtlnASXr2Iz+fgcUgk3k/Qd6P/ojHtvVg /Q54DqQQ+SpXrDtOU+vJGtDXPa5w64H3jMA37xwjLDXnRgLbxKtBLJk3tFvCD61j9/QWa1C/rui 3RHcZ6oQCOSxVsHoe7jVrJWWM8UlZPd3wgGlscdqf9TRlpnfA7hOupekeDXuPQNDKJgYWFGj2i1 7uxopAyxLC5K0wMieXB3JZBzCJ2rPGU4zS0xSKWdPeqqx0Es+6E8rmJgqAm49Ei29ipRCaXATc0 76EZ4yeaCp+BuUEswWwvjPdRR+5J/naPssB3jLCHj229WVn614DO6vwp2DynoRx8/VBtFWuK0XB qhVclfdnjE5ywzxKknoo5BC+I2kKJ1PhuYhWSakGbPrkbmr0PBCJeoYIoUR1kKpvDcMGN+LbxnS 7gzgsgSA0MCEhi5uo9AK7oHa/p2EqmrMvOgGqeU01wg7Ev9x4nPYLopJCBzUMhh7/nnqmjvWVG7 pNFcpgOSn2Q7ue02TRB3cOWqExP4h6NwTB+DIU2NTT4GY0oJ4BNCA8e7ECRktElUHi0noOy6L9K Zf5xcMZBRZVkpIg== X-Developer-Key: i=abel.vesa@linaro.org; a=openpgp; fpr=6AFF162D57F4223A8770EF5AF7BF214136F41FAE X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240417_130133_650443_AA17535A X-CRM114-Status: GOOD ( 17.11 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org Introduce the bus object in order to decouple the resources that are bus specific from the arbiter. This way the SPMI controller is registered with the generic framework at a bus level rather than arbiter. This is needed in order to prepare for multi bus support. Reviewed-by: Neil Armstrong Signed-off-by: Abel Vesa --- drivers/spmi/spmi-pmic-arb.c | 659 ++++++++++++++++++++++++------------------- 1 file changed, 374 insertions(+), 285 deletions(-) diff --git a/drivers/spmi/spmi-pmic-arb.c b/drivers/spmi/spmi-pmic-arb.c index db33ca0e11b8..36599e952599 100644 --- a/drivers/spmi/spmi-pmic-arb.c +++ b/drivers/spmi/spmi-pmic-arb.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #include #include @@ -125,61 +126,72 @@ struct apid_data { u8 irq_ee; }; +struct spmi_pmic_arb; + /** - * struct spmi_pmic_arb - SPMI PMIC Arbiter object + * struct spmi_pmic_arb_bus - SPMI PMIC Arbiter Bus object * - * @rd_base: on v1 "core", on v2 "observer" register base off DT. - * @wr_base: on v1 "core", on v2 "chnls" register base off DT. + * @pmic_arb: the SPMI PMIC Arbiter the bus belongs to. + * @domain: irq domain object for PMIC IRQ domain * @intr: address of the SPMI interrupt control registers. * @cnfg: address of the PMIC Arbiter configuration registers. - * @core: core register base for v2 and above only (see above) - * @core_size: core register base size + * @spmic: spmi controller registered for this bus * @lock: lock to synchronize accesses. - * @channel: execution environment channel to use for accesses. - * @irq: PMIC ARB interrupt. - * @ee: the current Execution Environment - * @bus_instance: on v7: 0 = primary SPMI bus, 1 = secondary SPMI bus - * @min_apid: minimum APID (used for bounding IRQ search) - * @max_apid: maximum APID * @base_apid: on v7: minimum APID associated with the particular SPMI * bus instance * @apid_count: on v5 and v7: number of APIDs associated with the * particular SPMI bus instance * @mapping_table: in-memory copy of PPID -> APID mapping table. * @mapping_table_valid:bitmap containing valid-only periphs - * @domain: irq domain object for PMIC IRQ domain - * @spmic: SPMI controller object - * @ver_ops: version dependent operations. * @ppid_to_apid: in-memory copy of PPID -> APID mapping table. * @last_apid: Highest value APID in use * @apid_data: Table of data for all APIDs - * @max_periphs: Number of elements in apid_data[] + * @min_apid: minimum APID (used for bounding IRQ search) + * @max_apid: maximum APID + * @irq: PMIC ARB interrupt. */ -struct spmi_pmic_arb { - void __iomem *rd_base; - void __iomem *wr_base; +struct spmi_pmic_arb_bus { + struct spmi_pmic_arb *pmic_arb; + struct irq_domain *domain; void __iomem *intr; void __iomem *cnfg; - void __iomem *core; - resource_size_t core_size; + struct spmi_controller *spmic; raw_spinlock_t lock; - u8 channel; - int irq; - u8 ee; - u32 bus_instance; - u16 min_apid; - u16 max_apid; u16 base_apid; int apid_count; u32 *mapping_table; DECLARE_BITMAP(mapping_table_valid, PMIC_ARB_MAX_PERIPHS); - struct irq_domain *domain; - struct spmi_controller *spmic; - const struct pmic_arb_ver_ops *ver_ops; u16 *ppid_to_apid; u16 last_apid; struct apid_data *apid_data; + u16 min_apid; + u16 max_apid; + int irq; +}; + +/** + * struct spmi_pmic_arb - SPMI PMIC Arbiter object + * + * @rd_base: on v1 "core", on v2 "observer" register base off DT. + * @wr_base: on v1 "core", on v2 "chnls" register base off DT. + * @core: core register base for v2 and above only (see above) + * @core_size: core register base size + * @channel: execution environment channel to use for accesses. + * @ee: the current Execution Environment + * @ver_ops: version dependent operations. + * @max_periphs: Number of elements in apid_data[] + * @bus: per arbiter bus instance + */ +struct spmi_pmic_arb { + void __iomem *rd_base; + void __iomem *wr_base; + void __iomem *core; + resource_size_t core_size; + u8 channel; + u8 ee; + const struct pmic_arb_ver_ops *ver_ops; int max_periphs; + struct spmi_pmic_arb_bus *bus; }; /** @@ -208,21 +220,21 @@ struct spmi_pmic_arb { struct pmic_arb_ver_ops { const char *ver_str; int (*get_core_resources)(struct platform_device *pdev, void __iomem *core); - int (*init_apid)(struct spmi_pmic_arb *pmic_arb); - int (*ppid_to_apid)(struct spmi_pmic_arb *pmic_arb, u16 ppid); + int (*init_apid)(struct spmi_pmic_arb_bus *bus); + int (*ppid_to_apid)(struct spmi_pmic_arb_bus *bus, u16 ppid); /* spmi commands (read_cmd, write_cmd, cmd) functionality */ - int (*offset)(struct spmi_pmic_arb *pmic_arb, u8 sid, u16 addr, - enum pmic_arb_channel ch_type); + int (*offset)(struct spmi_pmic_arb_bus *bus, u8 sid, u16 addr, + enum pmic_arb_channel ch_type); u32 (*fmt_cmd)(u8 opc, u8 sid, u16 addr, u8 bc); int (*non_data_cmd)(struct spmi_controller *ctrl, u8 opc, u8 sid); /* Interrupts controller functionality (offset of PIC registers) */ - void __iomem *(*owner_acc_status)(struct spmi_pmic_arb *pmic_arb, u8 m, + void __iomem *(*owner_acc_status)(struct spmi_pmic_arb_bus *bus, u8 m, u16 n); - void __iomem *(*acc_enable)(struct spmi_pmic_arb *pmic_arb, u16 n); - void __iomem *(*irq_status)(struct spmi_pmic_arb *pmic_arb, u16 n); - void __iomem *(*irq_clear)(struct spmi_pmic_arb *pmic_arb, u16 n); + void __iomem *(*acc_enable)(struct spmi_pmic_arb_bus *bus, u16 n); + void __iomem *(*irq_status)(struct spmi_pmic_arb_bus *bus, u16 n); + void __iomem *(*irq_clear)(struct spmi_pmic_arb_bus *bus, u16 n); u32 (*apid_map_offset)(u16 n); - void __iomem *(*apid_owner)(struct spmi_pmic_arb *pmic_arb, u16 n); + void __iomem *(*apid_owner)(struct spmi_pmic_arb_bus *bus, u16 n); }; static inline void pmic_arb_base_write(struct spmi_pmic_arb *pmic_arb, @@ -272,13 +284,14 @@ static int pmic_arb_wait_for_done(struct spmi_controller *ctrl, void __iomem *base, u8 sid, u16 addr, enum pmic_arb_channel ch_type) { - struct spmi_pmic_arb *pmic_arb = spmi_controller_get_drvdata(ctrl); + struct spmi_pmic_arb_bus *bus = spmi_controller_get_drvdata(ctrl); + struct spmi_pmic_arb *pmic_arb = bus->pmic_arb; u32 status = 0; u32 timeout = PMIC_ARB_TIMEOUT_US; u32 offset; int rc; - rc = pmic_arb->ver_ops->offset(pmic_arb, sid, addr, ch_type); + rc = pmic_arb->ver_ops->offset(bus, sid, addr, ch_type); if (rc < 0) return rc; @@ -321,24 +334,25 @@ static int pmic_arb_wait_for_done(struct spmi_controller *ctrl, static int pmic_arb_non_data_cmd_v1(struct spmi_controller *ctrl, u8 opc, u8 sid) { - struct spmi_pmic_arb *pmic_arb = spmi_controller_get_drvdata(ctrl); + struct spmi_pmic_arb_bus *bus = spmi_controller_get_drvdata(ctrl); + struct spmi_pmic_arb *pmic_arb = bus->pmic_arb; unsigned long flags; u32 cmd; int rc; u32 offset; - rc = pmic_arb->ver_ops->offset(pmic_arb, sid, 0, PMIC_ARB_CHANNEL_RW); + rc = pmic_arb->ver_ops->offset(bus, sid, 0, PMIC_ARB_CHANNEL_RW); if (rc < 0) return rc; offset = rc; cmd = ((opc | 0x40) << 27) | ((sid & 0xf) << 20); - raw_spin_lock_irqsave(&pmic_arb->lock, flags); + raw_spin_lock_irqsave(&bus->lock, flags); pmic_arb_base_write(pmic_arb, offset + PMIC_ARB_CMD, cmd); rc = pmic_arb_wait_for_done(ctrl, pmic_arb->wr_base, sid, 0, PMIC_ARB_CHANNEL_RW); - raw_spin_unlock_irqrestore(&pmic_arb->lock, flags); + raw_spin_unlock_irqrestore(&bus->lock, flags); return rc; } @@ -363,20 +377,21 @@ static int pmic_arb_cmd(struct spmi_controller *ctrl, u8 opc, u8 sid) return pmic_arb->ver_ops->non_data_cmd(ctrl, opc, sid); } -static int pmic_arb_fmt_read_cmd(struct spmi_pmic_arb *pmic_arb, u8 opc, u8 sid, +static int pmic_arb_fmt_read_cmd(struct spmi_pmic_arb_bus *bus, u8 opc, u8 sid, u16 addr, size_t len, u32 *cmd, u32 *offset) { + struct spmi_pmic_arb *pmic_arb = bus->pmic_arb; u8 bc = len - 1; int rc; - rc = pmic_arb->ver_ops->offset(pmic_arb, sid, addr, + rc = pmic_arb->ver_ops->offset(bus, sid, addr, PMIC_ARB_CHANNEL_OBS); if (rc < 0) return rc; *offset = rc; if (bc >= PMIC_ARB_MAX_TRANS_BYTES) { - dev_err(&pmic_arb->spmic->dev, "pmic-arb supports 1..%d bytes per trans, but:%zu requested", + dev_err(&bus->spmic->dev, "pmic-arb supports 1..%d bytes per trans, but:%zu requested", PMIC_ARB_MAX_TRANS_BYTES, len); return -EINVAL; } @@ -400,7 +415,8 @@ static int pmic_arb_read_cmd_unlocked(struct spmi_controller *ctrl, u32 cmd, u32 offset, u8 sid, u16 addr, u8 *buf, size_t len) { - struct spmi_pmic_arb *pmic_arb = spmi_controller_get_drvdata(ctrl); + struct spmi_pmic_arb_bus *bus = spmi_controller_get_drvdata(ctrl); + struct spmi_pmic_arb *pmic_arb = bus->pmic_arb; u8 bc = len - 1; int rc; @@ -422,38 +438,39 @@ static int pmic_arb_read_cmd_unlocked(struct spmi_controller *ctrl, u32 cmd, static int pmic_arb_read_cmd(struct spmi_controller *ctrl, u8 opc, u8 sid, u16 addr, u8 *buf, size_t len) { - struct spmi_pmic_arb *pmic_arb = spmi_controller_get_drvdata(ctrl); + struct spmi_pmic_arb_bus *bus = spmi_controller_get_drvdata(ctrl); unsigned long flags; u32 cmd, offset; int rc; - rc = pmic_arb_fmt_read_cmd(pmic_arb, opc, sid, addr, len, &cmd, + rc = pmic_arb_fmt_read_cmd(bus, opc, sid, addr, len, &cmd, &offset); if (rc) return rc; - raw_spin_lock_irqsave(&pmic_arb->lock, flags); + raw_spin_lock_irqsave(&bus->lock, flags); rc = pmic_arb_read_cmd_unlocked(ctrl, cmd, offset, sid, addr, buf, len); - raw_spin_unlock_irqrestore(&pmic_arb->lock, flags); + raw_spin_unlock_irqrestore(&bus->lock, flags); return rc; } -static int pmic_arb_fmt_write_cmd(struct spmi_pmic_arb *pmic_arb, u8 opc, +static int pmic_arb_fmt_write_cmd(struct spmi_pmic_arb_bus *bus, u8 opc, u8 sid, u16 addr, size_t len, u32 *cmd, u32 *offset) { + struct spmi_pmic_arb *pmic_arb = bus->pmic_arb; u8 bc = len - 1; int rc; - rc = pmic_arb->ver_ops->offset(pmic_arb, sid, addr, + rc = pmic_arb->ver_ops->offset(bus, sid, addr, PMIC_ARB_CHANNEL_RW); if (rc < 0) return rc; *offset = rc; if (bc >= PMIC_ARB_MAX_TRANS_BYTES) { - dev_err(&pmic_arb->spmic->dev, "pmic-arb supports 1..%d bytes per trans, but:%zu requested", + dev_err(&bus->spmic->dev, "pmic-arb supports 1..%d bytes per trans, but:%zu requested", PMIC_ARB_MAX_TRANS_BYTES, len); return -EINVAL; } @@ -479,7 +496,8 @@ static int pmic_arb_write_cmd_unlocked(struct spmi_controller *ctrl, u32 cmd, u32 offset, u8 sid, u16 addr, const u8 *buf, size_t len) { - struct spmi_pmic_arb *pmic_arb = spmi_controller_get_drvdata(ctrl); + struct spmi_pmic_arb_bus *bus = spmi_controller_get_drvdata(ctrl); + struct spmi_pmic_arb *pmic_arb = bus->pmic_arb; u8 bc = len - 1; /* Write data to FIFOs */ @@ -498,20 +516,20 @@ static int pmic_arb_write_cmd_unlocked(struct spmi_controller *ctrl, u32 cmd, static int pmic_arb_write_cmd(struct spmi_controller *ctrl, u8 opc, u8 sid, u16 addr, const u8 *buf, size_t len) { - struct spmi_pmic_arb *pmic_arb = spmi_controller_get_drvdata(ctrl); + struct spmi_pmic_arb_bus *bus = spmi_controller_get_drvdata(ctrl); unsigned long flags; u32 cmd, offset; int rc; - rc = pmic_arb_fmt_write_cmd(pmic_arb, opc, sid, addr, len, &cmd, + rc = pmic_arb_fmt_write_cmd(bus, opc, sid, addr, len, &cmd, &offset); if (rc) return rc; - raw_spin_lock_irqsave(&pmic_arb->lock, flags); + raw_spin_lock_irqsave(&bus->lock, flags); rc = pmic_arb_write_cmd_unlocked(ctrl, cmd, offset, sid, addr, buf, len); - raw_spin_unlock_irqrestore(&pmic_arb->lock, flags); + raw_spin_unlock_irqrestore(&bus->lock, flags); return rc; } @@ -519,23 +537,23 @@ static int pmic_arb_write_cmd(struct spmi_controller *ctrl, u8 opc, u8 sid, static int pmic_arb_masked_write(struct spmi_controller *ctrl, u8 sid, u16 addr, const u8 *buf, const u8 *mask, size_t len) { - struct spmi_pmic_arb *pmic_arb = spmi_controller_get_drvdata(ctrl); + struct spmi_pmic_arb_bus *bus = spmi_controller_get_drvdata(ctrl); u32 read_cmd, read_offset, write_cmd, write_offset; u8 temp[PMIC_ARB_MAX_TRANS_BYTES]; unsigned long flags; int rc, i; - rc = pmic_arb_fmt_read_cmd(pmic_arb, SPMI_CMD_EXT_READL, sid, addr, len, + rc = pmic_arb_fmt_read_cmd(bus, SPMI_CMD_EXT_READL, sid, addr, len, &read_cmd, &read_offset); if (rc) return rc; - rc = pmic_arb_fmt_write_cmd(pmic_arb, SPMI_CMD_EXT_WRITEL, sid, addr, + rc = pmic_arb_fmt_write_cmd(bus, SPMI_CMD_EXT_WRITEL, sid, addr, len, &write_cmd, &write_offset); if (rc) return rc; - raw_spin_lock_irqsave(&pmic_arb->lock, flags); + raw_spin_lock_irqsave(&bus->lock, flags); rc = pmic_arb_read_cmd_unlocked(ctrl, read_cmd, read_offset, sid, addr, temp, len); if (rc) @@ -547,7 +565,7 @@ static int pmic_arb_masked_write(struct spmi_controller *ctrl, u8 sid, u16 addr, rc = pmic_arb_write_cmd_unlocked(ctrl, write_cmd, write_offset, sid, addr, temp, len); done: - raw_spin_unlock_irqrestore(&pmic_arb->lock, flags); + raw_spin_unlock_irqrestore(&bus->lock, flags); return rc; } @@ -573,25 +591,25 @@ struct spmi_pmic_arb_qpnpint_type { static void qpnpint_spmi_write(struct irq_data *d, u8 reg, void *buf, size_t len) { - struct spmi_pmic_arb *pmic_arb = irq_data_get_irq_chip_data(d); + struct spmi_pmic_arb_bus *bus = irq_data_get_irq_chip_data(d); u8 sid = hwirq_to_sid(d->hwirq); u8 per = hwirq_to_per(d->hwirq); - if (pmic_arb_write_cmd(pmic_arb->spmic, SPMI_CMD_EXT_WRITEL, sid, + if (pmic_arb_write_cmd(bus->spmic, SPMI_CMD_EXT_WRITEL, sid, (per << 8) + reg, buf, len)) - dev_err_ratelimited(&pmic_arb->spmic->dev, "failed irqchip transaction on %x\n", + dev_err_ratelimited(&bus->spmic->dev, "failed irqchip transaction on %x\n", d->irq); } static void qpnpint_spmi_read(struct irq_data *d, u8 reg, void *buf, size_t len) { - struct spmi_pmic_arb *pmic_arb = irq_data_get_irq_chip_data(d); + struct spmi_pmic_arb_bus *bus = irq_data_get_irq_chip_data(d); u8 sid = hwirq_to_sid(d->hwirq); u8 per = hwirq_to_per(d->hwirq); - if (pmic_arb_read_cmd(pmic_arb->spmic, SPMI_CMD_EXT_READL, sid, + if (pmic_arb_read_cmd(bus->spmic, SPMI_CMD_EXT_READL, sid, (per << 8) + reg, buf, len)) - dev_err_ratelimited(&pmic_arb->spmic->dev, "failed irqchip transaction on %x\n", + dev_err_ratelimited(&bus->spmic->dev, "failed irqchip transaction on %x\n", d->irq); } @@ -599,47 +617,49 @@ static int qpnpint_spmi_masked_write(struct irq_data *d, u8 reg, const void *buf, const void *mask, size_t len) { - struct spmi_pmic_arb *pmic_arb = irq_data_get_irq_chip_data(d); + struct spmi_pmic_arb_bus *bus = irq_data_get_irq_chip_data(d); u8 sid = hwirq_to_sid(d->hwirq); u8 per = hwirq_to_per(d->hwirq); int rc; - rc = pmic_arb_masked_write(pmic_arb->spmic, sid, (per << 8) + reg, buf, + rc = pmic_arb_masked_write(bus->spmic, sid, (per << 8) + reg, buf, mask, len); if (rc) - dev_err_ratelimited(&pmic_arb->spmic->dev, "failed irqchip transaction on %x rc=%d\n", + dev_err_ratelimited(&bus->spmic->dev, "failed irqchip transaction on %x rc=%d\n", d->irq, rc); return rc; } -static void cleanup_irq(struct spmi_pmic_arb *pmic_arb, u16 apid, int id) +static void cleanup_irq(struct spmi_pmic_arb_bus *bus, u16 apid, int id) { - u16 ppid = pmic_arb->apid_data[apid].ppid; + struct spmi_pmic_arb *pmic_arb = bus->pmic_arb; + u16 ppid = bus->apid_data[apid].ppid; u8 sid = ppid >> 8; u8 per = ppid & 0xFF; u8 irq_mask = BIT(id); - dev_err_ratelimited(&pmic_arb->spmic->dev, "%s apid=%d sid=0x%x per=0x%x irq=%d\n", - __func__, apid, sid, per, id); - writel_relaxed(irq_mask, pmic_arb->ver_ops->irq_clear(pmic_arb, apid)); + dev_err_ratelimited(&bus->spmic->dev, "%s apid=%d sid=0x%x per=0x%x irq=%d\n", + __func__, apid, sid, per, id); + writel_relaxed(irq_mask, pmic_arb->ver_ops->irq_clear(bus, apid)); } -static int periph_interrupt(struct spmi_pmic_arb *pmic_arb, u16 apid) +static int periph_interrupt(struct spmi_pmic_arb_bus *bus, u16 apid) { + struct spmi_pmic_arb *pmic_arb = bus->pmic_arb; unsigned int irq; u32 status, id; int handled = 0; - u8 sid = (pmic_arb->apid_data[apid].ppid >> 8) & 0xF; - u8 per = pmic_arb->apid_data[apid].ppid & 0xFF; + u8 sid = (bus->apid_data[apid].ppid >> 8) & 0xF; + u8 per = bus->apid_data[apid].ppid & 0xFF; - status = readl_relaxed(pmic_arb->ver_ops->irq_status(pmic_arb, apid)); + status = readl_relaxed(pmic_arb->ver_ops->irq_status(bus, apid)); while (status) { id = ffs(status) - 1; status &= ~BIT(id); - irq = irq_find_mapping(pmic_arb->domain, - spec_to_hwirq(sid, per, id, apid)); + irq = irq_find_mapping(bus->domain, + spec_to_hwirq(sid, per, id, apid)); if (irq == 0) { - cleanup_irq(pmic_arb, apid, id); + cleanup_irq(bus, apid, id); continue; } generic_handle_irq(irq); @@ -651,16 +671,17 @@ static int periph_interrupt(struct spmi_pmic_arb *pmic_arb, u16 apid) static void pmic_arb_chained_irq(struct irq_desc *desc) { - struct spmi_pmic_arb *pmic_arb = irq_desc_get_handler_data(desc); + struct spmi_pmic_arb_bus *bus = irq_desc_get_handler_data(desc); + struct spmi_pmic_arb *pmic_arb = bus->pmic_arb; const struct pmic_arb_ver_ops *ver_ops = pmic_arb->ver_ops; struct irq_chip *chip = irq_desc_get_chip(desc); - int first = pmic_arb->min_apid; - int last = pmic_arb->max_apid; + int first = bus->min_apid; + int last = bus->max_apid; /* * acc_offset will be non-zero for the secondary SPMI bus instance on * v7 controllers. */ - int acc_offset = pmic_arb->base_apid >> 5; + int acc_offset = bus->base_apid >> 5; u8 ee = pmic_arb->ee; u32 status, enable, handled = 0; int i, id, apid; @@ -671,7 +692,7 @@ static void pmic_arb_chained_irq(struct irq_desc *desc) chained_irq_enter(chip, desc); for (i = first >> 5; i <= last >> 5; ++i) { - status = readl_relaxed(ver_ops->owner_acc_status(pmic_arb, ee, i - acc_offset)); + status = readl_relaxed(ver_ops->owner_acc_status(bus, ee, i - acc_offset)); if (status) acc_valid = true; @@ -685,9 +706,9 @@ static void pmic_arb_chained_irq(struct irq_desc *desc) continue; } enable = readl_relaxed( - ver_ops->acc_enable(pmic_arb, apid)); + ver_ops->acc_enable(bus, apid)); if (enable & SPMI_PIC_ACC_ENABLE_BIT) - if (periph_interrupt(pmic_arb, apid) != 0) + if (periph_interrupt(bus, apid) != 0) handled++; } } @@ -696,19 +717,19 @@ static void pmic_arb_chained_irq(struct irq_desc *desc) if (!acc_valid) { for (i = first; i <= last; i++) { /* skip if APPS is not irq owner */ - if (pmic_arb->apid_data[i].irq_ee != pmic_arb->ee) + if (bus->apid_data[i].irq_ee != pmic_arb->ee) continue; irq_status = readl_relaxed( - ver_ops->irq_status(pmic_arb, i)); + ver_ops->irq_status(bus, i)); if (irq_status) { enable = readl_relaxed( - ver_ops->acc_enable(pmic_arb, i)); + ver_ops->acc_enable(bus, i)); if (enable & SPMI_PIC_ACC_ENABLE_BIT) { - dev_dbg(&pmic_arb->spmic->dev, + dev_dbg(&bus->spmic->dev, "Dispatching IRQ for apid=%d status=%x\n", i, irq_status); - if (periph_interrupt(pmic_arb, i) != 0) + if (periph_interrupt(bus, i) != 0) handled++; } } @@ -723,12 +744,13 @@ static void pmic_arb_chained_irq(struct irq_desc *desc) static void qpnpint_irq_ack(struct irq_data *d) { - struct spmi_pmic_arb *pmic_arb = irq_data_get_irq_chip_data(d); + struct spmi_pmic_arb_bus *bus = irq_data_get_irq_chip_data(d); + struct spmi_pmic_arb *pmic_arb = bus->pmic_arb; u8 irq = hwirq_to_irq(d->hwirq); u16 apid = hwirq_to_apid(d->hwirq); u8 data; - writel_relaxed(BIT(irq), pmic_arb->ver_ops->irq_clear(pmic_arb, apid)); + writel_relaxed(BIT(irq), pmic_arb->ver_ops->irq_clear(bus, apid)); data = BIT(irq); qpnpint_spmi_write(d, QPNPINT_REG_LATCHED_CLR, &data, 1); @@ -744,14 +766,15 @@ static void qpnpint_irq_mask(struct irq_data *d) static void qpnpint_irq_unmask(struct irq_data *d) { - struct spmi_pmic_arb *pmic_arb = irq_data_get_irq_chip_data(d); + struct spmi_pmic_arb_bus *bus = irq_data_get_irq_chip_data(d); + struct spmi_pmic_arb *pmic_arb = bus->pmic_arb; const struct pmic_arb_ver_ops *ver_ops = pmic_arb->ver_ops; u8 irq = hwirq_to_irq(d->hwirq); u16 apid = hwirq_to_apid(d->hwirq); u8 buf[2]; writel_relaxed(SPMI_PIC_ACC_ENABLE_BIT, - ver_ops->acc_enable(pmic_arb, apid)); + ver_ops->acc_enable(bus, apid)); qpnpint_spmi_read(d, QPNPINT_REG_EN_SET, &buf[0], 1); if (!(buf[0] & BIT(irq))) { @@ -808,9 +831,9 @@ static int qpnpint_irq_set_type(struct irq_data *d, unsigned int flow_type) static int qpnpint_irq_set_wake(struct irq_data *d, unsigned int on) { - struct spmi_pmic_arb *pmic_arb = irq_data_get_irq_chip_data(d); + struct spmi_pmic_arb_bus *bus = irq_data_get_irq_chip_data(d); - return irq_set_irq_wake(pmic_arb->irq, on); + return irq_set_irq_wake(bus->irq, on); } static int qpnpint_get_irqchip_state(struct irq_data *d, @@ -832,17 +855,18 @@ static int qpnpint_get_irqchip_state(struct irq_data *d, static int qpnpint_irq_domain_activate(struct irq_domain *domain, struct irq_data *d, bool reserve) { - struct spmi_pmic_arb *pmic_arb = irq_data_get_irq_chip_data(d); + struct spmi_pmic_arb_bus *bus = irq_data_get_irq_chip_data(d); + struct spmi_pmic_arb *pmic_arb = bus->pmic_arb; u16 periph = hwirq_to_per(d->hwirq); u16 apid = hwirq_to_apid(d->hwirq); u16 sid = hwirq_to_sid(d->hwirq); u16 irq = hwirq_to_irq(d->hwirq); u8 buf; - if (pmic_arb->apid_data[apid].irq_ee != pmic_arb->ee) { - dev_err(&pmic_arb->spmic->dev, "failed to xlate sid = %#x, periph = %#x, irq = %u: ee=%u but owner=%u\n", + if (bus->apid_data[apid].irq_ee != pmic_arb->ee) { + dev_err(&bus->spmic->dev, "failed to xlate sid = %#x, periph = %#x, irq = %u: ee=%u but owner=%u\n", sid, periph, irq, pmic_arb->ee, - pmic_arb->apid_data[apid].irq_ee); + bus->apid_data[apid].irq_ee); return -ENODEV; } @@ -869,15 +893,16 @@ static int qpnpint_irq_domain_translate(struct irq_domain *d, unsigned long *out_hwirq, unsigned int *out_type) { - struct spmi_pmic_arb *pmic_arb = d->host_data; + struct spmi_pmic_arb_bus *bus = d->host_data; + struct spmi_pmic_arb *pmic_arb = bus->pmic_arb; u32 *intspec = fwspec->param; u16 apid, ppid; int rc; - dev_dbg(&pmic_arb->spmic->dev, "intspec[0] 0x%1x intspec[1] 0x%02x intspec[2] 0x%02x\n", + dev_dbg(&bus->spmic->dev, "intspec[0] 0x%1x intspec[1] 0x%02x intspec[2] 0x%02x\n", intspec[0], intspec[1], intspec[2]); - if (irq_domain_get_of_node(d) != pmic_arb->spmic->dev.of_node) + if (irq_domain_get_of_node(d) != bus->spmic->dev.of_node) return -EINVAL; if (fwspec->param_count != 4) return -EINVAL; @@ -885,37 +910,37 @@ static int qpnpint_irq_domain_translate(struct irq_domain *d, return -EINVAL; ppid = intspec[0] << 8 | intspec[1]; - rc = pmic_arb->ver_ops->ppid_to_apid(pmic_arb, ppid); + rc = pmic_arb->ver_ops->ppid_to_apid(bus, ppid); if (rc < 0) { - dev_err(&pmic_arb->spmic->dev, "failed to xlate sid = %#x, periph = %#x, irq = %u rc = %d\n", - intspec[0], intspec[1], intspec[2], rc); + dev_err(&bus->spmic->dev, "failed to xlate sid = %#x, periph = %#x, irq = %u rc = %d\n", + intspec[0], intspec[1], intspec[2], rc); return rc; } apid = rc; /* Keep track of {max,min}_apid for bounding search during interrupt */ - if (apid > pmic_arb->max_apid) - pmic_arb->max_apid = apid; - if (apid < pmic_arb->min_apid) - pmic_arb->min_apid = apid; + if (apid > bus->max_apid) + bus->max_apid = apid; + if (apid < bus->min_apid) + bus->min_apid = apid; *out_hwirq = spec_to_hwirq(intspec[0], intspec[1], intspec[2], apid); *out_type = intspec[3] & IRQ_TYPE_SENSE_MASK; - dev_dbg(&pmic_arb->spmic->dev, "out_hwirq = %lu\n", *out_hwirq); + dev_dbg(&bus->spmic->dev, "out_hwirq = %lu\n", *out_hwirq); return 0; } static struct lock_class_key qpnpint_irq_lock_class, qpnpint_irq_request_class; -static void qpnpint_irq_domain_map(struct spmi_pmic_arb *pmic_arb, +static void qpnpint_irq_domain_map(struct spmi_pmic_arb_bus *bus, struct irq_domain *domain, unsigned int virq, irq_hw_number_t hwirq, unsigned int type) { irq_flow_handler_t handler; - dev_dbg(&pmic_arb->spmic->dev, "virq = %u, hwirq = %lu, type = %u\n", + dev_dbg(&bus->spmic->dev, "virq = %u, hwirq = %lu, type = %u\n", virq, hwirq, type); if (type & IRQ_TYPE_EDGE_BOTH) @@ -926,7 +951,7 @@ static void qpnpint_irq_domain_map(struct spmi_pmic_arb *pmic_arb, irq_set_lockdep_class(virq, &qpnpint_irq_lock_class, &qpnpint_irq_request_class); - irq_domain_set_info(domain, virq, hwirq, &pmic_arb_irqchip, pmic_arb, + irq_domain_set_info(domain, virq, hwirq, &pmic_arb_irqchip, bus, handler, NULL, NULL); } @@ -934,7 +959,7 @@ static int qpnpint_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, unsigned int nr_irqs, void *data) { - struct spmi_pmic_arb *pmic_arb = domain->host_data; + struct spmi_pmic_arb_bus *bus = domain->host_data; struct irq_fwspec *fwspec = data; irq_hw_number_t hwirq; unsigned int type; @@ -945,20 +970,22 @@ static int qpnpint_irq_domain_alloc(struct irq_domain *domain, return ret; for (i = 0; i < nr_irqs; i++) - qpnpint_irq_domain_map(pmic_arb, domain, virq + i, hwirq + i, + qpnpint_irq_domain_map(bus, domain, virq + i, hwirq + i, type); return 0; } -static int pmic_arb_init_apid_min_max(struct spmi_pmic_arb *pmic_arb) +static int pmic_arb_init_apid_min_max(struct spmi_pmic_arb_bus *bus) { + struct spmi_pmic_arb *pmic_arb = bus->pmic_arb; + /* * Initialize max_apid/min_apid to the opposite bounds, during * the irq domain translation, we are sure to update these */ - pmic_arb->max_apid = 0; - pmic_arb->min_apid = pmic_arb->max_periphs - 1; + bus->max_apid = 0; + bus->min_apid = pmic_arb->max_periphs - 1; return 0; } @@ -976,37 +1003,38 @@ static int pmic_arb_get_core_resources_v1(struct platform_device *pdev, return 0; } -static int pmic_arb_init_apid_v1(struct spmi_pmic_arb *pmic_arb) +static int pmic_arb_init_apid_v1(struct spmi_pmic_arb_bus *bus) { + struct spmi_pmic_arb *pmic_arb = bus->pmic_arb; u32 *mapping_table; - mapping_table = devm_kcalloc(&pmic_arb->spmic->dev, pmic_arb->max_periphs, + mapping_table = devm_kcalloc(&bus->spmic->dev, pmic_arb->max_periphs, sizeof(*mapping_table), GFP_KERNEL); if (!mapping_table) return -ENOMEM; - pmic_arb->mapping_table = mapping_table; + bus->mapping_table = mapping_table; - return pmic_arb_init_apid_min_max(pmic_arb); + return pmic_arb_init_apid_min_max(bus); } -static int pmic_arb_ppid_to_apid_v1(struct spmi_pmic_arb *pmic_arb, u16 ppid) +static int pmic_arb_ppid_to_apid_v1(struct spmi_pmic_arb_bus *bus, u16 ppid) { - u32 *mapping_table = pmic_arb->mapping_table; + u32 *mapping_table = bus->mapping_table; int index = 0, i; u16 apid_valid; u16 apid; u32 data; - apid_valid = pmic_arb->ppid_to_apid[ppid]; + apid_valid = bus->ppid_to_apid[ppid]; if (apid_valid & PMIC_ARB_APID_VALID) { apid = apid_valid & ~PMIC_ARB_APID_VALID; return apid; } for (i = 0; i < SPMI_MAPPING_TABLE_TREE_DEPTH; ++i) { - if (!test_and_set_bit(index, pmic_arb->mapping_table_valid)) - mapping_table[index] = readl_relaxed(pmic_arb->cnfg + + if (!test_and_set_bit(index, bus->mapping_table_valid)) + mapping_table[index] = readl_relaxed(bus->cnfg + SPMI_MAPPING_TABLE_REG(index)); data = mapping_table[index]; @@ -1016,9 +1044,9 @@ static int pmic_arb_ppid_to_apid_v1(struct spmi_pmic_arb *pmic_arb, u16 ppid) index = SPMI_MAPPING_BIT_IS_1_RESULT(data); } else { apid = SPMI_MAPPING_BIT_IS_1_RESULT(data); - pmic_arb->ppid_to_apid[ppid] + bus->ppid_to_apid[ppid] = apid | PMIC_ARB_APID_VALID; - pmic_arb->apid_data[apid].ppid = ppid; + bus->apid_data[apid].ppid = ppid; return apid; } } else { @@ -1026,9 +1054,9 @@ static int pmic_arb_ppid_to_apid_v1(struct spmi_pmic_arb *pmic_arb, u16 ppid) index = SPMI_MAPPING_BIT_IS_0_RESULT(data); } else { apid = SPMI_MAPPING_BIT_IS_0_RESULT(data); - pmic_arb->ppid_to_apid[ppid] + bus->ppid_to_apid[ppid] = apid | PMIC_ARB_APID_VALID; - pmic_arb->apid_data[apid].ppid = ppid; + bus->apid_data[apid].ppid = ppid; return apid; } } @@ -1038,24 +1066,26 @@ static int pmic_arb_ppid_to_apid_v1(struct spmi_pmic_arb *pmic_arb, u16 ppid) } /* v1 offset per ee */ -static int pmic_arb_offset_v1(struct spmi_pmic_arb *pmic_arb, u8 sid, u16 addr, - enum pmic_arb_channel ch_type) +static int pmic_arb_offset_v1(struct spmi_pmic_arb_bus *bus, u8 sid, u16 addr, + enum pmic_arb_channel ch_type) { + struct spmi_pmic_arb *pmic_arb = bus->pmic_arb; return 0x800 + 0x80 * pmic_arb->channel; } -static u16 pmic_arb_find_apid(struct spmi_pmic_arb *pmic_arb, u16 ppid) +static u16 pmic_arb_find_apid(struct spmi_pmic_arb_bus *bus, u16 ppid) { - struct apid_data *apidd = &pmic_arb->apid_data[pmic_arb->last_apid]; + struct spmi_pmic_arb *pmic_arb = bus->pmic_arb; + struct apid_data *apidd = &bus->apid_data[bus->last_apid]; u32 regval, offset; u16 id, apid; - for (apid = pmic_arb->last_apid; ; apid++, apidd++) { + for (apid = bus->last_apid; ; apid++, apidd++) { offset = pmic_arb->ver_ops->apid_map_offset(apid); if (offset >= pmic_arb->core_size) break; - regval = readl_relaxed(pmic_arb->ver_ops->apid_owner(pmic_arb, + regval = readl_relaxed(pmic_arb->ver_ops->apid_owner(bus, apid)); apidd->irq_ee = SPMI_OWNERSHIP_PERIPH2OWNER(regval); apidd->write_ee = apidd->irq_ee; @@ -1065,14 +1095,14 @@ static u16 pmic_arb_find_apid(struct spmi_pmic_arb *pmic_arb, u16 ppid) continue; id = (regval >> 8) & PMIC_ARB_PPID_MASK; - pmic_arb->ppid_to_apid[id] = apid | PMIC_ARB_APID_VALID; + bus->ppid_to_apid[id] = apid | PMIC_ARB_APID_VALID; apidd->ppid = id; if (id == ppid) { apid |= PMIC_ARB_APID_VALID; break; } } - pmic_arb->last_apid = apid & ~PMIC_ARB_APID_VALID; + bus->last_apid = apid & ~PMIC_ARB_APID_VALID; return apid; } @@ -1104,21 +1134,22 @@ static int pmic_arb_get_core_resources_v2(struct platform_device *pdev, return pmic_arb_get_obsrvr_chnls_v2(pdev); } -static int pmic_arb_ppid_to_apid_v2(struct spmi_pmic_arb *pmic_arb, u16 ppid) +static int pmic_arb_ppid_to_apid_v2(struct spmi_pmic_arb_bus *bus, u16 ppid) { u16 apid_valid; - apid_valid = pmic_arb->ppid_to_apid[ppid]; + apid_valid = bus->ppid_to_apid[ppid]; if (!(apid_valid & PMIC_ARB_APID_VALID)) - apid_valid = pmic_arb_find_apid(pmic_arb, ppid); + apid_valid = pmic_arb_find_apid(bus, ppid); if (!(apid_valid & PMIC_ARB_APID_VALID)) return -ENODEV; return apid_valid & ~PMIC_ARB_APID_VALID; } -static int pmic_arb_read_apid_map_v5(struct spmi_pmic_arb *pmic_arb) +static int pmic_arb_read_apid_map_v5(struct spmi_pmic_arb_bus *bus) { + struct spmi_pmic_arb *pmic_arb = bus->pmic_arb; struct apid_data *apidd; struct apid_data *prev_apidd; u16 i, apid, ppid, apid_max; @@ -1140,9 +1171,9 @@ static int pmic_arb_read_apid_map_v5(struct spmi_pmic_arb *pmic_arb) * where N = number of APIDs supported by the primary bus and * M = number of APIDs supported by the secondary bus */ - apidd = &pmic_arb->apid_data[pmic_arb->base_apid]; - apid_max = pmic_arb->base_apid + pmic_arb->apid_count; - for (i = pmic_arb->base_apid; i < apid_max; i++, apidd++) { + apidd = &bus->apid_data[bus->base_apid]; + apid_max = bus->base_apid + bus->apid_count; + for (i = bus->base_apid; i < apid_max; i++, apidd++) { offset = pmic_arb->ver_ops->apid_map_offset(i); if (offset >= pmic_arb->core_size) break; @@ -1153,19 +1184,18 @@ static int pmic_arb_read_apid_map_v5(struct spmi_pmic_arb *pmic_arb) ppid = (regval >> 8) & PMIC_ARB_PPID_MASK; is_irq_ee = PMIC_ARB_CHAN_IS_IRQ_OWNER(regval); - regval = readl_relaxed(pmic_arb->ver_ops->apid_owner(pmic_arb, - i)); + regval = readl_relaxed(pmic_arb->ver_ops->apid_owner(bus, i)); apidd->write_ee = SPMI_OWNERSHIP_PERIPH2OWNER(regval); apidd->irq_ee = is_irq_ee ? apidd->write_ee : INVALID_EE; - valid = pmic_arb->ppid_to_apid[ppid] & PMIC_ARB_APID_VALID; - apid = pmic_arb->ppid_to_apid[ppid] & ~PMIC_ARB_APID_VALID; - prev_apidd = &pmic_arb->apid_data[apid]; + valid = bus->ppid_to_apid[ppid] & PMIC_ARB_APID_VALID; + apid = bus->ppid_to_apid[ppid] & ~PMIC_ARB_APID_VALID; + prev_apidd = &bus->apid_data[apid]; if (!valid || apidd->write_ee == pmic_arb->ee) { /* First PPID mapping or one for this EE */ - pmic_arb->ppid_to_apid[ppid] = i | PMIC_ARB_APID_VALID; + bus->ppid_to_apid[ppid] = i | PMIC_ARB_APID_VALID; } else if (valid && is_irq_ee && prev_apidd->write_ee == pmic_arb->ee) { /* @@ -1176,42 +1206,43 @@ static int pmic_arb_read_apid_map_v5(struct spmi_pmic_arb *pmic_arb) } apidd->ppid = ppid; - pmic_arb->last_apid = i; + bus->last_apid = i; } /* Dump the mapping table for debug purposes. */ - dev_dbg(&pmic_arb->spmic->dev, "PPID APID Write-EE IRQ-EE\n"); + dev_dbg(&bus->spmic->dev, "PPID APID Write-EE IRQ-EE\n"); for (ppid = 0; ppid < PMIC_ARB_MAX_PPID; ppid++) { - apid = pmic_arb->ppid_to_apid[ppid]; + apid = bus->ppid_to_apid[ppid]; if (apid & PMIC_ARB_APID_VALID) { apid &= ~PMIC_ARB_APID_VALID; - apidd = &pmic_arb->apid_data[apid]; - dev_dbg(&pmic_arb->spmic->dev, "%#03X %3u %2u %2u\n", - ppid, apid, apidd->write_ee, apidd->irq_ee); + apidd = &bus->apid_data[apid]; + dev_dbg(&bus->spmic->dev, "%#03X %3u %2u %2u\n", + ppid, apid, apidd->write_ee, apidd->irq_ee); } } return 0; } -static int pmic_arb_ppid_to_apid_v5(struct spmi_pmic_arb *pmic_arb, u16 ppid) +static int pmic_arb_ppid_to_apid_v5(struct spmi_pmic_arb_bus *bus, u16 ppid) { - if (!(pmic_arb->ppid_to_apid[ppid] & PMIC_ARB_APID_VALID)) + if (!(bus->ppid_to_apid[ppid] & PMIC_ARB_APID_VALID)) return -ENODEV; - return pmic_arb->ppid_to_apid[ppid] & ~PMIC_ARB_APID_VALID; + return bus->ppid_to_apid[ppid] & ~PMIC_ARB_APID_VALID; } /* v2 offset per ppid and per ee */ -static int pmic_arb_offset_v2(struct spmi_pmic_arb *pmic_arb, u8 sid, u16 addr, - enum pmic_arb_channel ch_type) +static int pmic_arb_offset_v2(struct spmi_pmic_arb_bus *bus, u8 sid, u16 addr, + enum pmic_arb_channel ch_type) { + struct spmi_pmic_arb *pmic_arb = bus->pmic_arb; u16 apid; u16 ppid; int rc; ppid = sid << 8 | ((addr >> 8) & 0xFF); - rc = pmic_arb_ppid_to_apid_v2(pmic_arb, ppid); + rc = pmic_arb_ppid_to_apid_v2(bus, ppid); if (rc < 0) return rc; @@ -1219,27 +1250,28 @@ static int pmic_arb_offset_v2(struct spmi_pmic_arb *pmic_arb, u8 sid, u16 addr, return 0x1000 * pmic_arb->ee + 0x8000 * apid; } -static int pmic_arb_init_apid_v5(struct spmi_pmic_arb *pmic_arb) +static int pmic_arb_init_apid_v5(struct spmi_pmic_arb_bus *bus) { + struct spmi_pmic_arb *pmic_arb = bus->pmic_arb; int ret; - pmic_arb->base_apid = 0; - pmic_arb->apid_count = readl_relaxed(pmic_arb->core + PMIC_ARB_FEATURES) & - PMIC_ARB_FEATURES_PERIPH_MASK; + bus->base_apid = 0; + bus->apid_count = readl_relaxed(pmic_arb->core + PMIC_ARB_FEATURES) & + PMIC_ARB_FEATURES_PERIPH_MASK; - if (pmic_arb->base_apid + pmic_arb->apid_count > pmic_arb->max_periphs) { - dev_err(&pmic_arb->spmic->dev, "Unsupported APID count %d detected\n", - pmic_arb->base_apid + pmic_arb->apid_count); + if (bus->base_apid + bus->apid_count > pmic_arb->max_periphs) { + dev_err(&bus->spmic->dev, "Unsupported APID count %d detected\n", + bus->base_apid + bus->apid_count); return -EINVAL; } - ret = pmic_arb_init_apid_min_max(pmic_arb); + ret = pmic_arb_init_apid_min_max(bus); if (ret) return ret; - ret = pmic_arb_read_apid_map_v5(pmic_arb); + ret = pmic_arb_read_apid_map_v5(bus); if (ret) { - dev_err(&pmic_arb->spmic->dev, "could not read APID->PPID mapping table, rc= %d\n", + dev_err(&bus->spmic->dev, "could not read APID->PPID mapping table, rc= %d\n", ret); return ret; } @@ -1251,15 +1283,16 @@ static int pmic_arb_init_apid_v5(struct spmi_pmic_arb *pmic_arb) * v5 offset per ee and per apid for observer channels and per apid for * read/write channels. */ -static int pmic_arb_offset_v5(struct spmi_pmic_arb *pmic_arb, u8 sid, u16 addr, - enum pmic_arb_channel ch_type) +static int pmic_arb_offset_v5(struct spmi_pmic_arb_bus *bus, u8 sid, u16 addr, + enum pmic_arb_channel ch_type) { + struct spmi_pmic_arb *pmic_arb = bus->pmic_arb; u16 apid; int rc; u32 offset = 0; u16 ppid = (sid << 8) | (addr >> 8); - rc = pmic_arb_ppid_to_apid_v5(pmic_arb, ppid); + rc = pmic_arb_ppid_to_apid_v5(bus, ppid); if (rc < 0) return rc; @@ -1269,8 +1302,8 @@ static int pmic_arb_offset_v5(struct spmi_pmic_arb *pmic_arb, u8 sid, u16 addr, offset = 0x10000 * pmic_arb->ee + 0x80 * apid; break; case PMIC_ARB_CHANNEL_RW: - if (pmic_arb->apid_data[apid].write_ee != pmic_arb->ee) { - dev_err(&pmic_arb->spmic->dev, "disallowed SPMI write to sid=%u, addr=0x%04X\n", + if (bus->apid_data[apid].write_ee != pmic_arb->ee) { + dev_err(&bus->spmic->dev, "disallowed SPMI write to sid=%u, addr=0x%04X\n", sid, addr); return -EPERM; } @@ -1297,15 +1330,16 @@ static int pmic_arb_get_core_resources_v7(struct platform_device *pdev, * v7 offset per ee and per apid for observer channels and per apid for * read/write channels. */ -static int pmic_arb_offset_v7(struct spmi_pmic_arb *pmic_arb, u8 sid, u16 addr, - enum pmic_arb_channel ch_type) +static int pmic_arb_offset_v7(struct spmi_pmic_arb_bus *bus, u8 sid, u16 addr, + enum pmic_arb_channel ch_type) { + struct spmi_pmic_arb *pmic_arb = bus->pmic_arb; u16 apid; int rc; u32 offset = 0; u16 ppid = (sid << 8) | (addr >> 8); - rc = pmic_arb->ver_ops->ppid_to_apid(pmic_arb, ppid); + rc = pmic_arb->ver_ops->ppid_to_apid(bus, ppid); if (rc < 0) return rc; @@ -1315,8 +1349,8 @@ static int pmic_arb_offset_v7(struct spmi_pmic_arb *pmic_arb, u8 sid, u16 addr, offset = 0x8000 * pmic_arb->ee + 0x20 * apid; break; case PMIC_ARB_CHANNEL_RW: - if (pmic_arb->apid_data[apid].write_ee != pmic_arb->ee) { - dev_err(&pmic_arb->spmic->dev, "disallowed SPMI write to sid=%u, addr=0x%04X\n", + if (bus->apid_data[apid].write_ee != pmic_arb->ee) { + dev_err(&bus->spmic->dev, "disallowed SPMI write to sid=%u, addr=0x%04X\n", sid, addr); return -EPERM; } @@ -1338,104 +1372,110 @@ static u32 pmic_arb_fmt_cmd_v2(u8 opc, u8 sid, u16 addr, u8 bc) } static void __iomem * -pmic_arb_owner_acc_status_v1(struct spmi_pmic_arb *pmic_arb, u8 m, u16 n) +pmic_arb_owner_acc_status_v1(struct spmi_pmic_arb_bus *bus, u8 m, u16 n) { - return pmic_arb->intr + 0x20 * m + 0x4 * n; + return bus->intr + 0x20 * m + 0x4 * n; } static void __iomem * -pmic_arb_owner_acc_status_v2(struct spmi_pmic_arb *pmic_arb, u8 m, u16 n) +pmic_arb_owner_acc_status_v2(struct spmi_pmic_arb_bus *bus, u8 m, u16 n) { - return pmic_arb->intr + 0x100000 + 0x1000 * m + 0x4 * n; + return bus->intr + 0x100000 + 0x1000 * m + 0x4 * n; } static void __iomem * -pmic_arb_owner_acc_status_v3(struct spmi_pmic_arb *pmic_arb, u8 m, u16 n) +pmic_arb_owner_acc_status_v3(struct spmi_pmic_arb_bus *bus, u8 m, u16 n) { - return pmic_arb->intr + 0x200000 + 0x1000 * m + 0x4 * n; + return bus->intr + 0x200000 + 0x1000 * m + 0x4 * n; } static void __iomem * -pmic_arb_owner_acc_status_v5(struct spmi_pmic_arb *pmic_arb, u8 m, u16 n) +pmic_arb_owner_acc_status_v5(struct spmi_pmic_arb_bus *bus, u8 m, u16 n) { - return pmic_arb->intr + 0x10000 * m + 0x4 * n; + return bus->intr + 0x10000 * m + 0x4 * n; } static void __iomem * -pmic_arb_owner_acc_status_v7(struct spmi_pmic_arb *pmic_arb, u8 m, u16 n) +pmic_arb_owner_acc_status_v7(struct spmi_pmic_arb_bus *bus, u8 m, u16 n) { - return pmic_arb->intr + 0x1000 * m + 0x4 * n; + return bus->intr + 0x1000 * m + 0x4 * n; } static void __iomem * -pmic_arb_acc_enable_v1(struct spmi_pmic_arb *pmic_arb, u16 n) +pmic_arb_acc_enable_v1(struct spmi_pmic_arb_bus *bus, u16 n) { - return pmic_arb->intr + 0x200 + 0x4 * n; + return bus->intr + 0x200 + 0x4 * n; } static void __iomem * -pmic_arb_acc_enable_v2(struct spmi_pmic_arb *pmic_arb, u16 n) +pmic_arb_acc_enable_v2(struct spmi_pmic_arb_bus *bus, u16 n) { - return pmic_arb->intr + 0x1000 * n; + return bus->intr + 0x1000 * n; } static void __iomem * -pmic_arb_acc_enable_v5(struct spmi_pmic_arb *pmic_arb, u16 n) +pmic_arb_acc_enable_v5(struct spmi_pmic_arb_bus *bus, u16 n) { + struct spmi_pmic_arb *pmic_arb = bus->pmic_arb; return pmic_arb->wr_base + 0x100 + 0x10000 * n; } static void __iomem * -pmic_arb_acc_enable_v7(struct spmi_pmic_arb *pmic_arb, u16 n) +pmic_arb_acc_enable_v7(struct spmi_pmic_arb_bus *bus, u16 n) { + struct spmi_pmic_arb *pmic_arb = bus->pmic_arb; return pmic_arb->wr_base + 0x100 + 0x1000 * n; } static void __iomem * -pmic_arb_irq_status_v1(struct spmi_pmic_arb *pmic_arb, u16 n) +pmic_arb_irq_status_v1(struct spmi_pmic_arb_bus *bus, u16 n) { - return pmic_arb->intr + 0x600 + 0x4 * n; + return bus->intr + 0x600 + 0x4 * n; } static void __iomem * -pmic_arb_irq_status_v2(struct spmi_pmic_arb *pmic_arb, u16 n) +pmic_arb_irq_status_v2(struct spmi_pmic_arb_bus *bus, u16 n) { - return pmic_arb->intr + 0x4 + 0x1000 * n; + return bus->intr + 0x4 + 0x1000 * n; } static void __iomem * -pmic_arb_irq_status_v5(struct spmi_pmic_arb *pmic_arb, u16 n) +pmic_arb_irq_status_v5(struct spmi_pmic_arb_bus *bus, u16 n) { + struct spmi_pmic_arb *pmic_arb = bus->pmic_arb; return pmic_arb->wr_base + 0x104 + 0x10000 * n; } static void __iomem * -pmic_arb_irq_status_v7(struct spmi_pmic_arb *pmic_arb, u16 n) +pmic_arb_irq_status_v7(struct spmi_pmic_arb_bus *bus, u16 n) { + struct spmi_pmic_arb *pmic_arb = bus->pmic_arb; return pmic_arb->wr_base + 0x104 + 0x1000 * n; } static void __iomem * -pmic_arb_irq_clear_v1(struct spmi_pmic_arb *pmic_arb, u16 n) +pmic_arb_irq_clear_v1(struct spmi_pmic_arb_bus *bus, u16 n) { - return pmic_arb->intr + 0xA00 + 0x4 * n; + return bus->intr + 0xA00 + 0x4 * n; } static void __iomem * -pmic_arb_irq_clear_v2(struct spmi_pmic_arb *pmic_arb, u16 n) +pmic_arb_irq_clear_v2(struct spmi_pmic_arb_bus *bus, u16 n) { - return pmic_arb->intr + 0x8 + 0x1000 * n; + return bus->intr + 0x8 + 0x1000 * n; } static void __iomem * -pmic_arb_irq_clear_v5(struct spmi_pmic_arb *pmic_arb, u16 n) +pmic_arb_irq_clear_v5(struct spmi_pmic_arb_bus *bus, u16 n) { + struct spmi_pmic_arb *pmic_arb = bus->pmic_arb; return pmic_arb->wr_base + 0x108 + 0x10000 * n; } static void __iomem * -pmic_arb_irq_clear_v7(struct spmi_pmic_arb *pmic_arb, u16 n) +pmic_arb_irq_clear_v7(struct spmi_pmic_arb_bus *bus, u16 n) { + struct spmi_pmic_arb *pmic_arb = bus->pmic_arb; return pmic_arb->wr_base + 0x108 + 0x1000 * n; } @@ -1455,9 +1495,9 @@ static u32 pmic_arb_apid_map_offset_v7(u16 n) } static void __iomem * -pmic_arb_apid_owner_v2(struct spmi_pmic_arb *pmic_arb, u16 n) +pmic_arb_apid_owner_v2(struct spmi_pmic_arb_bus *bus, u16 n) { - return pmic_arb->cnfg + 0x700 + 0x4 * n; + return bus->cnfg + 0x700 + 0x4 * n; } /* @@ -1466,9 +1506,9 @@ pmic_arb_apid_owner_v2(struct spmi_pmic_arb *pmic_arb, u16 n) * 0. */ static void __iomem * -pmic_arb_apid_owner_v7(struct spmi_pmic_arb *pmic_arb, u16 n) +pmic_arb_apid_owner_v7(struct spmi_pmic_arb_bus *bus, u16 n) { - return pmic_arb->cnfg + 0x4 * (n - pmic_arb->base_apid); + return bus->cnfg + 0x4 * (n - bus->base_apid); } static const struct pmic_arb_ver_ops pmic_arb_v1 = { @@ -1558,29 +1598,121 @@ static const struct irq_domain_ops pmic_arb_irq_domain_ops = { .translate = qpnpint_irq_domain_translate, }; +static int spmi_pmic_arb_bus_init(struct platform_device *pdev, + struct device_node *node, + struct spmi_pmic_arb *pmic_arb) +{ + struct spmi_pmic_arb_bus *bus; + struct device *dev = &pdev->dev; + struct spmi_controller *ctrl; + void __iomem *intr; + void __iomem *cnfg; + int index, ret; + u32 irq; + + ctrl = devm_spmi_controller_alloc(dev, sizeof(*bus)); + if (IS_ERR(ctrl)) + return PTR_ERR(ctrl); + + ctrl->cmd = pmic_arb_cmd; + ctrl->read_cmd = pmic_arb_read_cmd; + ctrl->write_cmd = pmic_arb_write_cmd; + + bus = spmi_controller_get_drvdata(ctrl); + + pmic_arb->bus = bus; + + raw_spin_lock_init(&bus->lock); + + bus->ppid_to_apid = devm_kcalloc(dev, PMIC_ARB_MAX_PPID, + sizeof(*bus->ppid_to_apid), + GFP_KERNEL); + if (!bus->ppid_to_apid) + return -ENOMEM; + + bus->apid_data = devm_kcalloc(dev, pmic_arb->max_periphs, + sizeof(*bus->apid_data), + GFP_KERNEL); + if (!bus->apid_data) + return -ENOMEM; + + index = of_property_match_string(node, "reg-names", "cnfg"); + if (index < 0) { + dev_err(dev, "cnfg reg region missing"); + return -EINVAL; + } + + cnfg = devm_of_iomap(dev, node, index, NULL); + if (IS_ERR(cnfg)) + return PTR_ERR(cnfg); + + index = of_property_match_string(node, "reg-names", "intr"); + if (index < 0) { + dev_err(dev, "intr reg region missing"); + return -EINVAL; + } + + intr = devm_of_iomap(dev, node, index, NULL); + if (IS_ERR(intr)) + return PTR_ERR(intr); + + irq = of_irq_get_byname(node, "periph_irq"); + if (irq < 0) + return irq; + + bus->pmic_arb = pmic_arb; + bus->intr = intr; + bus->cnfg = cnfg; + bus->irq = irq; + bus->spmic = ctrl; + + ret = pmic_arb->ver_ops->init_apid(bus); + if (ret) + return ret; + + dev_dbg(&pdev->dev, "adding irq domain\n"); + + bus->domain = irq_domain_add_tree(dev->of_node, + &pmic_arb_irq_domain_ops, bus); + if (!bus->domain) { + dev_err(&pdev->dev, "unable to create irq_domain\n"); + return -ENOMEM; + } + + irq_set_chained_handler_and_data(bus->irq, + pmic_arb_chained_irq, bus); + + ctrl->dev.of_node = node; + + ret = devm_spmi_controller_add(dev, ctrl); + if (ret) + return ret; + + return 0; +} + static int spmi_pmic_arb_probe(struct platform_device *pdev) { struct spmi_pmic_arb *pmic_arb; - struct spmi_controller *ctrl; + struct device *dev = &pdev->dev; struct resource *res; void __iomem *core; u32 channel, ee, hw_ver; int err; - ctrl = devm_spmi_controller_alloc(&pdev->dev, sizeof(*pmic_arb)); - if (IS_ERR(ctrl)) - return PTR_ERR(ctrl); - - pmic_arb = spmi_controller_get_drvdata(ctrl); - pmic_arb->spmic = ctrl; + pmic_arb = devm_kzalloc(dev, sizeof(*pmic_arb), GFP_KERNEL); + if (!pmic_arb) + return -ENOMEM; res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "core"); - core = devm_ioremap(&ctrl->dev, res->start, resource_size(res)); + core = devm_ioremap(dev, res->start, resource_size(res)); if (!core) return -ENOMEM; pmic_arb->core_size = resource_size(res); + platform_set_drvdata(pdev, pmic_arb); + hw_ver = readl_relaxed(core + PMIC_ARB_VERSION); if (hw_ver < PMIC_ARB_VERSION_V2_MIN) @@ -1594,30 +1726,12 @@ static int spmi_pmic_arb_probe(struct platform_device *pdev) else pmic_arb->ver_ops = &pmic_arb_v7; - dev_info(&ctrl->dev, "PMIC arbiter version %s (0x%x)\n", - pmic_arb->ver_ops->ver_str, hw_ver); - err = pmic_arb->ver_ops->get_core_resources(pdev, core); if (err) return err; - err = pmic_arb->ver_ops->init_apid(pmic_arb); - if (err) - return err; - - res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "intr"); - pmic_arb->intr = devm_ioremap_resource(&ctrl->dev, res); - if (IS_ERR(pmic_arb->intr)) - return PTR_ERR(pmic_arb->intr); - - res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "cnfg"); - pmic_arb->cnfg = devm_ioremap_resource(&ctrl->dev, res); - if (IS_ERR(pmic_arb->cnfg)) - return PTR_ERR(pmic_arb->cnfg); - - pmic_arb->irq = platform_get_irq_byname(pdev, "periph_irq"); - if (pmic_arb->irq < 0) - return pmic_arb->irq; + dev_info(dev, "PMIC arbiter version %s (0x%x)\n", + pmic_arb->ver_ops->ver_str, hw_ver); err = of_property_read_u32(pdev->dev.of_node, "qcom,channel", &channel); if (err) { @@ -1646,42 +1760,17 @@ static int spmi_pmic_arb_probe(struct platform_device *pdev) pmic_arb->ee = ee; - platform_set_drvdata(pdev, ctrl); - raw_spin_lock_init(&pmic_arb->lock); - - ctrl->cmd = pmic_arb_cmd; - ctrl->read_cmd = pmic_arb_read_cmd; - ctrl->write_cmd = pmic_arb_write_cmd; - - dev_dbg(&pdev->dev, "adding irq domain\n"); - pmic_arb->domain = irq_domain_add_tree(pdev->dev.of_node, - &pmic_arb_irq_domain_ops, pmic_arb); - if (!pmic_arb->domain) { - dev_err(&pdev->dev, "unable to create irq_domain\n"); - return -ENOMEM; - } - - irq_set_chained_handler_and_data(pmic_arb->irq, pmic_arb_chained_irq, - pmic_arb); - err = spmi_controller_add(ctrl); - if (err) - goto err_domain_remove; - - return 0; - -err_domain_remove: - irq_set_chained_handler_and_data(pmic_arb->irq, NULL, NULL); - irq_domain_remove(pmic_arb->domain); - return err; + return spmi_pmic_arb_bus_init(pdev, dev->of_node, pmic_arb); } static void spmi_pmic_arb_remove(struct platform_device *pdev) { - struct spmi_controller *ctrl = platform_get_drvdata(pdev); - struct spmi_pmic_arb *pmic_arb = spmi_controller_get_drvdata(ctrl); - spmi_controller_remove(ctrl); - irq_set_chained_handler_and_data(pmic_arb->irq, NULL, NULL); - irq_domain_remove(pmic_arb->domain); + struct spmi_pmic_arb *pmic_arb = platform_get_drvdata(pdev); + struct spmi_pmic_arb_bus *bus = pmic_arb->bus; + + irq_set_chained_handler_and_data(bus->irq, + NULL, NULL); + irq_domain_remove(bus->domain); } static const struct of_device_id spmi_pmic_arb_match_table[] = { From patchwork Wed Apr 17 20:00:59 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Abel Vesa X-Patchwork-Id: 13633781 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 18616C4345F for ; Wed, 17 Apr 2024 20:02:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References :Message-Id:Content-Transfer-Encoding:Content-Type:MIME-Version:Subject:Date: From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=rgaJ9SiihEkn5mbvQeAX1UQdZh1z/tHET5Ml8p7IStM=; b=ASxRrWQE+2e+PGf2xyE6L+dd7C OjNnNDoViXlB8rr+vTvtIBHnUCon3fIwjc6nptB3gZvt/EuOa9FYaOg6o8JOUzL2yA6HIN+teRK7J VT3JuK4mJ/CrnvYvFE7+ZNjaaW3nrLbdb/vsgbQ+68HmLHOTs2ga6RZOsmwJ99lfN+7ZJ/5Ir22Mv 0U85DUj3fSl5piGsUsRSzR1ogWEvdt80+ub2Db2bjcSZXPfxsf2iNyfRlLsb8h/s6WP6CWzCeeXMV 5XdY+hfKvPxis1HxAMRaLmP/XT+Sjv3AeOwyLrvnJXP1SNpbN4Sk0fWAiwIjiFEXrmgfjpq5du1QU hS5Hn0hA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rxBTp-0000000HR6D-3yNM; Wed, 17 Apr 2024 20:02:06 +0000 Received: from mail-ej1-x630.google.com ([2a00:1450:4864:20::630]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rxBTK-0000000HQhM-3f1u for linux-mediatek@lists.infradead.org; Wed, 17 Apr 2024 20:01:40 +0000 Received: by mail-ej1-x630.google.com with SMTP id a640c23a62f3a-a53f131d9deso1592566b.3 for ; Wed, 17 Apr 2024 13:01:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1713384093; x=1713988893; darn=lists.infradead.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=rgaJ9SiihEkn5mbvQeAX1UQdZh1z/tHET5Ml8p7IStM=; b=eysISvED+2cW+WQ94xWmgWsR+iwRXB/XA0stgSbBdyjKOM8VGQgCtvoKZ7QImKOmbH 7KqL2SQKhkr4q8tVwFuHiGLtY64exqiDmxSs7EtQRKP3SgZ26KF6nB9wBmLE3F8GFppc b1l/Rzpe/ShIOnjaKk+e55tonhFCGMx2+BgGO024aeMB/ZbcirCpqEC2IaL1gD8lWYPK urnZAN+4+lHXH0XL6NajTrJAS5t0nbwGnjpStfvqEkf70KlB99zr/NAJhAGqZWYOu0s7 ag9V0y0NvDh88Nn2EhSxyhx6MCUV4RUC7fVsO/4D269zbYNCt7wi0gbhszoHaHrKGwaR uElw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1713384093; x=1713988893; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=rgaJ9SiihEkn5mbvQeAX1UQdZh1z/tHET5Ml8p7IStM=; b=CwTh2b4k4yXmJJVIeV5ReEhQhbMU+kpheuHIWEkBQTw0vWuaSir+XxsCn21fWnxBky us9lMhwVzpvxgAUhdCfypFqaNVUxVxMMbdAHskDTOd02ePxO8tCOMK7b3OoTec97ab0e Kd6jmddIX+mUcqS6FrxuPr8zyJzdsFpVIXy8F+58xNAsiwF8MBKfOXnpao9SofFJI58f XNhXZSGVSlvbUFoS+oKA/xjni2j1VYnEYjW1qE2WAWWfOcHpf/Buvzru4zhibNugzOyb XWYTo0FniQqofniIgJZkj5jeFq8TBcRt0AbVGhnYPFsj7gIBYCYtm08co30AePLoSWOS J9nQ== X-Forwarded-Encrypted: i=1; AJvYcCV070aZnMU7Zp5B9ynoVHm29zccXrlhYbPHcyLM8nx7+pPYdpcxKu1ZuFuTT41ceHlyBkDNr1Vop2AJaBMjuAmEYUHbgrxJMkYtcd4TVzoJVDeP X-Gm-Message-State: AOJu0YyF4uwAfYSiQnM3iD3OF27fuN8OR3GkV68yPDEdlLeqd/YXH/jU zhsObEaCy+NgUh33Z+XC9ro8U/w8uMrWzQ1QKZeQe5VwPDEQiruPJ7Ed5mTL7CM= X-Google-Smtp-Source: AGHT+IGT/5KiTugzJZ34QuU4kW1G2canhZKORyynZvW6s58bLzpIsP0aHYm0/QwT0R1cPoyzqfTmHA== X-Received: by 2002:a17:906:f6d6:b0:a52:57ee:4464 with SMTP id jo22-20020a170906f6d600b00a5257ee4464mr373121ejb.19.1713384092655; Wed, 17 Apr 2024 13:01:32 -0700 (PDT) Received: from [127.0.1.1] ([79.114.172.194]) by smtp.gmail.com with ESMTPSA id gs6-20020a170906f18600b00a555ef55ab5sm939981ejb.218.2024.04.17.13.01.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 17 Apr 2024 13:01:32 -0700 (PDT) From: Abel Vesa Date: Wed, 17 Apr 2024 23:00:59 +0300 Subject: [PATCH v10 7/7] spmi: pmic-arb: Add multi bus support MIME-Version: 1.0 Message-Id: <20240417-spmi-multi-master-support-v10-7-5bc6d322e266@linaro.org> References: <20240417-spmi-multi-master-support-v10-0-5bc6d322e266@linaro.org> In-Reply-To: <20240417-spmi-multi-master-support-v10-0-5bc6d322e266@linaro.org> To: Stephen Boyd , Matthias Brugger , Bjorn Andersson , Konrad Dybcio , Dmitry Baryshkov , Neil Armstrong , AngeloGioacchino Del Regno , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Srini Kandagatla , Johan Hovold , David Collins , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, Abel Vesa X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=9935; i=abel.vesa@linaro.org; h=from:subject:message-id; bh=xmlabHfkblERj1InhHHP21kg4juqeMVaUpLbVHUxli4=; b=owEBbQKS/ZANAwAKARtfRMkAlRVWAcsmYgBmICqNHC7m9PF22wqiTPqefESs7DT5FdxSunAhh tsC/owvMg2JAjMEAAEKAB0WIQRO8+4RTnqPKsqn0bgbX0TJAJUVVgUCZiAqjQAKCRAbX0TJAJUV Voo0D/0ZYeEHQqzvcOSg6P/1oNkaeSIp/76y1aW/RYJ8LnA01dZFewsk3BktEWHVRqL4pIlhDY/ sDjlK0Di4dFOJl4kcnqSXRWkiNd9l6kUsCCMw+zdgONNLdPEdUBHK86DVaykBp6fXnYIh6/PVZ8 mlp/dUrk5PDqek/e8rH8U68nuyzf460xj7VxepW4uybi9RY+kSbam8Pg/k91PmE2NY5bJAdejnv Yd1kkhrqwS31/IgvTKAuOOHZDW5vlrw7sdoPHueH5254+edCiskXiTbw5lwAkdPrWaeXfKo7GiL fiyKbU2q0P4ovgD2ju/9886xwy93OLYp2/jQHqYVJZsY/DWxffcYwPTvysTMyws/5G9HTlm+7Nv Zqeszsd8pRLmBtvoSNTKBVD7YQZyHZoRozQevraBQPDoedR3e9H+mv9czlUNpplwK12lxI1kTSk PPFK4KG4+zbRUoBxqN7R37zcCxfnqecmOVwnLeurB4K6kviNFlimtdwH9pRqFtzZmJ7+gBfEBKB d6c3/NukJgXAV+0DUcVYzJvPMv2y39iVpweYad/4f2jsnaHw7lkcwCND1pHZh+OJz3jbeSkxOhy xttLB8CLLODsu4vDk4fZaFlhib2jPlSWLifo9RNIWBAC798XmBT/6p6MG3ZAyUql8QKHE2PHaHz wECPhbIGJjh/mkw== X-Developer-Key: i=abel.vesa@linaro.org; a=openpgp; fpr=6AFF162D57F4223A8770EF5AF7BF214136F41FAE X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240417_130135_517426_DB2ABC88 X-CRM114-Status: GOOD ( 23.78 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org Starting with HW version 7, there are actually two separate buses (with two separate sets of wires). So add support for the second bus. The first platform that needs this support for the second bus is the Qualcomm X1 Elite, so add the compatible for it as well. Reviewed-by: Neil Armstrong Signed-off-by: Abel Vesa --- drivers/spmi/spmi-pmic-arb.c | 138 +++++++++++++++++++++++++++++++++++++------ 1 file changed, 120 insertions(+), 18 deletions(-) diff --git a/drivers/spmi/spmi-pmic-arb.c b/drivers/spmi/spmi-pmic-arb.c index 36599e952599..0a17ff02c827 100644 --- a/drivers/spmi/spmi-pmic-arb.c +++ b/drivers/spmi/spmi-pmic-arb.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #include #include @@ -95,6 +96,8 @@ enum pmic_arb_channel { PMIC_ARB_CHANNEL_OBS, }; +#define PMIC_ARB_MAX_BUSES 2 + /* Maximum number of support PMIC peripherals */ #define PMIC_ARB_MAX_PERIPHS 512 #define PMIC_ARB_MAX_PERIPHS_V7 1024 @@ -149,6 +152,7 @@ struct spmi_pmic_arb; * @min_apid: minimum APID (used for bounding IRQ search) * @max_apid: maximum APID * @irq: PMIC ARB interrupt. + * @id: unique ID of the bus */ struct spmi_pmic_arb_bus { struct spmi_pmic_arb *pmic_arb; @@ -167,6 +171,7 @@ struct spmi_pmic_arb_bus { u16 min_apid; u16 max_apid; int irq; + u8 id; }; /** @@ -180,7 +185,8 @@ struct spmi_pmic_arb_bus { * @ee: the current Execution Environment * @ver_ops: version dependent operations. * @max_periphs: Number of elements in apid_data[] - * @bus: per arbiter bus instance + * @buses: per arbiter buses instances + * @buses_available: number of buses registered */ struct spmi_pmic_arb { void __iomem *rd_base; @@ -191,7 +197,8 @@ struct spmi_pmic_arb { u8 ee; const struct pmic_arb_ver_ops *ver_ops; int max_periphs; - struct spmi_pmic_arb_bus *bus; + struct spmi_pmic_arb_bus *buses[PMIC_ARB_MAX_BUSES]; + int buses_available; }; /** @@ -220,7 +227,7 @@ struct spmi_pmic_arb { struct pmic_arb_ver_ops { const char *ver_str; int (*get_core_resources)(struct platform_device *pdev, void __iomem *core); - int (*init_apid)(struct spmi_pmic_arb_bus *bus); + int (*init_apid)(struct spmi_pmic_arb_bus *bus, int index); int (*ppid_to_apid)(struct spmi_pmic_arb_bus *bus, u16 ppid); /* spmi commands (read_cmd, write_cmd, cmd) functionality */ int (*offset)(struct spmi_pmic_arb_bus *bus, u8 sid, u16 addr, @@ -309,8 +316,8 @@ static int pmic_arb_wait_for_done(struct spmi_controller *ctrl, } if (status & PMIC_ARB_STATUS_FAILURE) { - dev_err(&ctrl->dev, "%s: %#x %#x: transaction failed (%#x)\n", - __func__, sid, addr, status); + dev_err(&ctrl->dev, "%s: %#x %#x: transaction failed (%#x) reg: 0x%x\n", + __func__, sid, addr, status, offset); WARN_ON(1); return -EIO; } @@ -326,8 +333,8 @@ static int pmic_arb_wait_for_done(struct spmi_controller *ctrl, udelay(1); } - dev_err(&ctrl->dev, "%s: %#x %#x: timeout, status %#x\n", - __func__, sid, addr, status); + dev_err(&ctrl->dev, "%s: %#x %#x %#x: timeout, status %#x\n", + __func__, bus->id, sid, addr, status); return -ETIMEDOUT; } @@ -1003,11 +1010,17 @@ static int pmic_arb_get_core_resources_v1(struct platform_device *pdev, return 0; } -static int pmic_arb_init_apid_v1(struct spmi_pmic_arb_bus *bus) +static int pmic_arb_init_apid_v1(struct spmi_pmic_arb_bus *bus, int index) { struct spmi_pmic_arb *pmic_arb = bus->pmic_arb; u32 *mapping_table; + if (index) { + dev_err(&bus->spmic->dev, "Unsupported buses count %d detected\n", + index); + return -EINVAL; + } + mapping_table = devm_kcalloc(&bus->spmic->dev, pmic_arb->max_periphs, sizeof(*mapping_table), GFP_KERNEL); if (!mapping_table) @@ -1250,11 +1263,17 @@ static int pmic_arb_offset_v2(struct spmi_pmic_arb_bus *bus, u8 sid, u16 addr, return 0x1000 * pmic_arb->ee + 0x8000 * apid; } -static int pmic_arb_init_apid_v5(struct spmi_pmic_arb_bus *bus) +static int pmic_arb_init_apid_v5(struct spmi_pmic_arb_bus *bus, int index) { struct spmi_pmic_arb *pmic_arb = bus->pmic_arb; int ret; + if (index) { + dev_err(&bus->spmic->dev, "Unsupported buses count %d detected\n", + index); + return -EINVAL; + } + bus->base_apid = 0; bus->apid_count = readl_relaxed(pmic_arb->core + PMIC_ARB_FEATURES) & PMIC_ARB_FEATURES_PERIPH_MASK; @@ -1326,6 +1345,50 @@ static int pmic_arb_get_core_resources_v7(struct platform_device *pdev, return pmic_arb_get_obsrvr_chnls_v2(pdev); } +/* + * Only v7 supports 2 buses. Each bus will get a different apid count, read + * from different registers. + */ +static int pmic_arb_init_apid_v7(struct spmi_pmic_arb_bus *bus, int index) +{ + struct spmi_pmic_arb *pmic_arb = bus->pmic_arb; + int ret; + + if (index == 0) { + bus->base_apid = 0; + bus->apid_count = readl_relaxed(pmic_arb->core + PMIC_ARB_FEATURES) & + PMIC_ARB_FEATURES_PERIPH_MASK; + } else if (index == 1) { + bus->base_apid = readl_relaxed(pmic_arb->core + PMIC_ARB_FEATURES) & + PMIC_ARB_FEATURES_PERIPH_MASK; + bus->apid_count = readl_relaxed(pmic_arb->core + PMIC_ARB_FEATURES1) & + PMIC_ARB_FEATURES_PERIPH_MASK; + } else { + dev_err(&bus->spmic->dev, "Unsupported buses count %d detected\n", + bus->id); + return -EINVAL; + } + + if (bus->base_apid + bus->apid_count > pmic_arb->max_periphs) { + dev_err(&bus->spmic->dev, "Unsupported APID count %d detected\n", + bus->base_apid + bus->apid_count); + return -EINVAL; + } + + ret = pmic_arb_init_apid_min_max(bus); + if (ret) + return ret; + + ret = pmic_arb_read_apid_map_v5(bus); + if (ret) { + dev_err(&bus->spmic->dev, "could not read APID->PPID mapping table, rc= %d\n", + ret); + return ret; + } + + return 0; +} + /* * v7 offset per ee and per apid for observer channels and per apid for * read/write channels. @@ -1578,7 +1641,7 @@ static const struct pmic_arb_ver_ops pmic_arb_v5 = { static const struct pmic_arb_ver_ops pmic_arb_v7 = { .ver_str = "v7", .get_core_resources = pmic_arb_get_core_resources_v7, - .init_apid = pmic_arb_init_apid_v5, + .init_apid = pmic_arb_init_apid_v7, .ppid_to_apid = pmic_arb_ppid_to_apid_v5, .non_data_cmd = pmic_arb_non_data_cmd_v2, .offset = pmic_arb_offset_v7, @@ -1602,6 +1665,7 @@ static int spmi_pmic_arb_bus_init(struct platform_device *pdev, struct device_node *node, struct spmi_pmic_arb *pmic_arb) { + int bus_index = pmic_arb->buses_available; struct spmi_pmic_arb_bus *bus; struct device *dev = &pdev->dev; struct spmi_controller *ctrl; @@ -1620,7 +1684,7 @@ static int spmi_pmic_arb_bus_init(struct platform_device *pdev, bus = spmi_controller_get_drvdata(ctrl); - pmic_arb->bus = bus; + pmic_arb->buses[bus_index] = bus; raw_spin_lock_init(&bus->lock); @@ -1665,12 +1729,13 @@ static int spmi_pmic_arb_bus_init(struct platform_device *pdev, bus->cnfg = cnfg; bus->irq = irq; bus->spmic = ctrl; + bus->id = bus_index; - ret = pmic_arb->ver_ops->init_apid(bus); + ret = pmic_arb->ver_ops->init_apid(bus, bus_index); if (ret) return ret; - dev_dbg(&pdev->dev, "adding irq domain\n"); + dev_dbg(&pdev->dev, "adding irq domain for bus %d\n", bus_index); bus->domain = irq_domain_add_tree(dev->of_node, &pmic_arb_irq_domain_ops, bus); @@ -1683,14 +1748,53 @@ static int spmi_pmic_arb_bus_init(struct platform_device *pdev, pmic_arb_chained_irq, bus); ctrl->dev.of_node = node; + dev_set_name(&ctrl->dev, "spmi-%d", bus_index); ret = devm_spmi_controller_add(dev, ctrl); if (ret) return ret; + pmic_arb->buses_available++; + return 0; } +static int spmi_pmic_arb_register_buses(struct spmi_pmic_arb *pmic_arb, + struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct device_node *node = dev->of_node; + struct device_node *child; + int ret; + + /* legacy mode doesn't provide child node for the bus */ + if (of_device_is_compatible(node, "qcom,spmi-pmic-arb")) + return spmi_pmic_arb_bus_init(pdev, node, pmic_arb); + + for_each_available_child_of_node(node, child) { + if (of_node_name_eq(child, "spmi")) { + ret = spmi_pmic_arb_bus_init(pdev, child, pmic_arb); + if (ret) + return ret; + } + } + + return ret; +} + +static void spmi_pmic_arb_deregister_buses(struct spmi_pmic_arb *pmic_arb) +{ + int i; + + for (i = 0; i < pmic_arb->buses_available; i++) { + struct spmi_pmic_arb_bus *bus = pmic_arb->buses[i]; + + irq_set_chained_handler_and_data(bus->irq, + NULL, NULL); + irq_domain_remove(bus->domain); + } +} + static int spmi_pmic_arb_probe(struct platform_device *pdev) { struct spmi_pmic_arb *pmic_arb; @@ -1760,21 +1864,19 @@ static int spmi_pmic_arb_probe(struct platform_device *pdev) pmic_arb->ee = ee; - return spmi_pmic_arb_bus_init(pdev, dev->of_node, pmic_arb); + return spmi_pmic_arb_register_buses(pmic_arb, pdev); } static void spmi_pmic_arb_remove(struct platform_device *pdev) { struct spmi_pmic_arb *pmic_arb = platform_get_drvdata(pdev); - struct spmi_pmic_arb_bus *bus = pmic_arb->bus; - irq_set_chained_handler_and_data(bus->irq, - NULL, NULL); - irq_domain_remove(bus->domain); + spmi_pmic_arb_deregister_buses(pmic_arb); } static const struct of_device_id spmi_pmic_arb_match_table[] = { { .compatible = "qcom,spmi-pmic-arb", }, + { .compatible = "qcom,x1e80100-spmi-pmic-arb", }, {}, }; MODULE_DEVICE_TABLE(of, spmi_pmic_arb_match_table);