From patchwork Thu Apr 18 11:58:29 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 13634585 Received: from mail-pf1-f175.google.com (mail-pf1-f175.google.com [209.85.210.175]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B833115F41D for ; Thu, 18 Apr 2024 11:58:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.210.175 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713441535; cv=none; b=ASYOSbcMxcozZ4kxvDRqGGtIGGz1c/DI0Z4s6IzBKVRxYI6fiFEmQecD9Q5g/O9aytqeJQAGRsqD+VvdRI8YNSw0twAGXr+qgYuChxr1tnkbbaU9U1fGgBbS35lMsmTMD/cUDaWyPsHXW+D7HKZKSemTmmc14IRCY2ei5b050aw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713441535; c=relaxed/simple; bh=rwb0ErsAMOJOBGTVMRpx900gyCjG88g972dlNjto2GQ=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=DGgJpHUp3p+8isg/QqLWGoHI/XmInONH3vV99BhrmxS8spaU4SPEKBVeaq2uZp0p5R7mjLYHn4Bqz3xvzha6uPX2cnXtUFHyxwCsP7p3BjPy9cNo40K1OpkVQWZVpiMZkm0ETkpW8WANpNsv63uW4vTfB+R79HLuElIFzdz5Ovw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=xaFG+JS+; arc=none smtp.client-ip=209.85.210.175 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="xaFG+JS+" Received: by mail-pf1-f175.google.com with SMTP id d2e1a72fcca58-6ecf1bb7f38so805807b3a.0 for ; Thu, 18 Apr 2024 04:58:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1713441533; x=1714046333; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=WrN5HMtM25sMebZ7OPzRb4bH/7+xLTv/ToBzj1D+nVM=; b=xaFG+JS+KxCBZq+MsH/QYDsGN8I5mzF3n/QK+K9CrM2rVljfapgk6Ml7GewxqSX8Bz +vbLdev4Bl0Bn1tLYsjAB20vgTM2wfjyQmqO9n/cz1EvLs9ebtsXaDsMj1p2/pplbbIT c/s+vBWNGYROin8M27ufh1dUxhrScYlSusxkpeToJdY007m2LOx3L4/YUEWYy4I/LK27 dL32ON80BUpYj/eUateeeiXZtSG+jtYO+fBuGUJFy254dr4D0Wbb8YXX68J5qKB0+aMF Liiqc7Rk/eFP06Wv8+N0KaXsb/qVWxghZamFUslY14O/yNKohouag3OAaRLqKHNRf2B+ HaHA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1713441533; x=1714046333; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=WrN5HMtM25sMebZ7OPzRb4bH/7+xLTv/ToBzj1D+nVM=; b=t/VII44hdfhBsaITN55WF22eeB/ox92dbzjahiKJwkdxQ/ss2a6xQO/Pacg0MslMSR Olmup086U4eoCSFWQ9hp0trMV2Fao4UnfJcP0mloQZUvs2YIkcOfk/XgLUvi94hQXJVY c8OT9H9j0q7CxvpFBQ8648LYhPwwm8J89RLvIqZTcCR9OngFSQoqwDScZ7HuvTyRXWGQ rl1gBSCpT+IznZVv3fmmiMRXp7ZDaGISEtqFJYKg2+N3cxYHWgiIBzL+rob3YPxwzubh iDcpep52zrZ4Xqah8QH1/Rpq+SxJ7wsR/J+eeYr7n3yVWd0U7y/E1hvkyxw9MQYGdJhG DFGg== X-Forwarded-Encrypted: i=1; AJvYcCWg3CeKXCL2LsgJoomdKCmNrYLwSZ2rcXNUtagXRvYzxgc9HFNu21UGDzY257LijHN09mhZ9TEshMioi6vgr+113CpWjwSnJqu5/zDkSg== X-Gm-Message-State: AOJu0YzQchj7HBbgaYDmZui4YkyB/48EqZvw874ij5r8UgM9jECXCzkQ Z9NYsrBo8GQZYpJOVdnMNaCYZBHhTvl8yEtVG7pv+qUu9eRYxGqlfNby5H9LJQ== X-Google-Smtp-Source: AGHT+IG9kXTcBipP2Gwv++j5yx6bfXSo/45ZBOKxw8RMkTQGkrpXHP9dpUWBB5CmHlQYwwIKACpZFA== X-Received: by 2002:a05:6a00:3a0c:b0:6ed:d164:3433 with SMTP id fj12-20020a056a003a0c00b006edd1643433mr3235807pfb.14.1713441532862; Thu, 18 Apr 2024 04:58:52 -0700 (PDT) Received: from [127.0.1.1] ([120.56.197.253]) by smtp.gmail.com with ESMTPSA id ei16-20020a056a0080d000b006ed06c4074bsm1305512pfb.85.2024.04.18.04.58.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 18 Apr 2024 04:58:52 -0700 (PDT) From: Manivannan Sadhasivam Date: Thu, 18 Apr 2024 17:28:29 +0530 Subject: [PATCH v3 1/9] PCI: qcom-ep: Disable resources unconditionally during PERST# assert Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240418-pci-epf-rework-v3-1-222a5d1ed2e5@linaro.org> References: <20240418-pci-epf-rework-v3-0-222a5d1ed2e5@linaro.org> In-Reply-To: <20240418-pci-epf-rework-v3-0-222a5d1ed2e5@linaro.org> To: Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Rob Herring , Bjorn Helgaas , Kishon Vijay Abraham I , Thierry Reding , Jonathan Hunter , Jingoo Han Cc: linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, mhi@lists.linux.dev, linux-tegra@vger.kernel.org, Niklas Cassel , Manivannan Sadhasivam X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=1389; i=manivannan.sadhasivam@linaro.org; h=from:subject:message-id; bh=rwb0ErsAMOJOBGTVMRpx900gyCjG88g972dlNjto2GQ=; b=owEBbQGS/pANAwAKAVWfEeb+kc71AcsmYgBmIQrywUQZ4EOU/A+AC0lu/3GJstzSzgnsSMRIw Cbdqkkl+06JATMEAAEKAB0WIQRnpUMqgUjL2KRYJ5dVnxHm/pHO9QUCZiEK8gAKCRBVnxHm/pHO 9R1ZB/wI02PPJ6D+du4yCtEE5xK/RY1PWa2AMXi1v6kvovHwcBAVjhYoA1HNqqGEMdTXRVHZvOj 3o2Bz3iTvgGW9hdlSIiFgNpqIUYmUSe/Yd66nOZGAR94uY1ryVf/3auhJr7rnq5JdxpTWYqM0qP gHmtmy03clIVQUUrYHqFDWKeYzlIILcLJVN0Un5g58JqvTBEWZQmAJv6KBI4kJx1B0fIwBxZ+V0 +sgykVYYMz4MgwZjEolHARgZC/6j5YEvDBxBhkK7xMnoNszpyEIP8D+Aw9l/2QzEIpKV9cHBZlf Ig9p71iFc6buSGb/ijEaNCW94m+ONZJUrxFFYi8gTK4eM6pE X-Developer-Key: i=manivannan.sadhasivam@linaro.org; a=openpgp; fpr=C668AEC3C3188E4C611465E7488550E901166008 All EP specific resources are enabled during PERST# deassert. As a counter operation, all resources should be disabled during PERST# assert. There is no point in skipping that if the link was not enabled. This will also result in enablement of the resources twice if PERST# got deasserted again. So remove the check from qcom_pcie_perst_assert() and disable all the resources unconditionally. Fixes: f55fee56a631 ("PCI: qcom-ep: Add Qualcomm PCIe Endpoint controller driver") Reviewed-by: Niklas Cassel Signed-off-by: Manivannan Sadhasivam --- drivers/pci/controller/dwc/pcie-qcom-ep.c | 6 ------ 1 file changed, 6 deletions(-) diff --git a/drivers/pci/controller/dwc/pcie-qcom-ep.c b/drivers/pci/controller/dwc/pcie-qcom-ep.c index 2fb8c15e7a91..50b1635e3cbb 100644 --- a/drivers/pci/controller/dwc/pcie-qcom-ep.c +++ b/drivers/pci/controller/dwc/pcie-qcom-ep.c @@ -500,12 +500,6 @@ static int qcom_pcie_perst_deassert(struct dw_pcie *pci) static void qcom_pcie_perst_assert(struct dw_pcie *pci) { struct qcom_pcie_ep *pcie_ep = to_pcie_ep(pci); - struct device *dev = pci->dev; - - if (pcie_ep->link_status == QCOM_PCIE_EP_LINK_DISABLED) { - dev_dbg(dev, "Link is already disabled\n"); - return; - } dw_pcie_ep_cleanup(&pci->ep); qcom_pcie_disable_resources(pcie_ep); From patchwork Thu Apr 18 11:58:30 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 13634586 Received: from mail-oi1-f174.google.com (mail-oi1-f174.google.com [209.85.167.174]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5FA6E15FA8F for ; Thu, 18 Apr 2024 11:58:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.167.174 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713441539; cv=none; b=FM+dg6O+qyb0oR2CKVXJLJ2MV9TOHGFMN0znIMN/QI8S5dsuiYxkpww+McKKq8bFln5c2Oq6hF+AFtzFroxn216r8I+5cLIi6qaAMty4m4DzNirdHOdFJaRDU7MG2nP21NAS7c8oBbDOiRANCQ2nC/DU4Ssj2IaphPMcqoFgrCg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713441539; c=relaxed/simple; bh=EiCo8PoNc6cg3qXS12lnExu1Vwt+xqfEZf7YkYu86EA=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=dAuANs9YFxEZ8PM95ivjgvyeAxGfjkmHk5Hn6DBi41rxV8K2qanpVTRH042IRdwAH5XwcJpC+msU/+vGoLG/o3d2YIkX8N9GvRn3yqBtcu70X8ud50jnI0kdewddxSgoRk/XC74NlaNdJsHBznfMbro83tWO6tvr+NM70qEqM0M= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=DrGeGXO8; arc=none smtp.client-ip=209.85.167.174 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="DrGeGXO8" Received: by mail-oi1-f174.google.com with SMTP id 5614622812f47-3bbbc6e51d0so521085b6e.3 for ; Thu, 18 Apr 2024 04:58:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1713441537; x=1714046337; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=79MJpTqAjl8O6Pv0vbT9iUqFML3hqwQuq9I/aS5KbP0=; b=DrGeGXO8tH7Q40G0sQPo0j0wR7ksRRFu0g7yILBm13Y9dy7p0hQQUMX9S3twdMjhVJ TaBBs1e92Zb093GHvjUqWEUTZ/4KTxtQtyVgtvXJRdzRZpJh7JCZdVqaie7o/JrZreSd r3QrteiJOWL38c+PiPFl0EFEBfcjcOtV9Qqa6+rs0MacJm80kUMrgBR4Vll2D7xmHLld me0WAHFROz3iD7OCPZTX5a7+TACGekMehDyHCExAuyCPEeVH06mYX4jGAGcrXglHiiYk dEy3tbwubg6NqaCzouP23iTTtVn6EDmTSnye1DugQO5HHTcEDgXYd8buYySMNgTTi2SE Elsw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1713441537; x=1714046337; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=79MJpTqAjl8O6Pv0vbT9iUqFML3hqwQuq9I/aS5KbP0=; b=iGycgNWST2ymTaHBo0+1vH11QuigzkwTjCqX/j3661Gx+aME639i7slDrQnyRSLeyD QzwQUzTp08iZPguRQ1+pbBmw5rZ2RVSYsOG/+bBpSv+/wKOrC8HtvFohlljXIc8CUYxw QceFqqkf/xl9JhtJvC7RDI5f+IdDM++oEJBGZxzrOfoo/OooXfpqtUekITt3jZuUzC/j 9Wp3WPwrWCNwuy9m5qNoTmYxugxbwcqU5iAJA1PSN2we2Tx4ZMYPx45nKus8J2aacC6y MVd9hFZdzDiEnQ6U49ZPwjcpUmT2+uhIwkDGh5YQTfe2WryfuI7tHLtvh+UxUksYqTcI s4uQ== X-Forwarded-Encrypted: i=1; AJvYcCXnV+JRLXfs+mXf4WoqwsTOtgPbm6QG5aiecZuEkWKVdSekvvmEuTEdZy1ZbTjlp5UN321YX6qgB2eHGUAEMMORktQlyYEVMBSRdJwM3A== X-Gm-Message-State: AOJu0YziivJr7jcU1GB/7tQIPNYyPUJJawlLjYflgPUl4aIusHP0LOJr iK95PgPZcId0elX0pJarv9uOm/grHzLtT0vov2jLDMQ6tUqJ0V52Kd7GHBaeBsOlhADzG9ldhPI = X-Google-Smtp-Source: AGHT+IGAJCI718Rs8anfjsRigMWsxEJP6XeVOzGi9Nb+kHa9PcoCWJzBu3rLNMYJDSPbAxRGyta0ng== X-Received: by 2002:a05:6870:3324:b0:22e:c6b2:84aa with SMTP id x36-20020a056870332400b0022ec6b284aamr3295224oae.27.1713441537189; Thu, 18 Apr 2024 04:58:57 -0700 (PDT) Received: from [127.0.1.1] ([120.56.197.253]) by smtp.gmail.com with ESMTPSA id ei16-20020a056a0080d000b006ed06c4074bsm1305512pfb.85.2024.04.18.04.58.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 18 Apr 2024 04:58:56 -0700 (PDT) From: Manivannan Sadhasivam Date: Thu, 18 Apr 2024 17:28:30 +0530 Subject: [PATCH v3 2/9] PCI: endpoint: Rename core_init() callback in 'struct pci_epc_event_ops' to epc_init() Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240418-pci-epf-rework-v3-2-222a5d1ed2e5@linaro.org> References: <20240418-pci-epf-rework-v3-0-222a5d1ed2e5@linaro.org> In-Reply-To: <20240418-pci-epf-rework-v3-0-222a5d1ed2e5@linaro.org> To: Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Rob Herring , Bjorn Helgaas , Kishon Vijay Abraham I , Thierry Reding , Jonathan Hunter , Jingoo Han Cc: linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, mhi@lists.linux.dev, linux-tegra@vger.kernel.org, Niklas Cassel , Manivannan Sadhasivam X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=5520; i=manivannan.sadhasivam@linaro.org; h=from:subject:message-id; bh=EiCo8PoNc6cg3qXS12lnExu1Vwt+xqfEZf7YkYu86EA=; b=owEBbQGS/pANAwAKAVWfEeb+kc71AcsmYgBmIQryxIrFpq1A2J+VEu+QuPdoUer2VPq15EkrK GjkY9IY3AuJATMEAAEKAB0WIQRnpUMqgUjL2KRYJ5dVnxHm/pHO9QUCZiEK8gAKCRBVnxHm/pHO 9Wf5CACMprbQP9Um+MWSRGrqauvRG2mPr2zXmfQlPdKcarkzSnjVKfos755tBQyCy0XpzlFHR3Z wTTFnnap5Tnx4cZwwukuPa3K3/CK5YMv6ug8FOuE9LYiW2FDkVUNRcucytBKCJGt+SAWF5Cs7BF iqIjLKbrs7xXm1/yzCfvLSg6AqE0lnYkQ1sRXuzJ7LqLkFHVVBJ7tbzYKqIhcErcU6yaInu+8yN ZIUMuN22f2RWaSQTLaV4LsB2lzUuiSbAT/NZ/dukxnAbJhiUxCI48Hwph6Z2QtODTjE6I+wKCkm tCMH5UeDKcb74KDLQ+GMe82VWsvm3lHyP7kj8I6Dav8qgvcq X-Developer-Key: i=manivannan.sadhasivam@linaro.org; a=openpgp; fpr=C668AEC3C3188E4C611465E7488550E901166008 core_init() callback is used to notify the EPC initialization event to the EPF drivers. The 'core' prefix was used indicate that the controller IP core has completed initialization. But it serves no purpose as the EPF driver will only care about the EPC initialization as a whole and there is no real benefit to distinguish the IP core part. So let's rename the core_init() callback in 'struct pci_epc_event_ops' to epc_init() to make it more clear. Signed-off-by: Manivannan Sadhasivam Reviewed-by: Niklas Cassel --- drivers/pci/endpoint/functions/pci-epf-mhi.c | 4 ++-- drivers/pci/endpoint/functions/pci-epf-test.c | 4 ++-- drivers/pci/endpoint/pci-epc-core.c | 16 ++++++++-------- include/linux/pci-epf.h | 4 ++-- 4 files changed, 14 insertions(+), 14 deletions(-) diff --git a/drivers/pci/endpoint/functions/pci-epf-mhi.c b/drivers/pci/endpoint/functions/pci-epf-mhi.c index 2c54d80107cf..95c3206f609f 100644 --- a/drivers/pci/endpoint/functions/pci-epf-mhi.c +++ b/drivers/pci/endpoint/functions/pci-epf-mhi.c @@ -716,7 +716,7 @@ static void pci_epf_mhi_dma_deinit(struct pci_epf_mhi *epf_mhi) epf_mhi->dma_chan_rx = NULL; } -static int pci_epf_mhi_core_init(struct pci_epf *epf) +static int pci_epf_mhi_epc_init(struct pci_epf *epf) { struct pci_epf_mhi *epf_mhi = epf_get_drvdata(epf); const struct pci_epf_mhi_ep_info *info = epf_mhi->info; @@ -897,7 +897,7 @@ static void pci_epf_mhi_unbind(struct pci_epf *epf) } static const struct pci_epc_event_ops pci_epf_mhi_event_ops = { - .core_init = pci_epf_mhi_core_init, + .epc_init = pci_epf_mhi_epc_init, .link_up = pci_epf_mhi_link_up, .link_down = pci_epf_mhi_link_down, .bme = pci_epf_mhi_bme, diff --git a/drivers/pci/endpoint/functions/pci-epf-test.c b/drivers/pci/endpoint/functions/pci-epf-test.c index 977fb79c1567..8175d4f2a0eb 100644 --- a/drivers/pci/endpoint/functions/pci-epf-test.c +++ b/drivers/pci/endpoint/functions/pci-epf-test.c @@ -731,7 +731,7 @@ static int pci_epf_test_set_bar(struct pci_epf *epf) return 0; } -static int pci_epf_test_core_init(struct pci_epf *epf) +static int pci_epf_test_epc_init(struct pci_epf *epf) { struct pci_epf_test *epf_test = epf_get_drvdata(epf); struct pci_epf_header *header = epf->header; @@ -799,7 +799,7 @@ static int pci_epf_test_link_up(struct pci_epf *epf) } static const struct pci_epc_event_ops pci_epf_test_event_ops = { - .core_init = pci_epf_test_core_init, + .epc_init = pci_epf_test_epc_init, .link_up = pci_epf_test_link_up, }; diff --git a/drivers/pci/endpoint/pci-epc-core.c b/drivers/pci/endpoint/pci-epc-core.c index 47d27ec7439d..e6bffa37a948 100644 --- a/drivers/pci/endpoint/pci-epc-core.c +++ b/drivers/pci/endpoint/pci-epc-core.c @@ -727,9 +727,9 @@ void pci_epc_linkdown(struct pci_epc *epc) EXPORT_SYMBOL_GPL(pci_epc_linkdown); /** - * pci_epc_init_notify() - Notify the EPF device that EPC device's core - * initialization is completed. - * @epc: the EPC device whose core initialization is completed + * pci_epc_init_notify() - Notify the EPF device that EPC device initialization + * is completed. + * @epc: the EPC device whose initialization is completed * * Invoke to Notify the EPF device that the EPC device's initialization * is completed. @@ -744,8 +744,8 @@ void pci_epc_init_notify(struct pci_epc *epc) mutex_lock(&epc->list_lock); list_for_each_entry(epf, &epc->pci_epf, list) { mutex_lock(&epf->lock); - if (epf->event_ops && epf->event_ops->core_init) - epf->event_ops->core_init(epf); + if (epf->event_ops && epf->event_ops->epc_init) + epf->event_ops->epc_init(epf); mutex_unlock(&epf->lock); } epc->init_complete = true; @@ -756,7 +756,7 @@ EXPORT_SYMBOL_GPL(pci_epc_init_notify); /** * pci_epc_notify_pending_init() - Notify the pending EPC device initialization * complete to the EPF device - * @epc: the EPC device whose core initialization is pending to be notified + * @epc: the EPC device whose initialization is pending to be notified * @epf: the EPF device to be notified * * Invoke to notify the pending EPC device initialization complete to the EPF @@ -767,8 +767,8 @@ void pci_epc_notify_pending_init(struct pci_epc *epc, struct pci_epf *epf) { if (epc->init_complete) { mutex_lock(&epf->lock); - if (epf->event_ops && epf->event_ops->core_init) - epf->event_ops->core_init(epf); + if (epf->event_ops && epf->event_ops->epc_init) + epf->event_ops->epc_init(epf); mutex_unlock(&epf->lock); } } diff --git a/include/linux/pci-epf.h b/include/linux/pci-epf.h index adee6a1b35db..afe3bfd88742 100644 --- a/include/linux/pci-epf.h +++ b/include/linux/pci-epf.h @@ -70,13 +70,13 @@ struct pci_epf_ops { /** * struct pci_epc_event_ops - Callbacks for capturing the EPC events - * @core_init: Callback for the EPC initialization complete event + * @epc_init: Callback for the EPC initialization complete event * @link_up: Callback for the EPC link up event * @link_down: Callback for the EPC link down event * @bme: Callback for the EPC BME (Bus Master Enable) event */ struct pci_epc_event_ops { - int (*core_init)(struct pci_epf *epf); + int (*epc_init)(struct pci_epf *epf); int (*link_up)(struct pci_epf *epf); int (*link_down)(struct pci_epf *epf); int (*bme)(struct pci_epf *epf); From patchwork Thu Apr 18 11:58:31 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 13634587 Received: from mail-pf1-f176.google.com (mail-pf1-f176.google.com [209.85.210.176]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AB25415FCE8 for ; Thu, 18 Apr 2024 11:59:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.210.176 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713441544; cv=none; b=cfMzHWHCDmWdB5dBXnmcrPlqqrCYtHPvR1HFGw2yhslSpiN0dI4jL2KbsX6mubi+tlbWF+MaWOGY7YYGZE2E/pafJyQgJqHC/ZNYxuoVit7Ry+idc10UfoSpT+2sJZfjQQ1AiyUIsIgXv2VHrx1wjs6mvey+VkoSZjEzORW2iHY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713441544; c=relaxed/simple; bh=Lk/AnxlCrRiAz0ji3mWdS5KjfmS1Qvw7tgApf8ZLE60=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=FTVbPTHMEa7/k+cL79pAfaqVSltT4Txeq6Uht8WGt3dsvSHlq7u2NFMZyJvLoYpX8XckztdPVF/5ful8I+lj49Ff3HHO8AacDaqSHPy/feyEuHGqI+J0FWANVpxl+FA0a3EhS4SlmnNn+tMM4Ud/n/0yhH1hUffhiknza1azRBA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=XjVRgxkR; arc=none smtp.client-ip=209.85.210.176 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="XjVRgxkR" Received: by mail-pf1-f176.google.com with SMTP id d2e1a72fcca58-6ecf05fd12fso744890b3a.2 for ; Thu, 18 Apr 2024 04:59:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1713441542; x=1714046342; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=o5IHRTEpOjY2sC7qQ4E8BfwjFPjyqQrSwvZaUxoSWxY=; b=XjVRgxkR7F4dg5timbzTJxaFVQaKq1NBA11W4vl0ywbUNz3R9S+R8bvVJ0lKR8FASe oPV2yLCJFjHWIaZ7VceE+bI8PTOxutxuNt9FS+py64g5qmDuIrCPgeVVeCkXdihXW9FC W7zlr5AaA6vnKLH47h1wlzTDMd9GsXugYcjE5eKVL2FskHGI0n3VEOmUrIMwVEne32oK hW8gomiIvIpfbMsitrUv48wz+m/aGMTTxRXTCyqSHqG2kfA4SNBrwOzbCIdWvviCvqXB PP27nutC3HdPGvccOnFAHkbv+YR9/yINyj4eKvbG9bcrX1Dt1YJuyOmyK20dOpxgjK3f 1A6g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1713441542; x=1714046342; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=o5IHRTEpOjY2sC7qQ4E8BfwjFPjyqQrSwvZaUxoSWxY=; b=VqNiDE/JOFYZ9Pgta7C/LhCBq5TSQHIBmexZ+pem9YXUZfXLL7lewyDpyomTbKAGFN Ea66ApULjC3uLJJQvtRo3Ut/1rfyMQSwNEC+DKR2DL97FPi+sMxdWfjL4HsAfEchvxBN 2CID0dthH5MWD73amY99p2a7FVanzjPkgWJZTOEGvCU9F2yISxkDgQmNK5aKhDlfXHo4 uT+MnZsttnsabl9XELTdKLrS3Ch0wxEMk15bi/XCxjFA4NVDbhwITzyttlC7bXz5NVeR 4Q/l2PltCrNPRkKsWdp6FXXcDmfoKaMMJV4ztRj3xDShyv6AcK0XvBU/buitUf4NoCjf 7zmg== X-Forwarded-Encrypted: i=1; AJvYcCVQZDxAI5uj0XZJiihhdG5WH7q+q/RDzFtNPZbhXctXS0SOUnZ6wZDA9MjnoK6YKyBN4bDH5YmsL7xrsDaQ4Dpdc8AunuRg/gvuTewkTg== X-Gm-Message-State: AOJu0Yx1zBWAJb8/pAVcvfbUqO0g+Eu+EQGOhhHMMCBziK/e/y0bptCx deZSqYcUyEyf6V/6tynuJ34H9fCMqNTDdaxWK1g4wQxZXFGzf1UxKOwTkJWvUw== X-Google-Smtp-Source: AGHT+IF6mIvmk0eNgTS3ZgsZJeimz6ohh7mh47bzE0qfP48g6iwB/2tEMzUWXamhs4A1OEQpnNuuVg== X-Received: by 2002:a05:6a00:3cc2:b0:6ea:ad5e:f4b3 with SMTP id ln2-20020a056a003cc200b006eaad5ef4b3mr3416162pfb.23.1713441541586; Thu, 18 Apr 2024 04:59:01 -0700 (PDT) Received: from [127.0.1.1] ([120.56.197.253]) by smtp.gmail.com with ESMTPSA id ei16-20020a056a0080d000b006ed06c4074bsm1305512pfb.85.2024.04.18.04.58.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 18 Apr 2024 04:59:01 -0700 (PDT) From: Manivannan Sadhasivam Date: Thu, 18 Apr 2024 17:28:31 +0530 Subject: [PATCH v3 3/9] PCI: endpoint: Rename BME to Bus Master Enable Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240418-pci-epf-rework-v3-3-222a5d1ed2e5@linaro.org> References: <20240418-pci-epf-rework-v3-0-222a5d1ed2e5@linaro.org> In-Reply-To: <20240418-pci-epf-rework-v3-0-222a5d1ed2e5@linaro.org> To: Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Rob Herring , Bjorn Helgaas , Kishon Vijay Abraham I , Thierry Reding , Jonathan Hunter , Jingoo Han Cc: linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, mhi@lists.linux.dev, linux-tegra@vger.kernel.org, Niklas Cassel , Manivannan Sadhasivam , Damien Le Moal X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=6209; i=manivannan.sadhasivam@linaro.org; h=from:subject:message-id; bh=Lk/AnxlCrRiAz0ji3mWdS5KjfmS1Qvw7tgApf8ZLE60=; b=owEBbQGS/pANAwAKAVWfEeb+kc71AcsmYgBmIQrys/WiHIEG/f/zBYXtE35MciDqjyaF8f3jD g5VbyDchN6JATMEAAEKAB0WIQRnpUMqgUjL2KRYJ5dVnxHm/pHO9QUCZiEK8gAKCRBVnxHm/pHO 9SoFB/0XznAMJViAzNjG6YdUDOLoW7x5w89D72xa7bMYqD4CvgH5fFlM8JH4vq7GQH+rbU3Sn4H X3YztX7WQkTXL+NE5ptlvQjDG19jZTr0DN3jaQEfAdxE0MhZCZ+EcqDrAiew+mBNVV9w33DJy0F mUNSTtGxFpHNZYGwfbe/yww5RtVEAxmuIM9TYcX+EBVvOqTVUXTKksbPD8P4Y7d5nQ6JeEEMUY6 /vpm7APD824UqdqPaka7AJkV1oxMvXFE80fSA76bmJJWhQO0Btd21JF5Sz8HVIFUNPLQ02Bk9B+ v6aUoQXXkepCoNOgd52FJKkwvcFHKyA4lAdKw7vbpGmayGwr X-Developer-Key: i=manivannan.sadhasivam@linaro.org; a=openpgp; fpr=C668AEC3C3188E4C611465E7488550E901166008 BME which stands for 'Bus Master Enable' is not defined in the PCIe base spec even though it is commonly referred in many places (vendor docs). But to align with the spec, let's rename it to its expansion 'Bus Master Enable'. Suggested-by: Damien Le Moal Signed-off-by: Manivannan Sadhasivam Reviewed-by: Niklas Cassel --- drivers/pci/controller/dwc/pcie-qcom-ep.c | 4 ++-- drivers/pci/endpoint/functions/pci-epf-mhi.c | 8 ++++---- drivers/pci/endpoint/pci-epc-core.c | 17 +++++++++-------- include/linux/pci-epc.h | 2 +- include/linux/pci-epf.h | 4 ++-- 5 files changed, 18 insertions(+), 17 deletions(-) diff --git a/drivers/pci/controller/dwc/pcie-qcom-ep.c b/drivers/pci/controller/dwc/pcie-qcom-ep.c index 50b1635e3cbb..f6e925d434f6 100644 --- a/drivers/pci/controller/dwc/pcie-qcom-ep.c +++ b/drivers/pci/controller/dwc/pcie-qcom-ep.c @@ -636,10 +636,10 @@ static irqreturn_t qcom_pcie_ep_global_irq_thread(int irq, void *data) pcie_ep->link_status = QCOM_PCIE_EP_LINK_DOWN; pci_epc_linkdown(pci->ep.epc); } else if (FIELD_GET(PARF_INT_ALL_BME, status)) { - dev_dbg(dev, "Received BME event. Link is enabled!\n"); + dev_dbg(dev, "Received Bus Master Enable event. Link is enabled!\n"); pcie_ep->link_status = QCOM_PCIE_EP_LINK_ENABLED; qcom_pcie_ep_icc_update(pcie_ep); - pci_epc_bme_notify(pci->ep.epc); + pci_epc_bus_master_enable_notify(pci->ep.epc); } else if (FIELD_GET(PARF_INT_ALL_PM_TURNOFF, status)) { dev_dbg(dev, "Received PM Turn-off event! Entering L23\n"); val = readl_relaxed(pcie_ep->parf + PARF_PM_CTRL); diff --git a/drivers/pci/endpoint/functions/pci-epf-mhi.c b/drivers/pci/endpoint/functions/pci-epf-mhi.c index 95c3206f609f..b662905e2532 100644 --- a/drivers/pci/endpoint/functions/pci-epf-mhi.c +++ b/drivers/pci/endpoint/functions/pci-epf-mhi.c @@ -819,7 +819,7 @@ static int pci_epf_mhi_link_down(struct pci_epf *epf) return 0; } -static int pci_epf_mhi_bme(struct pci_epf *epf) +static int pci_epf_mhi_bus_master_enable(struct pci_epf *epf) { struct pci_epf_mhi *epf_mhi = epf_get_drvdata(epf); const struct pci_epf_mhi_ep_info *info = epf_mhi->info; @@ -882,8 +882,8 @@ static void pci_epf_mhi_unbind(struct pci_epf *epf) /* * Forcefully power down the MHI EP stack. Only way to bring the MHI EP - * stack back to working state after successive bind is by getting BME - * from host. + * stack back to working state after successive bind is by getting Bus + * Master Enable event from host. */ if (mhi_cntrl->mhi_dev) { mhi_ep_power_down(mhi_cntrl); @@ -900,7 +900,7 @@ static const struct pci_epc_event_ops pci_epf_mhi_event_ops = { .epc_init = pci_epf_mhi_epc_init, .link_up = pci_epf_mhi_link_up, .link_down = pci_epf_mhi_link_down, - .bme = pci_epf_mhi_bme, + .bus_master_enable = pci_epf_mhi_bus_master_enable, }; static int pci_epf_mhi_probe(struct pci_epf *epf, diff --git a/drivers/pci/endpoint/pci-epc-core.c b/drivers/pci/endpoint/pci-epc-core.c index e6bffa37a948..917dc56dfbbe 100644 --- a/drivers/pci/endpoint/pci-epc-core.c +++ b/drivers/pci/endpoint/pci-epc-core.c @@ -775,14 +775,15 @@ void pci_epc_notify_pending_init(struct pci_epc *epc, struct pci_epf *epf) EXPORT_SYMBOL_GPL(pci_epc_notify_pending_init); /** - * pci_epc_bme_notify() - Notify the EPF device that the EPC device has received - * the BME event from the Root complex - * @epc: the EPC device that received the BME event + * pci_epc_bus_master_enable_notify() - Notify the EPF device that the EPC + * device has received the Bus Master + * Enable event from the Root complex + * @epc: the EPC device that received the Bus Master Enable event * * Invoke to Notify the EPF device that the EPC device has received the Bus - * Master Enable (BME) event from the Root complex + * Master Enable event from the Root complex */ -void pci_epc_bme_notify(struct pci_epc *epc) +void pci_epc_bus_master_enable_notify(struct pci_epc *epc) { struct pci_epf *epf; @@ -792,13 +793,13 @@ void pci_epc_bme_notify(struct pci_epc *epc) mutex_lock(&epc->list_lock); list_for_each_entry(epf, &epc->pci_epf, list) { mutex_lock(&epf->lock); - if (epf->event_ops && epf->event_ops->bme) - epf->event_ops->bme(epf); + if (epf->event_ops && epf->event_ops->bus_master_enable) + epf->event_ops->bus_master_enable(epf); mutex_unlock(&epf->lock); } mutex_unlock(&epc->list_lock); } -EXPORT_SYMBOL_GPL(pci_epc_bme_notify); +EXPORT_SYMBOL_GPL(pci_epc_bus_master_enable_notify); /** * pci_epc_destroy() - destroy the EPC device diff --git a/include/linux/pci-epc.h b/include/linux/pci-epc.h index acc5f96161fe..11115cd0fe5b 100644 --- a/include/linux/pci-epc.h +++ b/include/linux/pci-epc.h @@ -226,7 +226,7 @@ void pci_epc_linkup(struct pci_epc *epc); void pci_epc_linkdown(struct pci_epc *epc); void pci_epc_init_notify(struct pci_epc *epc); void pci_epc_notify_pending_init(struct pci_epc *epc, struct pci_epf *epf); -void pci_epc_bme_notify(struct pci_epc *epc); +void pci_epc_bus_master_enable_notify(struct pci_epc *epc); void pci_epc_remove_epf(struct pci_epc *epc, struct pci_epf *epf, enum pci_epc_interface_type type); int pci_epc_write_header(struct pci_epc *epc, u8 func_no, u8 vfunc_no, diff --git a/include/linux/pci-epf.h b/include/linux/pci-epf.h index afe3bfd88742..dc759eb7157c 100644 --- a/include/linux/pci-epf.h +++ b/include/linux/pci-epf.h @@ -73,13 +73,13 @@ struct pci_epf_ops { * @epc_init: Callback for the EPC initialization complete event * @link_up: Callback for the EPC link up event * @link_down: Callback for the EPC link down event - * @bme: Callback for the EPC BME (Bus Master Enable) event + * @bus_master_enable: Callback for the EPC Bus Master Enable event */ struct pci_epc_event_ops { int (*epc_init)(struct pci_epf *epf); int (*link_up)(struct pci_epf *epf); int (*link_down)(struct pci_epf *epf); - int (*bme)(struct pci_epf *epf); + int (*bus_master_enable)(struct pci_epf *epf); }; /** From patchwork Thu Apr 18 11:58:32 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 13634588 Received: from mail-pf1-f179.google.com (mail-pf1-f179.google.com [209.85.210.179]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D361116079B for ; Thu, 18 Apr 2024 11:59:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.210.179 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713441548; cv=none; b=V2GCb1UU/zBZ/fBvbro9v8NdT77uVHSkuhSLO4/XuqUSZzGbkXqR2eAx9GLd6EdOTKBtqUrgcYfHAu67kwTp4AfKmQHXk09QzMyBbpYr1D1rPKODd/7pI2IUj4Tf6AhksVRMBQGCpjKb+NRf+D8Qpi7A2O8kmXC4Joqo6T4Ialc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713441548; c=relaxed/simple; bh=ZVpMtASDroG5xgP9YNqj8iEe9ZOXPH9GZK0T5NEQXA0=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=khwJ5JLgjBzM+TdN0VFidNuUxdJu3IHq+ZmAobBchM7G+uVlvD3RsjoWiU+Z5cbroHLp13swcMVwttjB7YDQbFDw+WgydJHIixi2fkQhSksSedqlFwyk0cEHpBYuVU3ilDON8fQvoPpH2xdDbAQOqvv6ym9cL7wKeDU7szuMafI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=dKUNkZ6m; arc=none smtp.client-ip=209.85.210.179 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="dKUNkZ6m" Received: by mail-pf1-f179.google.com with SMTP id d2e1a72fcca58-6edc61d0ff6so765835b3a.2 for ; Thu, 18 Apr 2024 04:59:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1713441546; x=1714046346; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=VbF6jYa8z7u7B75OT+z/3TtJOTDZ/CVRBSy21cpI2UU=; b=dKUNkZ6mPbW10yeKDvm7fnx+PhmhTdhzD1lwerdQturSfhllQgZ6R4h27uKFQUnQM/ DCZ9z0jtFnjykHEGVGFG2mmYJbgdm7BcptS5tuqlK4V8Xm3D2bPOn4n+TcCTIim8yYbC pTbVaytKv/+ONB+fnzARJZSXPudhe9hay1MqlKlYRfXNw2tB7jm3taqKBQcRDcL6quLV LQirY9sSOlobAdDYmwtDe1tyVIUTAY/PItQuP8I0mmx/e60od6t6C2mjMUXs26KyoU8K 3PGDBX4yUTurzf+tAN2oykkV4FdYhQlKZA3a9sLwZFDhMFrJImfrPPSk9fNND6UphHeW PZbQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1713441546; x=1714046346; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=VbF6jYa8z7u7B75OT+z/3TtJOTDZ/CVRBSy21cpI2UU=; b=pnzNaniAziOpgMe/NroDs2yQwwU9FWUWY+Z+kXeXY95v7xFG8eXr7RosdEiHtAOEfa szy3sRQIZjPs6am7S96kgjcHTTiRjXB+J5+SAHtnheZnZgRutId7U0orRvpNP66p9bfa lkHAGfHvAh1nzLDbCiqQMuKEjln2jEJbxv7SLhWxfvaTIbS7XPzrg/08gGZmEwU/tHHv PDFNZSng2IxQMoYTOZ58ZoFcuR4b/8G5/Q0MwfmAPvhRRWgVHx4vQ5INPFMlxe52UEbe 8tuobvDESWAPUmowxmQkmmXzeLgbU7IQ5VJw500oBDIe9eXPNgjv92BbfKeIMm4SNG6v e8wQ== X-Forwarded-Encrypted: i=1; AJvYcCXEF9nvEWM4mx+Km02JbA5ago4NToFb7k+CofOcnWxkMboCREx3Zzk50V8mdtqJjiLxq5eaxEYPahyW3Sq2HnUJ+5Pep2r69/6TsxKl4Q== X-Gm-Message-State: AOJu0YwqUd86tF8L7/DTo+VPcMKPNd1zZJKrrNWJZK9uw1ogV2ProzfV l6QOuz9tMtAfe2rW1okr58GLqGDmHu1crNZSnSfjJ8rA7REN4wOCY8/giFpzew== X-Google-Smtp-Source: AGHT+IFUqZJeWiWa1CtZkEQ7Bik0cx8rb26ro4ztomJUJSaNvkPyuh+ZAb+eZoScVrR2eXkvMKXePw== X-Received: by 2002:a05:6a21:2709:b0:1a3:5c61:5ec2 with SMTP id rm9-20020a056a21270900b001a35c615ec2mr3227003pzb.16.1713441545866; Thu, 18 Apr 2024 04:59:05 -0700 (PDT) Received: from [127.0.1.1] ([120.56.197.253]) by smtp.gmail.com with ESMTPSA id ei16-20020a056a0080d000b006ed06c4074bsm1305512pfb.85.2024.04.18.04.59.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 18 Apr 2024 04:59:05 -0700 (PDT) From: Manivannan Sadhasivam Date: Thu, 18 Apr 2024 17:28:32 +0530 Subject: [PATCH v3 4/9] PCI: endpoint: pci-epf-test: Refactor pci_epf_test_unbind() function Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240418-pci-epf-rework-v3-4-222a5d1ed2e5@linaro.org> References: <20240418-pci-epf-rework-v3-0-222a5d1ed2e5@linaro.org> In-Reply-To: <20240418-pci-epf-rework-v3-0-222a5d1ed2e5@linaro.org> To: Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Rob Herring , Bjorn Helgaas , Kishon Vijay Abraham I , Thierry Reding , Jonathan Hunter , Jingoo Han Cc: linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, mhi@lists.linux.dev, linux-tegra@vger.kernel.org, Niklas Cassel , Manivannan Sadhasivam X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=3105; i=manivannan.sadhasivam@linaro.org; h=from:subject:message-id; bh=ZVpMtASDroG5xgP9YNqj8iEe9ZOXPH9GZK0T5NEQXA0=; b=owEBbQGS/pANAwAKAVWfEeb+kc71AcsmYgBmIQryOLShZtHiBJVHhVR5JPQwr49V+Xp56OD+T vl56bpxcJ6JATMEAAEKAB0WIQRnpUMqgUjL2KRYJ5dVnxHm/pHO9QUCZiEK8gAKCRBVnxHm/pHO 9US0B/47gkQ24P0LmxNcc5MltwwAeuNL2lgqI7bH8WMSnhlr7Vw4ae+BckQ3Z7MFQ+Kre++QZ7u 5meroKS7UvPgDJacyQU3BH8ddRshmENayoejpVw+6vP7cKYYKAtYef/b3empWQjgxxsQ7/+Ra7I iPmVtYC7oK1a5CGAZ8w6iSrMPbU6aqC5YDnt+8CDMJF9YJDM4jcS4wRTv3/YTFTyDlAHYS6EQsi 2DGQFpacfDsQjK2mR9p5nNkoT0mxD6bxU21s5sLV7tje4Sk38pbd0u7JdT5VcZdvI8DpwvlAuHY kLV7CIVNQ4gYe6argJuCkxp1Z+txQCKiSO1x8jems6Szf/zb X-Developer-Key: i=manivannan.sadhasivam@linaro.org; a=openpgp; fpr=C668AEC3C3188E4C611465E7488550E901166008 Move the pci_epc_clear_bar() and pci_epf_free_space() code to respective helper functions. This allows reusing the helpers in future commits. This also requires moving the pci_epf_test_unbind() definition below pci_epf_test_bind() to avoid forward declaration of the above helpers. No functional change. Reviewed-by: Niklas Cassel Signed-off-by: Manivannan Sadhasivam --- drivers/pci/endpoint/functions/pci-epf-test.c | 58 ++++++++++++++++++--------- 1 file changed, 39 insertions(+), 19 deletions(-) diff --git a/drivers/pci/endpoint/functions/pci-epf-test.c b/drivers/pci/endpoint/functions/pci-epf-test.c index 8175d4f2a0eb..2430384f9a89 100644 --- a/drivers/pci/endpoint/functions/pci-epf-test.c +++ b/drivers/pci/endpoint/functions/pci-epf-test.c @@ -686,25 +686,6 @@ static void pci_epf_test_cmd_handler(struct work_struct *work) msecs_to_jiffies(1)); } -static void pci_epf_test_unbind(struct pci_epf *epf) -{ - struct pci_epf_test *epf_test = epf_get_drvdata(epf); - struct pci_epc *epc = epf->epc; - int bar; - - cancel_delayed_work(&epf_test->cmd_handler); - pci_epf_test_clean_dma_chan(epf_test); - for (bar = 0; bar < PCI_STD_NUM_BARS; bar++) { - if (!epf_test->reg[bar]) - continue; - - pci_epc_clear_bar(epc, epf->func_no, epf->vfunc_no, - &epf->bar[bar]); - pci_epf_free_space(epf, epf_test->reg[bar], bar, - PRIMARY_INTERFACE); - } -} - static int pci_epf_test_set_bar(struct pci_epf *epf) { int bar, ret; @@ -731,6 +712,21 @@ static int pci_epf_test_set_bar(struct pci_epf *epf) return 0; } +static void pci_epf_test_clear_bar(struct pci_epf *epf) +{ + struct pci_epf_test *epf_test = epf_get_drvdata(epf); + struct pci_epc *epc = epf->epc; + int bar; + + for (bar = 0; bar < PCI_STD_NUM_BARS; bar++) { + if (!epf_test->reg[bar]) + continue; + + pci_epc_clear_bar(epc, epf->func_no, epf->vfunc_no, + &epf->bar[bar]); + } +} + static int pci_epf_test_epc_init(struct pci_epf *epf) { struct pci_epf_test *epf_test = epf_get_drvdata(epf); @@ -857,6 +853,20 @@ static int pci_epf_test_alloc_space(struct pci_epf *epf) return 0; } +static void pci_epf_test_free_space(struct pci_epf *epf) +{ + struct pci_epf_test *epf_test = epf_get_drvdata(epf); + int bar; + + for (bar = 0; bar < PCI_STD_NUM_BARS; bar++) { + if (!epf_test->reg[bar]) + continue; + + pci_epf_free_space(epf, epf_test->reg[bar], bar, + PRIMARY_INTERFACE); + } +} + static int pci_epf_test_bind(struct pci_epf *epf) { int ret; @@ -894,6 +904,16 @@ static int pci_epf_test_bind(struct pci_epf *epf) return 0; } +static void pci_epf_test_unbind(struct pci_epf *epf) +{ + struct pci_epf_test *epf_test = epf_get_drvdata(epf); + + cancel_delayed_work(&epf_test->cmd_handler); + pci_epf_test_clean_dma_chan(epf_test); + pci_epf_test_clear_bar(epf); + pci_epf_test_free_space(epf); +} + static const struct pci_epf_device_id pci_epf_test_ids[] = { { .name = "pci_epf_test", From patchwork Thu Apr 18 11:58:33 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 13634589 Received: from mail-ot1-f50.google.com (mail-ot1-f50.google.com [209.85.210.50]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 09EF5161314 for ; Thu, 18 Apr 2024 11:59:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.210.50 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713441552; cv=none; b=WUDVVTnS/RWksJAvualfzz3tpj+MGhhauV8ee+S1rFHa4hH5zrgDkUE2y0dq4dYjBsuej2nXxtxS7ilS2w4u3cuZ4PfUMzRZh/vm0G1n70PD9b/RGQqhfJrXGLUfTyC1b+awx/8YXcZndIZCCJ4fdqq4TgMqUc6BflPr4UmFpsw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713441552; c=relaxed/simple; bh=0z6wX7i75zAQbc5rT+hGCcXotYGUGlxy6iIs1Con2yc=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Ih3eCLdySNhTJQlRcMwnQBKbWz1EzcieWWiuTsN/XEDIt7u1EzxOg93XHzkW2M3Z9rAZ71tpHX+KwrNOZAemgZuajlmaO8rEIYU3JijKpKtBJy+LhzHrd4T3B2JSKRhnVNfD/j5jcekBbwdMVI8hqkHy1PNQrE4d9V6Mar1IoVA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=bGAcee6F; arc=none smtp.client-ip=209.85.210.50 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="bGAcee6F" Received: by mail-ot1-f50.google.com with SMTP id 46e09a7af769-6eb6b9e1808so534084a34.3 for ; Thu, 18 Apr 2024 04:59:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1713441550; x=1714046350; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=2N2Z6xy8oQhfjIfDa8B6axpEslsZ8eq+zErFp+7u1hA=; b=bGAcee6F2vzAMddbo+//uDUxrf1Ui/nOdVOLxo+zCS6WtGZ3lbTD/NnXwtfWtr4zsk 1GhRl5bCHV0FEEmgUMCl30J/iX0lbdGBwFeVrMLhJf8BkhsYNRVIlJ/4ti0/vlM4fBEk AlXSHhNUk8mcB3jog0P4FJjwDhs0foIuckx3sEeE5dzznmUOZW61toqONrDDUV6aKFqU zCKmpw/r0WQKfjL05qmaA1WHSJeCbRKTKDKlGTLZNC2AakkHYym8CMgaEPnA3laUk/zH 3sJIDawwW3AYqB9Gwo5i6NX3gkHqp/syH486fzsIjggD2b4GU82f8omteeT6jc/fQ+gg VtfQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1713441550; x=1714046350; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=2N2Z6xy8oQhfjIfDa8B6axpEslsZ8eq+zErFp+7u1hA=; b=VcfIQgGalzu70f16YO7D0ePSUqKVxHQ2YqO1FoRe8nb0sxsM6+AZqNQcWCIfSor4FH LMguNvo49PUnDePaMUQaCcDZG/jaZ7fMljTr/2A1NOFmTMPDctkvSKsEJAN+CrLtVZ8q 2HRz9HC5m9bJ+L83rEKmMzhdGfwNWL/+rY63jBZRvwF09/k06UD1L7OYUnqpqL3RACXZ v+Udat+BSAEHlVLMgMcj8/3CXgLRq+xeU4JWZbT4AERPzkhxYfyq9Xc4BxpxCx+4OiK3 NiEaSpjOVWyTX06U6TQEH6Gz0nen1lsJmkws0IM7RMYLWlEyzdNTEAhpg0qyGm/b4YdW MIHw== X-Forwarded-Encrypted: i=1; AJvYcCVkX5N7uyX2ONDKux8YYvfIbpCqCnbm5Ru31nqphImCV8bCgaRvr8Os1EutAIFgu0fQdl/JHUARPuDNSTPEpK1FgRrIraqHcQE1Vyil2Q== X-Gm-Message-State: AOJu0YxdsSOxbxRclk+7yX1S/ECw/WjqAs23KHztWHx6VspQcxkX9UlO WC7suMW0kuVSeF5g9PY+2clcy4ksj2n5iU/UWMUe40cCGfYolR0T60eqPR868g== X-Google-Smtp-Source: AGHT+IGqqD+K5zG10HIErj/uVTd8nkUVVpXS7lvDEvXl1IFawaGTfNbyTrK9ZXW3ToRDC5Vf7qCWgQ== X-Received: by 2002:a05:6870:9a07:b0:233:5fa0:8b72 with SMTP id fo7-20020a0568709a0700b002335fa08b72mr3134116oab.27.1713441550127; Thu, 18 Apr 2024 04:59:10 -0700 (PDT) Received: from [127.0.1.1] ([120.56.197.253]) by smtp.gmail.com with ESMTPSA id ei16-20020a056a0080d000b006ed06c4074bsm1305512pfb.85.2024.04.18.04.59.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 18 Apr 2024 04:59:09 -0700 (PDT) From: Manivannan Sadhasivam Date: Thu, 18 Apr 2024 17:28:33 +0530 Subject: [PATCH v3 5/9] PCI: endpoint: pci-epf-{mhi/test}: Move DMA initialization to EPC init callback Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240418-pci-epf-rework-v3-5-222a5d1ed2e5@linaro.org> References: <20240418-pci-epf-rework-v3-0-222a5d1ed2e5@linaro.org> In-Reply-To: <20240418-pci-epf-rework-v3-0-222a5d1ed2e5@linaro.org> To: Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Rob Herring , Bjorn Helgaas , Kishon Vijay Abraham I , Thierry Reding , Jonathan Hunter , Jingoo Han Cc: linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, mhi@lists.linux.dev, linux-tegra@vger.kernel.org, Niklas Cassel , Manivannan Sadhasivam X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=2516; i=manivannan.sadhasivam@linaro.org; h=from:subject:message-id; bh=0z6wX7i75zAQbc5rT+hGCcXotYGUGlxy6iIs1Con2yc=; b=owEBbQGS/pANAwAKAVWfEeb+kc71AcsmYgBmIQrzCIMss9Xjkc+w+Ay5cf4DIf0b4nbOW0HHv I2+r5lXzJeJATMEAAEKAB0WIQRnpUMqgUjL2KRYJ5dVnxHm/pHO9QUCZiEK8wAKCRBVnxHm/pHO 9fSDB/97uQNmmFoSDfLvIRtqPL8WQZukYg0HqiFlU/A2DvHpF0l0a4/dOpB02EhlwCbzlgRsApX fnI5M09vT+w8De2g+dGSs7akU9bU6xtBY6d2JlPhD+6nIt4ONnfuKABaUHTt4vGTGb0X+sV7F1M SCbAz+4UgR3hMi3A4h/aoWe0yU0Bxu2pwlXpBVzb5I8WoVChpKfRBkGmqdcWij+zg6EuX8UyeJQ 9i62Vjln9QTwFdV3peHBz66cj8gsmwVi/Wb3gSK/JDtHJtVnzvNS6laQyolSf4QIeULgqSp/QXm p3O41K0ndqaHwllHSz95vDE5zF1i2j1ukljaN7P2z82XwB6v X-Developer-Key: i=manivannan.sadhasivam@linaro.org; a=openpgp; fpr=C668AEC3C3188E4C611465E7488550E901166008 To maintain uniformity across EPF drivers, let's move the DMA initialization to EPC init callback. This will also allow us to deinit DMA during PERST# assert in the further commits. For EPC drivers without PERST#, DMA deinit will only happen during driver unbind. Reviewed-by: Niklas Cassel Signed-off-by: Manivannan Sadhasivam --- drivers/pci/endpoint/functions/pci-epf-mhi.c | 16 ++++++++-------- drivers/pci/endpoint/functions/pci-epf-test.c | 12 ++++++------ 2 files changed, 14 insertions(+), 14 deletions(-) diff --git a/drivers/pci/endpoint/functions/pci-epf-mhi.c b/drivers/pci/endpoint/functions/pci-epf-mhi.c index b662905e2532..205c02953f25 100644 --- a/drivers/pci/endpoint/functions/pci-epf-mhi.c +++ b/drivers/pci/endpoint/functions/pci-epf-mhi.c @@ -753,6 +753,14 @@ static int pci_epf_mhi_epc_init(struct pci_epf *epf) if (!epf_mhi->epc_features) return -ENODATA; + if (info->flags & MHI_EPF_USE_DMA) { + ret = pci_epf_mhi_dma_init(epf_mhi); + if (ret) { + dev_err(dev, "Failed to initialize DMA: %d\n", ret); + return ret; + } + } + return 0; } @@ -765,14 +773,6 @@ static int pci_epf_mhi_link_up(struct pci_epf *epf) struct device *dev = &epf->dev; int ret; - if (info->flags & MHI_EPF_USE_DMA) { - ret = pci_epf_mhi_dma_init(epf_mhi); - if (ret) { - dev_err(dev, "Failed to initialize DMA: %d\n", ret); - return ret; - } - } - mhi_cntrl->mmio = epf_mhi->mmio; mhi_cntrl->irq = epf_mhi->irq; mhi_cntrl->mru = info->mru; diff --git a/drivers/pci/endpoint/functions/pci-epf-test.c b/drivers/pci/endpoint/functions/pci-epf-test.c index 2430384f9a89..ab714108dfdb 100644 --- a/drivers/pci/endpoint/functions/pci-epf-test.c +++ b/drivers/pci/endpoint/functions/pci-epf-test.c @@ -739,6 +739,12 @@ static int pci_epf_test_epc_init(struct pci_epf *epf) bool msi_capable = true; int ret; + epf_test->dma_supported = true; + + ret = pci_epf_test_init_dma_chan(epf_test); + if (ret) + epf_test->dma_supported = false; + epc_features = pci_epc_get_features(epc, epf->func_no, epf->vfunc_no); if (epc_features) { msix_capable = epc_features->msix_capable; @@ -895,12 +901,6 @@ static int pci_epf_test_bind(struct pci_epf *epf) if (ret) return ret; - epf_test->dma_supported = true; - - ret = pci_epf_test_init_dma_chan(epf_test); - if (ret) - epf_test->dma_supported = false; - return 0; } From patchwork Thu Apr 18 11:58:34 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 13634590 Received: from mail-pg1-f178.google.com (mail-pg1-f178.google.com [209.85.215.178]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 332B816190A for ; Thu, 18 Apr 2024 11:59:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.215.178 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713441556; cv=none; b=I1BnZrV3kE1Wi+emOTw7zsrQpJXH3qAwR9R6oWCFWoDcIvp8OAGm8QRIDVpzeo2ROUCN8gxBZZ2ndi7SoOKanwxpdzjuDel+9HF2beAjSSw9gBJEoa2m8Ug/TgSd/gilXy7OsljaEQPoLYbuEonuTeeGBBrdgBm0wcr8U7E9ukI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713441556; c=relaxed/simple; bh=3XOdrzhpqbFIrl3fnv6xFM9Mmt9aEoCz8aAhMOMHLBU=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=JcITE0P/321lkIlstkOMoF6FJJxSJl03qT/PTeh8qYk2p+dw+Rh2WoIhAPo3bY6mRKZ5qCaHjdTIvkuiHMbHT+lmzuDfbDFG4N0r1EgLd3oOXOxFZEiSg3ru6/b2VHFTcpGOYf2Q5y5aGt27KUKb7n5E9IThVarzNh1LFVje1Cg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=SLJmQQ9k; arc=none smtp.client-ip=209.85.215.178 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="SLJmQQ9k" Received: by mail-pg1-f178.google.com with SMTP id 41be03b00d2f7-5d8b887bb0cso549001a12.2 for ; Thu, 18 Apr 2024 04:59:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1713441554; x=1714046354; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=LUj747/lLV8YIqOMfvvj868IbKe2/5Xi8ukezoQn7Iw=; b=SLJmQQ9kaDWcmlQHoaizVnf2xlszIh7CKdXLayzC8GeB+SFjxQ99RA04dHeVknb3k6 eLqRJcnE6EPYu9/1MB1nS4woi4cV/tj4RWJX6Io7fsBxyAEfGekqak+IZYwKC2Wp3E1v NvbzQK5e0GaUm2AGavMbuTmcixRdF2bNNQW2OJngVQx1OX4Av2bkpTRc9MZNQBAdGO6n KE9QzLmaEp6FxaM6m3wg0igjHEBFpZWtLYzlGCNxbG8OHgLN/yPoOnJuOlU3yOB586RL Xl04mOyYrOxq0RL0ffI2IYZ3Xud5Jxt/wJraSmvGU+te87VotXSiePFVLJniH0sYPz5s aYRg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1713441554; x=1714046354; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=LUj747/lLV8YIqOMfvvj868IbKe2/5Xi8ukezoQn7Iw=; b=YTZtEJ0Mjeu9C07ZW+5zfZv7CsUSzy5I+MVtQGgnbrPt1VNEUjZ6+17m6/Q4CcADIn MNbAGRipnI20wN8kfXOAGKzdD20CJsp4An2xOTzvETjO3ikalZgykK/Cur80/BymtxiJ 231T7qQ8LBL8sqhQsftC9MsH5P+2GEwrmm6MSjP6BvXAfZTqwd1mE3jUmquOUUXTf+Rk FptUplAeLoxzgIk0VwLoN2M/5nbALMhLPwyhKAw2W0WMXTZH0cHzoHtzH0jEuJiS6+c0 JCEJYwPv7pUZVzJx9KGVmBDJNdbuqqMPlGMvinzuGKHY2K+2+1NPm0GA6eOLx0TZOmj6 O88A== X-Forwarded-Encrypted: i=1; AJvYcCWh9kuBrYZUSS1eT7g4hzfiOYCxwziLsrtqGD7rj1u/clfS1ZMWSkDaN+VFNVwuhzf3v+TVLbNeNS8a8CyZNW8dVKapqvPpyRurO4ymWA== X-Gm-Message-State: AOJu0YyWCiXGcCDxRck/Il9/j48/fqpTTvBJ7GKwKr09/vlZKvQDD0g9 1l2FjIIOIREkTqAbCSk/839i+mYFOH/EISiN31ZyWy7ifC3qxMTxiB0cYSCa4A== X-Google-Smtp-Source: AGHT+IGgvQvQ5O23HG1oNEL7Sbh7Gv0/uwPJhe1jVq2YB8VbbYLYIQmmC9S7BIpBDItUrIKvVWy6zQ== X-Received: by 2002:a05:6a21:168c:b0:1a7:55f2:c92c with SMTP id np12-20020a056a21168c00b001a755f2c92cmr3431029pzb.45.1713441554378; Thu, 18 Apr 2024 04:59:14 -0700 (PDT) Received: from [127.0.1.1] ([120.56.197.253]) by smtp.gmail.com with ESMTPSA id ei16-20020a056a0080d000b006ed06c4074bsm1305512pfb.85.2024.04.18.04.59.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 18 Apr 2024 04:59:13 -0700 (PDT) From: Manivannan Sadhasivam Date: Thu, 18 Apr 2024 17:28:34 +0530 Subject: [PATCH v3 6/9] PCI: endpoint: Introduce 'epc_deinit' event and notify the EPF drivers Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240418-pci-epf-rework-v3-6-222a5d1ed2e5@linaro.org> References: <20240418-pci-epf-rework-v3-0-222a5d1ed2e5@linaro.org> In-Reply-To: <20240418-pci-epf-rework-v3-0-222a5d1ed2e5@linaro.org> To: Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Rob Herring , Bjorn Helgaas , Kishon Vijay Abraham I , Thierry Reding , Jonathan Hunter , Jingoo Han Cc: linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, mhi@lists.linux.dev, linux-tegra@vger.kernel.org, Niklas Cassel , Manivannan Sadhasivam X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=8783; i=manivannan.sadhasivam@linaro.org; h=from:subject:message-id; bh=3XOdrzhpqbFIrl3fnv6xFM9Mmt9aEoCz8aAhMOMHLBU=; b=owEBbQGS/pANAwAKAVWfEeb+kc71AcsmYgBmIQrzu4CeZ1RDHfHg2in1J8ho8R9UHICcsWAjE ZD+HPq6gu+JATMEAAEKAB0WIQRnpUMqgUjL2KRYJ5dVnxHm/pHO9QUCZiEK8wAKCRBVnxHm/pHO 9TM5B/4hs5was5D96gfqeRHIYFLtN1VUCWzwQ81lffy/mKgILM5pvEtmWNuLxeHaLmUYWr2JYHK nLXGBAZZmuCwfKTtdhzpqd+93LjX0Sc3YCsC4RcyQ0fdFWDm+dcuadPSx+2hSPnUpnfTIycrplV O3xsouHjedbCtjMkGmuDPEUzsMc8todMijna33qVw22lePc8FCISP/clwlL9KJFyug4x9R24EL1 nbQa7B+FdNM97N7Xoga8ka6dX9wcwPER5J7hu4wn0Og2bBAsZ4UkjB53wc/kjsGLGL1NCk4K0um jPhCNbX1wFZr74OsfujFTZRrygKAGnHld2ZuDJmXuSbCdT6x X-Developer-Key: i=manivannan.sadhasivam@linaro.org; a=openpgp; fpr=C668AEC3C3188E4C611465E7488550E901166008 As like the 'epc_init' event, that is used to signal the EPF drivers about the EPC initialization, let's introduce 'epc_deinit' event that is used to signal EPC deinitialization. The EPC deinitialization applies only when any sort of fundamental reset is supported by the endpoint controller as per the PCIe spec. Reference: PCIe Base spec v5.0, sections 4.2.4.9.1 and 6.6.1. Currently, some EPC drivers like pcie-qcom-ep and pcie-tegra194 support PERST# as the fundamental reset. So the 'deinit' event will be notified to the EPF drivers when PERST# assert happens in the above mentioned EPC drivers. The EPF drivers, on receiving the event through the epc_deinit() callback should reset the EPF state machine and also cleanup any configuration that got affected by the fundamental reset like BAR, DMA etc... This change also warrants skipping the cleanups in unbind() if already done in epc_deinit(). Reviewed-by: Niklas Cassel Signed-off-by: Manivannan Sadhasivam --- drivers/pci/controller/dwc/pcie-designware-ep.c | 1 - drivers/pci/controller/dwc/pcie-qcom-ep.c | 1 + drivers/pci/controller/dwc/pcie-tegra194.c | 1 + drivers/pci/endpoint/functions/pci-epf-mhi.c | 19 +++++++++++++++++++ drivers/pci/endpoint/functions/pci-epf-test.c | 17 +++++++++++++++-- drivers/pci/endpoint/pci-epc-core.c | 25 +++++++++++++++++++++++++ include/linux/pci-epc.h | 1 + include/linux/pci-epf.h | 2 ++ 8 files changed, 64 insertions(+), 3 deletions(-) diff --git a/drivers/pci/controller/dwc/pcie-designware-ep.c b/drivers/pci/controller/dwc/pcie-designware-ep.c index 47391d7d3a73..2063cf2049e5 100644 --- a/drivers/pci/controller/dwc/pcie-designware-ep.c +++ b/drivers/pci/controller/dwc/pcie-designware-ep.c @@ -632,7 +632,6 @@ void dw_pcie_ep_cleanup(struct dw_pcie_ep *ep) struct dw_pcie *pci = to_dw_pcie_from_ep(ep); dw_pcie_edma_remove(pci); - ep->epc->init_complete = false; } EXPORT_SYMBOL_GPL(dw_pcie_ep_cleanup); diff --git a/drivers/pci/controller/dwc/pcie-qcom-ep.c b/drivers/pci/controller/dwc/pcie-qcom-ep.c index f6e925d434f6..458145d1f796 100644 --- a/drivers/pci/controller/dwc/pcie-qcom-ep.c +++ b/drivers/pci/controller/dwc/pcie-qcom-ep.c @@ -501,6 +501,7 @@ static void qcom_pcie_perst_assert(struct dw_pcie *pci) { struct qcom_pcie_ep *pcie_ep = to_pcie_ep(pci); + pci_epc_deinit_notify(pci->ep.epc); dw_pcie_ep_cleanup(&pci->ep); qcom_pcie_disable_resources(pcie_ep); pcie_ep->link_status = QCOM_PCIE_EP_LINK_DISABLED; diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c index 93f5433c5c55..4b28f8beedfe 100644 --- a/drivers/pci/controller/dwc/pcie-tegra194.c +++ b/drivers/pci/controller/dwc/pcie-tegra194.c @@ -1715,6 +1715,7 @@ static void pex_ep_event_pex_rst_assert(struct tegra_pcie_dw *pcie) if (ret) dev_err(pcie->dev, "Failed to go Detect state: %d\n", ret); + pci_epc_deinit_notify(pcie->pci.ep.epc); dw_pcie_ep_cleanup(&pcie->pci.ep); reset_control_assert(pcie->core_rst); diff --git a/drivers/pci/endpoint/functions/pci-epf-mhi.c b/drivers/pci/endpoint/functions/pci-epf-mhi.c index 205c02953f25..5832989e55e8 100644 --- a/drivers/pci/endpoint/functions/pci-epf-mhi.c +++ b/drivers/pci/endpoint/functions/pci-epf-mhi.c @@ -764,6 +764,24 @@ static int pci_epf_mhi_epc_init(struct pci_epf *epf) return 0; } +static void pci_epf_mhi_epc_deinit(struct pci_epf *epf) +{ + struct pci_epf_mhi *epf_mhi = epf_get_drvdata(epf); + const struct pci_epf_mhi_ep_info *info = epf_mhi->info; + struct pci_epf_bar *epf_bar = &epf->bar[info->bar_num]; + struct mhi_ep_cntrl *mhi_cntrl = &epf_mhi->mhi_cntrl; + struct pci_epc *epc = epf->epc; + + if (mhi_cntrl->mhi_dev) { + mhi_ep_power_down(mhi_cntrl); + if (info->flags & MHI_EPF_USE_DMA) + pci_epf_mhi_dma_deinit(epf_mhi); + mhi_ep_unregister_controller(mhi_cntrl); + } + + pci_epc_clear_bar(epc, epf->func_no, epf->vfunc_no, epf_bar); +} + static int pci_epf_mhi_link_up(struct pci_epf *epf) { struct pci_epf_mhi *epf_mhi = epf_get_drvdata(epf); @@ -898,6 +916,7 @@ static void pci_epf_mhi_unbind(struct pci_epf *epf) static const struct pci_epc_event_ops pci_epf_mhi_event_ops = { .epc_init = pci_epf_mhi_epc_init, + .epc_deinit = pci_epf_mhi_epc_deinit, .link_up = pci_epf_mhi_link_up, .link_down = pci_epf_mhi_link_down, .bus_master_enable = pci_epf_mhi_bus_master_enable, diff --git a/drivers/pci/endpoint/functions/pci-epf-test.c b/drivers/pci/endpoint/functions/pci-epf-test.c index ab714108dfdb..c8d0c51ae329 100644 --- a/drivers/pci/endpoint/functions/pci-epf-test.c +++ b/drivers/pci/endpoint/functions/pci-epf-test.c @@ -790,6 +790,15 @@ static int pci_epf_test_epc_init(struct pci_epf *epf) return 0; } +static void pci_epf_test_epc_deinit(struct pci_epf *epf) +{ + struct pci_epf_test *epf_test = epf_get_drvdata(epf); + + cancel_delayed_work(&epf_test->cmd_handler); + pci_epf_test_clean_dma_chan(epf_test); + pci_epf_test_clear_bar(epf); +} + static int pci_epf_test_link_up(struct pci_epf *epf) { struct pci_epf_test *epf_test = epf_get_drvdata(epf); @@ -802,6 +811,7 @@ static int pci_epf_test_link_up(struct pci_epf *epf) static const struct pci_epc_event_ops pci_epf_test_event_ops = { .epc_init = pci_epf_test_epc_init, + .epc_deinit = pci_epf_test_epc_deinit, .link_up = pci_epf_test_link_up, }; @@ -907,10 +917,13 @@ static int pci_epf_test_bind(struct pci_epf *epf) static void pci_epf_test_unbind(struct pci_epf *epf) { struct pci_epf_test *epf_test = epf_get_drvdata(epf); + struct pci_epc *epc = epf->epc; cancel_delayed_work(&epf_test->cmd_handler); - pci_epf_test_clean_dma_chan(epf_test); - pci_epf_test_clear_bar(epf); + if (epc->init_complete) { + pci_epf_test_clean_dma_chan(epf_test); + pci_epf_test_clear_bar(epf); + } pci_epf_test_free_space(epf); } diff --git a/drivers/pci/endpoint/pci-epc-core.c b/drivers/pci/endpoint/pci-epc-core.c index 917dc56dfbbe..e4bad4ef8e22 100644 --- a/drivers/pci/endpoint/pci-epc-core.c +++ b/drivers/pci/endpoint/pci-epc-core.c @@ -774,6 +774,31 @@ void pci_epc_notify_pending_init(struct pci_epc *epc, struct pci_epf *epf) } EXPORT_SYMBOL_GPL(pci_epc_notify_pending_init); +/** + * pci_epc_deinit_notify() - Notify the EPF device about EPC deinitialization + * @epc: the EPC device whose deinitialization is completed + * + * Invoke to notify the EPF device that the EPC deinitialization is completed. + */ +void pci_epc_deinit_notify(struct pci_epc *epc) +{ + struct pci_epf *epf; + + if (IS_ERR_OR_NULL(epc)) + return; + + mutex_lock(&epc->list_lock); + list_for_each_entry(epf, &epc->pci_epf, list) { + mutex_lock(&epf->lock); + if (epf->event_ops && epf->event_ops->epc_deinit) + epf->event_ops->epc_deinit(epf); + mutex_unlock(&epf->lock); + } + epc->init_complete = false; + mutex_unlock(&epc->list_lock); +} +EXPORT_SYMBOL_GPL(pci_epc_deinit_notify); + /** * pci_epc_bus_master_enable_notify() - Notify the EPF device that the EPC * device has received the Bus Master diff --git a/include/linux/pci-epc.h b/include/linux/pci-epc.h index 11115cd0fe5b..c39eed3ee73e 100644 --- a/include/linux/pci-epc.h +++ b/include/linux/pci-epc.h @@ -226,6 +226,7 @@ void pci_epc_linkup(struct pci_epc *epc); void pci_epc_linkdown(struct pci_epc *epc); void pci_epc_init_notify(struct pci_epc *epc); void pci_epc_notify_pending_init(struct pci_epc *epc, struct pci_epf *epf); +void pci_epc_deinit_notify(struct pci_epc *epc); void pci_epc_bus_master_enable_notify(struct pci_epc *epc); void pci_epc_remove_epf(struct pci_epc *epc, struct pci_epf *epf, enum pci_epc_interface_type type); diff --git a/include/linux/pci-epf.h b/include/linux/pci-epf.h index dc759eb7157c..0639d4dc8986 100644 --- a/include/linux/pci-epf.h +++ b/include/linux/pci-epf.h @@ -71,12 +71,14 @@ struct pci_epf_ops { /** * struct pci_epc_event_ops - Callbacks for capturing the EPC events * @epc_init: Callback for the EPC initialization complete event + * @epc_deinit: Callback for the EPC deinitialization event * @link_up: Callback for the EPC link up event * @link_down: Callback for the EPC link down event * @bus_master_enable: Callback for the EPC Bus Master Enable event */ struct pci_epc_event_ops { int (*epc_init)(struct pci_epf *epf); + void (*epc_deinit)(struct pci_epf *epf); int (*link_up)(struct pci_epf *epf); int (*link_down)(struct pci_epf *epf); int (*bus_master_enable)(struct pci_epf *epf); From patchwork Thu Apr 18 11:58:35 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 13634591 Received: from mail-pf1-f170.google.com (mail-pf1-f170.google.com [209.85.210.170]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6B7EF15FA83 for ; Thu, 18 Apr 2024 11:59:19 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.210.170 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713441561; cv=none; b=K//3cqS3KhsrJyAR41bQqsVHZJjWmX2unlWnnRmM9gEEIc+xC+JhqPRkz3gAoteRHLduc1bWZ0Rv1Zqc2BHgwKV1Tc1GkCiAlJDy/eZyE422C+oya6dg3NVCq9o5w7KW89ZtGTPBenpceJdNv0+DKMQhuavNdbElicnvjHxobM0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713441561; c=relaxed/simple; bh=HPfONLtsy/MnvLDF1/hjLcYap8xzDzzAp+j/LvPJsHU=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=ANfXLBVfAtffw264jSLBLLQoULV/h0FPNXasXwIQaTn0B+l7GKMiSm8TplGKWZUx5Ix/NdY8yAv6KwSOb85NUymxXBxFmdoP1mqRCtLSB54CxAdHEa3sKgHhc30FWVyAdep5ettSGODLCuwEdW/kqH/oNrRNMItor8gzQbKOLD4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=NUmZX7q0; arc=none smtp.client-ip=209.85.210.170 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="NUmZX7q0" Received: by mail-pf1-f170.google.com with SMTP id d2e1a72fcca58-6eff2be3b33so818928b3a.2 for ; Thu, 18 Apr 2024 04:59:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1713441559; x=1714046359; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=cPzNHD9JI2uetjXO2Kh7vp5CIb8zYoijo0y8bQC99Ow=; b=NUmZX7q0Cieh1k/A/LR4g4nbfmfe1il1FwRMizzuIAo2vwn2klG5nYvMAOByU+bFsx 8vPkY4XlmyWl6aT91WMUI6e9gZgv6TVcyjkD0etEnIKL/qffV4ZIiIVeMIad48pa4SMU I8trJ3m1WSbvXKV5hJPGDv/eTWJam4gof6CyJ0oVJW8Op6yIs1yHxb+5pJa5q0hfwITP 7pFqERMbd1d5XwlyOXZGX3KZLBO916Y2yYOSwzsSB14xAA5WfvBfdm4qfmzPdIqDVuA3 HOJfiB2BnV6EEK5mkmsz9M1hr6D8MsX74sj923sRhI5TpmjiQIsNLmEUC/ylKVP3cHpe 8g1g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1713441559; x=1714046359; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=cPzNHD9JI2uetjXO2Kh7vp5CIb8zYoijo0y8bQC99Ow=; b=atCZPnnnivzGbyF7F6QmzmAbN13DwGkG92hxWcCYjP/65hhfWMk0DtXcOxWimVmy/9 YdiB7Ti334iHQ9AMO6T9Bchkabs4lhP89Yl+McTr8Vp6okhcGoWRNdKnAn6eDlIrBfUL aIGUWEA+IAaPipkmenpGTaeNgvfoLuR/FZ/hRNfxI3pA/57ChB5tH0sx4ysI58n0xava JQqw46zedIYzg3ux29nS1bt2btEKFhx9PLwBpbgAcmzi7ED5BlZqYyw2CVUtYzVEmao9 fYsFpQo8vNTTUJjnhaL/lQvhrkuIIKQRpCvEoxBGsHnyLx27445qsenNBWvnQFSuA4RW U4kg== X-Forwarded-Encrypted: i=1; AJvYcCUrWsoH4sngv7vmODTWGLYL+wk3IRP7lZOM9ywHvitzF+tvAfq48wfwI077SBDaDSczqHJThfPbs+OB6q5H7pc5sacPbvjZLIpo0HCXeQ== X-Gm-Message-State: AOJu0YzMVKkzo4/VGgl++HCfxur3C8EFgrxi6J1xvfll7PP9boj/NMuC mXm0xpNUHFJouBdLCdebIEBwYvUVHwrKZZnIM7EkHskLXm4vj6a/tfWTxkB1ug== X-Google-Smtp-Source: AGHT+IEXip66h8Nk0h1IbVHoaXh8m1Zz/EdBdxj9XMqe7Xf1WJOO+AEsLUuA3n4l406sXGpUWZVsgg== X-Received: by 2002:a05:6a00:1786:b0:6e6:ac71:8b38 with SMTP id s6-20020a056a00178600b006e6ac718b38mr3018707pfg.22.1713441558645; Thu, 18 Apr 2024 04:59:18 -0700 (PDT) Received: from [127.0.1.1] ([120.56.197.253]) by smtp.gmail.com with ESMTPSA id ei16-20020a056a0080d000b006ed06c4074bsm1305512pfb.85.2024.04.18.04.59.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 18 Apr 2024 04:59:18 -0700 (PDT) From: Manivannan Sadhasivam Date: Thu, 18 Apr 2024 17:28:35 +0530 Subject: [PATCH v3 7/9] PCI: dwc: ep: Add a generic dw_pcie_ep_linkdown() API to handle Link Down event Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240418-pci-epf-rework-v3-7-222a5d1ed2e5@linaro.org> References: <20240418-pci-epf-rework-v3-0-222a5d1ed2e5@linaro.org> In-Reply-To: <20240418-pci-epf-rework-v3-0-222a5d1ed2e5@linaro.org> To: Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Rob Herring , Bjorn Helgaas , Kishon Vijay Abraham I , Thierry Reding , Jonathan Hunter , Jingoo Han Cc: linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, mhi@lists.linux.dev, linux-tegra@vger.kernel.org, Niklas Cassel , Manivannan Sadhasivam X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=6881; i=manivannan.sadhasivam@linaro.org; h=from:subject:message-id; bh=HPfONLtsy/MnvLDF1/hjLcYap8xzDzzAp+j/LvPJsHU=; b=owEBbQGS/pANAwAKAVWfEeb+kc71AcsmYgBmIQrz5eCB8TEv5nHkrrSLkJMMIyRInJrsD4fnm c+dPW7Yi0CJATMEAAEKAB0WIQRnpUMqgUjL2KRYJ5dVnxHm/pHO9QUCZiEK8wAKCRBVnxHm/pHO 9aAEB/4mypailLWgiffEbKroVv4//BFpSp/TMOhopRHH1IcjnySnW0/g2xgJw9+1TgvSDN9Gayx ZoFJoYhRLovMRVJlFleQCqBk3okGsOa9nILQVhi9PUI3zw2uCj2AqqNitFaH47ti1CZo/e1J9c4 xN4ouPOyp1Xgbofs4eexzu2GOxM453Jgwxv7bFb3VdwmUyCDktz2vBPkogZB/bP05qiTOy0Ixfp LrxrghEz7C4+HkS4ZHChg4MpSVXT0ZBU97QtSFxTvnstbTixvb31ronuCD8aIVptMKwPtHTcAwc Nm38hqX000txrJDME9u07TbFVRYO5vFxDppZAwVJbtMhgOhJ X-Developer-Key: i=manivannan.sadhasivam@linaro.org; a=openpgp; fpr=C668AEC3C3188E4C611465E7488550E901166008 As per the PCIe base spec r5.0, section 5.2, Link Down event can happen under any of the following circumstances: 1. Fundamental/Hot reset 2. Link disable transmission by upstream component 3. Moving from L2/L3 to L0 In those cases, Link Down causes some non-sticky DWC registers to loose the state (like REBAR, etc...). So the drivers need to reinitialize them to function properly once the link comes back again. This is not a problem for drivers supporting PERST# IRQ, since they can reinitialize the registers in the PERST# IRQ callback. But for the drivers not supporting PERST#, there is no way they can reinitialize the registers other than relying on Link Down IRQ received when the link goes down. So let's add a DWC generic API dw_pcie_ep_linkdown() that reinitializes the non-sticky registers and also notifies the EPF drivers about link going down. This API can also be used by the drivers supporting PERST# to handle the scenario (2) mentioned above. NOTE: For the sake of code organization, move the dw_pcie_ep_linkup() definition just above dw_pcie_ep_linkdown(). Reviewed-by: Niklas Cassel Signed-off-by: Manivannan Sadhasivam --- drivers/pci/controller/dwc/pcie-designware-ep.c | 103 ++++++++++++++++-------- drivers/pci/controller/dwc/pcie-designware.h | 5 ++ 2 files changed, 73 insertions(+), 35 deletions(-) diff --git a/drivers/pci/controller/dwc/pcie-designware-ep.c b/drivers/pci/controller/dwc/pcie-designware-ep.c index 2063cf2049e5..b878b62460f3 100644 --- a/drivers/pci/controller/dwc/pcie-designware-ep.c +++ b/drivers/pci/controller/dwc/pcie-designware-ep.c @@ -15,18 +15,6 @@ #include #include -/** - * dw_pcie_ep_linkup - Notify EPF drivers about Link Up event - * @ep: DWC EP device - */ -void dw_pcie_ep_linkup(struct dw_pcie_ep *ep) -{ - struct pci_epc *epc = ep->epc; - - pci_epc_linkup(epc); -} -EXPORT_SYMBOL_GPL(dw_pcie_ep_linkup); - /** * dw_pcie_ep_init_notify - Notify EPF drivers about EPC initialization complete * @ep: DWC EP device @@ -673,6 +661,34 @@ static unsigned int dw_pcie_ep_find_ext_capability(struct dw_pcie *pci, int cap) return 0; } +static void dw_pcie_ep_init_non_sticky_registers(struct dw_pcie *pci) +{ + unsigned int offset; + unsigned int nbars; + u32 reg, i; + + offset = dw_pcie_ep_find_ext_capability(pci, PCI_EXT_CAP_ID_REBAR); + + dw_pcie_dbi_ro_wr_en(pci); + + if (offset) { + reg = dw_pcie_readl_dbi(pci, offset + PCI_REBAR_CTRL); + nbars = (reg & PCI_REBAR_CTRL_NBAR_MASK) >> + PCI_REBAR_CTRL_NBAR_SHIFT; + + /* + * PCIe r6.0, sec 7.8.6.2 require us to support at least one + * size in the range from 1 MB to 512 GB. Advertise support + * for 1 MB BAR size only. + */ + for (i = 0; i < nbars; i++, offset += PCI_REBAR_CTRL) + dw_pcie_writel_dbi(pci, offset + PCI_REBAR_CAP, 0x0); + } + + dw_pcie_setup(pci); + dw_pcie_dbi_ro_wr_dis(pci); +} + /** * dw_pcie_ep_init_registers - Initialize DWC EP specific registers * @ep: DWC EP device @@ -687,13 +703,11 @@ int dw_pcie_ep_init_registers(struct dw_pcie_ep *ep) struct dw_pcie_ep_func *ep_func; struct device *dev = pci->dev; struct pci_epc *epc = ep->epc; - unsigned int offset, ptm_cap_base; - unsigned int nbars; + u32 ptm_cap_base, reg; u8 hdr_type; u8 func_no; - int i, ret; void *addr; - u32 reg; + int ret; hdr_type = dw_pcie_readb_dbi(pci, PCI_HEADER_TYPE) & PCI_HEADER_TYPE_MASK; @@ -756,25 +770,8 @@ int dw_pcie_ep_init_registers(struct dw_pcie_ep *ep) if (ep->ops->init) ep->ops->init(ep); - offset = dw_pcie_ep_find_ext_capability(pci, PCI_EXT_CAP_ID_REBAR); ptm_cap_base = dw_pcie_ep_find_ext_capability(pci, PCI_EXT_CAP_ID_PTM); - dw_pcie_dbi_ro_wr_en(pci); - - if (offset) { - reg = dw_pcie_readl_dbi(pci, offset + PCI_REBAR_CTRL); - nbars = (reg & PCI_REBAR_CTRL_NBAR_MASK) >> - PCI_REBAR_CTRL_NBAR_SHIFT; - - /* - * PCIe r6.0, sec 7.8.6.2 require us to support at least one - * size in the range from 1 MB to 512 GB. Advertise support - * for 1 MB BAR size only. - */ - for (i = 0; i < nbars; i++, offset += PCI_REBAR_CTRL) - dw_pcie_writel_dbi(pci, offset + PCI_REBAR_CAP, BIT(4)); - } - /* * PTM responder capability can be disabled only after disabling * PTM root capability. @@ -791,8 +788,7 @@ int dw_pcie_ep_init_registers(struct dw_pcie_ep *ep) dw_pcie_dbi_ro_wr_dis(pci); } - dw_pcie_setup(pci); - dw_pcie_dbi_ro_wr_dis(pci); + dw_pcie_ep_init_non_sticky_registers(pci); return 0; @@ -803,6 +799,43 @@ int dw_pcie_ep_init_registers(struct dw_pcie_ep *ep) } EXPORT_SYMBOL_GPL(dw_pcie_ep_init_registers); +/** + * dw_pcie_ep_linkup - Notify EPF drivers about Link Up event + * @ep: DWC EP device + */ +void dw_pcie_ep_linkup(struct dw_pcie_ep *ep) +{ + struct pci_epc *epc = ep->epc; + + pci_epc_linkup(epc); +} +EXPORT_SYMBOL_GPL(dw_pcie_ep_linkup); + +/** + * dw_pcie_ep_linkdown - Notify EPF drivers about Link Down event + * @ep: DWC EP device + * + * Non-sticky registers are also initialized before sending the notification to + * the EPF drivers. This is needed since the registers need to be initialized + * before the link comes back again. + */ +void dw_pcie_ep_linkdown(struct dw_pcie_ep *ep) +{ + struct dw_pcie *pci = to_dw_pcie_from_ep(ep); + struct pci_epc *epc = ep->epc; + + /* + * Initialize the non-sticky DWC registers as they would've reset post + * Link Down. This is specifically needed for drivers not supporting + * PERST# as they have no way to reinitialize the registers before the + * link comes back again. + */ + dw_pcie_ep_init_non_sticky_registers(pci); + + pci_epc_linkdown(epc); +} +EXPORT_SYMBOL_GPL(dw_pcie_ep_linkdown); + /** * dw_pcie_ep_init - Initialize the endpoint device * @ep: DWC EP device diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h index f8e5431a207b..152969545b0a 100644 --- a/drivers/pci/controller/dwc/pcie-designware.h +++ b/drivers/pci/controller/dwc/pcie-designware.h @@ -668,6 +668,7 @@ static inline void __iomem *dw_pcie_own_conf_map_bus(struct pci_bus *bus, #ifdef CONFIG_PCIE_DW_EP void dw_pcie_ep_linkup(struct dw_pcie_ep *ep); +void dw_pcie_ep_linkdown(struct dw_pcie_ep *ep); int dw_pcie_ep_init(struct dw_pcie_ep *ep); int dw_pcie_ep_init_registers(struct dw_pcie_ep *ep); void dw_pcie_ep_init_notify(struct dw_pcie_ep *ep); @@ -688,6 +689,10 @@ static inline void dw_pcie_ep_linkup(struct dw_pcie_ep *ep) { } +static inline void dw_pcie_ep_linkdown(struct dw_pcie_ep *ep) +{ +} + static inline int dw_pcie_ep_init(struct dw_pcie_ep *ep) { return 0; From patchwork Thu Apr 18 11:58:36 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 13634592 Received: from mail-pf1-f179.google.com (mail-pf1-f179.google.com [209.85.210.179]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A83F21635A2 for ; Thu, 18 Apr 2024 11:59:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.210.179 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713441565; cv=none; b=Vl7kX6iCcprmiWKZZ+SHKgdb6e/Jg2xh1oUH4t5gTZEoIsXDoYwAyi0HPZ0VBFgCxnL/yEa7S3ww4yvz8rPEgJCTVsxjH8dZ5BM7ZrnHZ4qxb0UuLrW2l4NknLYN+tfiEt5vXh+EBMOBtsxvfoW+AySouTG9dy2JeoIDnn+T3FE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713441565; c=relaxed/simple; bh=atG+1UQfYDhhLUGqdEx8VNjGeYLNZVix4fHyruhkqxw=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=N4F8bjZXRDR0cdf1aWFOl8nxGRs7k2r5qh3yle+isJ2198akP59QpQYnXj1VZyuZCJtf35faPAaZgNMESK7Fb6nkFa15I/RNCPaTjeQWIDMZQkeiQbnirWKKkzNDn8e71FShaf8O5wmWYZowVRtc4XJy90NBNfctphcDrIwU9SQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=niV/MlKC; arc=none smtp.client-ip=209.85.210.179 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="niV/MlKC" Received: by mail-pf1-f179.google.com with SMTP id d2e1a72fcca58-6ed627829e6so918711b3a.1 for ; Thu, 18 Apr 2024 04:59:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1713441563; x=1714046363; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=aAcw7E8oN4uVzIUIOF8pEddwwqX+D/yCDKw3KFfwl3A=; b=niV/MlKCR+1P9tc/sIrs+Fy5eJOgk+oTXiUN1cwGxK1sn9VxIv8yq/jz0SxfWwSOr3 o/yc2ps4VcValhNGHj9H2biMtVuCkO+V28ZgyHF/yo6tQwl0jnRRp1lTF1EsIQc37aSl 34jz9KhsyecYgZSJJKacPRmJ4lzeYDP4n9+EIuwH5C19aNcY6EzYon0mqYKuz0dQk7rm 1IhF57tbg1+TJeETQcdHnnPnplknMvLvNv/CyU5Sq3W+7fZ3t3YPGcTddMc6uxSO2Trz AHuvv143vrBk6ssQD1VLm8xIt+aO+VgPWNFmCmmIMwW/+ubtRQXpr3na8tOd/oFMhX1Z Btng== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1713441563; x=1714046363; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=aAcw7E8oN4uVzIUIOF8pEddwwqX+D/yCDKw3KFfwl3A=; b=eyTxof0n7SX93oKIm1vEylBj6U/Vejw1g5FeffRSRsQlO9GmTh+LmDSpM6C87avFyB iOVwvV+fEgUBMhNQHunYQ+vvGBF6UVOgW6Xd+Z2R/+hC7hcT5WkPgm9GaJ0RT/W8ZeuI VRXMt6VZKt12rX+9ypxxGCK8vKvj6gdH1ZzwfHxmx639b7woqCYGN65q846uyXlswSg8 qDlXI0pmD+Gz5NAalaAZ00F1uTOej1Ndm1mcCJMnF71s9G+QHx/H2ahicNTEUdxgtvIv IjO1pogbHw/wADXsQWuM+etL+1W4MP3CWTrbjMjHvmgKCM1+4qY9kvl7ZATN7Q8aSI2F s+/g== X-Forwarded-Encrypted: i=1; AJvYcCXQz8/1UJPMLnf7ZJ8qQor0yhPI4B8B9rx03gRLkroMkm6RBwmoAzuUJ5MeTAcxpR/9AT0KBnEtQiJ8mX8uBL293J7p0rko8C7aEqUtLw== X-Gm-Message-State: AOJu0YwAGLH5gtwrGBMK5JiXKoyEMgqWGBF8HhN+aqnqKzN7VPPiQ8GJ V7wkKw9o/9CdI+wA/jZR4wArCx6hWuwMz1wHh5VJOLbId7QTd1bxfB3oFOdLQQ== X-Google-Smtp-Source: AGHT+IFSqDRaCBSoo8BoGX0u04qMirP3lQLymca/l6FmNsm3RAtW1htgucW5/5eUyGEsvsCQ6dtGbQ== X-Received: by 2002:a05:6a20:840b:b0:1a9:c80a:bdcf with SMTP id c11-20020a056a20840b00b001a9c80abdcfmr3613106pzd.2.1713441563006; Thu, 18 Apr 2024 04:59:23 -0700 (PDT) Received: from [127.0.1.1] ([120.56.197.253]) by smtp.gmail.com with ESMTPSA id ei16-20020a056a0080d000b006ed06c4074bsm1305512pfb.85.2024.04.18.04.59.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 18 Apr 2024 04:59:22 -0700 (PDT) From: Manivannan Sadhasivam Date: Thu, 18 Apr 2024 17:28:36 +0530 Subject: [PATCH v3 8/9] PCI: qcom-ep: Use the generic dw_pcie_ep_linkdown() API to handle Link Down event Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240418-pci-epf-rework-v3-8-222a5d1ed2e5@linaro.org> References: <20240418-pci-epf-rework-v3-0-222a5d1ed2e5@linaro.org> In-Reply-To: <20240418-pci-epf-rework-v3-0-222a5d1ed2e5@linaro.org> To: Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Rob Herring , Bjorn Helgaas , Kishon Vijay Abraham I , Thierry Reding , Jonathan Hunter , Jingoo Han Cc: linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, mhi@lists.linux.dev, linux-tegra@vger.kernel.org, Niklas Cassel , Manivannan Sadhasivam X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=1153; i=manivannan.sadhasivam@linaro.org; h=from:subject:message-id; bh=atG+1UQfYDhhLUGqdEx8VNjGeYLNZVix4fHyruhkqxw=; b=owEBbQGS/pANAwAKAVWfEeb+kc71AcsmYgBmIQrzQyeOnNXefT1bfI+O0Ma5JSu9+usv5cm9J cAHRmpaedqJATMEAAEKAB0WIQRnpUMqgUjL2KRYJ5dVnxHm/pHO9QUCZiEK8wAKCRBVnxHm/pHO 9RfIB/9uJMQCz4cdPaw2Hh9qei43flPkHVNyX2jDTngRHx+E6VSEifEhd5QFCmbUTanNcwV3VTA 2eUwRNH3tOOSw1HUe6yJ1qM2y39VllyIOYTzopkC2CN+j8I11D5d+YBJ7ydVmtc46YvtZktz8v5 JcdJVPjyeyIvyoxUaeiS2uoq/VE2v0acmKeM+uL5WncmPIaVq9lACPEN26KT5EOZZA3Jji3im4D yWu0AA8sQs+Z5JSxFpZHgVgytKegpBBjBkcd7LCIDHxB+1tvX/OGMyclZw7csNmal2n7HP0OYff //jFit6t/Lc+9VuatbccvEgxKt+tRT2hHloWbJbNnLJWCKCI X-Developer-Key: i=manivannan.sadhasivam@linaro.org; a=openpgp; fpr=C668AEC3C3188E4C611465E7488550E901166008 Now that the API is available, let's make use of it. It also handles the reinitialization of DWC non-sticky registers in addition to sending the notification to EPF drivers. Reviewed-by: Niklas Cassel Signed-off-by: Manivannan Sadhasivam --- drivers/pci/controller/dwc/pcie-qcom-ep.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pci/controller/dwc/pcie-qcom-ep.c b/drivers/pci/controller/dwc/pcie-qcom-ep.c index 458145d1f796..96f5acdc9317 100644 --- a/drivers/pci/controller/dwc/pcie-qcom-ep.c +++ b/drivers/pci/controller/dwc/pcie-qcom-ep.c @@ -635,7 +635,7 @@ static irqreturn_t qcom_pcie_ep_global_irq_thread(int irq, void *data) if (FIELD_GET(PARF_INT_ALL_LINK_DOWN, status)) { dev_dbg(dev, "Received Linkdown event\n"); pcie_ep->link_status = QCOM_PCIE_EP_LINK_DOWN; - pci_epc_linkdown(pci->ep.epc); + dw_pcie_ep_linkdown(&pci->ep); } else if (FIELD_GET(PARF_INT_ALL_BME, status)) { dev_dbg(dev, "Received Bus Master Enable event. Link is enabled!\n"); pcie_ep->link_status = QCOM_PCIE_EP_LINK_ENABLED; From patchwork Thu Apr 18 11:58:37 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 13634593 Received: from mail-pf1-f181.google.com (mail-pf1-f181.google.com [209.85.210.181]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 183CF1635DD for ; Thu, 18 Apr 2024 11:59:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.210.181 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713441569; cv=none; b=tzkMCiJSoO4SK7Rf+bz8Uw00nAqtjl7909fXlt2f+iO7RkJdENi2+Q77B5sxOa22/H6DQP5MewCwh/ybuUyVSYdWXiLKRZl7PXXHhxSqDkdJ1UcbAJDzlSEmqmOQ9zfRB/bLtvKkk/r08vKwi2PVEytflVFOAzdOZhl7pEcIi9A= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713441569; c=relaxed/simple; bh=wPvLz/T9iagzWRw0v80g9J/FvD2gtvoj9y/M+lLke4A=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=EfM00hlEwCCTa1Uxeyr0LLaUOqsW6zgjAXYC/sKRjPzaeyziuLIineIfpPG9CA3Jvy+Shp1e3nXjsGCBiEZvCb18neUsp1V+Sns36LPaeA7tkapMqnBZScUmN3UCriqX7zPv1eU9kL6gs8IB6HZFfIujDAJRpm7+/2dOsbpVnNQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=VJrQZq3n; arc=none smtp.client-ip=209.85.210.181 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="VJrQZq3n" Received: by mail-pf1-f181.google.com with SMTP id d2e1a72fcca58-6ed2dc03df6so725672b3a.1 for ; Thu, 18 Apr 2024 04:59:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1713441567; x=1714046367; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=sB4Vj1F8R9TI8q7MIK5l/hQOX3n83ir4wVWxXui6RS8=; b=VJrQZq3nDTrXUaP2FAdVkEU7DTIfNzYglNDYxzFYFiF23eZ9Q9zPkjqiiiGs+PQdmq dKqKt0YNyWOVoRVkwSj8rrnDsUMuIeL3io87CIpd3pLisQjPNq9bbu2Eux6bFRkbCqW0 qs1NBcQuhDGf364bIoKzmC08sCcz3BaccvswR679u9Ra830VcqtjzVSWA3X1UH673zoH n3UPaJMh2Pfz8qf9MWzlrJl6x0UQbhfRmGHB8P0pB25G3o+F/YNxm9besibBUoBBdFlV Gc2m7URSpiZuTU58LI6C2d1n4f8yCzclMNR1Rqcsm3KDtQ5JwVHtfcL/FlslkhJ6SbHM RxGQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1713441567; x=1714046367; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=sB4Vj1F8R9TI8q7MIK5l/hQOX3n83ir4wVWxXui6RS8=; b=v4Dc+bEeTZboy4+r2pssZUVZM3O06KoPGqCOWBtzhXTfPQxvSLn0X2BVd0IZ7SBtAq BAxzKqopwNF1DVpp2KfZFm6xpvfda3rpfYa1s0g3IyI/oHWMj7VPmM56264QxhRgyMuB URlQgsghstyp6Mfsd8GUISrEnxZqVDDNoPeL06WVIMQxR4Nrrn0Ex7sbXGcqtmbOA76M 2FFltGESpbn+lov0m35nA31F0UhqhHWZSrC143BBcLIWn3EJcFP4g1HM7q3SfdmKeZpv GO527VnNH2O5sC3mvXZa7AaVdNd0xdQc42xqgvexWwJwzLO7Ium7AFT/FMaT+Mf7N8+g uVxw== X-Forwarded-Encrypted: i=1; AJvYcCUg5Pv1tc+4g2dX7/5M5pOFp7A8KXRFyOdV8ek2D4Bg9GOZuwPAf/IyIC9YGuHQv5x5Iw8zn2uogJpKJGsBM4tXaX1Ut1r1T+mrwBRbrw== X-Gm-Message-State: AOJu0YxzeV6PKvFGk0VE1CBTfL6QCyw0fVRYi+FGGwuoqzS+erwDLGB4 kaDQkBxSDHHK3pwQ9PXpsT99w7D4yF9eVMaFlp7uIj6RgN2NguJsrK8vyJ139w== X-Google-Smtp-Source: AGHT+IHS4gloWj5hbhC/Dd93ipCogJ+/9dqpYOONaI+FHxZh5OpO8R4bGfLpKzOfOMYd7YFcmZ2ViQ== X-Received: by 2002:a05:6a00:1249:b0:6ed:21c0:986c with SMTP id u9-20020a056a00124900b006ed21c0986cmr3457626pfi.24.1713441567326; Thu, 18 Apr 2024 04:59:27 -0700 (PDT) Received: from [127.0.1.1] ([120.56.197.253]) by smtp.gmail.com with ESMTPSA id ei16-20020a056a0080d000b006ed06c4074bsm1305512pfb.85.2024.04.18.04.59.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 18 Apr 2024 04:59:26 -0700 (PDT) From: Manivannan Sadhasivam Date: Thu, 18 Apr 2024 17:28:37 +0530 Subject: [PATCH v3 9/9] PCI: endpoint: pci-epf-test: Handle Link Down event Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240418-pci-epf-rework-v3-9-222a5d1ed2e5@linaro.org> References: <20240418-pci-epf-rework-v3-0-222a5d1ed2e5@linaro.org> In-Reply-To: <20240418-pci-epf-rework-v3-0-222a5d1ed2e5@linaro.org> To: Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Rob Herring , Bjorn Helgaas , Kishon Vijay Abraham I , Thierry Reding , Jonathan Hunter , Jingoo Han Cc: linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, mhi@lists.linux.dev, linux-tegra@vger.kernel.org, Niklas Cassel , Manivannan Sadhasivam X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=1880; i=manivannan.sadhasivam@linaro.org; h=from:subject:message-id; bh=wPvLz/T9iagzWRw0v80g9J/FvD2gtvoj9y/M+lLke4A=; b=owEBbQGS/pANAwAKAVWfEeb+kc71AcsmYgBmIQr01KUXVFgco1oK+RZ9YRiOBYAvsONgoEOsE NzCsfYEukCJATMEAAEKAB0WIQRnpUMqgUjL2KRYJ5dVnxHm/pHO9QUCZiEK9AAKCRBVnxHm/pHO 9eCpB/954s7tYvaNExbVtn0Cb9jUNaZpGRd+LEIC6PkCi17re20PXsmvPcIqsieXfz49Yq+W6A0 C+hJr1bxyW7RWuPdxg6lCmoZbaJPsUAGPmsyUZgExobZrNKBwvn2VkH25b24OKjNs4aT/mlGgdH dIl7LANDCLrglhdzfeZFJmyHn9k0s8srrgMyNbjBrzbcq8+tIXOAD1lYXCfObHfbtqikbZwIqd3 tziFmt2qsaBYr1elhIJkODV68Rt725P2rf82fDpEK02rpAavTXm54TQvCNShFfgeu1tcE2LzqR9 u+qB7adK1p9/fYqK4iZ8YH4HDGJzZkDXhTh+hpUgKHCsWY42 X-Developer-Key: i=manivannan.sadhasivam@linaro.org; a=openpgp; fpr=C668AEC3C3188E4C611465E7488550E901166008 As per the PCIe base spec r5.0, section 5.2, Link Down event can happen under any of the following circumstances: 1. Fundamental/Hot reset 2. Link disable transmission by upstream component 3. Moving from L2/L3 to L0 When the event happens, the EPC driver capable of detecting it may pass the notification to the EPF driver through link_down() callback in 'struct pci_epc_event_ops'. While the PCIe spec has not defined the actual behavior of the endpoint when the Link Down event happens, we may assume that at least the ongoing transactions need to be stopped as the link won't be active. So let's cancel the command handler work in the callback implementation pci_epf_test_link_down(). The work will be started again in pci_epf_test_link_up() once the link comes back again. Reviewed-by: Niklas Cassel Signed-off-by: Manivannan Sadhasivam --- drivers/pci/endpoint/functions/pci-epf-test.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/pci/endpoint/functions/pci-epf-test.c b/drivers/pci/endpoint/functions/pci-epf-test.c index c8d0c51ae329..afb28df174c3 100644 --- a/drivers/pci/endpoint/functions/pci-epf-test.c +++ b/drivers/pci/endpoint/functions/pci-epf-test.c @@ -809,10 +809,20 @@ static int pci_epf_test_link_up(struct pci_epf *epf) return 0; } +static int pci_epf_test_link_down(struct pci_epf *epf) +{ + struct pci_epf_test *epf_test = epf_get_drvdata(epf); + + cancel_delayed_work_sync(&epf_test->cmd_handler); + + return 0; +} + static const struct pci_epc_event_ops pci_epf_test_event_ops = { .epc_init = pci_epf_test_epc_init, .epc_deinit = pci_epf_test_epc_deinit, .link_up = pci_epf_test_link_up, + .link_down = pci_epf_test_link_down, }; static int pci_epf_test_alloc_space(struct pci_epf *epf)