From patchwork Fri Apr 19 12:11:31 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Hogander, Jouni" X-Patchwork-Id: 13636325 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E1861C4345F for ; Fri, 19 Apr 2024 12:11:59 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 471A110FA0F; Fri, 19 Apr 2024 12:11:59 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="S0WFuTZl"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.11]) by gabe.freedesktop.org (Postfix) with ESMTPS id 95D2710FE7C for ; Fri, 19 Apr 2024 12:11:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1713528717; x=1745064717; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=trdzIumc54RA+X/EZ0GKfU6EgGfTCra/qqwwP5hUNZ0=; b=S0WFuTZlYsrSEvlddNF246nrCATGB1eJzZVzRZYhAC0469ij3iMVhSsp UkbsGGOeSU3n4CCmE0exbnRnZPrs1rjWyHotfqRtXKqDPqlyhwvL3RxNc dnD9umBPsJ79aWy5mE3izRrCEfRDr7+hPFri9K0gpGfiNo9Nk8Z8Kiyh0 M5JbCAafEB/3aiQ6j2lvvaJ6D8Sk1/g5OVKg7QMHR7Y2Bozl3aDQJLOiF j4TR3mv1vHUi+EOfebkpxOwOkOk6ZnCLOU9vzRtTs4ehdjCsk+fzcEAE0 PqmTg4fjuMWanWzBnOIcQPqCWMHe5Y3Q/BqGGt7QfEA517xblHvgo0zRP w==; X-CSE-ConnectionGUID: Y7L2HRuzQfm3WRSmhEMkMQ== X-CSE-MsgGUID: zwyDwk1USm2X2hIf/DK5vQ== X-IronPort-AV: E=McAfee;i="6600,9927,11047"; a="19735907" X-IronPort-AV: E=Sophos;i="6.07,213,1708416000"; d="scan'208";a="19735907" Received: from orviesa004.jf.intel.com ([10.64.159.144]) by fmvoesa105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Apr 2024 05:11:56 -0700 X-CSE-ConnectionGUID: UkHe3ZZTSommIeZjs85uxQ== X-CSE-MsgGUID: VfibWsbSS+yqKoBotCoqNA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,213,1708416000"; d="scan'208";a="28149482" Received: from mkuznet1-mobl2.ger.corp.intel.com (HELO jhogande-mobl1.intel.com) ([10.252.63.13]) by orviesa004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Apr 2024 05:11:55 -0700 From: =?utf-8?q?Jouni_H=C3=B6gander?= To: intel-gfx@lists.freedesktop.org Cc: Animesh Manna , =?utf-8?q?Jouni_H=C3=B6gander?= Subject: [PATCH v7 01/11] drm/i915/psr: Rename has_psr2 as has_sel_update Date: Fri, 19 Apr 2024 15:11:31 +0300 Message-Id: <20240419121141.2665945-2-jouni.hogander@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240419121141.2665945-1-jouni.hogander@intel.com> References: <20240419121141.2665945-1-jouni.hogander@intel.com> MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" We are going to reuse has_psr2 for panel_replay as well. Rename it as has_sel_update to avoid confusion. v2: Rebase Signed-off-by: Jouni Högander Reviewed-by: Animesh Manna --- drivers/gpu/drm/i915/display/intel_crtc_state_dump.c | 10 +++++----- drivers/gpu/drm/i915/display/intel_display.c | 2 +- drivers/gpu/drm/i915/display/intel_display_types.h | 2 +- drivers/gpu/drm/i915/display/intel_dp.c | 2 +- drivers/gpu/drm/i915/display/intel_fbc.c | 2 +- drivers/gpu/drm/i915/display/intel_psr.c | 10 +++++----- 6 files changed, 14 insertions(+), 14 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c index ccaa4cb2809b..2c391714f28e 100644 --- a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c +++ b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c @@ -251,11 +251,11 @@ void intel_crtc_state_dump(const struct intel_crtc_state *pipe_config, drm_printf(&p, "sdp split: %s\n", str_enabled_disabled(pipe_config->sdp_split_enable)); - drm_printf(&p, "psr: %s, psr2: %s, panel replay: %s, selective fetch: %s\n", - str_enabled_disabled(pipe_config->has_psr), - str_enabled_disabled(pipe_config->has_psr2), - str_enabled_disabled(pipe_config->has_panel_replay), - str_enabled_disabled(pipe_config->enable_psr2_sel_fetch)); + drm_printf(&p, "psr: %s, selective update: %s, panel replay: %s, selective fetch: %s\n", + str_enabled_disabled(pipe_config->has_psr), + str_enabled_disabled(pipe_config->has_sel_update), + str_enabled_disabled(pipe_config->has_panel_replay), + str_enabled_disabled(pipe_config->enable_psr2_sel_fetch)); } drm_printf(&p, "framestart delay: %d, MSA timing delay: %d\n", diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 96ed1490fec7..bd633522d645 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -5320,7 +5320,7 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config, */ if (current_config->has_panel_replay || pipe_config->has_panel_replay) { PIPE_CONF_CHECK_BOOL(has_psr); - PIPE_CONF_CHECK_BOOL(has_psr2); + PIPE_CONF_CHECK_BOOL(has_sel_update); PIPE_CONF_CHECK_BOOL(enable_psr2_sel_fetch); PIPE_CONF_CHECK_BOOL(enable_psr2_su_region_et); PIPE_CONF_CHECK_BOOL(has_panel_replay); diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h index 62f7a30c37dc..6747c10da298 100644 --- a/drivers/gpu/drm/i915/display/intel_display_types.h +++ b/drivers/gpu/drm/i915/display/intel_display_types.h @@ -1189,7 +1189,7 @@ struct intel_crtc_state { /* PSR is supported but might not be enabled due the lack of enabled planes */ bool has_psr; - bool has_psr2; + bool has_sel_update; bool enable_psr2_sel_fetch; bool enable_psr2_su_region_et; bool req_psr2_sdp_prior_scanline; diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 163da48bc406..cdb4ad23b94a 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -2664,7 +2664,7 @@ static void intel_dp_compute_vsc_sdp(struct intel_dp *intel_dp, if (intel_dp_needs_vsc_sdp(crtc_state, conn_state)) { intel_dp_compute_vsc_colorimetry(crtc_state, conn_state, vsc); - } else if (crtc_state->has_psr2) { + } else if (crtc_state->has_psr && crtc_state->has_sel_update) { /* * [PSR2 without colorimetry] * Prepare VSC Header for SU as per eDP 1.4 spec, Table 6-11 diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c index 7c4d2b2bf20b..5bfce36fb892 100644 --- a/drivers/gpu/drm/i915/display/intel_fbc.c +++ b/drivers/gpu/drm/i915/display/intel_fbc.c @@ -1250,7 +1250,7 @@ static int intel_fbc_check_plane(struct intel_atomic_state *state, * Recommendation is to keep this combination disabled * Bspec: 50422 HSD: 14010260002 */ - if (IS_DISPLAY_VER(i915, 12, 14) && crtc_state->has_psr2) { + if (IS_DISPLAY_VER(i915, 12, 14) && crtc_state->has_sel_update) { plane_state->no_fbc_reason = "PSR2 enabled"; return 0; } diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index f5b33335a9ae..a2f7d998d342 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -651,7 +651,7 @@ void intel_psr_enable_sink(struct intel_dp *intel_dp, struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); u8 dpcd_val = DP_PSR_ENABLE; - if (crtc_state->has_psr2) { + if (crtc_state->has_sel_update) { /* Enable ALPM at sink for psr2 */ if (!crtc_state->has_panel_replay) { drm_dp_dpcd_writeb(&intel_dp->aux, @@ -1639,7 +1639,7 @@ void intel_psr_compute_config(struct intel_dp *intel_dp, if (!crtc_state->has_psr) return; - crtc_state->has_psr2 = intel_psr2_config_valid(intel_dp, crtc_state); + crtc_state->has_sel_update = intel_psr2_config_valid(intel_dp, crtc_state); } void intel_psr_get_config(struct intel_encoder *encoder, @@ -1672,7 +1672,7 @@ void intel_psr_get_config(struct intel_encoder *encoder, pipe_config->has_psr = true; } - pipe_config->has_psr2 = intel_dp->psr.psr2_enabled; + pipe_config->has_sel_update = intel_dp->psr.psr2_enabled; pipe_config->infoframes.enable |= intel_hdmi_infoframe_enable(DP_SDP_VSC); if (!intel_dp->psr.psr2_enabled) @@ -1960,7 +1960,7 @@ static void intel_psr_enable_locked(struct intel_dp *intel_dp, drm_WARN_ON(&dev_priv->drm, intel_dp->psr.enabled); - intel_dp->psr.psr2_enabled = crtc_state->has_psr2; + intel_dp->psr.psr2_enabled = crtc_state->has_sel_update; intel_dp->psr.panel_replay_enabled = crtc_state->has_panel_replay; intel_dp->psr.busy_frontbuffer_bits = 0; intel_dp->psr.pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe; @@ -2688,7 +2688,7 @@ void intel_psr_pre_plane_update(struct intel_atomic_state *state, needs_to_disable |= intel_crtc_needs_modeset(new_crtc_state); needs_to_disable |= !new_crtc_state->has_psr; needs_to_disable |= !new_crtc_state->active_planes; - needs_to_disable |= new_crtc_state->has_psr2 != psr->psr2_enabled; + needs_to_disable |= new_crtc_state->has_sel_update != psr->psr2_enabled; needs_to_disable |= DISPLAY_VER(i915) < 11 && new_crtc_state->wm_level_disabled; From patchwork Fri Apr 19 12:11:32 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Hogander, Jouni" X-Patchwork-Id: 13636326 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 94CA6C04FFE for ; Fri, 19 Apr 2024 12:12:01 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 0776D10FE7C; Fri, 19 Apr 2024 12:12:00 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="WPGAEhoY"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.11]) by gabe.freedesktop.org (Postfix) with ESMTPS id 4353510FA0F for ; Fri, 19 Apr 2024 12:11:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1713528718; x=1745064718; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=t9FvUDnb0gwgGyHfiXCiedDlTaG7xz+DKbeUCJPLZfY=; b=WPGAEhoYMToGKwg1Qk61BbaK5W6aYbDW2XkuGfdk8rXkS3eGGWLJOmMD FvCKm2zHsXG35aCkvM4QTyrW6AjWd7SYLkNbRYNVp5Hyoxm8ocGNobWZn T+nsuPiyjT8QPbaJUa6Blukjnv/xiIMobURdnfnLOuAZZ86PCQuLNJ9S8 pf5Lu17w9VHyfgITzzsP1E1t4IwR5HHNA76iimOEWGEFq1Pg1jJ1vAzeQ /wqSb1kKg471P79mbZTklFNwpH/cHmojhdgDcR74J31BmhYfTTnmuUtHw WWcNRomIIdTGWEbzJ3p02VmOdGvOJC4QFQs0ZcrY0TjLELdAKCdmKq8eq Q==; X-CSE-ConnectionGUID: mi1oweW2RV6g5pOi+JMmBg== X-CSE-MsgGUID: y1Crxqd4Ri2ydnU9dWudgw== X-IronPort-AV: E=McAfee;i="6600,9927,11047"; a="19735912" X-IronPort-AV: E=Sophos;i="6.07,213,1708416000"; d="scan'208";a="19735912" Received: from orviesa004.jf.intel.com ([10.64.159.144]) by fmvoesa105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Apr 2024 05:11:58 -0700 X-CSE-ConnectionGUID: OOzOf3rRTDCW0qRxAnJ86A== X-CSE-MsgGUID: Ez7zJgagTJmJmYcKCaiCTQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,213,1708416000"; d="scan'208";a="28149489" Received: from mkuznet1-mobl2.ger.corp.intel.com (HELO jhogande-mobl1.intel.com) ([10.252.63.13]) by orviesa004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Apr 2024 05:11:57 -0700 From: =?utf-8?q?Jouni_H=C3=B6gander?= To: intel-gfx@lists.freedesktop.org Cc: Animesh Manna , =?utf-8?q?Jouni_H=C3=B6gander?= Subject: [PATCH v7 02/11] drm/i915/dp: Use always vsc revision 0x6 for Panel Replay Date: Fri, 19 Apr 2024 15:11:32 +0300 Message-Id: <20240419121141.2665945-3-jouni.hogander@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240419121141.2665945-1-jouni.hogander@intel.com> References: <20240419121141.2665945-1-jouni.hogander@intel.com> MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" We are about to enable Panel Replay Selective update mode. Vsc revision 0x6 for Panel Replay no matter if it is selective update or full frame update mode. Take this into account when preparing VSC SDP package. Signed-off-by: Jouni Högander --- drivers/gpu/drm/i915/display/intel_dp.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index cdb4ad23b94a..3dd5e6238ca2 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -2664,14 +2664,6 @@ static void intel_dp_compute_vsc_sdp(struct intel_dp *intel_dp, if (intel_dp_needs_vsc_sdp(crtc_state, conn_state)) { intel_dp_compute_vsc_colorimetry(crtc_state, conn_state, vsc); - } else if (crtc_state->has_psr && crtc_state->has_sel_update) { - /* - * [PSR2 without colorimetry] - * Prepare VSC Header for SU as per eDP 1.4 spec, Table 6-11 - * 3D stereo + PSR/PSR2 + Y-coordinate. - */ - vsc->revision = 0x4; - vsc->length = 0xe; } else if (crtc_state->has_panel_replay) { /* * [Panel Replay without colorimetry info] @@ -2680,6 +2672,14 @@ static void intel_dp_compute_vsc_sdp(struct intel_dp *intel_dp, */ vsc->revision = 0x6; vsc->length = 0x10; + } else if (crtc_state->has_psr && crtc_state->has_sel_update) { + /* + * [PSR2 without colorimetry] + * Prepare VSC Header for SU as per eDP 1.4 spec, Table 6-11 + * 3D stereo + PSR/PSR2 + Y-coordinate. + */ + vsc->revision = 0x4; + vsc->length = 0xe; } else { /* * [PSR1] From patchwork Fri Apr 19 12:11:33 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Hogander, Jouni" X-Patchwork-Id: 13636329 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D355FC04FFE for ; Fri, 19 Apr 2024 12:12:06 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 329D510FE82; Fri, 19 Apr 2024 12:12:05 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="DR2P0ma4"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.11]) by gabe.freedesktop.org (Postfix) with ESMTPS id 35AAE10FE7D for ; Fri, 19 Apr 2024 12:12:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1713528720; x=1745064720; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=wjFS1+NbG2Vvr7sQVgcyDtGvUeFHdIugMx1Q11+bLFs=; b=DR2P0ma4gFdG+tjelCiYN7rFnDLWda3oX1QBpSAktyjySbCBvjbTzRCu /UkI2p3jVcsBW60WmFUFG+bi6WxRqyl2deerjxQcF9+NmldGd9IgpYUT0 Eq9HHPE7w3ItgVEov64mD8RnEQ0ede/PCsmxU8EH5Mj8xz3fvY/IdrJlO xAJSP8YxlNrIvEAilT/uH3KIXz3oVyKZtD0aLaWpZyA1GqjZlDhX45iIU QTbQ1EOpjaH6kSZCXKJmjAHFwh87u5wLaQQxAPCH8oj8oU080WqmVD1mC PjQE159CWNc213ng6fsuvcVldMpDy1KTvzEjr6gBJrQ0MWEPgtKYjPS/Y w==; X-CSE-ConnectionGUID: 6PcX5YRYSA6KPFJPOLWjMA== X-CSE-MsgGUID: yDuYh4ghSqak/bONkT1HUA== X-IronPort-AV: E=McAfee;i="6600,9927,11047"; a="19735916" X-IronPort-AV: E=Sophos;i="6.07,213,1708416000"; d="scan'208";a="19735916" Received: from orviesa004.jf.intel.com ([10.64.159.144]) by fmvoesa105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Apr 2024 05:12:00 -0700 X-CSE-ConnectionGUID: 2vCdMKr7Re61q9gAifs0TA== X-CSE-MsgGUID: iEydLV0dTzezmBQqmtMULg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,213,1708416000"; d="scan'208";a="28149494" Received: from mkuznet1-mobl2.ger.corp.intel.com (HELO jhogande-mobl1.intel.com) ([10.252.63.13]) by orviesa004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Apr 2024 05:11:59 -0700 From: =?utf-8?q?Jouni_H=C3=B6gander?= To: intel-gfx@lists.freedesktop.org Cc: Animesh Manna , =?utf-8?q?Jouni_H=C3=B6gander?= Subject: [PATCH v7 03/11] drm/i915/psr: Rename psr2_enabled as sel_update_enabled Date: Fri, 19 Apr 2024 15:11:33 +0300 Message-Id: <20240419121141.2665945-4-jouni.hogander@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240419121141.2665945-1-jouni.hogander@intel.com> References: <20240419121141.2665945-1-jouni.hogander@intel.com> MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" We are about to reuse psr2_enabled for panel replay as well. Rename it as sel_update_enabled to avoid confusion. v3: Rebase v2: Rebase Signed-off-by: Jouni Högander Reviewed-by: Animesh Manna --- .../drm/i915/display/intel_display_types.h | 2 +- drivers/gpu/drm/i915/display/intel_psr.c | 52 +++++++++---------- 2 files changed, 27 insertions(+), 27 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h index 6747c10da298..150e6c8e0320 100644 --- a/drivers/gpu/drm/i915/display/intel_display_types.h +++ b/drivers/gpu/drm/i915/display/intel_display_types.h @@ -1695,7 +1695,7 @@ struct intel_psr { unsigned int busy_frontbuffer_bits; bool sink_psr2_support; bool link_standby; - bool psr2_enabled; + bool sel_update_enabled; bool psr2_sel_fetch_enabled; bool psr2_sel_fetch_cff_enabled; bool req_psr2_sdp_prior_scanline; diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index a2f7d998d342..af18728460c9 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -356,12 +356,12 @@ static void psr_irq_control(struct intel_dp *intel_dp) } static void psr_event_print(struct drm_i915_private *i915, - u32 val, bool psr2_enabled) + u32 val, bool sel_update_enabled) { drm_dbg_kms(&i915->drm, "PSR exit events: 0x%x\n", val); if (val & PSR_EVENT_PSR2_WD_TIMER_EXPIRE) drm_dbg_kms(&i915->drm, "\tPSR2 watchdog timer expired\n"); - if ((val & PSR_EVENT_PSR2_DISABLED) && psr2_enabled) + if ((val & PSR_EVENT_PSR2_DISABLED) && sel_update_enabled) drm_dbg_kms(&i915->drm, "\tPSR2 disabled\n"); if (val & PSR_EVENT_SU_DIRTY_FIFO_UNDERRUN) drm_dbg_kms(&i915->drm, "\tSU dirty FIFO underrun\n"); @@ -389,7 +389,7 @@ static void psr_event_print(struct drm_i915_private *i915, drm_dbg_kms(&i915->drm, "\tVBI enabled\n"); if (val & PSR_EVENT_LPSP_MODE_EXIT) drm_dbg_kms(&i915->drm, "\tLPSP mode exited\n"); - if ((val & PSR_EVENT_PSR_DISABLE) && !psr2_enabled) + if ((val & PSR_EVENT_PSR_DISABLE) && !sel_update_enabled) drm_dbg_kms(&i915->drm, "\tPSR disabled\n"); } @@ -417,7 +417,7 @@ void intel_psr_irq_handler(struct intel_dp *intel_dp, u32 psr_iir) val = intel_de_rmw(dev_priv, PSR_EVENT(cpu_transcoder), 0, 0); - psr_event_print(dev_priv, val, intel_dp->psr.psr2_enabled); + psr_event_print(dev_priv, val, intel_dp->psr.sel_update_enabled); } } @@ -1672,10 +1672,10 @@ void intel_psr_get_config(struct intel_encoder *encoder, pipe_config->has_psr = true; } - pipe_config->has_sel_update = intel_dp->psr.psr2_enabled; + pipe_config->has_sel_update = intel_dp->psr.sel_update_enabled; pipe_config->infoframes.enable |= intel_hdmi_infoframe_enable(DP_SDP_VSC); - if (!intel_dp->psr.psr2_enabled) + if (!intel_dp->psr.sel_update_enabled) goto unlock; if (HAS_PSR2_SEL_FETCH(dev_priv)) { @@ -1711,7 +1711,7 @@ static void intel_psr_activate(struct intel_dp *intel_dp) /* psr1, psr2 and panel-replay are mutually exclusive.*/ if (intel_dp->psr.panel_replay_enabled) dg2_activate_panel_replay(intel_dp); - else if (intel_dp->psr.psr2_enabled) + else if (intel_dp->psr.sel_update_enabled) hsw_activate_psr2(intel_dp); else hsw_activate_psr1(intel_dp); @@ -1770,7 +1770,7 @@ static void lnl_alpm_configure(struct intel_dp *intel_dp) struct intel_psr *psr = &intel_dp->psr; u32 alpm_ctl; - if (DISPLAY_VER(dev_priv) < 20 || (!intel_dp->psr.psr2_enabled && + if (DISPLAY_VER(dev_priv) < 20 || (!intel_dp->psr.sel_update_enabled && !intel_dp_is_edp(intel_dp))) return; @@ -1894,7 +1894,7 @@ static void intel_psr_enable_source(struct intel_dp *intel_dp, */ wm_optimization_wa(intel_dp, crtc_state); - if (intel_dp->psr.psr2_enabled) { + if (intel_dp->psr.sel_update_enabled) { if (DISPLAY_VER(dev_priv) == 9) intel_de_rmw(dev_priv, CHICKEN_TRANS(cpu_transcoder), 0, PSR2_VSC_ENABLE_PROG_HEADER | @@ -1960,7 +1960,7 @@ static void intel_psr_enable_locked(struct intel_dp *intel_dp, drm_WARN_ON(&dev_priv->drm, intel_dp->psr.enabled); - intel_dp->psr.psr2_enabled = crtc_state->has_sel_update; + intel_dp->psr.sel_update_enabled = crtc_state->has_sel_update; intel_dp->psr.panel_replay_enabled = crtc_state->has_panel_replay; intel_dp->psr.busy_frontbuffer_bits = 0; intel_dp->psr.pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe; @@ -1981,7 +1981,7 @@ static void intel_psr_enable_locked(struct intel_dp *intel_dp, drm_dbg_kms(&dev_priv->drm, "Enabling Panel Replay\n"); } else { drm_dbg_kms(&dev_priv->drm, "Enabling PSR%s\n", - intel_dp->psr.psr2_enabled ? "2" : "1"); + intel_dp->psr.sel_update_enabled ? "2" : "1"); /* * Panel replay has to be enabled before link training: doing it @@ -2021,7 +2021,7 @@ static void intel_psr_exit(struct intel_dp *intel_dp) if (intel_dp->psr.panel_replay_enabled) { intel_de_rmw(dev_priv, TRANS_DP2_CTL(intel_dp->psr.transcoder), TRANS_DP2_PANEL_REPLAY_ENABLE, 0); - } else if (intel_dp->psr.psr2_enabled) { + } else if (intel_dp->psr.sel_update_enabled) { tgl_disallow_dc3co_on_psr2_exit(intel_dp); val = intel_de_rmw(dev_priv, EDP_PSR2_CTL(cpu_transcoder), @@ -2044,7 +2044,7 @@ static void intel_psr_wait_exit_locked(struct intel_dp *intel_dp) i915_reg_t psr_status; u32 psr_status_mask; - if (intel_dp->psr.psr2_enabled) { + if (intel_dp->psr.sel_update_enabled) { psr_status = EDP_PSR2_STATUS(cpu_transcoder); psr_status_mask = EDP_PSR2_STATUS_STATE_MASK; } else { @@ -2072,7 +2072,7 @@ static void intel_psr_disable_locked(struct intel_dp *intel_dp) drm_dbg_kms(&dev_priv->drm, "Disabling Panel Replay\n"); else drm_dbg_kms(&dev_priv->drm, "Disabling PSR%s\n", - intel_dp->psr.psr2_enabled ? "2" : "1"); + intel_dp->psr.sel_update_enabled ? "2" : "1"); intel_psr_exit(intel_dp); intel_psr_wait_exit_locked(intel_dp); @@ -2085,7 +2085,7 @@ static void intel_psr_disable_locked(struct intel_dp *intel_dp) intel_de_rmw(dev_priv, GEN8_CHICKEN_DCPR_1, wa_16013835468_bit_get(intel_dp), 0); - if (intel_dp->psr.psr2_enabled) { + if (intel_dp->psr.sel_update_enabled) { /* Wa_16012604467:adlp,mtl[a0,b0] */ if (IS_DISPLAY_IP_STEP(dev_priv, IP_VER(14, 0), STEP_A0, STEP_B0)) intel_de_rmw(dev_priv, @@ -2114,12 +2114,12 @@ static void intel_psr_disable_locked(struct intel_dp *intel_dp) intel_psr_get_enable_sink_offset(intel_dp), 0); if (!intel_dp->psr.panel_replay_enabled && - intel_dp->psr.psr2_enabled) + intel_dp->psr.sel_update_enabled) drm_dp_dpcd_writeb(&intel_dp->aux, DP_RECEIVER_ALPM_CONFIG, 0); intel_dp->psr.enabled = false; intel_dp->psr.panel_replay_enabled = false; - intel_dp->psr.psr2_enabled = false; + intel_dp->psr.sel_update_enabled = false; intel_dp->psr.psr2_sel_fetch_enabled = false; intel_dp->psr.psr2_sel_fetch_cff_enabled = false; } @@ -2688,7 +2688,7 @@ void intel_psr_pre_plane_update(struct intel_atomic_state *state, needs_to_disable |= intel_crtc_needs_modeset(new_crtc_state); needs_to_disable |= !new_crtc_state->has_psr; needs_to_disable |= !new_crtc_state->active_planes; - needs_to_disable |= new_crtc_state->has_sel_update != psr->psr2_enabled; + needs_to_disable |= new_crtc_state->has_sel_update != psr->sel_update_enabled; needs_to_disable |= DISPLAY_VER(i915) < 11 && new_crtc_state->wm_level_disabled; @@ -2806,7 +2806,7 @@ void intel_psr_wait_for_idle_locked(const struct intel_crtc_state *new_crtc_stat if (!intel_dp->psr.enabled) continue; - if (intel_dp->psr.psr2_enabled) + if (intel_dp->psr.sel_update_enabled) ret = _psr2_ready_for_pipe_update_locked(intel_dp); else ret = _psr1_ready_for_pipe_update_locked(intel_dp); @@ -2827,7 +2827,7 @@ static bool __psr_wait_for_idle_locked(struct intel_dp *intel_dp) if (!intel_dp->psr.enabled) return false; - if (intel_dp->psr.psr2_enabled) { + if (intel_dp->psr.sel_update_enabled) { reg = EDP_PSR2_STATUS(cpu_transcoder); mask = EDP_PSR2_STATUS_STATE_MASK; } else { @@ -3068,7 +3068,7 @@ tgl_dc3co_flush_locked(struct intel_dp *intel_dp, unsigned int frontbuffer_bits, { struct drm_i915_private *i915 = dp_to_i915(intel_dp); - if (!intel_dp->psr.dc3co_exitline || !intel_dp->psr.psr2_enabled || + if (!intel_dp->psr.dc3co_exitline || !intel_dp->psr.sel_update_enabled || !intel_dp->psr.active) return; @@ -3266,7 +3266,7 @@ static void psr_alpm_check(struct intel_dp *intel_dp) u8 val; int r; - if (!psr->psr2_enabled) + if (!psr->sel_update_enabled) return; r = drm_dp_dpcd_readb(aux, DP_RECEIVER_ALPM_STATUS, &val); @@ -3446,7 +3446,7 @@ psr_source_status(struct intel_dp *intel_dp, struct seq_file *m) const char *status = "unknown"; u32 val, status_val; - if (intel_dp->psr.psr2_enabled) { + if (intel_dp->psr.sel_update_enabled) { static const char * const live_status[] = { "IDLE", "CAPTURE", @@ -3510,7 +3510,7 @@ static int intel_psr_status(struct seq_file *m, struct intel_dp *intel_dp) if (psr->panel_replay_enabled) status = "Panel Replay Enabled"; else if (psr->enabled) - status = psr->psr2_enabled ? "PSR2 enabled" : "PSR1 enabled"; + status = psr->sel_update_enabled ? "PSR2 enabled" : "PSR1 enabled"; else status = "disabled"; seq_printf(m, "PSR mode: %s\n", status); @@ -3525,7 +3525,7 @@ static int intel_psr_status(struct seq_file *m, struct intel_dp *intel_dp) if (psr->panel_replay_enabled) { val = intel_de_read(dev_priv, TRANS_DP2_CTL(cpu_transcoder)); enabled = val & TRANS_DP2_PANEL_REPLAY_ENABLE; - } else if (psr->psr2_enabled) { + } else if (psr->sel_update_enabled) { val = intel_de_read(dev_priv, EDP_PSR2_CTL(cpu_transcoder)); enabled = val & EDP_PSR2_ENABLE; } else { @@ -3551,7 +3551,7 @@ static int intel_psr_status(struct seq_file *m, struct intel_dp *intel_dp) seq_printf(m, "Last exit at: %lld\n", psr->last_exit); } - if (psr->psr2_enabled) { + if (psr->sel_update_enabled) { u32 su_frames_val[3]; int frame; From patchwork Fri Apr 19 12:11:34 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Hogander, Jouni" X-Patchwork-Id: 13636328 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8FC8FC04FF6 for ; Fri, 19 Apr 2024 12:12:05 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 10AB910FE7F; Fri, 19 Apr 2024 12:12:05 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="LC17qCdK"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.11]) by gabe.freedesktop.org (Postfix) with ESMTPS id C9DC610FE7D for ; Fri, 19 Apr 2024 12:12:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1713528722; x=1745064722; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=ulzhZRtBs1WgHHROZPxeE5+9sVY6c5DrqWLLfY76br8=; b=LC17qCdKp8PFPRx7mHmUmpT/iJKD4MCMrRZfndiCoCg4091SOSdHR4nx jTFyfz2hTvppDk23cv/KZCgfYAylm9wCv//IreSIvfSXI/y/jXqcX5Xjz SJRn7nOebbsdYNC3APmVRiL3xGtCgP7HTlUFBGw7hUX0azsvxONPPS2gu K8ucdJU9Y0Moph+S870wEmT7b+wjQsQA8wee30eMecmI0oQ9jQ9muqAm1 /i8BJETWIF1UDKaGdB+4BWMEySCd3W7TQeAnTVxJR+8vmc4sfUBmmlfzi AixIHSRCj8vV2vU+Az46JeNiEgS2s0+uhWOCIuig9jGb03cwCwIqf8nGD Q==; X-CSE-ConnectionGUID: OTRBrE5TTYeu3j3okN4T5g== X-CSE-MsgGUID: EbyaC5meTtmtNah8teHrBA== X-IronPort-AV: E=McAfee;i="6600,9927,11047"; a="19735921" X-IronPort-AV: E=Sophos;i="6.07,213,1708416000"; d="scan'208";a="19735921" Received: from orviesa004.jf.intel.com ([10.64.159.144]) by fmvoesa105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Apr 2024 05:12:02 -0700 X-CSE-ConnectionGUID: UtojfwaaS/yegeO5Eyp7kA== X-CSE-MsgGUID: HUpt6fdnRJSk6hVk6kZ6MQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,213,1708416000"; d="scan'208";a="28149501" Received: from mkuznet1-mobl2.ger.corp.intel.com (HELO jhogande-mobl1.intel.com) ([10.252.63.13]) by orviesa004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Apr 2024 05:12:00 -0700 From: =?utf-8?q?Jouni_H=C3=B6gander?= To: intel-gfx@lists.freedesktop.org Cc: Animesh Manna , =?utf-8?q?Jouni_H=C3=B6gander?= Subject: [PATCH v7 04/11] drm/panelreplay: dpcd register definition for panelreplay SU Date: Fri, 19 Apr 2024 15:11:34 +0300 Message-Id: <20240419121141.2665945-5-jouni.hogander@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240419121141.2665945-1-jouni.hogander@intel.com> References: <20240419121141.2665945-1-jouni.hogander@intel.com> MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Add definitions for panel replay selective update v2: Remove unnecessary Cc from commit message Signed-off-by: Jouni Högander Reviewed-by: Animesh Manna --- include/drm/display/drm_dp.h | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/include/drm/display/drm_dp.h b/include/drm/display/drm_dp.h index 0b032faa8cf2..906949ca3cee 100644 --- a/include/drm/display/drm_dp.h +++ b/include/drm/display/drm_dp.h @@ -548,6 +548,12 @@ # define DP_PANEL_REPLAY_SUPPORT (1 << 0) # define DP_PANEL_REPLAY_SU_SUPPORT (1 << 1) +#define DP_PANEL_PANEL_REPLAY_CAPABILITY 0xb1 +# define DP_PANEL_PANEL_REPLAY_SU_GRANULARITY_REQUIRED (1 << 5) + +#define DP_PANEL_PANEL_REPLAY_X_GRANULARITY 0xb2 +#define DP_PANEL_PANEL_REPLAY_Y_GRANULARITY 0xb4 + /* Link Configuration */ #define DP_LINK_BW_SET 0x100 # define DP_LINK_RATE_TABLE 0x00 /* eDP 1.4 */ From patchwork Fri Apr 19 12:11:35 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Hogander, Jouni" X-Patchwork-Id: 13636327 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6DBF8C4345F for ; Fri, 19 Apr 2024 12:12:05 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id CAF9F10FE81; Fri, 19 Apr 2024 12:12:04 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="hJAD+v1k"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.11]) by gabe.freedesktop.org (Postfix) with ESMTPS id 6E3BA10FE7D for ; Fri, 19 Apr 2024 12:12:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1713528723; x=1745064723; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=NZaTNeJcXOkhnAwaHLtOdLSVnG7Bq4AkouN775+s504=; b=hJAD+v1kuTM2nh8EkMaMyCsaMDQRjMMi6riOQ0aR0HaHfiMaU9repX0h 5YzIJNGGLdtLDQnCNa8/QPzcmYWCe8E+fDzkeqaRUr2PbhjpIs/OmuLiC a4kQdzm8iFksajTQjSsRoM/GlU82TNj24xJ06IKDai/T3WIHBxYhoxKGx eJjEYdbKUrCWmdn9skB71gtDoE05fDpex69KChA94FNnJ39SdS52uP9js UHY1ZbSDTeJHPQa3y/ZcHbazPlpo4TOYV4wgtwBeqA2qQnIk9ACxw5uMS LTcKeOdKcdwewSPrej8KsWCXEsI6QNfzgIVB9Of7BrcQvhHhlool3FBDT w==; X-CSE-ConnectionGUID: MpCuF4rqSqC/Y+E0OLgR0Q== X-CSE-MsgGUID: Lkli5+4HT0qAjSyzXLEzfQ== X-IronPort-AV: E=McAfee;i="6600,9927,11047"; a="19735927" X-IronPort-AV: E=Sophos;i="6.07,213,1708416000"; d="scan'208";a="19735927" Received: from orviesa004.jf.intel.com ([10.64.159.144]) by fmvoesa105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Apr 2024 05:12:03 -0700 X-CSE-ConnectionGUID: Bfx57rSFST+Q2N8UmH49UQ== X-CSE-MsgGUID: bZSxhq5GSnKSrnVD9F8grA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,213,1708416000"; d="scan'208";a="28149513" Received: from mkuznet1-mobl2.ger.corp.intel.com (HELO jhogande-mobl1.intel.com) ([10.252.63.13]) by orviesa004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Apr 2024 05:12:02 -0700 From: =?utf-8?q?Jouni_H=C3=B6gander?= To: intel-gfx@lists.freedesktop.org Cc: Animesh Manna , =?utf-8?q?Jouni_H=C3=B6gander?= Subject: [PATCH v7 05/11] drm/i915/psr: Detect panel replay selective update support Date: Fri, 19 Apr 2024 15:11:35 +0300 Message-Id: <20240419121141.2665945-6-jouni.hogander@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240419121141.2665945-1-jouni.hogander@intel.com> References: <20240419121141.2665945-1-jouni.hogander@intel.com> MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Add new boolean to store panel replay selective update support of sink into intel_psr struct. Detect panel replay selective update support and store it into this new boolean. v3: Clear sink_panel_replay_su_support in intel_dp_detect v2: Merge adding new boolean into this patch Signed-off-by: Jouni Högander --- drivers/gpu/drm/i915/display/intel_display_types.h | 1 + drivers/gpu/drm/i915/display/intel_dp.c | 1 + drivers/gpu/drm/i915/display/intel_psr.c | 10 ++++++++-- 3 files changed, 10 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h index 150e6c8e0320..a693728f8344 100644 --- a/drivers/gpu/drm/i915/display/intel_display_types.h +++ b/drivers/gpu/drm/i915/display/intel_display_types.h @@ -1719,6 +1719,7 @@ struct intel_psr { u16 su_y_granularity; bool source_panel_replay_support; bool sink_panel_replay_support; + bool sink_panel_replay_su_support; bool panel_replay_enabled; u32 dc3co_exitline; u32 dc3co_exit_delay; diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 3dd5e6238ca2..7e97a92509d1 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -5862,6 +5862,7 @@ intel_dp_detect(struct drm_connector *connector, memset(&intel_dp->compliance, 0, sizeof(intel_dp->compliance)); memset(intel_connector->dp.dsc_dpcd, 0, sizeof(intel_connector->dp.dsc_dpcd)); intel_dp->psr.sink_panel_replay_support = false; + intel_dp->psr.sink_panel_replay_su_support = false; intel_dp_mst_disconnect(intel_dp); diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index af18728460c9..b94f8e33ed1f 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -520,9 +520,15 @@ static void _panel_replay_init_dpcd(struct intel_dp *intel_dp) return; } - drm_dbg_kms(&i915->drm, - "Panel replay is supported by panel\n"); intel_dp->psr.sink_panel_replay_support = true; + + if (pr_dpcd & DP_PANEL_REPLAY_SU_SUPPORT) + intel_dp->psr.sink_panel_replay_su_support = true; + + drm_dbg_kms(&i915->drm, + "Panel replay %sis supported by panel\n", + intel_dp->psr.sink_panel_replay_su_support ? + "selective_update " : ""); } static void _psr_init_dpcd(struct intel_dp *intel_dp) From patchwork Fri Apr 19 12:11:36 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Hogander, Jouni" X-Patchwork-Id: 13636331 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8F3C9C071DB for ; Fri, 19 Apr 2024 12:12:11 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B4C4910FE95; Fri, 19 Apr 2024 12:12:10 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="Qttxbi3G"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.11]) by gabe.freedesktop.org (Postfix) with ESMTPS id 183F510FE80 for ; Fri, 19 Apr 2024 12:12:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1713528725; x=1745064725; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=fkV/5twY6uJVtp92CwnPAjreTXVkNWH5NcLkvNmP3dU=; b=Qttxbi3GZBrIKyLQX2gs64K7lXI9Oj9Ph0RZSZZtyMoCrYbjJgueiyw5 MIxi0nvaxFQkxlyBsIvi3+27rKrRCqd/zAmZQZH5ylk97VuEgzgSmaSKv NcqEFT59+Rha7CWYOE+qxDMAahBKuRlcrEbr5EnOQkktmUGGTlBSpxOHW Yf/U3XVjSc4REDNei9UyBJz0a2gW58U6gfKcruimzQErbFNEl5VmBaNIn Bu4kkGha7ENqt7Cl1EqWiEXbuDX8D7iwbWNH8Zmmse2ryuPOMDDy9W+Y2 yqD3sY5DyWu9D6Fkruy6ipxXH+QgKXSGNgkbFTmBgtaWOovF9Y5kIiBlL A==; X-CSE-ConnectionGUID: dNrFJ1wISdiSvOWCW2xCsw== X-CSE-MsgGUID: Mr8tcS7FTrqTKVcqt8r8HA== X-IronPort-AV: E=McAfee;i="6600,9927,11047"; a="19735931" X-IronPort-AV: E=Sophos;i="6.07,213,1708416000"; d="scan'208";a="19735931" Received: from orviesa004.jf.intel.com ([10.64.159.144]) by fmvoesa105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Apr 2024 05:12:05 -0700 X-CSE-ConnectionGUID: QVOzSBU9SCOKENAWCUL3mg== X-CSE-MsgGUID: +ZWk1ruVTz61vXWu1aMg6w== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,213,1708416000"; d="scan'208";a="28149527" Received: from mkuznet1-mobl2.ger.corp.intel.com (HELO jhogande-mobl1.intel.com) ([10.252.63.13]) by orviesa004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Apr 2024 05:12:04 -0700 From: =?utf-8?q?Jouni_H=C3=B6gander?= To: intel-gfx@lists.freedesktop.org Cc: Animesh Manna , =?utf-8?q?Jouni_H=C3=B6gander?= Subject: [PATCH v7 06/11] drm/i915/psr: Modify intel_dp_get_su_granularity to support panel replay Date: Fri, 19 Apr 2024 15:11:36 +0300 Message-Id: <20240419121141.2665945-7-jouni.hogander@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240419121141.2665945-1-jouni.hogander@intel.com> References: <20240419121141.2665945-1-jouni.hogander@intel.com> MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Currently intel_dp_get_su_granularity doesn't support panel replay. This fix modifies it to support panel replay as well. v2: rely on PSR definitions on common bits Signed-off-by: Jouni Högander Reviewed-by: Animesh Manna --- drivers/gpu/drm/i915/display/intel_psr.c | 62 +++++++++++++++++++++--- 1 file changed, 55 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index b94f8e33ed1f..29400fac13c2 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -466,6 +466,40 @@ static u8 intel_dp_get_sink_sync_latency(struct intel_dp *intel_dp) return val; } +static u8 intel_dp_get_su_capability(struct intel_dp *intel_dp) +{ + u8 su_capability; + + if (intel_dp->psr.sink_panel_replay_su_support) + drm_dp_dpcd_read(&intel_dp->aux, + DP_PANEL_PANEL_REPLAY_X_GRANULARITY, + &su_capability, 1); + else + su_capability = intel_dp->psr_dpcd[1]; + + return su_capability; +} + +static unsigned int +intel_dp_get_su_x_granularity_offset(struct intel_dp *intel_dp) +{ + return intel_dp->psr.sink_panel_replay_su_support ? + DP_PANEL_PANEL_REPLAY_X_GRANULARITY : + DP_PSR2_SU_X_GRANULARITY; +} + +static unsigned int +intel_dp_get_su_y_granularity_offset(struct intel_dp *intel_dp) +{ + return intel_dp->psr.sink_panel_replay_su_support ? + DP_PANEL_PANEL_REPLAY_Y_GRANULARITY : + DP_PSR2_SU_Y_GRANULARITY; +} + +/* + * Note: Bits related to granularity are same in panel replay and psr + * registers. Rely on PSR definitions on these "common" bits. + */ static void intel_dp_get_su_granularity(struct intel_dp *intel_dp) { struct drm_i915_private *i915 = dp_to_i915(intel_dp); @@ -473,18 +507,29 @@ static void intel_dp_get_su_granularity(struct intel_dp *intel_dp) u16 w; u8 y; - /* If sink don't have specific granularity requirements set legacy ones */ - if (!(intel_dp->psr_dpcd[1] & DP_PSR2_SU_GRANULARITY_REQUIRED)) { + /* + * TODO: Do we need to take into account panel supporting both PSR and + * Panel replay? + */ + + /* + * If sink don't have specific granularity requirements set legacy + * ones. + */ + if (!(intel_dp_get_su_capability(intel_dp) & + DP_PSR2_SU_GRANULARITY_REQUIRED)) { /* As PSR2 HW sends full lines, we do not care about x granularity */ w = 4; y = 4; goto exit; } - r = drm_dp_dpcd_read(&intel_dp->aux, DP_PSR2_SU_X_GRANULARITY, &w, 2); + r = drm_dp_dpcd_read(&intel_dp->aux, + intel_dp_get_su_x_granularity_offset(intel_dp), + &w, 2); if (r != 2) drm_dbg_kms(&i915->drm, - "Unable to read DP_PSR2_SU_X_GRANULARITY\n"); + "Unable to read selective update x granularity\n"); /* * Spec says that if the value read is 0 the default granularity should * be used instead. @@ -492,10 +537,12 @@ static void intel_dp_get_su_granularity(struct intel_dp *intel_dp) if (r != 2 || w == 0) w = 4; - r = drm_dp_dpcd_read(&intel_dp->aux, DP_PSR2_SU_Y_GRANULARITY, &y, 1); + r = drm_dp_dpcd_read(&intel_dp->aux, + intel_dp_get_su_y_granularity_offset(intel_dp), + &y, 1); if (r != 1) { drm_dbg_kms(&i915->drm, - "Unable to read DP_PSR2_SU_Y_GRANULARITY\n"); + "Unable to read selective update y granularity\n"); y = 4; } if (y == 0) @@ -588,7 +635,8 @@ void intel_psr_init_dpcd(struct intel_dp *intel_dp) if (intel_dp->psr_dpcd[0]) _psr_init_dpcd(intel_dp); - if (intel_dp->psr.sink_psr2_support) + if (intel_dp->psr.sink_psr2_support || + intel_dp->psr.sink_panel_replay_su_support) intel_dp_get_su_granularity(intel_dp); } From patchwork Fri Apr 19 12:11:37 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Hogander, Jouni" X-Patchwork-Id: 13636330 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id AE4D2C4345F for ; Fri, 19 Apr 2024 12:12:10 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 2B29910FE9E; Fri, 19 Apr 2024 12:12:10 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="YJ2ZY0T2"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.11]) by gabe.freedesktop.org (Postfix) with ESMTPS id B542C10FE7D for ; Fri, 19 Apr 2024 12:12:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1713528727; x=1745064727; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Q80L49HuZKt8oIRud33K9U3ZtIN3iqwe9gb4GLAE/Ho=; b=YJ2ZY0T27lPcaWftp6ZPBMdaMgSB8NaTXY4N/G5d+Hz6AfCgOuGZX9CD uLgi4vQCznU/ZeoeJA0ERBmAzpnQwrjpbvoDmIFl7rtsCw20z27PNAwLv ppNlBinzaLth09EblyePhGXz6ogHuhwUwUeSV0w1qclebQZtqs6mJp/4z 3ecWGDyqv2Hxppb7pndOqsp1UnRWUI9o0FwG5Elo9RRmn+qYLjvWuzM7t aJkVQj7QWF2Xm6uEy8RR+Gd5L7oSpDYBBKPzIipptcKTmSbcbfBsUXC2G krtQzc0mHI7s6qzASsph40pNy2TOXgzkN68bkAayVBfdlZjfaeIQ+rWME g==; X-CSE-ConnectionGUID: FS8z58u+QsSfAayMJuntRQ== X-CSE-MsgGUID: KBw78KhgQpWrciHbaGFlfA== X-IronPort-AV: E=McAfee;i="6600,9927,11047"; a="19735935" X-IronPort-AV: E=Sophos;i="6.07,213,1708416000"; d="scan'208";a="19735935" Received: from orviesa004.jf.intel.com ([10.64.159.144]) by fmvoesa105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Apr 2024 05:12:07 -0700 X-CSE-ConnectionGUID: yI8WMOP+SRuEq5Ht4Yq9SQ== X-CSE-MsgGUID: Aybc10gBQGem/JPhI5wTNw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,213,1708416000"; d="scan'208";a="28149538" Received: from mkuznet1-mobl2.ger.corp.intel.com (HELO jhogande-mobl1.intel.com) ([10.252.63.13]) by orviesa004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Apr 2024 05:12:05 -0700 From: =?utf-8?q?Jouni_H=C3=B6gander?= To: intel-gfx@lists.freedesktop.org Cc: Animesh Manna , =?utf-8?q?Jouni_H=C3=B6gander?= Subject: [PATCH v7 07/11] drm/i915/psr: Panel replay uses SRD_STATUS to track it's status Date: Fri, 19 Apr 2024 15:11:37 +0300 Message-Id: <20240419121141.2665945-8-jouni.hogander@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240419121141.2665945-1-jouni.hogander@intel.com> References: <20240419121141.2665945-1-jouni.hogander@intel.com> MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" DP Panel replay uses SRD_STATUS to track it's status despite selective update mode. Bspec: 53370, 68920 v3: - do not use PSR2_STATUS for PSR1 v2: - use intel_dp_is_edp to differentiate - modify debugfs status as well Signed-off-by: Jouni Högander --- drivers/gpu/drm/i915/display/intel_psr.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index 29400fac13c2..7631aad5ee7a 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -2860,7 +2860,8 @@ void intel_psr_wait_for_idle_locked(const struct intel_crtc_state *new_crtc_stat if (!intel_dp->psr.enabled) continue; - if (intel_dp->psr.sel_update_enabled) + if (intel_dp_is_edp(intel_dp) && + intel_dp->psr.sel_update_enabled) ret = _psr2_ready_for_pipe_update_locked(intel_dp); else ret = _psr1_ready_for_pipe_update_locked(intel_dp); @@ -2881,7 +2882,8 @@ static bool __psr_wait_for_idle_locked(struct intel_dp *intel_dp) if (!intel_dp->psr.enabled) return false; - if (intel_dp->psr.sel_update_enabled) { + if (!intel_dp->psr.panel_replay_enabled && + intel_dp->psr.sel_update_enabled) { reg = EDP_PSR2_STATUS(cpu_transcoder); mask = EDP_PSR2_STATUS_STATE_MASK; } else { @@ -3500,7 +3502,7 @@ psr_source_status(struct intel_dp *intel_dp, struct seq_file *m) const char *status = "unknown"; u32 val, status_val; - if (intel_dp->psr.sel_update_enabled) { + if (intel_dp_is_edp(intel_dp) && intel_dp->psr.sel_update_enabled) { static const char * const live_status[] = { "IDLE", "CAPTURE", From patchwork Fri Apr 19 12:11:38 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Hogander, Jouni" X-Patchwork-Id: 13636332 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 257CEC04FFE for ; Fri, 19 Apr 2024 12:12:12 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 09B2C10FEAA; Fri, 19 Apr 2024 12:12:11 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="g5of5RYb"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.11]) by gabe.freedesktop.org (Postfix) with ESMTPS id 5F4E210FE80 for ; Fri, 19 Apr 2024 12:12:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1713528728; x=1745064728; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Em+8ydcxC325PRRoZZ1c0Ymp/jXmenvQ0S4zZfD6GfU=; b=g5of5RYbWsl8r+mA8iOHO247s4JRBQpnyTVQv6R/6wv3lPAVwwL0zHjI Tn1ADH75w7XwqaGzAAr2tVl1bqM8PPMnn8S/w2M/Y/fSpm8+EBixys+kg dLMxDS78NxxJ91SzJFhw/iGesxe8ncWkOnH5sgPLeWQsqG9M8EHSoSXoJ SbrM1Nli/eYPGto2USQIa/0uGPz8HkAvJHnDZxdg/4nDbDDT2JJ2+Qpiu S1XsbVULphEHHsw+SooxDH5qI1l7/7A9S0eFeALYnR+dON7maLgvXKSB4 HnDhRRL8smpGxBffNL0XnujITlbTYCuNO28rz5/JdcsS/lAhz3Ma22rJ/ w==; X-CSE-ConnectionGUID: pstDWwTSRo6vYUNWw5z3Yg== X-CSE-MsgGUID: l3beJP/MTYWT0yMCAAHsCg== X-IronPort-AV: E=McAfee;i="6600,9927,11047"; a="19735937" X-IronPort-AV: E=Sophos;i="6.07,213,1708416000"; d="scan'208";a="19735937" Received: from orviesa004.jf.intel.com ([10.64.159.144]) by fmvoesa105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Apr 2024 05:12:08 -0700 X-CSE-ConnectionGUID: ZdLvSjRUTpOyOHrigXCNAA== X-CSE-MsgGUID: f33hVFT0TQeNTdfVYC5jaQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,213,1708416000"; d="scan'208";a="28149555" Received: from mkuznet1-mobl2.ger.corp.intel.com (HELO jhogande-mobl1.intel.com) ([10.252.63.13]) by orviesa004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Apr 2024 05:12:07 -0700 From: =?utf-8?q?Jouni_H=C3=B6gander?= To: intel-gfx@lists.freedesktop.org Cc: Animesh Manna , =?utf-8?q?Jouni_H=C3=B6gander?= Subject: [PATCH v7 08/11] drm/i915/psr: Do not apply workarounds in case of panel replay Date: Fri, 19 Apr 2024 15:11:38 +0300 Message-Id: <20240419121141.2665945-9-jouni.hogander@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240419121141.2665945-1-jouni.hogander@intel.com> References: <20240419121141.2665945-1-jouni.hogander@intel.com> MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" There are some workarounds that are not applicable for panel replay. Do not apply these if panel replay is used. Bspec: 66624, 50422 Signed-off-by: Jouni Högander --- drivers/gpu/drm/i915/display/intel_fbc.c | 5 +++-- drivers/gpu/drm/i915/display/intel_hdmi.c | 3 ++- drivers/gpu/drm/i915/display/intel_psr.c | 16 ++++++++++------ 3 files changed, 15 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c index 5bfce36fb892..555058c0a1dc 100644 --- a/drivers/gpu/drm/i915/display/intel_fbc.c +++ b/drivers/gpu/drm/i915/display/intel_fbc.c @@ -1250,7 +1250,8 @@ static int intel_fbc_check_plane(struct intel_atomic_state *state, * Recommendation is to keep this combination disabled * Bspec: 50422 HSD: 14010260002 */ - if (IS_DISPLAY_VER(i915, 12, 14) && crtc_state->has_sel_update) { + if (IS_DISPLAY_VER(i915, 12, 14) && crtc_state->has_sel_update && + !crtc_state->has_panel_replay) { plane_state->no_fbc_reason = "PSR2 enabled"; return 0; } @@ -1258,7 +1259,7 @@ static int intel_fbc_check_plane(struct intel_atomic_state *state, /* Wa_14016291713 */ if ((IS_DISPLAY_VER(i915, 12, 13) || IS_DISPLAY_IP_STEP(i915, IP_VER(14, 0), STEP_A0, STEP_C0)) && - crtc_state->has_psr) { + crtc_state->has_psr && !crtc_state->has_panel_replay) { plane_state->no_fbc_reason = "PSR1 enabled (Wa_14016291713)"; return 0; } diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c index 5f6deceaf8ba..0faf2afa1c09 100644 --- a/drivers/gpu/drm/i915/display/intel_hdmi.c +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c @@ -532,7 +532,8 @@ void hsw_write_infoframe(struct intel_encoder *encoder, 0); /* Wa_14013475917 */ - if (!(IS_DISPLAY_VER(dev_priv, 13, 14) && crtc_state->has_psr && type == DP_SDP_VSC)) + if (!(IS_DISPLAY_VER(dev_priv, 13, 14) && crtc_state->has_psr && + !crtc_state->has_panel_replay && type == DP_SDP_VSC)) val |= hsw_infoframe_enable(type); if (type == DP_SDP_VSC) diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index 7631aad5ee7a..bfdef79010c5 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -1959,13 +1959,15 @@ static void intel_psr_enable_source(struct intel_dp *intel_dp, * All supported adlp panels have 1-based X granularity, this may * cause issues if non-supported panels are used. */ - if (IS_DISPLAY_IP_STEP(dev_priv, IP_VER(14, 0), STEP_A0, STEP_B0) || - IS_ALDERLAKE_P(dev_priv)) + if (!intel_dp->psr.panel_replay_enabled && + (IS_DISPLAY_IP_STEP(dev_priv, IP_VER(14, 0), STEP_A0, STEP_B0) || + IS_ALDERLAKE_P(dev_priv))) intel_de_rmw(dev_priv, hsw_chicken_trans_reg(dev_priv, cpu_transcoder), 0, ADLP_1_BASED_X_GRANULARITY); /* Wa_16012604467:adlp,mtl[a0,b0] */ - if (IS_DISPLAY_IP_STEP(dev_priv, IP_VER(14, 0), STEP_A0, STEP_B0)) + if (!intel_dp->psr.panel_replay_enabled && + IS_DISPLAY_IP_STEP(dev_priv, IP_VER(14, 0), STEP_A0, STEP_B0)) intel_de_rmw(dev_priv, MTL_CLKGATE_DIS_TRANS(cpu_transcoder), 0, MTL_CLKGATE_DIS_TRANS_DMASC_GATING_DIS); @@ -2141,7 +2143,8 @@ static void intel_psr_disable_locked(struct intel_dp *intel_dp) if (intel_dp->psr.sel_update_enabled) { /* Wa_16012604467:adlp,mtl[a0,b0] */ - if (IS_DISPLAY_IP_STEP(dev_priv, IP_VER(14, 0), STEP_A0, STEP_B0)) + if (!intel_dp->psr.panel_replay_enabled && + IS_DISPLAY_IP_STEP(dev_priv, IP_VER(14, 0), STEP_A0, STEP_B0)) intel_de_rmw(dev_priv, MTL_CLKGATE_DIS_TRANS(cpu_transcoder), MTL_CLKGATE_DIS_TRANS_DMASC_GATING_DIS, 0); @@ -2627,8 +2630,9 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state, goto skip_sel_fetch_set_loop; /* Wa_14014971492 */ - if ((IS_DISPLAY_IP_STEP(dev_priv, IP_VER(14, 0), STEP_A0, STEP_B0) || - IS_ALDERLAKE_P(dev_priv) || IS_TIGERLAKE(dev_priv)) && + if (!crtc_state->has_panel_replay && + ((IS_DISPLAY_IP_STEP(dev_priv, IP_VER(14, 0), STEP_A0, STEP_B0) || + IS_ALDERLAKE_P(dev_priv) || IS_TIGERLAKE(dev_priv))) && crtc_state->splitter.enable) crtc_state->psr2_su_area.y1 = 0; From patchwork Fri Apr 19 12:11:39 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Hogander, Jouni" X-Patchwork-Id: 13636335 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2C81FC4345F for ; Fri, 19 Apr 2024 12:12:21 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B4CFD10FE85; Fri, 19 Apr 2024 12:12:20 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="QRSUgWZv"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.11]) by gabe.freedesktop.org (Postfix) with ESMTPS id 0CBF410FE94 for ; Fri, 19 Apr 2024 12:12:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1713528730; x=1745064730; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=ZOHk+n0Ai8GxQXDuQLUOo51yweQAEWezxTQXMdQl15E=; b=QRSUgWZvtgCW+UHhwTijAQ3Iru8NTGfkuI8xE13wCe/A8A6KgI0tA+TK KYZtnZ2lynPt0RGGrAnd0VEcC/pNPSjGAsD9dihIQsemf5jvNlxIfbek6 0bX8shRbE8ojI/9GEhwZ9bu7p+eWYsuBbG/NzO6TWPOmvnR4bCuHf8ldD TcLWZGkNQwfnjpWhe4aodQKONOUcCWFDdkcI/mNkIVdIPSCxSZgm478Hf FXBxKBctsxoDa4K7cXIP/dC/1hDlxB63OOP0qdkkjpRJAWyZtip3rhXsm 9JyqBP9S4hLnLaxfutEsw8IuhLT6fSwBROUt2twfDE2F0ghZp67HSj3Fx w==; X-CSE-ConnectionGUID: tx07om5nQAqsvNTJIbLnmQ== X-CSE-MsgGUID: mNSEbCYCRs2vLF+mZgS4mA== X-IronPort-AV: E=McAfee;i="6600,9927,11047"; a="19735939" X-IronPort-AV: E=Sophos;i="6.07,213,1708416000"; d="scan'208";a="19735939" Received: from orviesa004.jf.intel.com ([10.64.159.144]) by fmvoesa105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Apr 2024 05:12:10 -0700 X-CSE-ConnectionGUID: asJAbOeNSuGdKhHy8K55Rw== X-CSE-MsgGUID: uqOWVu7yRParUA5Rv5fxqw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,213,1708416000"; d="scan'208";a="28149560" Received: from mkuznet1-mobl2.ger.corp.intel.com (HELO jhogande-mobl1.intel.com) ([10.252.63.13]) by orviesa004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Apr 2024 05:12:09 -0700 From: =?utf-8?q?Jouni_H=C3=B6gander?= To: intel-gfx@lists.freedesktop.org Cc: Animesh Manna , =?utf-8?q?Jouni_H=C3=B6gander?= Subject: [PATCH v7 09/11] drm/i915/psr: Update PSR module parameter descriptions Date: Fri, 19 Apr 2024 15:11:39 +0300 Message-Id: <20240419121141.2665945-10-jouni.hogander@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240419121141.2665945-1-jouni.hogander@intel.com> References: <20240419121141.2665945-1-jouni.hogander@intel.com> MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" We are re-using PSR module parameters for panel replay. Update module parameter descriptions with panel replay information: enable_psr: -1 (default) == follow what is in VBT 0 == disable PSR/PR 1 == Allow PSR1 and PR full frame update 2 == allow PSR1/PSR2 and PR Selective Update enable_psr2_sel_fetch 0 == disable selective fetch for PSR and PR 1 (default) == allow selective fetch for PSR PR Signed-off-by: Jouni Högander Reviewed-by: Animesh Manna --- drivers/gpu/drm/i915/display/intel_display_params.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c index f40b223cc8a1..2c96656dc4c9 100644 --- a/drivers/gpu/drm/i915/display/intel_display_params.c +++ b/drivers/gpu/drm/i915/display/intel_display_params.c @@ -102,7 +102,8 @@ intel_display_param_named_unsafe(enable_fbc, int, 0400, intel_display_param_named_unsafe(enable_psr, int, 0400, "Enable PSR " - "(0=disabled, 1=enable up to PSR1, 2=enable up to PSR2) " + "(0=disabled, 1=enable up to PSR1 and Panel Replay full frame update, " + "2=enable up to PSR2 and Panel Replay Selective Update) " "Default: -1 (use per-chip default)"); intel_display_param_named(psr_safest_params, bool, 0400, @@ -112,7 +113,7 @@ intel_display_param_named(psr_safest_params, bool, 0400, "Default: 0"); intel_display_param_named_unsafe(enable_psr2_sel_fetch, bool, 0400, - "Enable PSR2 selective fetch " + "Enable PSR2 and Panel Replay selective fetch " "(0=disabled, 1=enabled) " "Default: 1"); From patchwork Fri Apr 19 12:11:40 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Hogander, Jouni" X-Patchwork-Id: 13636334 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1EE87C04FFE for ; Fri, 19 Apr 2024 12:12:17 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8CDE710FE84; Fri, 19 Apr 2024 12:12:16 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="EpPaE45H"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.11]) by gabe.freedesktop.org (Postfix) with ESMTPS id BD81610FE84 for ; Fri, 19 Apr 2024 12:12:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1713528732; x=1745064732; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=m/z8dB4V+Z+baHMGfu3qeJeT9cbs5Q4+Q9/nw7itoW8=; b=EpPaE45HT0Z0iS5DoEbDCoeMfTNGxcwKcxhbdbFrgebwZt3YpygexsvH 7r21tLZuqpD6u+8b8J2wxs1+j6I72lLHIMxrmOQ0HTSxI19Yj+apTaZCh t8PYZXZVLShEGuWRt9HzOt9/g26avx2yUwbZWgw3p+jNTPIR31K2JPZB6 yJw7lRFnGZGa8hPG/JcFl7SZ4MnYuGkCAPhOPDpWMtEomhVTyXuy32+ft DQqN0Ngcf54oGh5ifslG9pXsR3QYSfV6uec1gcMTfXL6fBWrfDrNEgldR 3H5phNWTGyhSgQmsR45qXPSfn9uHcAPXaCfzTM2a8Eyl4ZgJFbsdPu5Sj w==; X-CSE-ConnectionGUID: VqPgrf8mRv+vpaN8CZxxQA== X-CSE-MsgGUID: Q2DWFw6QRNad+VO3+QikAg== X-IronPort-AV: E=McAfee;i="6600,9927,11047"; a="19735951" X-IronPort-AV: E=Sophos;i="6.07,213,1708416000"; d="scan'208";a="19735951" Received: from orviesa004.jf.intel.com ([10.64.159.144]) by fmvoesa105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Apr 2024 05:12:12 -0700 X-CSE-ConnectionGUID: 2ng97BDRQUKQ9uAVs5FYVQ== X-CSE-MsgGUID: nP39YIucR1ezh23x4I5/VA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,213,1708416000"; d="scan'208";a="28149569" Received: from mkuznet1-mobl2.ger.corp.intel.com (HELO jhogande-mobl1.intel.com) ([10.252.63.13]) by orviesa004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Apr 2024 05:12:10 -0700 From: =?utf-8?q?Jouni_H=C3=B6gander?= To: intel-gfx@lists.freedesktop.org Cc: Animesh Manna , =?utf-8?q?Jouni_H=C3=B6gander?= Subject: [PATCH v7 10/11] drm/i915/psr: Split intel_psr2_config_valid for panel replay Date: Fri, 19 Apr 2024 15:11:40 +0300 Message-Id: <20240419121141.2665945-11-jouni.hogander@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240419121141.2665945-1-jouni.hogander@intel.com> References: <20240419121141.2665945-1-jouni.hogander@intel.com> MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Part of intel_psr2_config_valid is valid for panel replay. rename it as intel_sel_update_config_valid. Split psr2 specific part and name it as intel_psr2_config_valid. v3: - move early transport check to psr2 specific check - check intel_psr2_config_valid only for non-Panel Replay case v2: - use psr2_global_enabled for panel replay as well - goto unsupported instead of return when global enabled check fails Signed-off-by: Jouni Högander --- drivers/gpu/drm/i915/display/intel_psr.c | 76 ++++++++++++++---------- 1 file changed, 46 insertions(+), 30 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index bfdef79010c5..cfeacce27544 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -1142,9 +1142,6 @@ static bool intel_psr2_sel_fetch_config_valid(struct intel_dp *intel_dp, return false; } - if (psr2_su_region_et_valid(intel_dp)) - crtc_state->enable_psr2_su_region_et = true; - return crtc_state->enable_psr2_sel_fetch = true; } @@ -1515,11 +1512,6 @@ static bool intel_psr2_config_valid(struct intel_dp *intel_dp, return false; } - if (!psr2_global_enabled(intel_dp)) { - drm_dbg_kms(&dev_priv->drm, "PSR2 disabled by flag\n"); - return false; - } - /* * DSC and PSR2 cannot be enabled simultaneously. If a requested * resolution requires DSC to be enabled, priority is given to DSC @@ -1532,12 +1524,6 @@ static bool intel_psr2_config_valid(struct intel_dp *intel_dp, return false; } - if (crtc_state->crc_enabled) { - drm_dbg_kms(&dev_priv->drm, - "PSR2 not enabled because it would inhibit pipe CRC calculation\n"); - return false; - } - if (DISPLAY_VER(dev_priv) >= 12) { psr_max_h = 5120; psr_max_v = 3200; @@ -1588,30 +1574,60 @@ static bool intel_psr2_config_valid(struct intel_dp *intel_dp, return false; } - if (HAS_PSR2_SEL_FETCH(dev_priv)) { - if (!intel_psr2_sel_fetch_config_valid(intel_dp, crtc_state) && - !HAS_PSR_HW_TRACKING(dev_priv)) { - drm_dbg_kms(&dev_priv->drm, - "PSR2 not enabled, selective fetch not valid and no HW tracking available\n"); - return false; - } - } - - if (!psr2_granularity_check(intel_dp, crtc_state)) { - drm_dbg_kms(&dev_priv->drm, "PSR2 not enabled, SU granularity not compatible\n"); - goto unsupported; - } - if (!crtc_state->enable_psr2_sel_fetch && (crtc_hdisplay > psr_max_h || crtc_vdisplay > psr_max_v)) { drm_dbg_kms(&dev_priv->drm, "PSR2 not enabled, resolution %dx%d > max supported %dx%d\n", crtc_hdisplay, crtc_vdisplay, psr_max_h, psr_max_v); - goto unsupported; + return false; } tgl_dc3co_exitline_compute_config(intel_dp, crtc_state); + + if (psr2_su_region_et_valid(intel_dp)) + crtc_state->enable_psr2_su_region_et = true; + + return true; +} + +static bool intel_sel_update_config_valid(struct intel_dp *intel_dp, + struct intel_crtc_state *crtc_state) +{ + struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); + + if (HAS_PSR2_SEL_FETCH(dev_priv) && + !intel_psr2_sel_fetch_config_valid(intel_dp, crtc_state) && + !HAS_PSR_HW_TRACKING(dev_priv)) { + drm_dbg_kms(&dev_priv->drm, + "Selective update not enabled, selective fetch not valid and no HW tracking available\n"); + goto unsupported; + } + + if (!psr2_global_enabled(intel_dp)) { + drm_dbg_kms(&dev_priv->drm, "Selective update disabled by flag\n"); + goto unsupported; + } + + if (!crtc_state->has_panel_replay && !intel_psr2_config_valid(intel_dp, crtc_state)) + goto unsupported; + + if (crtc_state->has_panel_replay && (DISPLAY_VER(dev_priv) < 14 || + !intel_dp->psr.sink_panel_replay_su_support)) + goto unsupported; + + if (crtc_state->crc_enabled) { + drm_dbg_kms(&dev_priv->drm, + "Selective update not enabled because it would inhibit pipe CRC calculation\n"); + goto unsupported; + } + + if (!psr2_granularity_check(intel_dp, crtc_state)) { + drm_dbg_kms(&dev_priv->drm, + "Selective update not enabled, SU granularity not compatible\n"); + goto unsupported; + } + return true; unsupported: @@ -1693,7 +1709,7 @@ void intel_psr_compute_config(struct intel_dp *intel_dp, if (!crtc_state->has_psr) return; - crtc_state->has_sel_update = intel_psr2_config_valid(intel_dp, crtc_state); + crtc_state->has_sel_update = intel_sel_update_config_valid(intel_dp, crtc_state); } void intel_psr_get_config(struct intel_encoder *encoder, From patchwork Fri Apr 19 12:11:41 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Hogander, Jouni" X-Patchwork-Id: 13636333 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 79D73C4345F for ; Fri, 19 Apr 2024 12:12:16 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id D589F10FE7D; Fri, 19 Apr 2024 12:12:15 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="YU4euZsB"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.11]) by gabe.freedesktop.org (Postfix) with ESMTPS id 9CF2910FE80 for ; Fri, 19 Apr 2024 12:12:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1713528734; x=1745064734; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=GOgeoM2qYDVQ4MgcwHlk5DU/bk8umQFq7pjanEUCtig=; b=YU4euZsBvxKHb+SgeddU074ip11hgUKl/HEHukk+NXZ1HkvbPSOw4Db5 PK3Ifpn578azDiWSyifmHVLeC7NiVciY7qbX1qqlCnpR5BqoP/DRjVllg I4G9/bOLd4mJvEAccUyIPHb7m/CX2ysIQ5BBkoY22WuvjLiuoUe3KpFi/ T2FZrZUy6H0I8MUiaglSrI4BV3a43oF2GeJyAJRCwm7QoSu+2cSKR07j8 CVk+kFZg4cUl4BUIUfC2hI0NTmCerM1ko7+JNRY7IsyTxbmUO8kojRWcd IdMTuANZJShh1LQ2sQzV+yNlpn6qXphdQeHejDRF191ilQcvMe1dDwB1T A==; X-CSE-ConnectionGUID: TDvtU7STTyC1lwe+4vTK1Q== X-CSE-MsgGUID: O+g0Uxg5SSuppzkgfJNXQA== X-IronPort-AV: E=McAfee;i="6600,9927,11047"; a="19735961" X-IronPort-AV: E=Sophos;i="6.07,213,1708416000"; d="scan'208";a="19735961" Received: from orviesa004.jf.intel.com ([10.64.159.144]) by fmvoesa105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Apr 2024 05:12:13 -0700 X-CSE-ConnectionGUID: e+Du67AeQyallKP/jYBMYw== X-CSE-MsgGUID: YkU//ydjRJ2IJrUIhVG1KQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,213,1708416000"; d="scan'208";a="28149586" Received: from mkuznet1-mobl2.ger.corp.intel.com (HELO jhogande-mobl1.intel.com) ([10.252.63.13]) by orviesa004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Apr 2024 05:12:12 -0700 From: =?utf-8?q?Jouni_H=C3=B6gander?= To: intel-gfx@lists.freedesktop.org Cc: Animesh Manna , =?utf-8?q?Jouni_H=C3=B6gander?= , Kunal Joshi Subject: [PATCH v7 11/11] drm/i915/psr: Add panel replay sel update support to debugfs interface Date: Fri, 19 Apr 2024 15:11:41 +0300 Message-Id: <20240419121141.2665945-12-jouni.hogander@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240419121141.2665945-1-jouni.hogander@intel.com> References: <20240419121141.2665945-1-jouni.hogander@intel.com> MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Add panel replay selective update support to debugfs status interface. In case of sink supporting panel replay we will print out: Sink support: PSR = no, Panel Replay = yes, Panel Replay Selective Update = yes and PSR mode will look like this if printing out enabled panel replay selective update: PSR mode: Panel Replay Selective Update Enabled Current PSR and panel replay printouts remain same. Cc: Kunal Joshi Signed-off-by: Jouni Högander --- drivers/gpu/drm/i915/display/intel_psr.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index cfeacce27544..dab8ba0fc762 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -3575,7 +3575,9 @@ static int intel_psr_status(struct seq_file *m, struct intel_dp *intel_dp) if (psr->sink_support) seq_printf(m, " [0x%02x]", intel_dp->psr_dpcd[0]); - seq_printf(m, ", Panel Replay = %s\n", str_yes_no(psr->sink_panel_replay_support)); + seq_printf(m, ", Panel Replay = %s", str_yes_no(psr->sink_panel_replay_support)); + seq_printf(m, ", Panel Replay Selective Update = %s\n", + str_yes_no(psr->sink_panel_replay_su_support)); if (!(psr->sink_support || psr->sink_panel_replay_support)) return 0; @@ -3584,9 +3586,10 @@ static int intel_psr_status(struct seq_file *m, struct intel_dp *intel_dp) mutex_lock(&psr->lock); if (psr->panel_replay_enabled) - status = "Panel Replay Enabled"; + status = psr->sel_update_enabled ? "Panel Replay Selective Update Enabled" : + "Panel Replay Enabled"; else if (psr->enabled) - status = psr->sel_update_enabled ? "PSR2 enabled" : "PSR1 enabled"; + status = psr->sel_update_enabled ? "PSR2" : "PSR1"; else status = "disabled"; seq_printf(m, "PSR mode: %s\n", status);