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Add new properties to set pin polarity: - adi,led-polarity: LED_0 is used as hardware configuration signal during reset. Depending on external voltage on the line default value is either active-high (0) or active-low (1). - adi,link-st-polarity: LINK_ST is always active-high (0) after reset. Signed-off-by: Josua Mayer --- Documentation/devicetree/bindings/net/adi,adin.yaml | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/Documentation/devicetree/bindings/net/adi,adin.yaml b/Documentation/devicetree/bindings/net/adi,adin.yaml index 929cf8c0b0fd..ff9262dc69f9 100644 --- a/Documentation/devicetree/bindings/net/adi,adin.yaml +++ b/Documentation/devicetree/bindings/net/adi,adin.yaml @@ -52,6 +52,24 @@ properties: description: Enable 25MHz reference clock output on CLK25_REF pin. type: boolean + adi,led-polarity: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + LED_0 pin polarity. If unspecified keep phy reset-default derived + from hardware configuration pins. + enum: + - 0 # active high + - 1 # active low + + adi,link-st-polarity: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + LINK_ST pin polarity. + enum: + - 0 # active high + - 1 # active low + default: 0 + unevaluatedProperties: false examples: From patchwork Fri Apr 19 15:35:18 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Josua Mayer X-Patchwork-Id: 13636529 X-Patchwork-Delegate: kuba@kernel.org Received: from EUR03-DBA-obe.outbound.protection.outlook.com (mail-dbaeur03on2095.outbound.protection.outlook.com [40.107.104.95]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EB976130494; Fri, 19 Apr 2024 15:35:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=40.107.104.95 ARC-Seal: i=2; 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Configure the polarity during probe based on device-tree properties. Led polarity is only set if specified in device-tree, otherwise the phy can choose either active-low or active-high based on external line voltage. Link-status polarity is set to active-high as default if not specified, which is always the reset-default. Signed-off-by: Josua Mayer --- drivers/net/phy/adin.c | 53 ++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 53 insertions(+) diff --git a/drivers/net/phy/adin.c b/drivers/net/phy/adin.c index 2e1a46e121d9..53159dea6381 100644 --- a/drivers/net/phy/adin.c +++ b/drivers/net/phy/adin.c @@ -114,6 +114,9 @@ #define ADIN1300_CDIAG_FLT_DIST(x) (0xba21 + (x)) +#define ADIN1300_LED_A_INV_EN_REG 0xbc01 +#define ADIN1300_LED_A_INV_EN BIT(0) + #define ADIN1300_GE_SOFT_RESET_REG 0xff0c #define ADIN1300_GE_SOFT_RESET BIT(0) @@ -158,6 +161,9 @@ #define ADIN1300_RMII_20_BITS 0x0004 #define ADIN1300_RMII_24_BITS 0x0005 +#define ADIN1300_GE_LNK_STAT_INV_EN_REG 0xff3c +#define ADIN1300_GE_LNK_STAT_INV_EN BIT(0) + /** * struct adin_cfg_reg_map - map a config value to aregister value * @cfg: value in device configuration @@ -522,6 +528,49 @@ static int adin_config_clk_out(struct phy_device *phydev) ADIN1300_GE_CLK_CFG_MASK, sel); } +static int adin_config_pin_polarity(struct phy_device *phydev) +{ + struct device *dev = &phydev->mdio.dev; + int ret; + u32 val; + + /* set led polarity, if property present */ + if (device_property_present(dev, "adi,led-polarity")) { + ret = device_property_read_u32(dev, "adi,led-polarity", &val); + if (ret) { + return ret; + } else if (val > 1) { + phydev_err(phydev, "invalid adi,led-polarity\n"); + return -EINVAL; + } + + ret = phy_modify_mmd(phydev, MDIO_MMD_VEND1, + ADIN1300_LED_A_INV_EN_REG, + ADIN1300_LED_A_INV_EN, val); + if (ret) + return ret; + } + + /* set link-status polarity, default to active-high (0) */ + if (device_property_present(dev, "adi,link-st-polarity")) { + ret = device_property_read_u32(dev, "adi,link-st-polarity", &val); + if (ret) { + return ret; + } else if (val > 1) { + phydev_err(phydev, "invalid adi,link-st-polarity\n"); + return -EINVAL; + } + } else { + val = 0; + } + + ret = phy_modify_mmd(phydev, MDIO_MMD_VEND1, + ADIN1300_GE_LNK_STAT_INV_EN_REG, + ADIN1300_GE_LNK_STAT_INV_EN, val); + + return ret; +} + static int adin_config_init(struct phy_device *phydev) { int rc; @@ -548,6 +597,10 @@ static int adin_config_init(struct phy_device *phydev) if (rc < 0) return rc; + rc = adin_config_pin_polarity(phydev); + if (rc < 0) + return rc; + phydev_dbg(phydev, "PHY is using mode '%s'\n", phy_modes(phydev->interface));