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Fri, 19 Apr 2024 22:43:49 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by SN1PEPF000252A1.mail.protection.outlook.com (10.167.242.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.7452.22 via Frontend Transport; Fri, 19 Apr 2024 22:43:49 +0000 Received: from tr4.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Fri, 19 Apr 2024 17:43:48 -0500 From: Alex Deucher To: , , , CC: Alex Deucher Subject: [pull] amdgpu, amdkfd, radeon drm-next-6.10 Date: Fri, 19 Apr 2024 18:43:32 -0400 Message-ID: <20240419224332.2938259-1-alexander.deucher@amd.com> X-Mailer: git-send-email 2.44.0 MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF000252A1:EE_|SJ2PR12MB8061:EE_ X-MS-Office365-Filtering-Correlation-Id: b8c43a0d-b833-48ea-810c-08dc60c22e01 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 Apr 2024 22:43:49.0915 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: b8c43a0d-b833-48ea-810c-08dc60c22e01 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF000252A1.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ2PR12MB8061 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Hi Dave, Sima, More new stuff for 6.10. The following changes since commit ab956ed95b8bc4a65c913d7057075866d5fc3724: drm/amd/display: Add a function for checking tmds mode (2024-04-12 00:36:47 -0400) are available in the Git repository at: https://gitlab.freedesktop.org/agd5f/linux.git tags/amd-drm-next-6.10-2024-04-19 for you to fetch changes up to 81bf14519a8ca17af4f057a125d87fabbae90af3: drm/amdkfd: make sure VM is ready for updating operations (2024-04-18 23:54:49 -0400) ---------------------------------------------------------------- amd-drm-next-6.10-2024-04-19: amdgpu: - DC resource allocation logic updates - DC IPS fixes - DC YUV fixes - DMCUB fixes - DML2 fixes - Devcoredump updates - USB-C DSC fix - Misc display code cleanups - PSR fixes - MES timeout fix - RAS updates - UAF fix in VA IOCTL - Fix visible VRAM handling during faults - Fix IP discovery handling during PCI rescans - Misc code cleanups - PSP 14 updates - More runtime PM code rework - SMU 14.0.2 support - GPUVM page fault redirection to secondary IH rings for IH 6.x - Suspend/resume fixes - SR-IOV fixes amdkfd: - Fix eviction fence handling - Fix leak in GPU memory allocation failure case - DMABuf import handling fix radeon: - Silence UBSAN warnings related to flexible arrays ---------------------------------------------------------------- Ahmad Rehman (1): drm/amdgpu: Skip the coredump collection on reset during driver reload Alex Deucher (4): drm/amdgpu/gfx11: properly handle regGRBM_GFX_CNTL in soft reset Revert "drm/amd/display: fix USB-C flag update after enc10 feature init" drm/radeon: make -fstrict-flex-arrays=3 happy drm/radeon: silence UBSAN warning (v3) Anthony Koo (1): drm/amd/display: Expand dmub_cmd operations Aric Cyr (1): drm/amd/display: 3.2.281 Chaitanya Dhere (1): drm/amd/display: Fix incorrect pointer assignment Charlene Liu (1): drm/amd/display: limit the code change to ips enabled asic Christian König (1): drm/amdgpu: fix visible VRAM handling during faults Eric Bernstein (1): drm/amd/display: Update FMT settings for 4:2:0 Ethan Bitnun (1): drm/amd/display: Improve the log precision Felix Kuehling (1): drm/amdkfd: Fix eviction fence handling Hawking Zhang (3): drm/amdgpu: Load ipkeymgr drv for psp v14 drm/amdgpu: rename DBG_DRV to HAD_DRV for psp v14 drm/amdgpu: Use driver mode reset for data poison Jonathan Kim (1): drm/amdgpu: increase mes submission timeout Joshua Ashton (1): drm/amd/display: Set color_mgmt_changed to true on unsuspend Kenneth Feng (4): drm/amd/swsmu: add smu14 ip support drm/amd/swsmu: add smu14 driver if file drm/amd/swsmu: add smu v14_0_2 ppsmc file drm/amd/swsmu: support smu block discovery for smu v14 Lang Yu (1): drm/amdkfd: make sure VM is ready for updating operations Lijo Lazar (1): drm/amdgpu: Change AID detection logic Likun Gao (3): drm/amd/swsmu: add pptable header for smu v14_0_2 drm/amd/swsmu: add smu v14_0_2 support drm/amd/swsmu: support SMU_14_0_2 ppt_funcs Ma Jun (2): drm/amdgpu: Fix discovery initialization failure during pci rescan drm/amdgpu: refactoring the runtime pm mode detection code Mikita Lipski (1): drm/amd/display: Fix PSR command version passed Mukul Joshi (1): drm/amdgpu: Fix leak when GPU memory allocation fails Nicholas Kazlauskas (1): drm/amd/display: Pass sequential ONO bit to DMCUB boot options Rodrigo Siqueira (12): drm/amd/display: Use dce_version instead of chip_id drm/amd/display: Adjust headers drm/amd/display: Group scl_data together in resource_build_scaling_params drm/amd/display: Replace int with unsigned int drm/amd/display: Update some comments to improve the code readability drm/amd/display: Remove unnecessary code drm/amd/display: Rework dcn10_stream_encoder header drm/amd/display: Move REG sequence from program ogam to idle before connect drm/amd/display: Update DCN201 link encoder registers drm/amd/display: Add missing callback for init_watermarks in DCN 301 drm/amd/display: Add missing replay field Revert "drm/amd/display: Enable cur_rom_en even if cursor degamma is not enabled" Samson Tam (1): drm/amd/display: add support for chroma offset Sung Joon Kim (3): drm/amd/display: Modify resource allocation logic drm/amd/display: Enable Z10 flag for IPS FSM drm/amd/display: Rework power sequence and resource allocation logic Sunil Khatri (6): drm/amdgpu: add missing vbios version from devcoredump drm:amdgpu: enable IH RB ring1 for IH v6.0 drm:amdgpu: enable IH ring1 for IH v6.1 drm/amdgpu: add IH_RING1_CFG headers for IH v6.0 drm/amdgpu: enable redirection of irq's for IH V6.0 drm/amdgpu: enable redirection of irq's for IH V6.1 Thorsten Blum (1): drm/amdgpu: Add missing space to DRM_WARN() message Yang Wang (1): drm/amdgpu: add new aca smu callback func parse_error_code() Zhigang Luo (1): drm/amdgpu: remove virt_init_data_exchange from poison consumption handler xinhui pan (1): drm/amdgpu: validate the parameters of bo mapping operations more clearly drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 + drivers/gpu/drm/amd/amdgpu/amdgpu_aca.c | 23 +- drivers/gpu/drm/amd/amdgpu/amdgpu_aca.h | 1 + drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c | 35 +- drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 2 +- drivers/gpu/drm/amd/amdgpu/amdgpu_dev_coredump.c | 9 +- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 84 +- drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 19 +- drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 1 + drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 48 +- drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 22 +- drivers/gpu/drm/amd/amdgpu/amdgpu_object.h | 22 - drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 15 + drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h | 9 +- drivers/gpu/drm/amd/amdgpu/amdgpu_reset.h | 1 + drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 61 +- drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h | 3 + drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h | 1 + drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 72 +- drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c | 6 +- drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 15 +- drivers/gpu/drm/amd/amdgpu/ih_v6_0.c | 26 +- drivers/gpu/drm/amd/amdgpu/ih_v6_1.c | 26 +- drivers/gpu/drm/amd/amdgpu/mes_v11_0.c | 2 +- drivers/gpu/drm/amd/amdgpu/mxgpu_nv.c | 2 - drivers/gpu/drm/amd/amdgpu/psp_v14_0.c | 8 +- drivers/gpu/drm/amd/amdkfd/kfd_int_process_v9.c | 27 +- drivers/gpu/drm/amd/amdkfd/kfd_process.c | 9 +- drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 10 + drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c | 2 +- .../amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c | 3 +- drivers/gpu/drm/amd/display/dc/core/dc.c | 8 +- drivers/gpu/drm/amd/display/dc/core/dc_resource.c | 5 +- drivers/gpu/drm/amd/display/dc/core/dc_state.c | 10 +- drivers/gpu/drm/amd/display/dc/core/dc_stream.c | 2 +- drivers/gpu/drm/amd/display/dc/dc.h | 16 +- drivers/gpu/drm/amd/display/dc/dc_hw_types.h | 7 + drivers/gpu/drm/amd/display/dc/dc_types.h | 2 + drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.c | 6 - .../drm/amd/display/dc/dcn10/dcn10_link_encoder.h | 6 - drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.c | 9 +- drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.h | 2 + .../amd/display/dc/dcn10/dcn10_stream_encoder.h | 10 +- drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.h | 2 +- drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mpc.c | 10 +- .../gpu/drm/amd/display/dc/dcn201/dcn201_hubp.c | 5 + .../amd/display/dc/dcn201/dcn201_link_encoder.h | 14 +- drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dccg.h | 18 - .../display/dc/dcn30/dcn30_dio_stream_encoder.c | 1 - drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dwb.c | 2 - .../gpu/drm/amd/display/dc/dcn301/dcn301_hubbub.c | 1 + .../amd/display/dc/dcn32/dcn32_dio_link_encoder.c | 8 +- .../amd/display/dc/dcn35/dcn35_dio_link_encoder.c | 4 +- .../gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c | 4 +- .../drm/amd/display/dc/hwss/dcn351/dcn351_init.c | 8 +- .../amd/display/dc/resource/dcn32/dcn32_resource.c | 4 +- .../amd/display/dc/resource/dcn32/dcn32_resource.h | 6 + .../display/dc/resource/dcn351/dcn351_resource.c | 5 +- drivers/gpu/drm/amd/display/dmub/dmub_srv.h | 1 + drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 53 +- drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.c | 1 + .../amd/include/asic_reg/oss/osssys_6_0_0_offset.h | 4 + .../include/asic_reg/oss/osssys_6_0_0_sh_mask.h | 10 + drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 5 + .../pm/swsmu/inc/pmfw_if/smu14_driver_if_v14_0.h | 1836 ++++++++++++++++++++ .../amd/pm/swsmu/inc/pmfw_if/smu_v14_0_2_ppsmc.h | 140 ++ drivers/gpu/drm/amd/pm/swsmu/inc/smu_v14_0.h | 5 +- .../gpu/drm/amd/pm/swsmu/inc/smu_v14_0_2_pptable.h | 164 ++ .../gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c | 13 + drivers/gpu/drm/amd/pm/swsmu/smu14/Makefile | 2 +- drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0.c | 117 +- .../gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c | 1796 +++++++++++++++++++ .../gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.h | 28 + drivers/gpu/drm/radeon/pptable.h | 10 +- drivers/gpu/drm/radeon/radeon_atombios.c | 8 +- 75 files changed, 4589 insertions(+), 344 deletions(-) create mode 100644 drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu14_driver_if_v14_0.h create mode 100644 drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v14_0_2_ppsmc.h create mode 100644 drivers/gpu/drm/amd/pm/swsmu/inc/smu_v14_0_2_pptable.h create mode 100644 drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c create mode 100644 drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.h