From patchwork Mon Apr 22 08:33:11 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 13637897 Received: from mail-wm1-f49.google.com (mail-wm1-f49.google.com [209.85.128.49]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8ECDA44C84 for ; Mon, 22 Apr 2024 08:33:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.49 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713774800; cv=none; b=VfBmH4Ny+2TWncu9O6DLW0KiNaDTtKctOuAm4RSYP8hxE5l9LYbyXUjH5H+hAp8IRJKok/5DMrdEd1/5vOKAzBU8N+bsZVCNLp6+Q+n5JYA/638zzcfz3mV+SNYn+GMx/vQeuFbUismZ5IJu5rD9Vo1BcPX3gjkGPlVsXfjGBd0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713774800; c=relaxed/simple; bh=1bqm37cHBp77XacdQMnUI5xOez5SEa+Brh+86TcfY3k=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=UD783UNaXFOTwsqQU7oqxQAUpJFAXKHuNkNpSZlnConVw9piFVa+nZiR4FhMe5h3Qbi+WMAQxMTL8Flx083Ioh/6hf18+a8aKmF0UrQk7vsWM6ZqiCwT2c8imw/ml0ftW+Z1oD+6H2UczgAzaTZ5LUr+hQjCWSOBMMwmFwRYF/8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=Wfu7hjzv; arc=none smtp.client-ip=209.85.128.49 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="Wfu7hjzv" Received: by mail-wm1-f49.google.com with SMTP id 5b1f17b1804b1-41a70466b77so2734325e9.0 for ; Mon, 22 Apr 2024 01:33:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1713774796; x=1714379596; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=LbaftYc/ei4oHUBSrTKOEB6H45OgBK8ia0PvwI9H3VM=; b=Wfu7hjzvwJ8ncJbK6t+XkaiKI6Ud9a3SPi8kiCROo5yVNK4+kH32uS9VCW+PY8AQ+C D/7+UddUoePs4f5lLVJfTFbkxXFxeZg0zLypZD2UTOOVMtVsdnnR2VDGSE2iYGPdq73N AX/b0oKkQiSbyzX3uzjSDbyeD11joR5YkpSa0o55Q+LGbC1stLRu7eQgaGVb5xsfJloc J6to9DLmpoA8HUdNyGpJN5SLpnUK3mbumw0yNwQoN59+iUClNjjnSNgutJuvayRIuG2n Ael1fYI4G1I7GQinaxikP3tKWc9Rg8uVR7dj1+mzUOqz145nb8uL1TBH7BzanlqfHl7D 3UdQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1713774796; x=1714379596; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=LbaftYc/ei4oHUBSrTKOEB6H45OgBK8ia0PvwI9H3VM=; b=eHFednro1pBhXc0KSbfIiMi3eb3u3caf8TfwJPfnRF0N9JTgLjohcwSDZa0gtNocSM J5RPQWNkv3VOI1vXwGHWjzdeHkT3qQPWez5abMrXj06pXXBTaTuzKW8ktMIQuBPpRibw iuR/1rMe7NCwMMRyw0Ve588MgF4x07p+b0pX+6cgNhWga4dU3fqZjJrl+kcCciOlQL+n m3Nk4FP/eQQFt4+tAU9mpG1g1zyPAIqlMOndDt+ILuKTsMFES3roP/+vdmMXBlvBtsHb zWVem/nn5DUjQgyRWgpYwOY09D1cwKI4/Q9ltu1ufCpbMd8vn7ZGW/a9Bla/UWjatKNU 8BLw== X-Gm-Message-State: AOJu0YxI5r0gnhafnwyyOqMgEYJdEeHU1gh/aJHqO1I0logWH+S88kTJ rdBc0OwmqbRCOeIJVhZ81yZQEAmsVKFPfb1QCY80/BYJ9Jxpj8guSFuTluRAWg8= X-Google-Smtp-Source: AGHT+IFicJC7O9U8o8rAx4zgXVTbsVkwjy+Gj1FuHZ9l8m1zL6WLESNfZCg+Bhih6Vkw9yAbP5NU8g== X-Received: by 2002:a05:600c:19c6:b0:418:ec7a:4493 with SMTP id u6-20020a05600c19c600b00418ec7a4493mr8915365wmq.12.1713774795471; Mon, 22 Apr 2024 01:33:15 -0700 (PDT) Received: from arrakeen.starnux.net ([2a01:e0a:982:cbb0:8261:5fff:fe11:bdda]) by smtp.gmail.com with ESMTPSA id j19-20020a05600c1c1300b004161bffa48csm15978786wms.40.2024.04.22.01.33.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Apr 2024 01:33:15 -0700 (PDT) From: Neil Armstrong Date: Mon, 22 Apr 2024 10:33:11 +0200 Subject: [PATCH v3 1/3] arm64: dts: qcom: sm8450: remove pcie-1-phy-aux-clk and add pcie1_phy pcie1_phy_aux_clk Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240422-topic-sm8x50-upstream-pcie-1-phy-aux-clk-v3-1-799475a27cce@linaro.org> References: <20240422-topic-sm8x50-upstream-pcie-1-phy-aux-clk-v3-0-799475a27cce@linaro.org> In-Reply-To: <20240422-topic-sm8x50-upstream-pcie-1-phy-aux-clk-v3-0-799475a27cce@linaro.org> To: Bjorn Andersson , Konrad Dybcio , Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Krzysztof Kozlowski Cc: linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Neil Armstrong , Dmitry Baryshkov X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=1175; i=neil.armstrong@linaro.org; h=from:subject:message-id; bh=1bqm37cHBp77XacdQMnUI5xOez5SEa+Brh+86TcfY3k=; b=owEBbAKT/ZANAwAKAXfc29rIyEnRAcsmYgBmJiDI6pxVr0gA/n+E41e6tENZ2BTnQpZZk0QoVMZe ZjN5DHCJAjIEAAEKAB0WIQQ9U8YmyFYF/h30LIt33NvayMhJ0QUCZiYgyAAKCRB33NvayMhJ0UsFD/ dXgjhQb2AfQt7uk4tf71uWR5pq4c4HxdkCK+T30MKoFhN40JukvMNWTm2Lo8HrG+eCQ3lvabXVPli4 2YFizwjobRbZc1yQ5zikDLllpW0YFlc7Uq1Ng6N6neQl9ibqZYnk5S2EqaOPSzup10SOznaDAfFNlt R8KRdBPgbULrpUNi5BPHRs2SKPhXY8Qsu+znuW24+zCNu5/Bax2PIjXQyS2OqPauw6+Z8lMu2bTgM0 hpXwnLQ6R42uzPbictmvD1kzY2MEYxScvb62DrdW8yKyjBpXet0GOZ5o12lvKmp0THX2HM8bKDc7EV M0WXrB/pxYMuBvWRxgElS/EFxbbJb+1/+BJxRATX3c23DjiDGb4bi8ZV+n7jsQU3Ia8r12p89NH0Ka kvcsq2MDJXQAQ1hOQTR/hbQJGjw/GXfTqvkfsCeNVqq3Jzp2suRwRKiOg5BaGEciCqZSgI8jJwD0mg SDX6ifm9jqyu8ji97Bl/+Ug7JmlDVP+D93tPbbWpTPRRT2ff1vogKnt9GBQzPxOls6gUIgfryGiULl ix3gHppYOZjrSpjMMhbuM1JwY7NyZG9dH0JnPM3aq2R7psmoKOiXyUWTcdio7IVa3TeoOdaSz2LUnK r3KQVDFaE1DeCnIYn8jU9EULmiSaGJuO7eHfI7dhAcvzxCtURp5zagHZvQ X-Developer-Key: i=neil.armstrong@linaro.org; a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE Remove the dummy pcie-1-phy-aux-clk clock and replace with the pcie1_phy provided QMP_PCIE_PHY_AUX_CLK. Reviewed-by: Dmitry Baryshkov Signed-off-by: Neil Armstrong --- arch/arm64/boot/dts/qcom/sm8450.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi index 616461fcbab9..71797f337d19 100644 --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi @@ -754,8 +754,8 @@ gcc: clock-controller@100000 { clocks = <&rpmhcc RPMH_CXO_CLK>, <&sleep_clk>, <&pcie0_phy>, - <&pcie1_phy>, - <0>, + <&pcie1_phy QMP_PCIE_PIPE_CLK>, + <&pcie1_phy QMP_PCIE_PHY_AUX_CLK>, <&ufs_mem_phy 0>, <&ufs_mem_phy 1>, <&ufs_mem_phy 2>, @@ -2000,8 +2000,8 @@ pcie1_phy: phy@1c0e000 { "rchng", "pipe"; - clock-output-names = "pcie_1_pipe_clk"; - #clock-cells = <0>; + clock-output-names = "pcie_1_pipe_clk", "pcie_1_phy_aux_clk"; + #clock-cells = <1>; #phy-cells = <0>; From patchwork Mon Apr 22 08:33:12 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 13637899 Received: from mail-wm1-f48.google.com (mail-wm1-f48.google.com [209.85.128.48]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3A828482C1 for ; Mon, 22 Apr 2024 08:33:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.48 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713774801; cv=none; b=I5I7cmhe7xKO3B/Y0d4t+QnZx2GVYLoCtp2LOg/tnwe0V4ptm/7/N255WFMJrgAO9WLbJ+GLC+lAEKPfLD9N3PnWIjk/pOHsWTNpK+CYgGEIzbujfVNyP4NtOkME/FdQcSxIikdJ4CcWWbjc/2FR/C25VXUFu8vvRIwSS6OuI/8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713774801; c=relaxed/simple; bh=/XAPDMkZMT1mZ9FOhnEUgwml1nugoL+UQJKgB4y595o=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=L3lsaSCWUXI/FERL0M6lo/71HrOuGWBKeI5giIvOKJpaRuLf3rp5684UFARa15TA7OhOS7LFAq7SpfiIbGEc4vv/2F2ZFROWtbOnI3fGTkyqPN8Cx3cCW4joeB/HSUh2zqWn8vC1NL/hyOqC5tEL3PL2hbzScY4iJbIzwdwLREo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=wXJ+saew; arc=none smtp.client-ip=209.85.128.48 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="wXJ+saew" Received: by mail-wm1-f48.google.com with SMTP id 5b1f17b1804b1-41a7b6f22ebso2933105e9.0 for ; Mon, 22 Apr 2024 01:33:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1713774796; x=1714379596; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=E+2buCEoaK85v2L3RrMSrTLmmbAA6+KMzzn+JIjinZ8=; b=wXJ+saewc48YfF2sQBglG+JKFHi0WZnE5DLIKEAymsZPFw0YAAeYJeP0neJdT52Ngw 9p+bx3WuAidJEPMEpy+V93ST2bNn9ZUJ1AkvfASgkC92McWzVQ/HNtR2usIaDcwX1y7y 3mMrCj0pmw4vjpU+eBor7w80xaDEkUX60tOpo8vtqgjncXrGe2Ylr22GAQH4Op+hAI7s a44xcoS9iJJUWOWrH/ivNCTmEouZ1c5HHJ3VxZEc/GiTpN7XKfWPtOi/bTjQ/t03SbZy zSzr8XIpHXmrukRYT+JCxOJGewyB09JToft3WhIuNs57nTfq3rUGET5cA++FewbQu0CO 4fuQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1713774796; x=1714379596; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=E+2buCEoaK85v2L3RrMSrTLmmbAA6+KMzzn+JIjinZ8=; b=ET6cpK/7iteQ6uia/Qz70cS6nY2piEjucSHmM69GPIoGbkGzcEzR+e/tPYvgeI7DE3 xJeV6peH5ghpxgPSCgx88jFgG0NewNkY0KTOu/vNCJuP2syZFmAuv3uZihSkTeKYnSkl fUUXR3euNpzsIN7OB+P4tAR+c6hdjKtdsG+36whXxG7h1VYorAeGg0inzhlOoyb3mYfJ 5FW/S96kmw3UufdQ9gH9v84AVjcK2ox17BJ1yFwynJ9JMgM8tAakv77eUBb/fxhCg15w 1TMQiNeNRO3rK7W2e2aCBPwHziR1cXTrQCISQOuJtbet5Gb7YAq/t+/MmwHcP/qb0tKv HL/w== X-Gm-Message-State: AOJu0YxyXFVhbtkhGEIJxgn/jbSIY81a+95YiMxxyncKA2MfAviVUu+Y tJCxH+QQVv6d0AEe0a8K+67y8fVGcDTwfohzCB9NqNZmFwhaF2Q5RQB3wC/mTTs= X-Google-Smtp-Source: AGHT+IEgr7AtR5kDCO971CSg++/mcgo/iZQ4+3qL3bk2pCiVRwD9RxQhUdjpZ8H7bWEG/ngb4hoL3w== X-Received: by 2002:a05:600c:3ca1:b0:419:f3fa:23ef with SMTP id bg33-20020a05600c3ca100b00419f3fa23efmr4167711wmb.25.1713774796370; Mon, 22 Apr 2024 01:33:16 -0700 (PDT) Received: from arrakeen.starnux.net ([2a01:e0a:982:cbb0:8261:5fff:fe11:bdda]) by smtp.gmail.com with ESMTPSA id j19-20020a05600c1c1300b004161bffa48csm15978786wms.40.2024.04.22.01.33.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Apr 2024 01:33:16 -0700 (PDT) From: Neil Armstrong Date: Mon, 22 Apr 2024 10:33:12 +0200 Subject: [PATCH v3 2/3] arm64: dts: qcom: sm8550: remove pcie-1-phy-aux-clk and add pcie1_phy pcie1_phy_aux_clk Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240422-topic-sm8x50-upstream-pcie-1-phy-aux-clk-v3-2-799475a27cce@linaro.org> References: <20240422-topic-sm8x50-upstream-pcie-1-phy-aux-clk-v3-0-799475a27cce@linaro.org> In-Reply-To: <20240422-topic-sm8x50-upstream-pcie-1-phy-aux-clk-v3-0-799475a27cce@linaro.org> To: Bjorn Andersson , Konrad Dybcio , Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Krzysztof Kozlowski Cc: linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Neil Armstrong , Dmitry Baryshkov X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=3193; i=neil.armstrong@linaro.org; h=from:subject:message-id; bh=/XAPDMkZMT1mZ9FOhnEUgwml1nugoL+UQJKgB4y595o=; b=owEBbQKS/ZANAwAKAXfc29rIyEnRAcsmYgBmJiDIRKeRNA/WDMhtnMFoRtGB8wJy8e0uRvk3OXyG 7dOOQ6uJAjMEAAEKAB0WIQQ9U8YmyFYF/h30LIt33NvayMhJ0QUCZiYgyAAKCRB33NvayMhJ0UCAEA DHUtccp5Zt/hmVIaWMrasPeto2TCrvaYT0N62I/nfa2mUnUa9eu4WBOkhCSi6d8/Gw7YEp7h1KM/6u 1r0ttUSYdNtXIUPWG56Ku02CxF7rKMnAXo4qUoBxzZTNKa5vbzYDmZcwdgnTGhd6zk2GJXnjMnuvBv j8IzzPu9caCfKfylSj5GXCRmCW5erg14k4fLx2OQa6In6eUdTvErnHItUcXeNxmjP88p199tqMCvGi 7XR3m9i+j4GEMrDsHi7jzwZLRYIZAnWHR/PuuT7RdpTsihkOUzv+qiutZF6faQ9JINiaB7kJAHA270 XSuqygZS8QWuUXl9kppYb9MGpKVM+IeRuwbENpokKVy/B9Yb9VcaffRQ4RJ6++UhLerxRoLMCEfYj1 QgskyRD5mOQ5RG8NHQyOISXbYDKhdC6v7DJUz9knCOSCkMwkYT+kumwSkRrnnD+PkwpHd71VxYMUX/ KbNb1/RZBq0pRKtwjSue9cTHSnb7RR05CID3EnHqI5zEol1i49aqGY/HXisVYfRdmmUfjYZactTJGA LFmKD5nE310+AFayyB4E3yB691YQ5g2qZSij3qcR71ubCadyrKJmv7xRiHwIS0z+kehIHqWT37rJEI 542qa/74ktuBev/tL+3EkWXPkJvb2+zKakR1p99tN55rTMCg0jHEM2lUez3g== X-Developer-Key: i=neil.armstrong@linaro.org; a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE Remove the dummy pcie-1-phy-aux-clk clock and replace with the pcie1_phy provided QMP_PCIE_PHY_AUX_CLK. Reviewed-by: Dmitry Baryshkov Signed-off-by: Neil Armstrong --- arch/arm64/boot/dts/qcom/sm8550-hdk.dts | 4 ---- arch/arm64/boot/dts/qcom/sm8550-mtp.dts | 4 ---- arch/arm64/boot/dts/qcom/sm8550-qrd.dts | 8 -------- arch/arm64/boot/dts/qcom/sm8550.dtsi | 13 ++++--------- 4 files changed, 4 insertions(+), 25 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8550-hdk.dts b/arch/arm64/boot/dts/qcom/sm8550-hdk.dts index 12d60a0ee095..ccff744dcd14 100644 --- a/arch/arm64/boot/dts/qcom/sm8550-hdk.dts +++ b/arch/arm64/boot/dts/qcom/sm8550-hdk.dts @@ -979,10 +979,6 @@ &pcie1_phy { status = "okay"; }; -&pcie_1_phy_aux_clk { - clock-frequency = <1000>; -}; - &pm8550_gpios { sdc2_card_det_n: sdc2-card-det-state { pins = "gpio12"; diff --git a/arch/arm64/boot/dts/qcom/sm8550-mtp.dts b/arch/arm64/boot/dts/qcom/sm8550-mtp.dts index 3d4ad5aac70f..1fa7c4492057 100644 --- a/arch/arm64/boot/dts/qcom/sm8550-mtp.dts +++ b/arch/arm64/boot/dts/qcom/sm8550-mtp.dts @@ -739,10 +739,6 @@ &mdss_dp0_out { remote-endpoint = <&usb_dp_qmpphy_dp_in>; }; -&pcie_1_phy_aux_clk { - clock-frequency = <1000>; -}; - &pcie0 { wake-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>; perst-gpios = <&tlmm 94 GPIO_ACTIVE_LOW>; diff --git a/arch/arm64/boot/dts/qcom/sm8550-qrd.dts b/arch/arm64/boot/dts/qcom/sm8550-qrd.dts index 92f015017418..da3cfa697969 100644 --- a/arch/arm64/boot/dts/qcom/sm8550-qrd.dts +++ b/arch/arm64/boot/dts/qcom/sm8550-qrd.dts @@ -810,10 +810,6 @@ &mdss_dp0_out { remote-endpoint = <&usb_dp_qmpphy_dp_in>; }; -&pcie_1_phy_aux_clk { - status = "disabled"; -}; - &pcie0 { wake-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>; perst-gpios = <&tlmm 94 GPIO_ACTIVE_LOW>; @@ -907,10 +903,6 @@ &pon_resin { status = "okay"; }; -&pcie_1_phy_aux_clk { - clock-frequency = <1000>; -}; - &qupv3_id_0 { status = "okay"; }; diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi index bc5aeb05ffc3..143994d1e6ca 100644 --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi @@ -58,11 +58,6 @@ bi_tcxo_ao_div2: bi-tcxo-ao-div2-clk { clock-mult = <1>; clock-div = <2>; }; - - pcie_1_phy_aux_clk: pcie-1-phy-aux-clk { - compatible = "fixed-clock"; - #clock-cells = <0>; - }; }; cpus { @@ -776,8 +771,8 @@ gcc: clock-controller@100000 { #power-domain-cells = <1>; clocks = <&bi_tcxo_div2>, <&sleep_clk>, <&pcie0_phy>, - <&pcie1_phy>, - <&pcie_1_phy_aux_clk>, + <&pcie1_phy QMP_PCIE_PIPE_CLK>, + <&pcie1_phy QMP_PCIE_PHY_AUX_CLK>, <&ufs_mem_phy 0>, <&ufs_mem_phy 1>, <&ufs_mem_phy 2>, @@ -1928,8 +1923,8 @@ pcie1_phy: phy@1c0e000 { power-domains = <&gcc PCIE_1_PHY_GDSC>; - #clock-cells = <0>; - clock-output-names = "pcie1_pipe_clk"; + #clock-cells = <1>; + clock-output-names = "pcie1_pipe_clk", "pcie1_phy_aux_clk"; #phy-cells = <0>; From patchwork Mon Apr 22 08:33:13 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 13637898 Received: from mail-wm1-f47.google.com (mail-wm1-f47.google.com [209.85.128.47]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F399B502A8 for ; Mon, 22 Apr 2024 08:33:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.47 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713774800; cv=none; b=HvwlZ/GccvazRWIZefj69bzCB22SW/EjsHf1/nA0ohzC8WWGy5S6354EsrsHVftlWHBJ46YcNN6hakZ+6HCMWUJ7vhQQ7/tcJcgECy2wbT/F39K7BxrOwVLVjyzS5oWJMgnBZPq64FwE+RIXmNShG9FhAPgTSml6VQsD6jbTvg4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713774800; c=relaxed/simple; bh=zQpxV0djrOiwPxhRvSgIUZn7ViHWbqTnSNjH4kOd7u8=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=mf9kcrdfz8XD4Bb3BS9aXmKtXIa0laYSPc3dKrY/fSfXBj0jizpCEZsRmc5IEnysmG0SXjmDfhuFAShqnJtsP/fw6mCb2FJD3ZEI4/MHfKWUuSNeRziOt03IngvptCKsqQK2gSSwZ+wC4TSfe5Dpd92Hr0P61ZHeDBWLwXse1G4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=lE5pImXM; arc=none smtp.client-ip=209.85.128.47 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="lE5pImXM" Received: by mail-wm1-f47.google.com with SMTP id 5b1f17b1804b1-41a523e2888so4361575e9.1 for ; Mon, 22 Apr 2024 01:33:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1713774797; x=1714379597; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=cLRaymjKldV5Ae25ez2pVEwmOtAjv9LTg0zkuha6uuU=; b=lE5pImXMGTo1z3vo5l15XtNZZI26+ITwo5KUIxqgme1uMfSi0F4IWWh0h5MCdaZQ+P Pvleu4k9cZD8PIS8xz/Ed69HZz4GcpvkghBChSRJPisPQ1411sEmMnNWqxl3NjofgF6X odSp481+xX+miUfz6sN8D7Mg3a5NR1urcEon0A1kRWTbqY2ZLVHlsDLvexKZGo1ifAuf 2xMwVX2B/Pt76KzJvKdU8JGFgaozjhbzumq4kfFgmZARAT3/UDp0IbxqOz584MXh+8ON 9BzI7ClWclHi8S5xZuR5iWSdlg9IppP7NYkUn5o4pKUEDTFKKJqNI1cfZpSd3QpjtrUa O+4g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1713774797; x=1714379597; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=cLRaymjKldV5Ae25ez2pVEwmOtAjv9LTg0zkuha6uuU=; b=sCx5ZAGKHcS1P+A1ILKDttA+1ZtBhnROJ+laLrC+EMTuAT/wGEmqJhK2cRtiM3uNU8 ZYoqqnKuZxCWXMvklTx7+SJk3UwuiMEgya/PRV74+ajrh/1OSyx/sLAKju6lJrmFyxVL U31xlMkFmLrQ7X0laSwnNvJT3vC0UEgMTDzu7FXOjB0SKXcKuL/MIaLNHui4V1vSYLvX ddt5X2TcP4+Sff7tO+yDtRHrQLIZRDEOoLLvgU2BqQSCly0bsliNA5YFmK8fQLPYgvyM r8EMa0XZMvTFy4E6t8767apm+u6+kCouyGOiur9TCn+K6u6eNi8VhPPyCBkCbVYuU4lR l3Ug== X-Gm-Message-State: AOJu0Yy24j03tYaw5e8ujQGrKjCULyiJHQ6ien7LXgyE42OVvG7gCb3a PTB/KBpV9e7uzcVQ0zl1JJ0p8KQ3jZiDt9/jJAk92CtFz797e5jwWonQc+4AWz0= X-Google-Smtp-Source: AGHT+IFHAw4FMhpEGmtTQ4MMTPUbnYOSy9z5mJuHiv3zra6VJEyRQ6AFD+8qUVa54j5166hugk0F9w== X-Received: by 2002:a05:600c:c1a:b0:41a:68a5:b2c8 with SMTP id fm26-20020a05600c0c1a00b0041a68a5b2c8mr943929wmb.35.1713774797226; Mon, 22 Apr 2024 01:33:17 -0700 (PDT) Received: from arrakeen.starnux.net ([2a01:e0a:982:cbb0:8261:5fff:fe11:bdda]) by smtp.gmail.com with ESMTPSA id j19-20020a05600c1c1300b004161bffa48csm15978786wms.40.2024.04.22.01.33.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Apr 2024 01:33:16 -0700 (PDT) From: Neil Armstrong Date: Mon, 22 Apr 2024 10:33:13 +0200 Subject: [PATCH v3 3/3] arm64: dts: qcom: sm8650: remove pcie-1-phy-aux-clk and add pcie1_phy pcie1_phy_aux_clk Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240422-topic-sm8x50-upstream-pcie-1-phy-aux-clk-v3-3-799475a27cce@linaro.org> References: <20240422-topic-sm8x50-upstream-pcie-1-phy-aux-clk-v3-0-799475a27cce@linaro.org> In-Reply-To: <20240422-topic-sm8x50-upstream-pcie-1-phy-aux-clk-v3-0-799475a27cce@linaro.org> To: Bjorn Andersson , Konrad Dybcio , Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Krzysztof Kozlowski Cc: linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Neil Armstrong , Dmitry Baryshkov X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=2488; i=neil.armstrong@linaro.org; h=from:subject:message-id; bh=zQpxV0djrOiwPxhRvSgIUZn7ViHWbqTnSNjH4kOd7u8=; b=owEBbQKS/ZANAwAKAXfc29rIyEnRAcsmYgBmJiDJ9xmje0GQO+nI5+7LeLoATi+T2Zb/zhTy4IU2 sGW6a++JAjMEAAEKAB0WIQQ9U8YmyFYF/h30LIt33NvayMhJ0QUCZiYgyQAKCRB33NvayMhJ0X8BD/ 9yQh5mmI6X23M/e5p+c8PjwJeVfqTbT/t6SwpivBvytndYSZ5J4914WV5BC+c3zegKWfNTmpICsrEX 9p6wC4liG1cUo3Y25/lH8rvUMiKMLSlK01g6dd5gkNds+e54dTsa1Ca8EahAm+pxQF5jOxbssl/VTB +JWwgUIA5jdN1RnO+5ZPbaMF+blg+uJVk8lXAb8axKd3TfLiVtZ+ReUQtsHmw641U/ZT/lG6fZXu6A 34YJmKKD/u+Z18DmTVOCcb0TAkYkylPizUGsY5s1KW7GNtPldbg3vbinHgEe6OgCInkvcxqPrNh2Xx G1F3t8JFKIeBjFZWE2VSIMlUXb5kcfmnmpxRvHVfXqn2Y4lta1lV5BvbIRZKvucx6ffqyVB+aKEjMA 7cQYR7PSFbDyUW7ULg0s5L4IuYoZTIYf7lAohQSRgAlqxBoe+5QmVG/fbHj2YwGpzBcz26241ziaQl YABQD/wF8l6xo8maf/Vl/jNhdO3rgukn9R5awTQG788ccmEAMayprgsJbxl0zWNOUOve++wByjlLT4 wH4V2gdz4yR3nvnzqWTN2Pt+DxpcdEak2cnALMO0c8L4NhlS96AtrmvPcPKD8/LkuHZKWYchp1RgO0 bGbXVL0LXslZ+uwP48mJaHFOVkQQVIlVNYhmSEpDUxB6TpT1I9sNvCQEShNw== X-Developer-Key: i=neil.armstrong@linaro.org; a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE Remove the dummy pcie-1-phy-aux-clk clock and replace with the pcie1_phy provided QMP_PCIE_PHY_AUX_CLK. Reviewed-by: Dmitry Baryshkov Signed-off-by: Neil Armstrong --- arch/arm64/boot/dts/qcom/sm8650-mtp.dts | 4 ---- arch/arm64/boot/dts/qcom/sm8650-qrd.dts | 4 ---- arch/arm64/boot/dts/qcom/sm8650.dtsi | 13 ++++--------- 3 files changed, 4 insertions(+), 17 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8650-mtp.dts b/arch/arm64/boot/dts/qcom/sm8650-mtp.dts index d04ceaa73c2b..ea092f532e5a 100644 --- a/arch/arm64/boot/dts/qcom/sm8650-mtp.dts +++ b/arch/arm64/boot/dts/qcom/sm8650-mtp.dts @@ -641,10 +641,6 @@ &mdss_dsi0_phy { status = "okay"; }; -&pcie_1_phy_aux_clk { - clock-frequency = <1000>; -}; - &pcie0 { wake-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>; perst-gpios = <&tlmm 94 GPIO_ACTIVE_LOW>; diff --git a/arch/arm64/boot/dts/qcom/sm8650-qrd.dts b/arch/arm64/boot/dts/qcom/sm8650-qrd.dts index 4e94f7fe4d2d..bd87aa3aa548 100644 --- a/arch/arm64/boot/dts/qcom/sm8650-qrd.dts +++ b/arch/arm64/boot/dts/qcom/sm8650-qrd.dts @@ -835,10 +835,6 @@ &mdss_dp0_out { remote-endpoint = <&usb_dp_qmpphy_dp_in>; }; -&pcie_1_phy_aux_clk { - clock-frequency = <1000>; -}; - &pcie0 { wake-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>; perst-gpios = <&tlmm 94 GPIO_ACTIVE_LOW>; diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi index 8e0c1841f748..658ad2b41c5a 100644 --- a/arch/arm64/boot/dts/qcom/sm8650.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi @@ -60,11 +60,6 @@ bi_tcxo_ao_div2: bi-tcxo-ao-div2-clk { clock-mult = <1>; clock-div = <2>; }; - - pcie_1_phy_aux_clk: pcie-1-phy-aux-clk { - compatible = "fixed-clock"; - #clock-cells = <0>; - }; }; cpus { @@ -758,8 +753,8 @@ gcc: clock-controller@100000 { <&bi_tcxo_ao_div2>, <&sleep_clk>, <&pcie0_phy>, - <&pcie1_phy>, - <&pcie_1_phy_aux_clk>, + <&pcie1_phy QMP_PCIE_PIPE_CLK>, + <&pcie1_phy QMP_PCIE_PHY_AUX_CLK>, <&ufs_mem_phy 0>, <&ufs_mem_phy 1>, <&ufs_mem_phy 2>, @@ -2467,8 +2462,8 @@ pcie1_phy: phy@1c0e000 { power-domains = <&gcc PCIE_1_PHY_GDSC>; - #clock-cells = <0>; - clock-output-names = "pcie1_pipe_clk"; + #clock-cells = <1>; + clock-output-names = "pcie1_pipe_clk", "pcie1_phy_aux_clk"; #phy-cells = <0>;