From patchwork Fri Apr 26 10:07:10 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhao Liu X-Patchwork-Id: 13644484 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8B4E313FD7E for ; Fri, 26 Apr 2024 09:53:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714125198; cv=none; b=pemJjcs2CttWEfXOrmfQtXP4lKLt2IOZPQVUDV9qcb3W2ro3qf0ErJMWx6Ln83ZhSOB/QjdtIGEcBwHKmuROdn7v2UzpTLAKc3oInjoaooLJDH/JSFxcIL5tEMj+EyQjZ46i8eUXHr1/6X4VstCqB0dmQtUaQcPPUTxwt/8EBhw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714125198; c=relaxed/simple; bh=kG8SaF5P7m7Uz9jW0sK28yBVn/tvrppYDL3cxHGZObM=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=pgsmm2uDNooDjeNhaWwP+vgLmgTyvQ6+3f0LuyINj7g+ASS2qy7CRuBiTdmZrRDuS8I49ktZfa+5rAv4Zhr0WaDF3D6mwzIhFIT3KTXkPdUVsar+KhAnUGOdu8LUTnLd2sMYXx7SNBAgpiEDcJoSPVQgmkHbVynWWQaAjN3dOOk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=glCtBPoO; arc=none smtp.client-ip=192.198.163.18 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="glCtBPoO" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1714125197; x=1745661197; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=kG8SaF5P7m7Uz9jW0sK28yBVn/tvrppYDL3cxHGZObM=; b=glCtBPoOSINzHTcJeoB6OlwDQ437u99z90jz/YmIgMG+sPqqI1VBF3Pt 1xcuQw5mtzLDazbUvXHyZ4LROCbi31J4UNb0eij3nVgf8BCWKL4SeoYQb HjORQLjC0076Cb3vsTmy+/gp1sAIhfmnWw8yukBLL+3Ynb/kPrYZpQk8v EwTNUaGbM4i8PVj/XR9Pq/gIq0tdIB3+5mq9ZmdOONyc8P9VN1LrIJkyY nUffRrrxsP1z7AenfauHeynBDGTFIa+GlOGf37NR17v4qICr8BEHmCSaH Qa/pY3OJSJpNgvpNjr90gGgqJ3J056YoFxbxvY9Vov2FjsRjOW8On+gUT w==; X-CSE-ConnectionGUID: Ey3uuaLSTnCzLAgYKfhZ9g== X-CSE-MsgGUID: TIa4uHSTR6yE6zMR62Gmeg== X-IronPort-AV: E=McAfee;i="6600,9927,11055"; a="9707393" X-IronPort-AV: E=Sophos;i="6.07,232,1708416000"; d="scan'208";a="9707393" Received: from fmviesa008.fm.intel.com ([10.60.135.148]) by fmvoesa112.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Apr 2024 02:53:16 -0700 X-CSE-ConnectionGUID: VF5wpoSoSpC4bdrXiQX/3A== X-CSE-MsgGUID: 0YpObBkfT4+6/yepekrPAQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,232,1708416000"; d="scan'208";a="25412313" Received: from liuzhao-optiplex-7080.sh.intel.com ([10.239.160.36]) by fmviesa008.fm.intel.com with ESMTP; 26 Apr 2024 02:53:13 -0700 From: Zhao Liu To: Paolo Bonzini , Richard Henderson , Eduardo Habkost , "Michael S . Tsirkin" , Marcel Apfelbaum , Marcelo Tosatti Cc: Xiaoyao Li , qemu-devel@nongnu.org, kvm@vger.kernel.org, Zhao Liu Subject: [PATCH 1/6] target/i386/kvm: Add feature bit definitions for KVM CPUID Date: Fri, 26 Apr 2024 18:07:10 +0800 Message-Id: <20240426100716.2111688-2-zhao1.liu@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240426100716.2111688-1-zhao1.liu@intel.com> References: <20240426100716.2111688-1-zhao1.liu@intel.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add feature definiations for KVM_CPUID_FEATURES in CPUID ( CPUID[4000_0001].EAX and CPUID[4000_0001].EDX), to get rid of lots of offset calculations. Signed-off-by: Zhao Liu --- v2: Changed the prefix from CPUID_FEAT_KVM_* to CPUID_KVM_*. (Xiaoyao) --- hw/i386/kvm/clock.c | 5 ++--- target/i386/cpu.h | 23 +++++++++++++++++++++++ target/i386/kvm/kvm.c | 28 ++++++++++++++-------------- 3 files changed, 39 insertions(+), 17 deletions(-) diff --git a/hw/i386/kvm/clock.c b/hw/i386/kvm/clock.c index 40aa9a32c32c..ce416c05a3d0 100644 --- a/hw/i386/kvm/clock.c +++ b/hw/i386/kvm/clock.c @@ -27,7 +27,6 @@ #include "qapi/error.h" #include -#include "standard-headers/asm-x86/kvm_para.h" #include "qom/object.h" #define TYPE_KVM_CLOCK "kvmclock" @@ -334,8 +333,8 @@ void kvmclock_create(bool create_always) assert(kvm_enabled()); if (create_always || - cpu->env.features[FEAT_KVM] & ((1ULL << KVM_FEATURE_CLOCKSOURCE) | - (1ULL << KVM_FEATURE_CLOCKSOURCE2))) { + cpu->env.features[FEAT_KVM] & (CPUID_KVM_CLOCK | + CPUID_KVM_CLOCK2)) { sysbus_create_simple(TYPE_KVM_CLOCK, -1, NULL); } } diff --git a/target/i386/cpu.h b/target/i386/cpu.h index 6112e27bfd5c..caa32a91346b 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -27,6 +27,7 @@ #include "qapi/qapi-types-common.h" #include "qemu/cpu-float.h" #include "qemu/timer.h" +#include "standard-headers/asm-x86/kvm_para.h" #define XEN_NR_VIRQS 24 @@ -951,6 +952,28 @@ uint64_t x86_cpu_get_supported_feature_word(FeatureWord w, /* Packets which contain IP payload have LIP values */ #define CPUID_14_0_ECX_LIP (1U << 31) +/* (Old) KVM paravirtualized clocksource */ +#define CPUID_KVM_CLOCK (1U << KVM_FEATURE_CLOCKSOURCE) +/* (New) KVM specific paravirtualized clocksource */ +#define CPUID_KVM_CLOCK2 (1U << KVM_FEATURE_CLOCKSOURCE2) +/* KVM asynchronous page fault */ +#define CPUID_KVM_ASYNCPF (1U << KVM_FEATURE_ASYNC_PF) +/* KVM stolen (when guest vCPU is not running) time accounting */ +#define CPUID_KVM_STEAL_TIME (1U << KVM_FEATURE_STEAL_TIME) +/* KVM paravirtualized end-of-interrupt signaling */ +#define CPUID_KVM_PV_EOI (1U << KVM_FEATURE_PV_EOI) +/* KVM paravirtualized spinlocks support */ +#define CPUID_KVM_PV_UNHALT (1U << KVM_FEATURE_PV_UNHALT) +/* KVM host-side polling on HLT control from the guest */ +#define CPUID_KVM_POLL_CONTROL (1U << KVM_FEATURE_POLL_CONTROL) +/* KVM interrupt based asynchronous page fault*/ +#define CPUID_KVM_ASYNCPF_INT (1U << KVM_FEATURE_ASYNC_PF_INT) +/* KVM 'Extended Destination ID' support for external interrupts */ +#define CPUID_KVM_MSI_EXT_DEST_ID (1U << KVM_FEATURE_MSI_EXT_DEST_ID) + +/* Hint to KVM that vCPUs expect never preempted for an unlimited time */ +#define CPUID_KVM_HINTS_REALTIME (1U << KVM_HINTS_REALTIME) + /* CLZERO instruction */ #define CPUID_8000_0008_EBX_CLZERO (1U << 0) /* Always save/restore FP error pointers */ diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c index c5943605ee3a..d9e03891113f 100644 --- a/target/i386/kvm/kvm.c +++ b/target/i386/kvm/kvm.c @@ -527,13 +527,13 @@ uint32_t kvm_arch_get_supported_cpuid(KVMState *s, uint32_t function, * be enabled without the in-kernel irqchip */ if (!kvm_irqchip_in_kernel()) { - ret &= ~(1U << KVM_FEATURE_PV_UNHALT); + ret &= ~CPUID_KVM_PV_UNHALT; } if (kvm_irqchip_is_split()) { - ret |= 1U << KVM_FEATURE_MSI_EXT_DEST_ID; + ret |= CPUID_KVM_MSI_EXT_DEST_ID; } } else if (function == KVM_CPUID_FEATURES && reg == R_EDX) { - ret |= 1U << KVM_HINTS_REALTIME; + ret |= CPUID_KVM_HINTS_REALTIME; } return ret; @@ -3377,20 +3377,20 @@ static int kvm_put_msrs(X86CPU *cpu, int level) kvm_msr_entry_add(cpu, MSR_IA32_TSC, env->tsc); kvm_msr_entry_add(cpu, MSR_KVM_SYSTEM_TIME, env->system_time_msr); kvm_msr_entry_add(cpu, MSR_KVM_WALL_CLOCK, env->wall_clock_msr); - if (env->features[FEAT_KVM] & (1 << KVM_FEATURE_ASYNC_PF_INT)) { + if (env->features[FEAT_KVM] & CPUID_KVM_ASYNCPF_INT) { kvm_msr_entry_add(cpu, MSR_KVM_ASYNC_PF_INT, env->async_pf_int_msr); } - if (env->features[FEAT_KVM] & (1 << KVM_FEATURE_ASYNC_PF)) { + if (env->features[FEAT_KVM] & CPUID_KVM_ASYNCPF) { kvm_msr_entry_add(cpu, MSR_KVM_ASYNC_PF_EN, env->async_pf_en_msr); } - if (env->features[FEAT_KVM] & (1 << KVM_FEATURE_PV_EOI)) { + if (env->features[FEAT_KVM] & CPUID_KVM_PV_EOI) { kvm_msr_entry_add(cpu, MSR_KVM_PV_EOI_EN, env->pv_eoi_en_msr); } - if (env->features[FEAT_KVM] & (1 << KVM_FEATURE_STEAL_TIME)) { + if (env->features[FEAT_KVM] & CPUID_KVM_STEAL_TIME) { kvm_msr_entry_add(cpu, MSR_KVM_STEAL_TIME, env->steal_time_msr); } - if (env->features[FEAT_KVM] & (1 << KVM_FEATURE_POLL_CONTROL)) { + if (env->features[FEAT_KVM] & CPUID_KVM_POLL_CONTROL) { kvm_msr_entry_add(cpu, MSR_KVM_POLL_CONTROL, env->poll_control_msr); } @@ -3842,19 +3842,19 @@ static int kvm_get_msrs(X86CPU *cpu) #endif kvm_msr_entry_add(cpu, MSR_KVM_SYSTEM_TIME, 0); kvm_msr_entry_add(cpu, MSR_KVM_WALL_CLOCK, 0); - if (env->features[FEAT_KVM] & (1 << KVM_FEATURE_ASYNC_PF_INT)) { + if (env->features[FEAT_KVM] & CPUID_KVM_ASYNCPF_INT) { kvm_msr_entry_add(cpu, MSR_KVM_ASYNC_PF_INT, 0); } - if (env->features[FEAT_KVM] & (1 << KVM_FEATURE_ASYNC_PF)) { + if (env->features[FEAT_KVM] & CPUID_KVM_ASYNCPF) { kvm_msr_entry_add(cpu, MSR_KVM_ASYNC_PF_EN, 0); } - if (env->features[FEAT_KVM] & (1 << KVM_FEATURE_PV_EOI)) { + if (env->features[FEAT_KVM] & CPUID_KVM_PV_EOI) { kvm_msr_entry_add(cpu, MSR_KVM_PV_EOI_EN, 0); } - if (env->features[FEAT_KVM] & (1 << KVM_FEATURE_STEAL_TIME)) { + if (env->features[FEAT_KVM] & CPUID_KVM_STEAL_TIME) { kvm_msr_entry_add(cpu, MSR_KVM_STEAL_TIME, 0); } - if (env->features[FEAT_KVM] & (1 << KVM_FEATURE_POLL_CONTROL)) { + if (env->features[FEAT_KVM] & CPUID_KVM_POLL_CONTROL) { kvm_msr_entry_add(cpu, MSR_KVM_POLL_CONTROL, 1); } if (has_architectural_pmu_version > 0) { @@ -5487,7 +5487,7 @@ uint64_t kvm_swizzle_msi_ext_dest_id(uint64_t address) return address; } env = &X86_CPU(first_cpu)->env; - if (!(env->features[FEAT_KVM] & (1 << KVM_FEATURE_MSI_EXT_DEST_ID))) { + if (!(env->features[FEAT_KVM] & CPUID_KVM_MSI_EXT_DEST_ID)) { return address; } From patchwork Fri Apr 26 10:07:11 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhao Liu X-Patchwork-Id: 13644485 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 15C3614039A for ; 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a="9707403" X-IronPort-AV: E=Sophos;i="6.07,232,1708416000"; d="scan'208";a="9707403" Received: from fmviesa008.fm.intel.com ([10.60.135.148]) by fmvoesa112.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Apr 2024 02:53:18 -0700 X-CSE-ConnectionGUID: 9bVs7V2VS4GVZosEHzSEng== X-CSE-MsgGUID: NtGGV9tXTFuXChK71Hdowg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,232,1708416000"; d="scan'208";a="25412319" Received: from liuzhao-optiplex-7080.sh.intel.com ([10.239.160.36]) by fmviesa008.fm.intel.com with ESMTP; 26 Apr 2024 02:53:16 -0700 From: Zhao Liu To: Paolo Bonzini , Richard Henderson , Eduardo Habkost , "Michael S . Tsirkin" , Marcel Apfelbaum , Marcelo Tosatti Cc: Xiaoyao Li , qemu-devel@nongnu.org, kvm@vger.kernel.org, Zhao Liu Subject: [PATCH 2/6] target/i386/kvm: Remove local MSR_KVM_WALL_CLOCK and MSR_KVM_SYSTEM_TIME definitions Date: Fri, 26 Apr 2024 18:07:11 +0800 Message-Id: <20240426100716.2111688-3-zhao1.liu@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240426100716.2111688-1-zhao1.liu@intel.com> References: <20240426100716.2111688-1-zhao1.liu@intel.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 These 2 MSRs have been already defined in the kvm_para header (standard-headers/asm-x86/kvm_para.h). Remove QEMU local definitions to avoid duplication. Reviewed-by: Xiaoyao Li Signed-off-by: Zhao Liu --- target/i386/kvm/kvm.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c index d9e03891113f..b2c52ec9561f 100644 --- a/target/i386/kvm/kvm.c +++ b/target/i386/kvm/kvm.c @@ -79,9 +79,6 @@ #define KVM_APIC_BUS_CYCLE_NS 1 #define KVM_APIC_BUS_FREQUENCY (1000000000ULL / KVM_APIC_BUS_CYCLE_NS) -#define MSR_KVM_WALL_CLOCK 0x11 -#define MSR_KVM_SYSTEM_TIME 0x12 - /* A 4096-byte buffer can hold the 8-byte kvm_msrs header, plus * 255 kvm_msr_entry structs */ #define MSR_BUF_SIZE 4096 From patchwork Fri Apr 26 10:07:12 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhao Liu X-Patchwork-Id: 13644486 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2FDE213C9A7 for ; Fri, 26 Apr 2024 09:53:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714125202; cv=none; b=X0EQ75ZiG+o8sOkf4t++KPJiax0HOe54a3ajI+PcLQfxfM4++mJvMkdsmuyAbv54t9HsSXh+u05H/Sfglido3cKLxw0j3UqAtjpGf5RiWwcpc8rQfknjCoZ7AWvTeWN4iAkdtw/Uo7H4i4jPEIaogsdNX7vy28OtiuwINiXrDpU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714125202; c=relaxed/simple; bh=qijGxXFvV8iZRXcREWHGG85ad89+AhgWWgpYseJlNhg=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=iomFMACYZlYc9f6P37prCGYaUfSxo8rpYE51zYzBzS78AVWxjLsRUWL0FNKiB+ISxIXnllDve/hFMac5sDaneywEbJrsz6kaaLWpKlFKuUK9pzgPW9Cw6SU19LRbFE5vE2z9qN/5TPJ6droYQpq5lusvFxjvMmXTT0mQ1PyAx/E= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=cHidUfap; arc=none smtp.client-ip=192.198.163.18 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="cHidUfap" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1714125201; x=1745661201; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=qijGxXFvV8iZRXcREWHGG85ad89+AhgWWgpYseJlNhg=; b=cHidUfapHbdsxs+uvUmLJzKHV5SnEIhIHQsJ9g//RKvEbts5hyCBryxw KYAVDWVJqH95CNUwY15gpZqzMgZhimbE1mf/PaQlM44k6vB4J+D0F7HJi tduftF1cHCDnFlRpB6gtt+nTvcc80nsyL2mlcZtaZzpP4hRPIMvxLdlp8 mB9y/ud1eEeMazA5LTvGTI6UcULRTrb1MR7RqjBOdDB9dNUPf1TPP7D2O mVfUXXFvV2kk8vOLa6Lhn2I81MG0+lwVWSYrO/rHFJLcZ9/XPc703bTrn xBWQmPhGRmMEQRsUsXzZ+c2PalWmEUKQuKLIRa1DCPF5PDK569lTPZFRn Q==; X-CSE-ConnectionGUID: GGBij42aRgCcxeP07bJ1gQ== X-CSE-MsgGUID: bRFI0QHGRYOVOi7/6+42jA== X-IronPort-AV: E=McAfee;i="6600,9927,11055"; a="9707414" X-IronPort-AV: E=Sophos;i="6.07,232,1708416000"; d="scan'208";a="9707414" Received: from fmviesa008.fm.intel.com ([10.60.135.148]) by fmvoesa112.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Apr 2024 02:53:21 -0700 X-CSE-ConnectionGUID: LD77/FKTQr2Z/8ciWMY+UQ== X-CSE-MsgGUID: g1IuyKSmQXmpL7xat0jwpQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,232,1708416000"; d="scan'208";a="25412325" Received: from liuzhao-optiplex-7080.sh.intel.com ([10.239.160.36]) by fmviesa008.fm.intel.com with ESMTP; 26 Apr 2024 02:53:19 -0700 From: Zhao Liu To: Paolo Bonzini , Richard Henderson , Eduardo Habkost , "Michael S . Tsirkin" , Marcel Apfelbaum , Marcelo Tosatti Cc: Xiaoyao Li , qemu-devel@nongnu.org, kvm@vger.kernel.org, Zhao Liu Subject: [PATCH 3/6] target/i386/kvm: Only Save/load kvmclock MSRs when kvmclock enabled Date: Fri, 26 Apr 2024 18:07:12 +0800 Message-Id: <20240426100716.2111688-4-zhao1.liu@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240426100716.2111688-1-zhao1.liu@intel.com> References: <20240426100716.2111688-1-zhao1.liu@intel.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 MSR_KVM_SYSTEM_TIME and MSR_KVM_WALL_CLOCK are attached with the (old) kvmclock feature (KVM_FEATURE_CLOCKSOURCE). So, just save/load them only when kvmclock (KVM_FEATURE_CLOCKSOURCE) is enabled. Signed-off-by: Zhao Liu --- target/i386/kvm/kvm.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c index b2c52ec9561f..75d2091c4f8c 100644 --- a/target/i386/kvm/kvm.c +++ b/target/i386/kvm/kvm.c @@ -3372,8 +3372,10 @@ static int kvm_put_msrs(X86CPU *cpu, int level) */ if (level >= KVM_PUT_RESET_STATE) { kvm_msr_entry_add(cpu, MSR_IA32_TSC, env->tsc); - kvm_msr_entry_add(cpu, MSR_KVM_SYSTEM_TIME, env->system_time_msr); - kvm_msr_entry_add(cpu, MSR_KVM_WALL_CLOCK, env->wall_clock_msr); + if (env->features[FEAT_KVM] & CPUID_KVM_CLOCK) { + kvm_msr_entry_add(cpu, MSR_KVM_SYSTEM_TIME, env->system_time_msr); + kvm_msr_entry_add(cpu, MSR_KVM_WALL_CLOCK, env->wall_clock_msr); + } if (env->features[FEAT_KVM] & CPUID_KVM_ASYNCPF_INT) { kvm_msr_entry_add(cpu, MSR_KVM_ASYNC_PF_INT, env->async_pf_int_msr); } @@ -3837,8 +3839,10 @@ static int kvm_get_msrs(X86CPU *cpu) kvm_msr_entry_add(cpu, MSR_LSTAR, 0); } #endif - kvm_msr_entry_add(cpu, MSR_KVM_SYSTEM_TIME, 0); - kvm_msr_entry_add(cpu, MSR_KVM_WALL_CLOCK, 0); + if (env->features[FEAT_KVM] & CPUID_KVM_CLOCK) { + kvm_msr_entry_add(cpu, MSR_KVM_SYSTEM_TIME, 0); + kvm_msr_entry_add(cpu, MSR_KVM_WALL_CLOCK, 0); + } if (env->features[FEAT_KVM] & CPUID_KVM_ASYNCPF_INT) { kvm_msr_entry_add(cpu, MSR_KVM_ASYNC_PF_INT, 0); } From patchwork Fri Apr 26 10:07:13 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhao Liu X-Patchwork-Id: 13644487 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B547B1422AD for ; Fri, 26 Apr 2024 09:53:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714125205; cv=none; b=SusTgStZUGAkMMDMfK1T7t17wQZu5S1s8la5qDE+BpCkfitRea+osM/PCLTGACGTwjU+uYpIhrRb/XoqpQ5iMEjhpNI2OOH7YJW7mMkV+KbjUhkJafWGs1a5e0AJ8HccO8PQKyuTB/Z7mQcKQ/d5gGe+5CwcMhsoucVm2mBMp2E= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714125205; c=relaxed/simple; bh=CJCjIn995ERePGEjyznO054D4bBaArW8Nv06Nwjgbv8=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=Z/kK7EUJf8nz7rsKGJF70K4dGZ6FQ8tnZfKBC4ttJi0Tyt7tjiBX7OsGQK7DTRzSDFo3FTMeN4P79HIC81VL9Vpu2eeYS8jHR7C6YwSc6ZwDVKO9K9H8LO0N4X1qDN5aSULPFppfpYA+oV/yhKQGys15yJulyuAigIFJH6MT200= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=BIc1LP9a; arc=none smtp.client-ip=192.198.163.18 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="BIc1LP9a" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1714125204; x=1745661204; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=CJCjIn995ERePGEjyznO054D4bBaArW8Nv06Nwjgbv8=; b=BIc1LP9aZOldKZNUDkbnoIyLh1a0xip8ZsBPIgL6/1GC/emvXcvWOTWR VZiMpKk2fKxJe3waQkWXNhMnVDSioAA9/5efYp/eTglXK7PkO2KcEcgKm oybypHneLRmzvTOm28nCkhCuvPG8Dtq3ShYk7ls+FLRohx3uS2TnQNtA1 dyCxbwVZ7vboBxSGn8hdrKQrkqTir7o6BKBVACRCkBZSYd6xSIvBF7P3X 7Y17IXvY1UrQl0DSqJJ2O1F5dejBNZqMti0th7yJXeLy2crob/i09aEgc PaAobXJVirEer0rtARGYwUR2016UDoUQexEA4jezAX0P1DjcMd4sUPVuK Q==; X-CSE-ConnectionGUID: AL2vtSOfS2yDLonwjVquMw== X-CSE-MsgGUID: Q8PcoKusTU2w87KOKnQogw== X-IronPort-AV: E=McAfee;i="6600,9927,11055"; a="9707422" X-IronPort-AV: E=Sophos;i="6.07,232,1708416000"; d="scan'208";a="9707422" Received: from fmviesa008.fm.intel.com ([10.60.135.148]) by fmvoesa112.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Apr 2024 02:53:24 -0700 X-CSE-ConnectionGUID: yIaVMozBTI+1NCMzCDPbgA== X-CSE-MsgGUID: rebo7PEXQMidROztM079Zg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,232,1708416000"; d="scan'208";a="25412329" Received: from liuzhao-optiplex-7080.sh.intel.com ([10.239.160.36]) by fmviesa008.fm.intel.com with ESMTP; 26 Apr 2024 02:53:21 -0700 From: Zhao Liu To: Paolo Bonzini , Richard Henderson , Eduardo Habkost , "Michael S . Tsirkin" , Marcel Apfelbaum , Marcelo Tosatti Cc: Xiaoyao Li , qemu-devel@nongnu.org, kvm@vger.kernel.org, Zhao Liu Subject: [PATCH 4/6] target/i386/kvm: Save/load MSRs of kvmclock2 (KVM_FEATURE_CLOCKSOURCE2) Date: Fri, 26 Apr 2024 18:07:13 +0800 Message-Id: <20240426100716.2111688-5-zhao1.liu@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240426100716.2111688-1-zhao1.liu@intel.com> References: <20240426100716.2111688-1-zhao1.liu@intel.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 MSR_KVM_SYSTEM_TIME_NEW and MSR_KVM_WALL_CLOCK_NEW are bound to kvmclock2 (KVM_FEATURE_CLOCKSOURCE2). Add the save/load support for these 2 MSR just like kvmclock MSRs. Signed-off-by: Zhao Liu --- target/i386/cpu.h | 2 ++ target/i386/kvm/kvm.c | 16 ++++++++++++++++ 2 files changed, 18 insertions(+) diff --git a/target/i386/cpu.h b/target/i386/cpu.h index caa32a91346b..c5cf7734b202 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -1741,6 +1741,8 @@ typedef struct CPUArchState { uint64_t system_time_msr; uint64_t wall_clock_msr; + uint64_t system_time_new_msr; + uint64_t wall_clock_new_msr; uint64_t steal_time_msr; uint64_t async_pf_en_msr; uint64_t async_pf_int_msr; diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c index 75d2091c4f8c..ee0767e8f501 100644 --- a/target/i386/kvm/kvm.c +++ b/target/i386/kvm/kvm.c @@ -3376,6 +3376,12 @@ static int kvm_put_msrs(X86CPU *cpu, int level) kvm_msr_entry_add(cpu, MSR_KVM_SYSTEM_TIME, env->system_time_msr); kvm_msr_entry_add(cpu, MSR_KVM_WALL_CLOCK, env->wall_clock_msr); } + if (env->features[FEAT_KVM] & CPUID_KVM_CLOCK2) { + kvm_msr_entry_add(cpu, MSR_KVM_SYSTEM_TIME_NEW, + env->system_time_new_msr); + kvm_msr_entry_add(cpu, MSR_KVM_WALL_CLOCK_NEW, + env->wall_clock_new_msr); + } if (env->features[FEAT_KVM] & CPUID_KVM_ASYNCPF_INT) { kvm_msr_entry_add(cpu, MSR_KVM_ASYNC_PF_INT, env->async_pf_int_msr); } @@ -3843,6 +3849,10 @@ static int kvm_get_msrs(X86CPU *cpu) kvm_msr_entry_add(cpu, MSR_KVM_SYSTEM_TIME, 0); kvm_msr_entry_add(cpu, MSR_KVM_WALL_CLOCK, 0); } + if (env->features[FEAT_KVM] & CPUID_KVM_CLOCK2) { + kvm_msr_entry_add(cpu, MSR_KVM_SYSTEM_TIME_NEW, 0); + kvm_msr_entry_add(cpu, MSR_KVM_WALL_CLOCK_NEW, 0); + } if (env->features[FEAT_KVM] & CPUID_KVM_ASYNCPF_INT) { kvm_msr_entry_add(cpu, MSR_KVM_ASYNC_PF_INT, 0); } @@ -4082,6 +4092,12 @@ static int kvm_get_msrs(X86CPU *cpu) case MSR_KVM_WALL_CLOCK: env->wall_clock_msr = msrs[i].data; break; + case MSR_KVM_SYSTEM_TIME_NEW: + env->system_time_new_msr = msrs[i].data; + break; + case MSR_KVM_WALL_CLOCK_NEW: + env->wall_clock_new_msr = msrs[i].data; + break; case MSR_MCG_STATUS: env->mcg_status = msrs[i].data; break; From patchwork Fri Apr 26 10:07:15 2024 Content-Type: text/plain; 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Tsirkin" , Marcel Apfelbaum , Marcelo Tosatti Cc: Xiaoyao Li , qemu-devel@nongnu.org, kvm@vger.kernel.org, Zhao Liu Subject: [PATCH 5/6] target/i386/kvm: Drop workaround for KVM_X86_DISABLE_EXITS_HTL typo Date: Fri, 26 Apr 2024 18:07:15 +0800 Message-Id: <20240426100716.2111688-7-zhao1.liu@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240426100716.2111688-1-zhao1.liu@intel.com> References: <20240426100716.2111688-1-zhao1.liu@intel.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The KVM_X86_DISABLE_EXITS_HTL typo has been fixed in commit 77d361b13c19 ("linux-headers: Update to kernel mainline commit b357bf602"). Drop the related workaround. Signed-off-by: Zhao Liu --- target/i386/kvm/kvm.c | 4 ---- 1 file changed, 4 deletions(-) diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c index ee0767e8f501..b3ce7da37947 100644 --- a/target/i386/kvm/kvm.c +++ b/target/i386/kvm/kvm.c @@ -2692,10 +2692,6 @@ int kvm_arch_init(MachineState *ms, KVMState *s) if (enable_cpu_pm) { int disable_exits = kvm_check_extension(s, KVM_CAP_X86_DISABLE_EXITS); -/* Work around for kernel header with a typo. TODO: fix header and drop. */ -#if defined(KVM_X86_DISABLE_EXITS_HTL) && !defined(KVM_X86_DISABLE_EXITS_HLT) -#define KVM_X86_DISABLE_EXITS_HLT KVM_X86_DISABLE_EXITS_HTL -#endif if (disable_exits) { disable_exits &= (KVM_X86_DISABLE_EXITS_MWAIT | KVM_X86_DISABLE_EXITS_HLT | From patchwork Fri Apr 26 10:07:16 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhao Liu X-Patchwork-Id: 13644490 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 64FA714265F for ; Fri, 26 Apr 2024 09:53:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714125212; cv=none; b=FXJoYh0YhYowavj+SNcgua+ytaeMckKaUf2riNl8g5RUZu04233lyQIcoKRsSZdAKsYJlz76u/rweqXeBi9GO+wDpxiALyP7ikpuPnU6SxIixYUHhbrXX2x36Accr4zNDo1BLbMWNvFLAsLyNyOLwys7/clofFRfNQmAEUyXJfg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714125212; c=relaxed/simple; bh=7R08FKECIPjQbStAmaj758BPN/jbNEye6fo49Yfk9yA=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=HAqIPer7182cFjcbgFa2IwNq/B32KAjdNYAUNC3/3b1lY2HlD3LCwWPT7G/M8Kus7xZCm1byk1JICeM/Zd518Ou25mZRMKRA5/1XdP8VKVH9SvE9scR4iAJGM+fyysE4nhpuD0ThyGjo5DzG8njT7yOrdaVCwfeC3uMaWWmyAZ8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=auqREDhS; arc=none smtp.client-ip=192.198.163.18 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="auqREDhS" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1714125211; x=1745661211; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=7R08FKECIPjQbStAmaj758BPN/jbNEye6fo49Yfk9yA=; b=auqREDhSN25/AWVoN3sN5Hfz3jKFXRQyCFpUkXkGX7otlTis5+KDca+E CovsNmBVup1Kpb9m+BJPcUmZNxzjjqia6KThvv2sTtHCQgzXyNUQPtMsr jmEB9bJzN/TiaMBkL0f3cWbA3TbzDXC6JmM12IlEvFOb7lflUDUxlB9y1 y5fCHCtIJ+D64sQCJoPMYR3Pk968cTebo+8d+Vy3tDYr3Z80n4VDpt9hp 3q0HxPF1DgzcTSUamUH0RtvgbBkzQ60Hb1QNHw2Ir7fTnangRBO41CWDM hqn6u69UrQMbQcXaMvlG78GgaY+37KJ+YDDpaS8N28uAd0vwAfnEK61Oa Q==; X-CSE-ConnectionGUID: H36GkS2FSca58cMa52OwDw== X-CSE-MsgGUID: 75ZwLD/JRo6EXsa/lcq+AA== X-IronPort-AV: E=McAfee;i="6600,9927,11055"; a="9707446" X-IronPort-AV: E=Sophos;i="6.07,232,1708416000"; d="scan'208";a="9707446" Received: from fmviesa008.fm.intel.com ([10.60.135.148]) by fmvoesa112.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Apr 2024 02:53:31 -0700 X-CSE-ConnectionGUID: mKE73GDjSNKXvKTYLA0w8g== X-CSE-MsgGUID: bjFA5tHjQ9yU0UwwawPoHQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,232,1708416000"; d="scan'208";a="25412346" Received: from liuzhao-optiplex-7080.sh.intel.com ([10.239.160.36]) by fmviesa008.fm.intel.com with ESMTP; 26 Apr 2024 02:53:29 -0700 From: Zhao Liu To: Paolo Bonzini , Richard Henderson , Eduardo Habkost , "Michael S . Tsirkin" , Marcel Apfelbaum , Marcelo Tosatti Cc: Xiaoyao Li , qemu-devel@nongnu.org, kvm@vger.kernel.org, Zhao Liu Subject: [PATCH 6/6] target/i386/confidential-guest: Fix comment of x86_confidential_guest_kvm_type() Date: Fri, 26 Apr 2024 18:07:16 +0800 Message-Id: <20240426100716.2111688-8-zhao1.liu@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240426100716.2111688-1-zhao1.liu@intel.com> References: <20240426100716.2111688-1-zhao1.liu@intel.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Update the comment to match the X86ConfidentialGuestClass implementation. Suggested-by: Xiaoyao Li Signed-off-by: Zhao Liu Reviewed-by: Pankaj Gupta --- target/i386/confidential-guest.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/i386/confidential-guest.h b/target/i386/confidential-guest.h index 532e172a60b6..06d54a120227 100644 --- a/target/i386/confidential-guest.h +++ b/target/i386/confidential-guest.h @@ -44,7 +44,7 @@ struct X86ConfidentialGuestClass { /** * x86_confidential_guest_kvm_type: * - * Calls #X86ConfidentialGuestClass.unplug callback of @plug_handler. + * Calls #X86ConfidentialGuestClass.kvm_type() callback. */ static inline int x86_confidential_guest_kvm_type(X86ConfidentialGuest *cg) {