From patchwork Fri Apr 26 10:49:45 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastian Ott X-Patchwork-Id: 13644622 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 96445C04FFE for ; Fri, 26 Apr 2024 10:50:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=3YBN9BuX948gZTG36ckdYn3jsnpJNDHWoVmOAvIYvGg=; b=qb2ozjcDMbSgPG 159ROlW6hBb0eJk1eVbhJZc0YdvS45svvI/D2LhM1JpgpyX90U+UfIP7GBtz9FwkNXR1sA2z80slG 80FwFDFQqHBdo01kO/XVzoMk3PG5lkseZkRlNhPr/acecWnuXqxgLlTZxS4QLu6/9VhvXc3eze9hm Wy4+/qEGksiZtM1uaM9BkceSFtdAjS96//n88rZCbfB1KmDCoL7h/mqwGth8wIIKOcRw5ht8i7P72 FiIQ7V6St1PPgnbLtzhLN7zuw4MC7S9Y/39KHvv8Le5D/qSbPZ7rfHwjM+4LwcF51JNwbSqAGEMFQ TW4TSvdrkfITADNor6+A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1s0JA0-0000000CDXa-2qgH; Fri, 26 Apr 2024 10:50:33 +0000 Received: from us-smtp-delivery-124.mimecast.com ([170.10.129.124]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1s0J9g-0000000CDGJ-1Oqd for linux-arm-kernel@lists.infradead.org; Fri, 26 Apr 2024 10:50:15 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1714128599; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=yv0f7+ZooceAuz8ErMSH+4jWIomyiUMNQo0xCMMDiy0=; b=JonL+C+SlUU5Gh6PS/hpw8v5gCSMjVwoE4F30/g76S3tFF38QlxMPNaAfsUAIOTWt2ixLa EoedKHqkmNiqwcj+A7IEKrThD3YnlGWzvBl7fXY1BPORLwW98Dm5Xye7ZqfkhwydEHOi/p 2Gvh2gsyFtSwSwun+5vwp5SD81xE+sE= Received: from mail-qk1-f198.google.com (mail-qk1-f198.google.com [209.85.222.198]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-611-6Kv-YNpCPwiGqPEHFpupZA-1; Fri, 26 Apr 2024 06:49:58 -0400 X-MC-Unique: 6Kv-YNpCPwiGqPEHFpupZA-1 Received: by mail-qk1-f198.google.com with SMTP id af79cd13be357-78f017ea9e1so270087985a.0 for ; Fri, 26 Apr 2024 03:49:57 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1714128596; x=1714733396; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=yv0f7+ZooceAuz8ErMSH+4jWIomyiUMNQo0xCMMDiy0=; b=VSK4EqGlQcqpahqFhnFiRDGC+D8E1pR9irB4NKQs8k/wXUo7i9yRcZZxyk5ZrjW82x XViNU16cTVWUZ2wvenjMheBpD8u6lrv7SLJubxetb+TrlNs9XhHcPl0PyfuGRc/tJlPt y33yIicJDwHo1qCmzUbyS/1DmJreSQz/qQCaEbFUPTV4s1MTPx9PN0aAa9iXpXgjJ+ly B1bkEsWF+ytOOAEoZxs1kBWGeQnKi/vOwynFAmQEkqil5LSLYPB7A7qVOs5rQnHw+HKp 9HpeolG5GAVHJtCpYNhugVT+1JdmVTVR6S785WSIwUcCckIdtEkAYZFxK8XtO3d+7VCg CNow== X-Gm-Message-State: AOJu0YwsBJV4z7oNDkMxq+EldoBHGUPN2+Xa9ySEWT15KIndwXoacZon QSA+EiQUzTj7nnXnJ4bKtf5yyl1bDj6qncB6GubK7M0Wk8qX/qdxNdQkxyr6RgfKQxG/DXSSvUO u8VAV7Hx1kKX9zwIfOHgw0bApKvL+LhZqPNBTWHKd8u8Eh/6bO4Bg3Gi/M2kGFmJfFvah3A7sS+ uYksZEEyEQ7gz7jSb6JrBaFSxIs1dmNKJbfe7TzuceatoTgbb3eNyVEA== X-Received: by 2002:a05:620a:558f:b0:790:9792:ccf9 with SMTP id vq15-20020a05620a558f00b007909792ccf9mr2474375qkn.26.1714128596573; Fri, 26 Apr 2024 03:49:56 -0700 (PDT) X-Google-Smtp-Source: AGHT+IFuK9q7K5MnARR1FYXhNoL5QlURcOPFxWs+be/9tKmV0SXMgVdbnC3Cd+KrI9ajhgrIqvqt3A== X-Received: by 2002:a05:620a:558f:b0:790:9792:ccf9 with SMTP id vq15-20020a05620a558f00b007909792ccf9mr2474347qkn.26.1714128595916; Fri, 26 Apr 2024 03:49:55 -0700 (PDT) Received: from rh.redhat.com (p200300c93f4cc600a5cdf10de606b5e2.dip0.t-ipconnect.de. [2003:c9:3f4c:c600:a5cd:f10d:e606:b5e2]) by smtp.gmail.com with ESMTPSA id vv26-20020a05620a563a00b007907b57aa1fsm3888019qkn.12.2024.04.26.03.49.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Apr 2024 03:49:55 -0700 (PDT) From: Sebastian Ott To: linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, linux-kernel@vger.kernel.org Cc: Marc Zyngier , Oliver Upton , James Morse , Suzuki K Poulose , Catalin Marinas , Will Deacon Subject: [PATCH v2 1/6] KVM: arm64: change return value in arm64_check_features() Date: Fri, 26 Apr 2024 12:49:45 +0200 Message-ID: <20240426104950.7382-2-sebott@redhat.com> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20240426104950.7382-1-sebott@redhat.com> References: <20240426104950.7382-1-sebott@redhat.com> MIME-Version: 1.0 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240426_035012_729711_B645CA61 X-CRM114-Status: GOOD ( 16.57 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org arm64_check_features() returns -E2BIG to indicate the register's feature set is a superset of the maximally-allowed register value. The only caller of that function changes this to -EINVAL since that's what userspace expects for invalid register writes. In preparation of adding another caller for arm64_check_features() that would need to do the same conversion just return -EINVAL directly. Signed-off-by: Sebastian Ott --- arch/arm64/kvm/sys_regs.c | 18 ++++-------------- 1 file changed, 4 insertions(+), 14 deletions(-) diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c index c9f4f387155f..131f5b0ca2b9 100644 --- a/arch/arm64/kvm/sys_regs.c +++ b/arch/arm64/kvm/sys_regs.c @@ -1445,7 +1445,7 @@ static s64 kvm_arm64_ftr_safe_value(u32 id, const struct arm64_ftr_bits *ftrp, * considered the safe value regardless For register fields that are not in * writable, only the value in limit is considered the safe value. * - * Return: 0 if all the fields are safe. Otherwise, return negative errno. + * Return: 0 if all the fields are safe. Otherwise, return -EINVAL. */ static int arm64_check_features(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd, @@ -1464,7 +1464,7 @@ static int arm64_check_features(struct kvm_vcpu *vcpu, * only safe value is 0. */ if (sysreg_visible_as_raz(vcpu, rd)) - return val ? -E2BIG : 0; + return val ? -EINVAL : 0; ftr_reg = get_arm64_ftr_reg(id); if (!ftr_reg) @@ -1490,12 +1490,12 @@ static int arm64_check_features(struct kvm_vcpu *vcpu, safe_val = kvm_arm64_ftr_safe_value(id, ftrp, f_val, f_lim); if (safe_val != f_val) - return -E2BIG; + return -EINVAL; } /* For fields that are not writable, values in limit are the safe values. */ if ((val & ~mask) != (limit & ~mask)) - return -E2BIG; + return -EINVAL; return 0; } @@ -1840,16 +1840,6 @@ static int set_id_reg(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd, IDREG(vcpu->kvm, id) = val; mutex_unlock(&vcpu->kvm->arch.config_lock); - - /* - * arm64_check_features() returns -E2BIG to indicate the register's - * feature set is a superset of the maximally-allowed register value. - * While it would be nice to precisely describe this to userspace, the - * existing UAPI for KVM_SET_ONE_REG has it that invalid register - * writes return -EINVAL. - */ - if (ret == -E2BIG) - ret = -EINVAL; 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[2003:c9:3f4c:c600:a5cd:f10d:e606:b5e2]) by smtp.gmail.com with ESMTPSA id vv26-20020a05620a563a00b007907b57aa1fsm3888019qkn.12.2024.04.26.03.49.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Apr 2024 03:49:58 -0700 (PDT) From: Sebastian Ott To: linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, linux-kernel@vger.kernel.org Cc: Marc Zyngier , Oliver Upton , James Morse , Suzuki K Poulose , Catalin Marinas , Will Deacon Subject: [PATCH v2 2/6] KVM: arm64: unify trap setup code Date: Fri, 26 Apr 2024 12:49:46 +0200 Message-ID: <20240426104950.7382-3-sebott@redhat.com> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20240426104950.7382-1-sebott@redhat.com> References: <20240426104950.7382-1-sebott@redhat.com> MIME-Version: 1.0 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240426_035012_658972_AE0A5406 X-CRM114-Status: GOOD ( 18.55 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org There are 2 functions to set up traps via HCR_EL2: * kvm_init_sysreg() called via KVM_RUN (before the 1st run or when the pid changes) * vcpu_reset_hcr() called via KVM_ARM_VCPU_INIT To unify these 2 and to support traps that are dependent on the ID register configuration, move vcpu_reset_hcr() to sys_regs.c and call it via kvm_init_sysreg(). While at it rename kvm_init_sysreg() to kvm_setup_traps() to better reflect what it's doing. Signed-off-by: Sebastian Ott --- arch/arm64/include/asm/kvm_emulate.h | 37 ----------------------- arch/arm64/include/asm/kvm_host.h | 2 +- arch/arm64/kvm/arm.c | 3 +- arch/arm64/kvm/sys_regs.c | 44 ++++++++++++++++++++++++++-- 4 files changed, 44 insertions(+), 42 deletions(-) diff --git a/arch/arm64/include/asm/kvm_emulate.h b/arch/arm64/include/asm/kvm_emulate.h index 975af30af31f..9e71fcbb033d 100644 --- a/arch/arm64/include/asm/kvm_emulate.h +++ b/arch/arm64/include/asm/kvm_emulate.h @@ -67,43 +67,6 @@ static __always_inline bool vcpu_el1_is_32bit(struct kvm_vcpu *vcpu) } #endif -static inline void vcpu_reset_hcr(struct kvm_vcpu *vcpu) -{ - vcpu->arch.hcr_el2 = HCR_GUEST_FLAGS; - if (has_vhe() || has_hvhe()) - vcpu->arch.hcr_el2 |= HCR_E2H; - if (cpus_have_final_cap(ARM64_HAS_RAS_EXTN)) { - /* route synchronous external abort exceptions to EL2 */ - vcpu->arch.hcr_el2 |= HCR_TEA; - /* trap error record accesses */ - vcpu->arch.hcr_el2 |= HCR_TERR; - } - - if (cpus_have_final_cap(ARM64_HAS_STAGE2_FWB)) { - vcpu->arch.hcr_el2 |= HCR_FWB; - } else { - /* - * For non-FWB CPUs, we trap VM ops (HCR_EL2.TVM) until M+C - * get set in SCTLR_EL1 such that we can detect when the guest - * MMU gets turned on and do the necessary cache maintenance - * then. - */ - vcpu->arch.hcr_el2 |= HCR_TVM; - } - - if (cpus_have_final_cap(ARM64_HAS_EVT) && - !cpus_have_final_cap(ARM64_MISMATCHED_CACHE_TYPE)) - vcpu->arch.hcr_el2 |= HCR_TID4; - else - vcpu->arch.hcr_el2 |= HCR_TID2; - - if (vcpu_el1_is_32bit(vcpu)) - vcpu->arch.hcr_el2 &= ~HCR_RW; - - if (kvm_has_mte(vcpu->kvm)) - vcpu->arch.hcr_el2 |= HCR_ATA; -} - static inline unsigned long *vcpu_hcr(struct kvm_vcpu *vcpu) { return (unsigned long *)&vcpu->arch.hcr_el2; diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h index 9e8a496fb284..696acba883c1 100644 --- a/arch/arm64/include/asm/kvm_host.h +++ b/arch/arm64/include/asm/kvm_host.h @@ -1115,7 +1115,7 @@ int __init populate_nv_trap_config(void); bool lock_all_vcpus(struct kvm *kvm); void unlock_all_vcpus(struct kvm *kvm); -void kvm_init_sysreg(struct kvm_vcpu *); +void kvm_setup_traps(struct kvm_vcpu *); /* MMIO helpers */ void kvm_mmio_write_buf(void *buf, unsigned int len, unsigned long data); diff --git a/arch/arm64/kvm/arm.c b/arch/arm64/kvm/arm.c index c4a0a35e02c7..d6c27d8a8f2f 100644 --- a/arch/arm64/kvm/arm.c +++ b/arch/arm64/kvm/arm.c @@ -683,7 +683,7 @@ int kvm_arch_vcpu_run_pid_change(struct kvm_vcpu *vcpu) * This needs to happen after NV has imposed its own restrictions on * the feature set */ - kvm_init_sysreg(vcpu); + kvm_setup_traps(vcpu); ret = kvm_timer_enable(vcpu); if (ret) @@ -1438,7 +1438,6 @@ static int kvm_arch_vcpu_ioctl_vcpu_init(struct kvm_vcpu *vcpu, icache_inval_all_pou(); } - vcpu_reset_hcr(vcpu); vcpu->arch.cptr_el2 = kvm_get_reset_cptr_el2(vcpu); /* diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c index 131f5b0ca2b9..ac366d0b614a 100644 --- a/arch/arm64/kvm/sys_regs.c +++ b/arch/arm64/kvm/sys_regs.c @@ -4020,11 +4020,43 @@ int kvm_vm_ioctl_get_reg_writable_masks(struct kvm *kvm, struct reg_mask_range * return 0; } -void kvm_init_sysreg(struct kvm_vcpu *vcpu) +static void vcpu_reset_hcr(struct kvm_vcpu *vcpu) { struct kvm *kvm = vcpu->kvm; - mutex_lock(&kvm->arch.config_lock); + vcpu->arch.hcr_el2 = HCR_GUEST_FLAGS; + if (has_vhe() || has_hvhe()) + vcpu->arch.hcr_el2 |= HCR_E2H; + if (cpus_have_final_cap(ARM64_HAS_RAS_EXTN)) { + /* route synchronous external abort exceptions to EL2 */ + vcpu->arch.hcr_el2 |= HCR_TEA; + /* trap error record accesses */ + vcpu->arch.hcr_el2 |= HCR_TERR; + } + + if (cpus_have_final_cap(ARM64_HAS_STAGE2_FWB)) { + vcpu->arch.hcr_el2 |= HCR_FWB; + } else { + /* + * For non-FWB CPUs, we trap VM ops (HCR_EL2.TVM) until M+C + * get set in SCTLR_EL1 such that we can detect when the guest + * MMU gets turned on and do the necessary cache maintenance + * then. + */ + vcpu->arch.hcr_el2 |= HCR_TVM; + } + + if (cpus_have_final_cap(ARM64_HAS_EVT) && + !cpus_have_final_cap(ARM64_MISMATCHED_CACHE_TYPE)) + vcpu->arch.hcr_el2 |= HCR_TID4; + else + vcpu->arch.hcr_el2 |= HCR_TID2; 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[2003:c9:3f4c:c600:a5cd:f10d:e606:b5e2]) by smtp.gmail.com with ESMTPSA id vv26-20020a05620a563a00b007907b57aa1fsm3888019qkn.12.2024.04.26.03.49.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Apr 2024 03:50:00 -0700 (PDT) From: Sebastian Ott To: linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, linux-kernel@vger.kernel.org Cc: Marc Zyngier , Oliver Upton , James Morse , Suzuki K Poulose , Catalin Marinas , Will Deacon Subject: [PATCH v2 3/6] KVM: arm64: maintain per VM value for CTR_EL0 Date: Fri, 26 Apr 2024 12:49:47 +0200 Message-ID: <20240426104950.7382-4-sebott@redhat.com> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20240426104950.7382-1-sebott@redhat.com> References: <20240426104950.7382-1-sebott@redhat.com> MIME-Version: 1.0 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240426_035012_650251_BEC77B2C X-CRM114-Status: GOOD ( 15.37 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org In preparation for CTR_EL0 emulation maintain a per VM for this register and use it where appropriate. Signed-off-by: Sebastian Ott --- arch/arm64/include/asm/kvm_host.h | 2 ++ arch/arm64/kvm/sys_regs.c | 15 ++++++++------- 2 files changed, 10 insertions(+), 7 deletions(-) diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h index 696acba883c1..0c84cdb11c97 100644 --- a/arch/arm64/include/asm/kvm_host.h +++ b/arch/arm64/include/asm/kvm_host.h @@ -340,6 +340,8 @@ struct kvm_arch { #define KVM_ARM_ID_REG_NUM (IDREG_IDX(sys_reg(3, 0, 0, 7, 7)) + 1) u64 id_regs[KVM_ARM_ID_REG_NUM]; + u64 ctr_el0; + /* Masks for VNCR-baked sysregs */ struct kvm_sysreg_masks *sysreg_masks; diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c index ac366d0b614a..1488b93050d4 100644 --- a/arch/arm64/kvm/sys_regs.c +++ b/arch/arm64/kvm/sys_regs.c @@ -219,9 +219,9 @@ void vcpu_write_sys_reg(struct kvm_vcpu *vcpu, u64 val, int reg) * Returns the minimum line size for the selected cache, expressed as * Log2(bytes). */ -static u8 get_min_cache_line_size(bool icache) +static u8 get_min_cache_line_size(struct kvm *kvm, bool icache) { - u64 ctr = read_sanitised_ftr_reg(SYS_CTR_EL0); + u64 ctr = kvm->arch.ctr_el0; u8 field; if (icache) @@ -248,7 +248,7 @@ static u32 get_ccsidr(struct kvm_vcpu *vcpu, u32 csselr) if (vcpu->arch.ccsidr) return vcpu->arch.ccsidr[csselr]; - line_size = get_min_cache_line_size(csselr & CSSELR_EL1_InD); + line_size = get_min_cache_line_size(vcpu->kvm, csselr & CSSELR_EL1_InD); /* * Fabricate a CCSIDR value as the overriding value does not exist. @@ -283,7 +283,7 @@ static int set_ccsidr(struct kvm_vcpu *vcpu, u32 csselr, u32 val) u32 i; if ((val & CCSIDR_EL1_RES0) || - line_size < get_min_cache_line_size(csselr & CSSELR_EL1_InD)) + line_size < get_min_cache_line_size(vcpu->kvm, csselr & CSSELR_EL1_InD)) return -EINVAL; if (!ccsidr) { @@ -1862,7 +1862,7 @@ static bool access_ctr(struct kvm_vcpu *vcpu, struct sys_reg_params *p, if (p->is_write) return write_to_read_only(vcpu, p, r); - p->regval = read_sanitised_ftr_reg(SYS_CTR_EL0); + p->regval = vcpu->kvm->arch.ctr_el0; return true; } @@ -1882,7 +1882,7 @@ static bool access_clidr(struct kvm_vcpu *vcpu, struct sys_reg_params *p, */ static u64 reset_clidr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r) { - u64 ctr_el0 = read_sanitised_ftr_reg(SYS_CTR_EL0); + u64 ctr_el0 = vcpu->kvm->arch.ctr_el0; u64 clidr; u8 loc; @@ -1935,8 +1935,8 @@ static u64 reset_clidr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r) static int set_clidr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd, u64 val) { - u64 ctr_el0 = read_sanitised_ftr_reg(SYS_CTR_EL0); u64 idc = !CLIDR_LOC(val) || (!CLIDR_LOUIS(val) && !CLIDR_LOUU(val)); + u64 ctr_el0 = vcpu->kvm->arch.ctr_el0; if ((val & CLIDR_EL1_RES0) || (!(ctr_el0 & CTR_EL0_IDC) && idc)) return -EINVAL; @@ -3509,6 +3509,7 @@ static void kvm_reset_id_regs(struct kvm_vcpu *vcpu) return; lockdep_assert_held(&kvm->arch.config_lock); + kvm->arch.ctr_el0 = read_sanitised_ftr_reg(SYS_CTR_EL0); /* Initialize all idregs */ while (is_id_reg(id)) { From patchwork Fri Apr 26 10:49:48 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastian Ott X-Patchwork-Id: 13644623 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 35194C4345F for ; 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[2003:c9:3f4c:c600:a5cd:f10d:e606:b5e2]) by smtp.gmail.com with ESMTPSA id vv26-20020a05620a563a00b007907b57aa1fsm3888019qkn.12.2024.04.26.03.50.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Apr 2024 03:50:02 -0700 (PDT) From: Sebastian Ott To: linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, linux-kernel@vger.kernel.org Cc: Marc Zyngier , Oliver Upton , James Morse , Suzuki K Poulose , Catalin Marinas , Will Deacon Subject: [PATCH v2 4/6] KVM: arm64: add emulation for CTR_EL0 register Date: Fri, 26 Apr 2024 12:49:48 +0200 Message-ID: <20240426104950.7382-5-sebott@redhat.com> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20240426104950.7382-1-sebott@redhat.com> References: <20240426104950.7382-1-sebott@redhat.com> MIME-Version: 1.0 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240426_035013_653306_B0D9B4F9 X-CRM114-Status: GOOD ( 20.21 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org CTR_EL0 is currently handled as an invariant register, thus guests will be presented with the host value of that register. Add emulation for CTR_EL0 based on a per VM value. Userspace can switch off DIC and IDC bits and reduce DminLine and IminLine sizes. When CTR_EL0 is changed validate that against CLIDR_EL1 and CCSIDR_EL1 to make sure we present the guest with consistent register values. Changes that affect the generated cache topology values are allowed if they don't clash with previous register writes. Signed-off-by: Sebastian Ott --- arch/arm64/kvm/sys_regs.c | 123 +++++++++++++++++++++++++++++++++----- 1 file changed, 107 insertions(+), 16 deletions(-) diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c index 1488b93050d4..2fe3492ba3c4 100644 --- a/arch/arm64/kvm/sys_regs.c +++ b/arch/arm64/kvm/sys_regs.c @@ -215,13 +215,8 @@ void vcpu_write_sys_reg(struct kvm_vcpu *vcpu, u64 val, int reg) /* CSSELR values; used to index KVM_REG_ARM_DEMUX_ID_CCSIDR */ #define CSSELR_MAX 14 -/* - * Returns the minimum line size for the selected cache, expressed as - * Log2(bytes). - */ -static u8 get_min_cache_line_size(struct kvm *kvm, bool icache) +static u8 __get_min_cache_line_size(u64 ctr, bool icache) { - u64 ctr = kvm->arch.ctr_el0; u8 field; if (icache) @@ -240,6 +235,15 @@ static u8 get_min_cache_line_size(struct kvm *kvm, bool icache) return field + 2; } +/* + * Returns the minimum line size for the selected cache, expressed as + * Log2(bytes). + */ +static u8 get_min_cache_line_size(struct kvm *kvm, bool icache) +{ + return __get_min_cache_line_size(kvm->arch.ctr_el0, icache); +} + /* Which cache CCSIDR represents depends on CSSELR value. */ static u32 get_ccsidr(struct kvm_vcpu *vcpu, u32 csselr) { @@ -1856,6 +1860,45 @@ static int set_wi_reg(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd, return 0; } +static const struct sys_reg_desc *get_sys_reg_desc(u32 encoding); + +static int validate_clidr_el1(u64 clidr_el1, u64 ctr_el0) +{ + u64 idc = !CLIDR_LOC(clidr_el1) || + (!CLIDR_LOUIS(clidr_el1) && !CLIDR_LOUU(clidr_el1)); + + if ((clidr_el1 & CLIDR_EL1_RES0) || (!(ctr_el0 & CTR_EL0_IDC) && idc)) + return -EINVAL; + + return 0; +} + +static int validate_cache_top(struct kvm_vcpu *vcpu, u64 ctr_el0) +{ + const struct sys_reg_desc *clidr_el1; + unsigned int i; + int ret; + + clidr_el1 = get_sys_reg_desc(SYS_CLIDR_EL1); + if (!clidr_el1) + return -ENOENT; + + ret = validate_clidr_el1(__vcpu_sys_reg(vcpu, clidr_el1->reg), ctr_el0); + if (ret) + return ret; + + if (!vcpu->arch.ccsidr) + return 0; + + for (i = 0; i < CSSELR_MAX; i++) { + if ((FIELD_GET(CCSIDR_EL1_LineSize, get_ccsidr(vcpu, i)) + 4) + < __get_min_cache_line_size(ctr_el0, i & CSSELR_EL1_InD)) + return -EINVAL; + } + + return 0; +} + static bool access_ctr(struct kvm_vcpu *vcpu, struct sys_reg_params *p, const struct sys_reg_desc *r) { @@ -1866,6 +1909,48 @@ static bool access_ctr(struct kvm_vcpu *vcpu, struct sys_reg_params *p, return true; } +static u64 reset_ctr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd) +{ + vcpu->kvm->arch.ctr_el0 = read_sanitised_ftr_reg(SYS_CTR_EL0); + return vcpu->kvm->arch.ctr_el0; +} + +static int get_ctr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd, + u64 *val) +{ + *val = vcpu->kvm->arch.ctr_el0; + return 0; +} + +static int set_ctr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd, + u64 val) +{ + int ret; + + if (val == vcpu->kvm->arch.ctr_el0) + return 0; + + if (kvm_vm_has_ran_once(vcpu->kvm)) + return -EBUSY; + + mutex_lock(&vcpu->kvm->arch.config_lock); + ret = arm64_check_features(vcpu, rd, val); + if (ret) { + mutex_unlock(&vcpu->kvm->arch.config_lock); + return ret; + } + ret = validate_cache_top(vcpu, val); + if (ret) { + mutex_unlock(&vcpu->kvm->arch.config_lock); + return ret; + } + + vcpu->kvm->arch.ctr_el0 = val; + mutex_unlock(&vcpu->kvm->arch.config_lock); + + return 0; +} + static bool access_clidr(struct kvm_vcpu *vcpu, struct sys_reg_params *p, const struct sys_reg_desc *r) { @@ -1935,10 +2020,9 @@ static u64 reset_clidr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r) static int set_clidr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd, u64 val) { - u64 idc = !CLIDR_LOC(val) || (!CLIDR_LOUIS(val) && !CLIDR_LOUU(val)); u64 ctr_el0 = vcpu->kvm->arch.ctr_el0; - if ((val & CLIDR_EL1_RES0) || (!(ctr_el0 & CTR_EL0_IDC) && idc)) + if (validate_clidr_el1(val, ctr_el0)) return -EINVAL; __vcpu_sys_reg(vcpu, rd->reg) = val; @@ -2452,7 +2536,11 @@ static const struct sys_reg_desc sys_reg_descs[] = { { SYS_DESC(SYS_CCSIDR2_EL1), undef_access }, { SYS_DESC(SYS_SMIDR_EL1), undef_access }, { SYS_DESC(SYS_CSSELR_EL1), access_csselr, reset_unknown, CSSELR_EL1 }, - { SYS_DESC(SYS_CTR_EL0), access_ctr }, + { SYS_DESC(SYS_CTR_EL0), access_ctr, .reset = reset_ctr, + .get_user = get_ctr, .set_user = set_ctr, .val = (CTR_EL0_DIC_MASK | + CTR_EL0_IDC_MASK | + CTR_EL0_DminLine_MASK | + CTR_EL0_IminLine_MASK)}, { SYS_DESC(SYS_SVCR), undef_access }, { PMU_SYS_REG(PMCR_EL0), .access = access_pmcr, .reset = reset_pmcr, @@ -3616,6 +3704,13 @@ static bool index_to_params(u64 id, struct sys_reg_params *params) } } +static const struct sys_reg_desc *get_sys_reg_desc(u32 encoding) +{ + struct sys_reg_params params = encoding_to_params(encoding); + + return find_reg(¶ms, sys_reg_descs, ARRAY_SIZE(sys_reg_descs)); +} + const struct sys_reg_desc *get_reg_by_id(u64 id, const struct sys_reg_desc table[], unsigned int num) @@ -3669,18 +3764,11 @@ FUNCTION_INVARIANT(midr_el1) FUNCTION_INVARIANT(revidr_el1) FUNCTION_INVARIANT(aidr_el1) -static u64 get_ctr_el0(struct kvm_vcpu *v, const struct sys_reg_desc *r) -{ - ((struct sys_reg_desc *)r)->val = read_sanitised_ftr_reg(SYS_CTR_EL0); - return ((struct sys_reg_desc *)r)->val; -} - /* ->val is filled in by kvm_sys_reg_table_init() */ static struct sys_reg_desc invariant_sys_regs[] __ro_after_init = { { SYS_DESC(SYS_MIDR_EL1), NULL, get_midr_el1 }, { SYS_DESC(SYS_REVIDR_EL1), NULL, get_revidr_el1 }, { SYS_DESC(SYS_AIDR_EL1), NULL, get_aidr_el1 }, - { SYS_DESC(SYS_CTR_EL0), NULL, get_ctr_el0 }, }; static int get_invariant_sys_reg(u64 id, u64 __user *uaddr) @@ -4066,6 +4154,9 @@ static void vcpu_reset_hcr(struct kvm_vcpu *vcpu) */ if (!kvm_has_feat(kvm, ID_AA64ISAR0_EL1, TLB, OS)) vcpu->arch.hcr_el2 |= HCR_TTLBOS; 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[2003:c9:3f4c:c600:a5cd:f10d:e606:b5e2]) by smtp.gmail.com with ESMTPSA id vv26-20020a05620a563a00b007907b57aa1fsm3888019qkn.12.2024.04.26.03.50.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Apr 2024 03:50:04 -0700 (PDT) From: Sebastian Ott To: linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, linux-kernel@vger.kernel.org Cc: Marc Zyngier , Oliver Upton , James Morse , Suzuki K Poulose , Catalin Marinas , Will Deacon Subject: [PATCH v2 5/6] KVM: arm64: show writable masks for feature registers Date: Fri, 26 Apr 2024 12:49:49 +0200 Message-ID: <20240426104950.7382-6-sebott@redhat.com> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20240426104950.7382-1-sebott@redhat.com> References: <20240426104950.7382-1-sebott@redhat.com> MIME-Version: 1.0 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240426_035013_619937_35882A6E X-CRM114-Status: GOOD ( 15.02 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Instead of using ~0UL provide the actual writable mask for non-id feature registers in the output of the KVM_ARM_GET_REG_WRITABLE_MASKS ioctl. Explicitely set the mask for CLIDR_EL1 to make sure we present the same value to userspace than before. This changes the mask for the CTR_EL0 register in the output of the KVM_ARM_GET_REG_WRITABLE_MASKS ioctl. Signed-off-by: Sebastian Ott --- arch/arm64/kvm/sys_regs.c | 19 +++++-------------- 1 file changed, 5 insertions(+), 14 deletions(-) diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c index 2fe3492ba3c4..7d5d55e5c16a 100644 --- a/arch/arm64/kvm/sys_regs.c +++ b/arch/arm64/kvm/sys_regs.c @@ -2532,7 +2532,7 @@ static const struct sys_reg_desc sys_reg_descs[] = { { SYS_DESC(SYS_CCSIDR_EL1), access_ccsidr }, { SYS_DESC(SYS_CLIDR_EL1), access_clidr, reset_clidr, CLIDR_EL1, - .set_user = set_clidr }, + .set_user = set_clidr, .val = ~0UL }, { SYS_DESC(SYS_CCSIDR2_EL1), undef_access }, { SYS_DESC(SYS_SMIDR_EL1), undef_access }, { SYS_DESC(SYS_CSSELR_EL1), access_csselr, reset_unknown, CSSELR_EL1 }, @@ -4087,20 +4087,11 @@ int kvm_vm_ioctl_get_reg_writable_masks(struct kvm *kvm, struct reg_mask_range * if (!is_feature_id_reg(encoding) || !reg->set_user) continue; - /* - * For ID registers, we return the writable mask. Other feature - * registers return a full 64bit mask. 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[2003:c9:3f4c:c600:a5cd:f10d:e606:b5e2]) by smtp.gmail.com with ESMTPSA id vv26-20020a05620a563a00b007907b57aa1fsm3888019qkn.12.2024.04.26.03.50.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Apr 2024 03:50:06 -0700 (PDT) From: Sebastian Ott To: linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, linux-kernel@vger.kernel.org Cc: Marc Zyngier , Oliver Upton , James Morse , Suzuki K Poulose , Catalin Marinas , Will Deacon Subject: [PATCH v2 6/6] KVM: arm64: rename functions for invariant sys regs Date: Fri, 26 Apr 2024 12:49:50 +0200 Message-ID: <20240426104950.7382-7-sebott@redhat.com> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20240426104950.7382-1-sebott@redhat.com> References: <20240426104950.7382-1-sebott@redhat.com> MIME-Version: 1.0 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240426_035012_611062_C1A8E28B X-CRM114-Status: GOOD ( 13.11 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Invariant system id registers are populated with host values at initialization time using their .reset function cb. These are currently called get_* which is usually used by the functions implementing the .get_user callback. Change their function names to reset_* to reflect what they are used for. Signed-off-by: Sebastian Ott --- arch/arm64/kvm/sys_regs.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c index 7d5d55e5c16a..88f6cdf9b8d6 100644 --- a/arch/arm64/kvm/sys_regs.c +++ b/arch/arm64/kvm/sys_regs.c @@ -3753,8 +3753,8 @@ id_to_sys_reg_desc(struct kvm_vcpu *vcpu, u64 id, */ #define FUNCTION_INVARIANT(reg) \ - static u64 get_##reg(struct kvm_vcpu *v, \ - const struct sys_reg_desc *r) \ + static u64 reset_##reg(struct kvm_vcpu *v, \ + const struct sys_reg_desc *r) \ { \ ((struct sys_reg_desc *)r)->val = read_sysreg(reg); \ return ((struct sys_reg_desc *)r)->val; \ @@ -3766,9 +3766,9 @@ FUNCTION_INVARIANT(aidr_el1) /* ->val is filled in by kvm_sys_reg_table_init() */ static struct sys_reg_desc invariant_sys_regs[] __ro_after_init = { - { SYS_DESC(SYS_MIDR_EL1), NULL, get_midr_el1 }, - { SYS_DESC(SYS_REVIDR_EL1), NULL, get_revidr_el1 }, - { SYS_DESC(SYS_AIDR_EL1), NULL, get_aidr_el1 }, + { SYS_DESC(SYS_MIDR_EL1), NULL, reset_midr_el1 }, + { SYS_DESC(SYS_REVIDR_EL1), NULL, reset_revidr_el1 }, + { SYS_DESC(SYS_AIDR_EL1), NULL, reset_aidr_el1 }, }; static int get_invariant_sys_reg(u64 id, u64 __user *uaddr)