From patchwork Sun Apr 28 06:06:33 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Crawford X-Patchwork-Id: 13645876 Received: from bits.crawford.emu.id.au (bits.crawford.emu.id.au [116.255.43.97]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4DD4B3C38 for ; Sun, 28 Apr 2024 06:07:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=116.255.43.97 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714284451; cv=none; b=GbNCTHl2IEA1YKhAMkEAX7UT8Z3lhyXFrsXuH1SP4H76vTVPYuKE8gfiYDucZQZhw3TU12WBmYdZpnNbH/Y7aEQR0sxtyMeNqF0m2yCxuvBk2ZPPhTvPbJvnCVTlCWdDdMYgOcKgUJde5qYKNhuhFCzU83J3O4QOL0lPv8zkPPY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714284451; c=relaxed/simple; bh=Y3O2stinyv38PpEPh2E167efiJAzUN41naiZN7Spf9Q=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=aCXQNmWsOaqFeBep4ymIt34G8W8RBS8dAwVmKZlirBAVymIbhYbmyosE+WLiqLaoFRslVA7gAU73ivqLVFcaqOmDCZfvOwLtklsHHgTUbgFkSYbdN/sZWbRgCeqJwKCc9po3Xlzrx2aqnu4D8UgVSuFLPZunaeR9nmUyMqlisJo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=crawford.emu.id.au; spf=pass smtp.mailfrom=crawford.emu.id.au; dkim=pass (2048-bit key) header.d=crawford.emu.id.au header.i=@crawford.emu.id.au header.b=YUWhiXRD; arc=none smtp.client-ip=116.255.43.97 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=crawford.emu.id.au Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=crawford.emu.id.au Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=crawford.emu.id.au header.i=@crawford.emu.id.au header.b="YUWhiXRD" Received: from agc.crawford.emu.id.au (agc.crawford.emu.id.au [IPv6:fdd2:7aad:d478:1:0:0:cb10:cc07]) (authenticated bits=0) by bits.crawford.emu.id.au (8.17.2/8.17.2) with ESMTPSA id 43S66tnt3524336 (version=TLSv1.3 cipher=TLS_AES_256_GCM_SHA384 bits=256 verify=NO); Sun, 28 Apr 2024 16:07:08 +1000 Authentication-Results: bits.crawford.emu.id.au; arc=none smtp.remote-ip=fdd2:7aad:d478:1::cb10:cc07 DKIM-Filter: OpenDKIM Filter v2.11.0 bits.crawford.emu.id.au 43S66tnt3524336 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=crawford.emu.id.au; s=s1; t=1714284428; bh=dJFaJrUUQhk8I+kf+Oo1DfnsuweTVW4xMI7fepjQ/jA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=YUWhiXRDkAg9aAQvQk6+RYTKZtUXXZPy/jbMA6mH8iae1NAYBOiMTdBvsDTVaBUlw g1I3jnFnMe2qYyuTnQsxLkkEJiZPzCkXSWo0eth7Ru4NdkmZVdp0CiOS6M00nYrpib h1LOBl7fAZCwfbUnLXj8uSgrpIP4Qa8XFM2KqvopTDo8ZNoKpow4iog+8w+4OSSyyc zX8/DOmFkl5mdV8fKD8/k1iIfyzY8tpDamnqGDIZb6QBvCYEJQTqyCUEUknQOPAD4q yFLCKvuh5SWX0O+ZY/mU4jBO8QfNlJ8UcJyeFvJE3gCEEoswETF6IphkN1B9xVAaKT 5HFK6pI8+EqEQ== From: Frank Crawford To: Jean Delvare , Guenter Roeck Cc: linux-hwmon@vger.kernel.org, Frank Crawford Subject: [PATCH v3 1/4] hwmon (it87): Rename FEAT_CONF_NOEXIT to FEAT_NOCONF as more descriptive of requirement Date: Sun, 28 Apr 2024 16:06:33 +1000 Message-ID: <20240428060653.2425296-2-frank@crawford.emu.id.au> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20240428060653.2425296-1-frank@crawford.emu.id.au> References: <20240428060653.2425296-1-frank@crawford.emu.id.au> Precedence: bulk X-Mailing-List: linux-hwmon@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Greylist: Sender succeeded SMTP AUTH, not delayed by milter-greylist-4.6.4 (bits.crawford.emu.id.au [IPv6:fdd2:7aad:d478:1:0:0:cb10:cc01]); Sun, 28 Apr 2024 16:07:08 +1000 (AEST) X-Virus-Scanned: clamav-milter 1.0.5 at bits.crawford.emu.id.au X-Virus-Status: Clean Rename previous definitions to match the new information that they are preinitialised as enabled and should not receive codes to enter or exit configuration mode. Signed-off-by: Frank Crawford --- v2: * renamed the feature to FEAT_NOCONF and macro to has_noconf following review. v3: * No change. --- drivers/hwmon/it87.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/drivers/hwmon/it87.c b/drivers/hwmon/it87.c index fbe86cec6055..6eeba3a01e3c 100644 --- a/drivers/hwmon/it87.c +++ b/drivers/hwmon/it87.c @@ -320,7 +320,7 @@ struct it87_devices { * second SIO address. Never exit configuration mode on these * chips to avoid the problem. */ -#define FEAT_CONF_NOEXIT BIT(19) /* Chip should not exit conf mode */ +#define FEAT_NOCONF BIT(19) /* Chip conf mode enabled on startup */ #define FEAT_FOUR_FANS BIT(20) /* Supports four fans */ #define FEAT_FOUR_PWM BIT(21) /* Supports four fan controls */ #define FEAT_FOUR_TEMP BIT(22) @@ -452,7 +452,7 @@ static const struct it87_devices it87_devices[] = { .model = "IT8790E", .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL - | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF | FEAT_CONF_NOEXIT, + | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF | FEAT_NOCONF, .peci_mask = 0x07, }, [it8792] = { @@ -461,7 +461,7 @@ static const struct it87_devices it87_devices[] = { .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL | FEAT_FANCTL_ONOFF - | FEAT_CONF_NOEXIT, + | FEAT_NOCONF, .peci_mask = 0x07, .old_peci_mask = 0x02, /* Actually reports PCH */ }, @@ -507,7 +507,7 @@ static const struct it87_devices it87_devices[] = { .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL | FEAT_FANCTL_ONOFF - | FEAT_CONF_NOEXIT, + | FEAT_NOCONF, .peci_mask = 0x07, .old_peci_mask = 0x02, /* Actually reports PCH */ }, @@ -544,7 +544,7 @@ static const struct it87_devices it87_devices[] = { #define has_four_temp(data) ((data)->features & FEAT_FOUR_TEMP) #define has_six_temp(data) ((data)->features & FEAT_SIX_TEMP) #define has_vin3_5v(data) ((data)->features & FEAT_VIN3_5V) -#define has_conf_noexit(data) ((data)->features & FEAT_CONF_NOEXIT) +#define has_noconf(data) ((data)->features & FEAT_NOCONF) #define has_scaling(data) ((data)->features & (FEAT_12MV_ADC | \ FEAT_10_9MV_ADC)) #define has_fanctl_onoff(data) ((data)->features & FEAT_FANCTL_ONOFF) @@ -748,7 +748,7 @@ static int smbus_disable(struct it87_data *data) superio_select(data->sioaddr, PME); superio_outb(data->sioaddr, IT87_SPECIAL_CFG_REG, data->ec_special_config & ~data->smbus_bitmap); - superio_exit(data->sioaddr, has_conf_noexit(data)); + superio_exit(data->sioaddr, has_noconf(data)); } return 0; } @@ -765,7 +765,7 @@ static int smbus_enable(struct it87_data *data) superio_select(data->sioaddr, PME); superio_outb(data->sioaddr, IT87_SPECIAL_CFG_REG, data->ec_special_config); - superio_exit(data->sioaddr, has_conf_noexit(data)); + superio_exit(data->sioaddr, has_noconf(data)); } return 0; } @@ -3143,7 +3143,7 @@ static int __init it87_find(int sioaddr, unsigned short *address, } exit: - superio_exit(sioaddr, config ? has_conf_noexit(config) : false); + superio_exit(sioaddr, config ? has_noconf(config) : false); return err; } @@ -3540,7 +3540,7 @@ static void it87_resume_sio(struct platform_device *pdev) reg2c); } - superio_exit(data->sioaddr, has_conf_noexit(data)); + superio_exit(data->sioaddr, has_noconf(data)); } static int it87_resume(struct device *dev) From patchwork Sun Apr 28 06:06:34 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Crawford X-Patchwork-Id: 13645877 Received: from bits.crawford.emu.id.au (bits.crawford.emu.id.au [116.255.43.97]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C96873C38 for ; Sun, 28 Apr 2024 06:07:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=116.255.43.97 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714284455; cv=none; b=ogzd3DDdH4ZN1GILSxjZqA265jtFaoY4AWP6WNn12786yz6HF9znwjWhapEv2zZUJuGuv1r8qCpdMUTTiQXEjT9d83HdhNsEOpvXPmydgjB5Y6I6Dc3aNGuEuWsb9Aohfy+RnaPOT7p9G62LH1xXy8dsaFjwvBS7GbjOlXluQTU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714284455; c=relaxed/simple; bh=0nM+LTwTwhUdvzpFTak3fF6Isl56rE/eM++mK66npRk=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=bNTO4WDSVrSm2vLmw9LAWlCVTNJFY5AZIo5rgdUzkcRF4WuBAdwx4L6TXk8d23CQB8+fyrvKmrlhzHE5alfxjRQ9uh7XRIf0WwMs+Lfl+FXvRyV8ZYMUH6sXpuumt7XzdDaLiUPqOunCKI12QCF7u20Ym8MllIY0W6UKU8fs6RI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=crawford.emu.id.au; spf=pass smtp.mailfrom=crawford.emu.id.au; dkim=pass (2048-bit key) header.d=crawford.emu.id.au header.i=@crawford.emu.id.au header.b=G+N1nwNB; arc=none smtp.client-ip=116.255.43.97 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=crawford.emu.id.au Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=crawford.emu.id.au Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=crawford.emu.id.au header.i=@crawford.emu.id.au header.b="G+N1nwNB" Received: from agc.crawford.emu.id.au (agc.crawford.emu.id.au [IPv6:fdd2:7aad:d478:1:0:0:cb10:cc07]) (authenticated bits=0) by bits.crawford.emu.id.au (8.17.2/8.17.2) with ESMTPSA id 43S66tnu3524336 (version=TLSv1.3 cipher=TLS_AES_256_GCM_SHA384 bits=256 verify=NO); Sun, 28 Apr 2024 16:07:11 +1000 Authentication-Results: bits.crawford.emu.id.au; arc=none smtp.remote-ip=fdd2:7aad:d478:1::cb10:cc07 DKIM-Filter: OpenDKIM Filter v2.11.0 bits.crawford.emu.id.au 43S66tnu3524336 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=crawford.emu.id.au; s=s1; t=1714284431; bh=0MlWyBXdsciIcO1hCKA1rRHNDMbVodx+zu9R6K0XjDo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=G+N1nwNB7d864vDFkiDKiLFo7Fb0CfOQVjR7Y3W6xj/Tt5cmeNdQ1NkPfsJmrrUKx ArV5I/yanK6g9DS1dfzLHV9NGFO/Jjdp0uZCRKY+bOqfKZ9J3hYzjgNhFGFVOBa538 a0lYrwfmvuJliY8QVBu9iW3jkEgOttVUKgh2F3OAQsgM3NoEWG1jba48ztoCCSqYyw sw6CMR99jDEyGkrDa1Xnqw+nAt8mzwO9VzfNv5/FUqNV1WrDyqesEMVKlzok1CmK0K tTidR4h1Wjs/3QHdTAYz/OX3b/YEeq0YdpnUR2qmk4gOfm9wRAJZ7j12Wx7ddeaoI0 aiaAJnR2aNGxQ== From: Frank Crawford To: Jean Delvare , Guenter Roeck Cc: linux-hwmon@vger.kernel.org, Frank Crawford Subject: [PATCH v3 2/4] hwmon (it87): Do not enter configuration mode for some chiptypes Date: Sun, 28 Apr 2024 16:06:34 +1000 Message-ID: <20240428060653.2425296-3-frank@crawford.emu.id.au> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20240428060653.2425296-1-frank@crawford.emu.id.au> References: <20240428060653.2425296-1-frank@crawford.emu.id.au> Precedence: bulk X-Mailing-List: linux-hwmon@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Greylist: Sender succeeded SMTP AUTH, not delayed by milter-greylist-4.6.4 (bits.crawford.emu.id.au [IPv6:fdd2:7aad:d478:1:0:0:cb10:cc01]); Sun, 28 Apr 2024 16:07:11 +1000 (AEST) X-Virus-Scanned: clamav-milter 1.0.5 at bits.crawford.emu.id.au X-Virus-Status: Clean Update the configuration mode entry code to allow conditional entry, and apply to all calls. Signed-off-by: Frank Crawford --- v2: * change macro name from has_conf_biosopen to has_noconf. v3: * no change. --- drivers/hwmon/it87.c | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) diff --git a/drivers/hwmon/it87.c b/drivers/hwmon/it87.c index 6eeba3a01e3c..396c2d3afbf7 100644 --- a/drivers/hwmon/it87.c +++ b/drivers/hwmon/it87.c @@ -117,7 +117,7 @@ static inline void superio_select(int ioreg, int ldn) outb(ldn, ioreg + 1); } -static inline int superio_enter(int ioreg) +static inline int superio_enter(int ioreg, bool noentry) { /* * Try to reserve ioreg and ioreg + 1 for exclusive access. @@ -125,7 +125,8 @@ static inline int superio_enter(int ioreg) if (!request_muxed_region(ioreg, 2, DRVNAME)) return -EBUSY; - __superio_enter(ioreg); + if (!noentry) + __superio_enter(ioreg); return 0; } @@ -742,7 +743,7 @@ static int smbus_disable(struct it87_data *data) int err; if (data->smbus_bitmap) { - err = superio_enter(data->sioaddr); + err = superio_enter(data->sioaddr, has_noconf(data)); if (err) return err; superio_select(data->sioaddr, PME); @@ -758,7 +759,7 @@ static int smbus_enable(struct it87_data *data) int err; if (data->smbus_bitmap) { - err = superio_enter(data->sioaddr); + err = superio_enter(data->sioaddr, has_noconf(data)); if (err) return err; @@ -2674,7 +2675,7 @@ static int __init it87_find(int sioaddr, unsigned short *address, u16 chip_type; const struct it87_devices *config = NULL; - err = superio_enter(sioaddr); + err = superio_enter(sioaddr, false); if (err) return err; @@ -3520,7 +3521,7 @@ static void it87_resume_sio(struct platform_device *pdev) if (!data->need_in7_reroute) return; - err = superio_enter(data->sioaddr); + err = superio_enter(data->sioaddr, has_noconf(data)); if (err) { dev_warn(&pdev->dev, "Unable to enter Super I/O to reroute in7 (%d)", From patchwork Sun Apr 28 06:06:35 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Crawford X-Patchwork-Id: 13645878 Received: from bits.crawford.emu.id.au (bits.crawford.emu.id.au [116.255.43.97]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9577C79CF for ; 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h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=qPaozeoM+BrXJhs/VrRuUYC7k1WUNwV5jp3i/qS1mUbkzho0cTsJFw3Bm1l0YJ1Tp ZoZuZPMxRG4X4IRVVSRa8MD7IOP2y9kAQpkC2XeGk4YrUfeKynIKL9xzieqdoQANA5 kf3vCKCgYVRTsL/6XhvpUeaspE/6UAtH36knmpJzWC3aNFL2awUzBbV62FzntGxCgb BcoVKGn73DboY29OPUQOg3bt1WfF5s3LN7Vb9i6DyPpH37JbmmMDp55v7gjwOnOZOC uanoEoU2q+Ky6bS1GB9R5g+qqytZ+o1QcTqPr9eDctf5t129zVT893Re7j/rCQAhMq yoBWlsArEJbaQ== From: Frank Crawford To: Jean Delvare , Guenter Roeck Cc: linux-hwmon@vger.kernel.org, Frank Crawford Subject: [PATCH v3 3/4] hwmon (it87): Test for chipset before entering configuration mode Date: Sun, 28 Apr 2024 16:06:35 +1000 Message-ID: <20240428060653.2425296-4-frank@crawford.emu.id.au> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20240428060653.2425296-1-frank@crawford.emu.id.au> References: <20240428060653.2425296-1-frank@crawford.emu.id.au> Precedence: bulk X-Mailing-List: linux-hwmon@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Greylist: Sender succeeded SMTP AUTH, not delayed by milter-greylist-4.6.4 (bits.crawford.emu.id.au [IPv6:fdd2:7aad:d478:1:0:0:cb10:cc01]); Sun, 28 Apr 2024 16:07:15 +1000 (AEST) X-Virus-Scanned: clamav-milter 1.0.5 at bits.crawford.emu.id.au X-Virus-Status: Clean Major part of the change for the new method to avoid chipset issues. The actual update does the following: 1) Lock the memory, but does not perform a SIO entry (previously it would have performed an SIO entry). 2) Attempt to read the chipID. This should be safe no matter which chip we have. 3) If step (2) fails, then perform SIO entry and retry chipID read. For older chips and on failure it acts similarly to prior to this patch. 4) Set the sio_data->type, similar to previously. 5) If we have not performed an SIO entry, and this is not a chip type with the NOCONF feature, then it will perform an SIO entry at this point. 6) Proceed with setup as prior to this patch. 7) Any following access to the SIO registers will invoke the SIO entry and SIO exit steps unless it is a chip with the NOCONF feature set. This was set up in the previous patches in this patchset. 8) Update to the exit based on if it had performed a SIO entry or not. Signed-off-by: Frank Crawford --- v2: * rename macro from has_conf_biosopen to has_noconf. * improve patch documentation on new test of chipID. v3: * rename variable from opened to enabled. * corrected final call to superio_exit(). * minor update to patch documentation. --- drivers/hwmon/it87.c | 52 +++++++++++++++++++++++++++++++++++++++----- 1 file changed, 47 insertions(+), 5 deletions(-) diff --git a/drivers/hwmon/it87.c b/drivers/hwmon/it87.c index 396c2d3afbf7..6a77f2f6e1e1 100644 --- a/drivers/hwmon/it87.c +++ b/drivers/hwmon/it87.c @@ -2667,6 +2667,27 @@ static const struct attribute_group it87_group_auto_pwm = { .is_visible = it87_auto_pwm_is_visible, }; +/* + * Original explanation: + * On various Gigabyte AM4 boards (AB350, AX370), the second Super-IO chip + * (IT8792E) needs to be in configuration mode before accessing the first + * due to a bug in IT8792E which otherwise results in LPC bus access errors. + * This needs to be done before accessing the first Super-IO chip since + * the second chip may have been accessed prior to loading this driver. + * + * The problem is also reported to affect IT8795E, which is used on X299 boards + * and has the same chip ID as IT8792E (0x8733). It also appears to affect + * systems with IT8790E, which is used on some Z97X-Gaming boards as well as + * Z87X-OC. + * + * From other information supplied: + * ChipIDs 0x8733, 0x8695 (early ID for IT87952E) and 0x8790 are intialised + * and left in configuration mode, and entering and/or exiting configuration + * mode is what causes the crash. + * + * The recommendation is to look up the chipID before doing any mode swap + * and then act accordingly. + */ /* SuperIO detection - will change isa_address if a chip is found */ static int __init it87_find(int sioaddr, unsigned short *address, struct it87_sio_data *sio_data, int chip_cnt) @@ -2674,16 +2695,25 @@ static int __init it87_find(int sioaddr, unsigned short *address, int err; u16 chip_type; const struct it87_devices *config = NULL; + bool enabled = false; - err = superio_enter(sioaddr, false); + /* First step, lock memory but don't enter configuration mode */ + err = superio_enter(sioaddr, true); if (err) return err; err = -ENODEV; chip_type = superio_inw(sioaddr, DEVID); - /* check first for a valid chip before forcing chip id */ - if (chip_type == 0xffff) - goto exit; + /* Check for a valid chip before forcing chip id */ + if (chip_type == 0xffff) { + /* Enter configuration mode */ + __superio_enter(sioaddr); + enabled = true; + /* and then try again */ + chip_type = superio_inw(sioaddr, DEVID); + if (chip_type == 0xffff) + goto exit; + } if (force_id_cnt == 1) { /* If only one value given use for all chips */ @@ -2767,6 +2797,18 @@ static int __init it87_find(int sioaddr, unsigned short *address, config = &it87_devices[sio_data->type]; + /* + * If previously we didn't enter configuration mode and it isn't a + * chip we know is initialised in configuration mode, then enter + * configuration mode. + * + * I don't know if any such chips can exist but be defensive. + */ + if (!enabled && !has_noconf(config)) { + __superio_enter(sioaddr); + enabled = true; + } + superio_select(sioaddr, PME); if (!(superio_inb(sioaddr, IT87_ACT_REG) & 0x01)) { pr_info("Device (chip %s ioreg 0x%x) not activated, skipping\n", @@ -3144,7 +3186,7 @@ static int __init it87_find(int sioaddr, unsigned short *address, } exit: - superio_exit(sioaddr, config ? has_noconf(config) : false); + superio_exit(sioaddr, !enabled); return err; } From patchwork Sun Apr 28 06:06:36 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Crawford X-Patchwork-Id: 13645879 Received: from bits.crawford.emu.id.au (bits.crawford.emu.id.au [116.255.43.97]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A70B679CF for ; Sun, 28 Apr 2024 06:07:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=116.255.43.97 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714284460; cv=none; b=Qv+A6zjjAIVL0etI/iX91MJfYAbgoZp4qTuaQUz7LLE9Rfy2sJu9w/hwpEn3mPNktyYHN0TrGLGPS5fFlesTO24YPW+OG6TynM3TN9vNpxQMn7L1ik+tvIt8LtPaD/6k8fdIKLKA7NTsIQWPOOpEYBODdD1Ap+UUbk8Sf0pbjEg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714284460; c=relaxed/simple; bh=gXCcqwgKNXgn8OlscRPH7nPkdijIgo/kRfKatir5lS8=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=sVpuDeuN7op7+o7VHmTusxa0u1zsyolIe/TZyEL+lCa2gYrrPON/I1us21wfRywy48O8vCdziv8rB2DAbRBIupmnTNSFNPuAEFFLweK3mSVvAAWvrArrr4VRUyVw1SQDyYGyNxGbjWwTnWdSdau7blktVs6isu0LyQUTNYB0gj4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=crawford.emu.id.au; spf=pass smtp.mailfrom=crawford.emu.id.au; dkim=pass (2048-bit key) header.d=crawford.emu.id.au header.i=@crawford.emu.id.au header.b=TZKTZIZM; arc=none smtp.client-ip=116.255.43.97 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=crawford.emu.id.au Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=crawford.emu.id.au Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=crawford.emu.id.au header.i=@crawford.emu.id.au header.b="TZKTZIZM" Received: from agc.crawford.emu.id.au (agc.crawford.emu.id.au [IPv6:fdd2:7aad:d478:1:0:0:cb10:cc07]) (authenticated bits=0) by bits.crawford.emu.id.au (8.17.2/8.17.2) with ESMTPSA id 43S66tnw3524336 (version=TLSv1.3 cipher=TLS_AES_256_GCM_SHA384 bits=256 verify=NO); Sun, 28 Apr 2024 16:07:18 +1000 Authentication-Results: bits.crawford.emu.id.au; arc=none smtp.remote-ip=fdd2:7aad:d478:1::cb10:cc07 DKIM-Filter: OpenDKIM Filter v2.11.0 bits.crawford.emu.id.au 43S66tnw3524336 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=crawford.emu.id.au; s=s1; t=1714284438; bh=LU5LaGK2Dk3KQWZHIoZj77t/T1kW2hKeO618FloR1dA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=TZKTZIZMsVjg1aBfu1cWs9WNEVOCXhTLeeUTrdixaB8f1blfHKK7UnBxLEeot27G9 JaSyYuBL2UmihCR2l8v1sN9KdQ8zXkabaXr5M9KmAvVebauETTsI/v57L0kbMBUfL+ shKFQ+7RaQ1yH86/8Bc3/TQXgPB4dZ3p6HuCIG/pQjqKD2/ZHYqjL2agODPvIKPDrk S5x7ufn+2jgJy8ba/EkCbiiWCVVmPrLhkx1WLobfjIywYpLk+BHwbk5lWqqRW06GPU cFf9OMyU0WMsyBptYIWrTbNr2+/Jjw3RXy7QFIBGyP0D/oKpuFoURrhqCSEuS3nhDk B5GcjmHT/J3bg== From: Frank Crawford To: Jean Delvare , Guenter Roeck Cc: linux-hwmon@vger.kernel.org, Frank Crawford Subject: [PATCH v3 4/4] hwmon (it87): Remove tests nolonger required Date: Sun, 28 Apr 2024 16:06:36 +1000 Message-ID: <20240428060653.2425296-5-frank@crawford.emu.id.au> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20240428060653.2425296-1-frank@crawford.emu.id.au> References: <20240428060653.2425296-1-frank@crawford.emu.id.au> Precedence: bulk X-Mailing-List: linux-hwmon@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Greylist: Sender succeeded SMTP AUTH, not delayed by milter-greylist-4.6.4 (bits.crawford.emu.id.au [IPv6:fdd2:7aad:d478:1:0:0:cb10:cc01]); Sun, 28 Apr 2024 16:07:18 +1000 (AEST) X-Virus-Scanned: clamav-milter 1.0.5 at bits.crawford.emu.id.au X-Virus-Status: Clean Remove DMI tests for boards that are known to have issues with entering configuration mode, as now we are testing the chips directly and no longer need to rely on matching the board. Leave the DMI table in place, for the nVIDIA board, and any future expansions. Signed-off-by: Frank Crawford --- v2: * no change. v3: * no change. --- drivers/hwmon/it87.c | 48 -------------------------------------------- 1 file changed, 48 deletions(-) diff --git a/drivers/hwmon/it87.c b/drivers/hwmon/it87.c index 6a77f2f6e1e1..b850eb3e5907 100644 --- a/drivers/hwmon/it87.c +++ b/drivers/hwmon/it87.c @@ -3683,27 +3683,6 @@ static int it87_dmi_cb(const struct dmi_system_id *dmi_entry) return 1; } -/* - * On various Gigabyte AM4 boards (AB350, AX370), the second Super-IO chip - * (IT8792E) needs to be in configuration mode before accessing the first - * due to a bug in IT8792E which otherwise results in LPC bus access errors. - * This needs to be done before accessing the first Super-IO chip since - * the second chip may have been accessed prior to loading this driver. - * - * The problem is also reported to affect IT8795E, which is used on X299 boards - * and has the same chip ID as IT8792E (0x8733). It also appears to affect - * systems with IT8790E, which is used on some Z97X-Gaming boards as well as - * Z87X-OC. - * DMI entries for those systems will be added as they become available and - * as the problem is confirmed to affect those boards. - */ -static int it87_sio_force(const struct dmi_system_id *dmi_entry) -{ - __superio_enter(REG_4E); - - return it87_dmi_cb(dmi_entry); -}; - /* * On the Shuttle SN68PT, FAN_CTL2 is apparently not * connected to a fan, but to something else. One user @@ -3726,34 +3705,7 @@ static struct it87_dmi_data nvidia_fn68pt = { .driver_data = data, \ } -#define IT87_DMI_MATCH_GBT(name, cb, data) \ - IT87_DMI_MATCH_VND("Gigabyte Technology Co., Ltd.", name, cb, data) - static const struct dmi_system_id it87_dmi_table[] __initconst = { - IT87_DMI_MATCH_GBT("AB350", it87_sio_force, NULL), - /* ? + IT8792E/IT8795E */ - IT87_DMI_MATCH_GBT("AX370", it87_sio_force, NULL), - /* ? + IT8792E/IT8795E */ - IT87_DMI_MATCH_GBT("Z97X-Gaming G1", it87_sio_force, NULL), - /* ? + IT8790E */ - IT87_DMI_MATCH_GBT("TRX40 AORUS XTREME", it87_sio_force, NULL), - /* IT8688E + IT8792E/IT8795E */ - IT87_DMI_MATCH_GBT("Z390 AORUS ULTRA-CF", it87_sio_force, NULL), - /* IT8688E + IT8792E/IT8795E */ - IT87_DMI_MATCH_GBT("B550 AORUS PRO AC", it87_sio_force, NULL), - /* IT8688E + IT8792E/IT8795E */ - IT87_DMI_MATCH_GBT("X570 AORUS MASTER", it87_sio_force, NULL), - /* IT8688E + IT8792E/IT8795E */ - IT87_DMI_MATCH_GBT("X570 AORUS PRO", it87_sio_force, NULL), - /* IT8688E + IT8792E/IT8795E */ - IT87_DMI_MATCH_GBT("X570 AORUS PRO WIFI", it87_sio_force, NULL), - /* IT8688E + IT8792E/IT8795E */ - IT87_DMI_MATCH_GBT("X570S AERO G", it87_sio_force, NULL), - /* IT8689E + IT87952E */ - IT87_DMI_MATCH_GBT("Z690 AORUS PRO DDR4", it87_sio_force, NULL), - /* IT8689E + IT87952E */ - IT87_DMI_MATCH_GBT("Z690 AORUS PRO", it87_sio_force, NULL), - /* IT8689E + IT87952E */ IT87_DMI_MATCH_VND("nVIDIA", "FN68PT", it87_dmi_cb, &nvidia_fn68pt), { }